cgbase.pas 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. trefaddr = (
  56. addr_no,
  57. addr_full,
  58. addr_pic,
  59. addr_pic_no_got
  60. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS) or defined(SPARC64)}
  61. ,
  62. { since we have only 16bit offsets, we need to be able to specify the high
  63. and lower 16 bits of the address of a symbol of up to 64 bit }
  64. addr_low, // bits 48-63
  65. addr_high, // bits 32-47
  66. {$IF defined(POWERPC64)}
  67. addr_higher, // bits 16-31
  68. addr_highest, // bits 00-15
  69. {$ENDIF}
  70. addr_higha // bits 16-31, adjusted
  71. {$IF defined(POWERPC64)}
  72. ,
  73. addr_highera, // bits 32-47, adjusted
  74. addr_highesta // bits 48-63, adjusted
  75. {$ENDIF}
  76. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS or SPARC64}
  77. {$IFDEF MIPS}
  78. ,
  79. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  80. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  81. addr_high_pic,
  82. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  83. addr_high_call
  84. {$ENDIF}
  85. {$if defined(RISCV32) or defined(RISCV64)}
  86. ,
  87. addr_hi20,
  88. addr_lo12,
  89. addr_pcrel_hi20,
  90. addr_pcrel_lo12,
  91. addr_pcrel
  92. {$endif RISCV}
  93. {$IFDEF AVR}
  94. ,addr_lo8
  95. ,addr_lo8_gs
  96. ,addr_hi8
  97. ,addr_hi8_gs
  98. {$ENDIF}
  99. {$IFDEF i8086}
  100. ,addr_dgroup // the data segment group
  101. ,addr_fardataseg // the far data segment of the current pascal module (unit or program)
  102. ,addr_seg // used for getting the segment of an object, e.g. 'mov ax, SEG symbol'
  103. {$ENDIF}
  104. {$IFDEF AARCH64}
  105. ,addr_page
  106. ,addr_pageoffset
  107. ,addr_gotpage
  108. ,addr_gotpageoffset
  109. {$ENDIF AARCH64}
  110. {$ifdef SPARC64}
  111. ,addr_gdop_hix22
  112. ,addr_gdop_lox22
  113. {$endif SPARC64}
  114. {$IFDEF ARM}
  115. ,addr_gottpoff
  116. ,addr_tpoff
  117. ,addr_tlsgd
  118. ,addr_tlsdesc
  119. ,addr_tlscall
  120. {$ENDIF}
  121. {$IFDEF i386}
  122. ,addr_ntpoff
  123. ,addr_tlsgd
  124. {$ENDIF}
  125. {$ifdef x86_64}
  126. ,addr_tpoff
  127. ,addr_tlsgd
  128. {$endif x86_64}
  129. );
  130. {# Generic opcodes, which must be supported by all processors
  131. }
  132. topcg =
  133. (
  134. OP_NONE,
  135. OP_MOVE, { replaced operation with direct load }
  136. OP_ADD, { simple addition }
  137. OP_AND, { simple logical and }
  138. OP_DIV, { simple unsigned division }
  139. OP_IDIV, { simple signed division }
  140. OP_IMUL, { simple signed multiply }
  141. OP_MUL, { simple unsigned multiply }
  142. OP_NEG, { simple negate }
  143. OP_NOT, { simple logical not }
  144. OP_OR, { simple logical or }
  145. OP_SAR, { arithmetic shift-right }
  146. OP_SHL, { logical shift left }
  147. OP_SHR, { logical shift right }
  148. OP_SUB, { simple subtraction }
  149. OP_XOR, { simple exclusive or }
  150. OP_ROL, { rotate left }
  151. OP_ROR { rotate right }
  152. );
  153. {# Generic flag values - used for jump locations }
  154. TOpCmp =
  155. (
  156. OC_NONE,
  157. OC_EQ, { equality comparison }
  158. OC_GT, { greater than (signed) }
  159. OC_LT, { less than (signed) }
  160. OC_GTE, { greater or equal than (signed) }
  161. OC_LTE, { less or equal than (signed) }
  162. OC_NE, { not equal }
  163. OC_BE, { less or equal than (unsigned) }
  164. OC_B, { less than (unsigned) }
  165. OC_AE, { greater or equal than (unsigned) }
  166. OC_A { greater than (unsigned) }
  167. );
  168. { indirect symbol flags }
  169. tindsymflag = (is_data,is_weak);
  170. tindsymflags = set of tindsymflag;
  171. { OS_NO is also used memory references with large data that can
  172. not be loaded in a register directly }
  173. TCgSize = (OS_NO,
  174. OS_8, OS_16, OS_32, OS_64, OS_128,
  175. OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
  176. { single, double, extended, comp, float128 }
  177. OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
  178. { multi-media sizes, describes only the register size but not how it is split,
  179. this information must be passed separately }
  180. OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
  181. { Register types }
  182. TRegisterType = (
  183. R_INVALIDREGISTER, { = 0 }
  184. R_INTREGISTER, { = 1 }
  185. R_FPUREGISTER, { = 2 }
  186. { used by Intel only }
  187. R_MMXREGISTER, { = 3 }
  188. R_MMREGISTER, { = 4 }
  189. R_SPECIALREGISTER, { = 5 }
  190. R_ADDRESSREGISTER, { = 6 }
  191. { used on llvm, every temp gets its own "base register" }
  192. R_TEMPREGISTER, { = 7 }
  193. { used on llvm for tracking metadata (every unique metadata has its own base register) }
  194. R_METADATAREGISTER { = 8 }
  195. );
  196. { Sub registers }
  197. TSubRegister = (
  198. R_SUBNONE, { = 0; no sub register possible }
  199. R_SUBL, { = 1; 8 bits, Like AL }
  200. R_SUBH, { = 2; 8 bits, Like AH }
  201. R_SUBW, { = 3; 16 bits, Like AX }
  202. R_SUBD, { = 4; 32 bits, Like EAX }
  203. R_SUBQ, { = 5; 64 bits, Like RAX }
  204. { For Sparc floats that use F0:F1 to store doubles }
  205. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  206. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  207. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  208. R_SUBMMS, { = 9; single scalar in multi media register }
  209. R_SUBMMD, { = 10; double scalar in multi media register }
  210. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  211. { For Intel X86 AVX-Register }
  212. R_SUBMMX, { = 12; 128 BITS }
  213. R_SUBMMY, { = 13; 256 BITS }
  214. R_SUBMMZ, { = 14; 512 BITS }
  215. { Subregisters for the flags register (x86) }
  216. R_SUBFLAGCARRY, { = 15; Carry flag }
  217. R_SUBFLAGPARITY, { = 16; Parity flag }
  218. R_SUBFLAGAUXILIARY, { = 17; Auxiliary flag }
  219. R_SUBFLAGZERO, { = 18; Zero flag }
  220. R_SUBFLAGSIGN, { = 19; Sign flag }
  221. R_SUBFLAGOVERFLOW, { = 20; Overflow flag }
  222. R_SUBFLAGINTERRUPT, { = 21; Interrupt enable flag }
  223. R_SUBFLAGDIRECTION, { = 22; Direction flag }
  224. R_SUBMM8B, { = 23; for part of v regs on aarch64 }
  225. R_SUBMM16B, { = 24; for part of v regs on aarch64 }
  226. { subregisters for the metadata register (llvm) }
  227. R_SUBMETASTRING { = 25 }
  228. );
  229. TSubRegisterSet = set of TSubRegister;
  230. TSuperRegister = type word;
  231. {
  232. The new register coding:
  233. SuperRegister (bits 0..15)
  234. Subregister (bits 16..23)
  235. Register type (bits 24..31)
  236. TRegister is defined as an enum to make it incompatible
  237. with TSuperRegister to avoid mixing them
  238. }
  239. TRegister = (
  240. TRegisterLowEnum := Low(longint),
  241. TRegisterHighEnum := High(longint)
  242. );
  243. TRegisterRec=packed record
  244. {$ifdef FPC_BIG_ENDIAN}
  245. regtype : Tregistertype;
  246. subreg : Tsubregister;
  247. supreg : Tsuperregister;
  248. {$else FPC_BIG_ENDIAN}
  249. supreg : Tsuperregister;
  250. subreg : Tsubregister;
  251. regtype : Tregistertype;
  252. {$endif FPC_BIG_ENDIAN}
  253. end;
  254. { A type to store register locations for 64 Bit values. }
  255. {$ifdef cpu64bitalu}
  256. tregister64 = tregister;
  257. tregister128 = record
  258. reglo,reghi : tregister;
  259. end;
  260. {$else cpu64bitalu}
  261. tregister64 = record
  262. reglo,reghi : tregister;
  263. end;
  264. {$endif cpu64bitalu}
  265. Tregistermmxset = record
  266. reg0,reg1,reg2,reg3:Tregister
  267. end;
  268. { Set type definition for registers }
  269. tsuperregisterset = array[byte] of set of byte;
  270. pmmshuffle = ^tmmshuffle;
  271. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  272. passed to an mm operation is nil, it means that the whole location is moved }
  273. tmmshuffle = record
  274. { describes how many shuffles are actually described, if len=0 then
  275. moving the scalar with index 0 to the scalar with index 0 is meant }
  276. len : byte;
  277. { lower nibble of each entry of this array describes index of the source data index while
  278. the upper nibble describes the destination index }
  279. shuffles : array[1..1] of byte;
  280. end;
  281. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  282. Psuperregisterarray=^Tsuperregisterarray;
  283. Tsuperregisterworklist=object
  284. buflength,
  285. buflengthinc,
  286. length:word;
  287. buf:Psuperregisterarray;
  288. constructor init;
  289. constructor copyfrom(const x:Tsuperregisterworklist);
  290. destructor done;
  291. procedure clear;
  292. procedure add(s:tsuperregister);
  293. function addnodup(s:tsuperregister): boolean;
  294. function get:tsuperregister;
  295. function readidx(i:word):tsuperregister;
  296. procedure deleteidx(i:word);
  297. function delete(s:tsuperregister):boolean;
  298. end;
  299. psuperregisterworklist=^tsuperregisterworklist;
  300. const
  301. { alias for easier understanding }
  302. R_SSEREGISTER = R_MMREGISTER;
  303. { Invalid register number }
  304. RS_INVALID = high(tsuperregister);
  305. NR_INVALID = tregister($ffffffff);
  306. tcgsize2size : Array[tcgsize] of integer =
  307. (0,
  308. { integer values }
  309. 1, 2, 4, 8, 16,
  310. 1, 2, 4, 8, 16,
  311. { floating point values }
  312. 4, 8, 10, 8, 16,
  313. { multimedia values }
  314. 1, 2, 4, 8, 16, 32, 64);
  315. tfloat2tcgsize: array[tfloattype] of tcgsize =
  316. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  317. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  318. (s32real,s64real,s80real,s64comp);
  319. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  320. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  321. {$if defined(cpu64bitalu)}
  322. { operand size describing an unsigned value in a pair of int registers }
  323. OS_PAIR = OS_128;
  324. { operand size describing an signed value in a pair of int registers }
  325. OS_SPAIR = OS_S128;
  326. {$elseif defined(cpu32bitalu)}
  327. { operand size describing an unsigned value in a pair of int registers }
  328. OS_PAIR = OS_64;
  329. { operand size describing an signed value in a pair of int registers }
  330. OS_SPAIR = OS_S64;
  331. {$elseif defined(cpu16bitalu)}
  332. { operand size describing an unsigned value in a pair of int registers }
  333. OS_PAIR = OS_32;
  334. { operand size describing an signed value in a pair of int registers }
  335. OS_SPAIR = OS_S32;
  336. {$elseif defined(cpu8bitalu)}
  337. { operand size describing an unsigned value in a pair of int registers }
  338. OS_PAIR = OS_16;
  339. { operand size describing an signed value in a pair of int registers }
  340. OS_SPAIR = OS_S16;
  341. {$endif}
  342. { Table to convert tcgsize variables to the correspondending
  343. unsigned types }
  344. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  345. OS_8, OS_16, OS_32, OS_64, OS_128,
  346. OS_8, OS_16, OS_32, OS_64, OS_128,
  347. OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
  348. OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
  349. tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
  350. OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
  351. OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
  352. OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
  353. OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256,OS_M512);
  354. tcgloc2str : array[TCGLoc] of string[12] = (
  355. 'LOC_INVALID',
  356. 'LOC_VOID',
  357. 'LOC_CONST',
  358. 'LOC_JUMP',
  359. 'LOC_FLAGS',
  360. 'LOC_REG',
  361. 'LOC_CREG',
  362. 'LOC_FPUREG',
  363. 'LOC_CFPUREG',
  364. 'LOC_MMXREG',
  365. 'LOC_CMMXREG',
  366. 'LOC_MMREG',
  367. 'LOC_CMMREG',
  368. 'LOC_SSETREG',
  369. 'LOC_CSSETREG',
  370. 'LOC_SSETREF',
  371. 'LOC_CSSETREF',
  372. 'LOC_CREF',
  373. 'LOC_REF'
  374. );
  375. var
  376. mms_movescalar : pmmshuffle;
  377. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  378. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  379. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  380. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  381. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  382. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  383. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  384. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  385. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  386. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  387. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  388. function generic_regname(r:tregister):string;
  389. {# From a constant numeric value, return the abstract code generator
  390. size.
  391. }
  392. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  393. function int_float_cgsize(const a: tcgint): tcgsize;
  394. function float_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  395. function double_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  396. function tcgsize2str(cgsize: tcgsize):string;
  397. { return the inverse condition of opcmp }
  398. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  399. { return the opcmp needed when swapping the operands }
  400. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  401. { return whether op is commutative }
  402. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  403. { returns true, if shuffle describes a real shuffle operation and not only a move }
  404. function realshuffle(shuffle : pmmshuffle) : boolean;
  405. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  406. function shufflescalar(shuffle : pmmshuffle) : boolean;
  407. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  408. the source }
  409. procedure removeshuffles(var shuffle : tmmshuffle);
  410. implementation
  411. uses
  412. verbose;
  413. {******************************************************************************
  414. tsuperregisterworklist
  415. ******************************************************************************}
  416. constructor tsuperregisterworklist.init;
  417. begin
  418. length:=0;
  419. buflength:=0;
  420. buflengthinc:=16;
  421. buf:=nil;
  422. end;
  423. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  424. begin
  425. self:=x;
  426. if x.buf<>nil then
  427. begin
  428. getmem(buf,buflength*sizeof(Tsuperregister));
  429. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  430. end;
  431. end;
  432. destructor tsuperregisterworklist.done;
  433. begin
  434. if assigned(buf) then
  435. freemem(buf);
  436. end;
  437. procedure tsuperregisterworklist.add(s:tsuperregister);
  438. begin
  439. inc(length);
  440. { Need to increase buffer length? }
  441. if length>=buflength then
  442. begin
  443. inc(buflength,buflengthinc);
  444. buflengthinc:=buflengthinc*2;
  445. if buflengthinc>256 then
  446. buflengthinc:=256;
  447. reallocmem(buf,buflength*sizeof(Tsuperregister));
  448. end;
  449. buf^[length-1]:=s;
  450. end;
  451. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  452. begin
  453. addnodup := false;
  454. if indexword(buf^,length,s) = -1 then
  455. begin
  456. add(s);
  457. addnodup := true;
  458. end;
  459. end;
  460. procedure tsuperregisterworklist.clear;
  461. begin
  462. length:=0;
  463. end;
  464. procedure tsuperregisterworklist.deleteidx(i:word);
  465. begin
  466. if i>=length then
  467. internalerror(200310144);
  468. buf^[i]:=buf^[length-1];
  469. dec(length);
  470. end;
  471. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  472. begin
  473. if (i >= length) then
  474. internalerror(2005010601);
  475. result := buf^[i];
  476. end;
  477. function tsuperregisterworklist.get:tsuperregister;
  478. begin
  479. if length=0 then
  480. internalerror(200310142);
  481. get:=buf^[0];
  482. buf^[0]:=buf^[length-1];
  483. dec(length);
  484. end;
  485. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  486. var
  487. i:longint;
  488. begin
  489. delete:=false;
  490. { indexword in 1.0.x and 1.9.4 is broken }
  491. i:=indexword(buf^,length,s);
  492. if i<>-1 then
  493. begin
  494. deleteidx(i);
  495. delete := true;
  496. end;
  497. end;
  498. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  499. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  500. begin
  501. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  502. end;
  503. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  504. begin
  505. include(regs[s shr 8],(s and $ff));
  506. end;
  507. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  508. begin
  509. exclude(regs[s shr 8],(s and $ff));
  510. end;
  511. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  512. begin
  513. result:=(s and $ff) in regs[s shr 8];
  514. end;
  515. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  516. begin
  517. tregisterrec(result).regtype:=rt;
  518. tregisterrec(result).supreg:=sr;
  519. tregisterrec(result).subreg:=sb;
  520. end;
  521. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  522. begin
  523. result:=tregisterrec(r).subreg;
  524. end;
  525. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  526. begin
  527. result:=tregisterrec(r).supreg;
  528. end;
  529. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  530. begin
  531. result:=tregisterrec(r).regtype;
  532. end;
  533. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  534. begin
  535. tregisterrec(r).subreg:=sr;
  536. end;
  537. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  538. begin
  539. tregisterrec(r).supreg:=sr;
  540. end;
  541. function generic_regname(r:tregister):string;
  542. var
  543. nr : string[12];
  544. begin
  545. str(getsupreg(r),nr);
  546. case getregtype(r) of
  547. R_INTREGISTER:
  548. result:='ireg'+nr;
  549. R_FPUREGISTER:
  550. result:='freg'+nr;
  551. R_MMREGISTER:
  552. result:='mreg'+nr;
  553. R_MMXREGISTER:
  554. result:='xreg'+nr;
  555. R_ADDRESSREGISTER:
  556. result:='areg'+nr;
  557. R_SPECIALREGISTER:
  558. result:='sreg'+nr;
  559. else
  560. begin
  561. result:='INVALID';
  562. exit;
  563. end;
  564. end;
  565. case getsubreg(r) of
  566. R_SUBNONE:
  567. ;
  568. R_SUBL:
  569. result:=result+'l';
  570. R_SUBH:
  571. result:=result+'h';
  572. R_SUBW:
  573. result:=result+'w';
  574. R_SUBD:
  575. result:=result+'d';
  576. R_SUBQ:
  577. result:=result+'q';
  578. R_SUBFS:
  579. result:=result+'fs';
  580. R_SUBFD:
  581. result:=result+'fd';
  582. R_SUBMMD:
  583. result:=result+'md';
  584. R_SUBMMS:
  585. result:=result+'ms';
  586. R_SUBMMWHOLE:
  587. result:=result+'ma';
  588. R_SUBMMX:
  589. result:=result+'mx';
  590. R_SUBMMY:
  591. result:=result+'my';
  592. R_SUBMMZ:
  593. result:=result+'mz';
  594. R_SUBMM8B:
  595. result:=result+'m8b';
  596. else
  597. internalerror(200308252);
  598. end;
  599. end;
  600. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  601. const
  602. size2cgsize : array[0..8] of tcgsize = (
  603. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  604. );
  605. begin
  606. {$ifdef cpu64bitalu}
  607. if a=16 then
  608. result:=OS_128
  609. else
  610. {$endif cpu64bitalu}
  611. if a>8 then
  612. result:=OS_NO
  613. else
  614. result:=size2cgsize[a];
  615. end;
  616. function int_float_cgsize(const a: tcgint): tcgsize;
  617. begin
  618. case a of
  619. 4 :
  620. result:=OS_F32;
  621. 8 :
  622. result:=OS_F64;
  623. 10 :
  624. result:=OS_F80;
  625. 16 :
  626. result:=OS_F128;
  627. else
  628. internalerror(200603211);
  629. end;
  630. end;
  631. function float_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  632. begin
  633. case a of
  634. 4:
  635. result := OS_M32;
  636. 16:
  637. result := OS_M128;
  638. 32:
  639. result := OS_M256;
  640. 64:
  641. result := OS_M512;
  642. else
  643. result := int_cgsize(a);
  644. end;
  645. end;
  646. function double_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  647. begin
  648. case a of
  649. 8:
  650. result := OS_M64;
  651. 16:
  652. result := OS_M128;
  653. 32:
  654. result := OS_M256;
  655. 64:
  656. result := OS_M512;
  657. else
  658. result := int_cgsize(a);
  659. end;
  660. end;
  661. function tcgsize2str(cgsize: tcgsize):string;
  662. begin
  663. Str(cgsize, Result);
  664. end;
  665. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  666. const
  667. list: array[TOpCmp] of TOpCmp =
  668. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  669. OC_B,OC_BE);
  670. begin
  671. inverse_opcmp := list[opcmp];
  672. end;
  673. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  674. const
  675. list: array[TOpCmp] of TOpCmp =
  676. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  677. OC_BE,OC_B);
  678. begin
  679. swap_opcmp := list[opcmp];
  680. end;
  681. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  682. const
  683. list: array[topcg] of boolean =
  684. (true,false,true,true,false,false,true,true,false,false,
  685. true,false,false,false,false,true,false,false);
  686. begin
  687. commutativeop := list[op];
  688. end;
  689. function realshuffle(shuffle : pmmshuffle) : boolean;
  690. var
  691. i : longint;
  692. begin
  693. realshuffle:=true;
  694. if (shuffle=nil) or (shuffle^.len=0) then
  695. realshuffle:=false
  696. else
  697. begin
  698. for i:=1 to shuffle^.len do
  699. begin
  700. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
  701. exit;
  702. end;
  703. realshuffle:=false;
  704. end;
  705. end;
  706. function shufflescalar(shuffle : pmmshuffle) : boolean;
  707. begin
  708. result:=shuffle^.len=0;
  709. end;
  710. procedure removeshuffles(var shuffle : tmmshuffle);
  711. var
  712. i : longint;
  713. begin
  714. if shuffle.len=0 then
  715. exit;
  716. for i:=1 to shuffle.len do
  717. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  718. end;
  719. initialization
  720. new(mms_movescalar);
  721. mms_movescalar^.len:=0;
  722. finalization
  723. dispose(mms_movescalar);
  724. end.