ncginl.pas 35 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncginl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl;
  22. type
  23. tcginlinenode = class(tinlinenode)
  24. procedure pass_generate_code;override;
  25. procedure second_sizeoftypeof;virtual;
  26. procedure second_length;virtual;
  27. procedure second_predsucc;virtual;
  28. procedure second_incdec;virtual;
  29. procedure second_AndOrXorShiftRot_assign;virtual;
  30. procedure second_NegNot_assign;virtual;
  31. procedure second_typeinfo;virtual;
  32. procedure second_includeexclude;virtual;
  33. procedure second_pi; virtual;
  34. procedure second_arctan_real; virtual;
  35. procedure second_abs_real; virtual;
  36. procedure second_sqr_real; virtual;
  37. procedure second_sqrt_real; virtual;
  38. procedure second_ln_real; virtual;
  39. procedure second_cos_real; virtual;
  40. procedure second_sin_real; virtual;
  41. procedure second_assigned; virtual;
  42. procedure second_get_frame;virtual;
  43. procedure second_get_caller_frame;virtual;
  44. procedure second_get_caller_addr;virtual;
  45. procedure second_prefetch; virtual;
  46. procedure second_round_real; virtual;
  47. procedure second_trunc_real; virtual;
  48. procedure second_int_real; virtual;
  49. procedure second_abs_long; virtual;
  50. procedure second_rox_sar; virtual;
  51. procedure second_bsfbsr; virtual;
  52. procedure second_new; virtual;
  53. procedure second_setlength; virtual; abstract;
  54. procedure second_box; virtual; abstract;
  55. procedure second_popcnt; virtual;
  56. procedure second_seg; virtual; abstract;
  57. procedure second_fma; virtual;
  58. procedure second_frac_real; virtual;
  59. end;
  60. implementation
  61. uses
  62. globtype,constexp,
  63. verbose,globals,compinnr,
  64. symconst,symtype,symdef,defutil,
  65. aasmbase,aasmdata,
  66. cgbase,pass_2,
  67. cpubase,procinfo,
  68. ncon,ncal,
  69. tgobj,ncgutil,
  70. cgutils,cgobj,hlcgobj
  71. {$ifndef cpu64bitalu}
  72. ,cg64f32
  73. {$endif not cpu64bitalu}
  74. ;
  75. {*****************************************************************************
  76. TCGINLINENODE
  77. *****************************************************************************}
  78. procedure tcginlinenode.pass_generate_code;
  79. begin
  80. location_reset(location,LOC_VOID,OS_NO);
  81. case inlinenumber of
  82. in_sizeof_x,
  83. in_typeof_x :
  84. second_SizeofTypeOf;
  85. in_length_x :
  86. second_Length;
  87. in_pred_x,
  88. in_succ_x:
  89. second_PredSucc;
  90. in_dec_x,
  91. in_inc_x :
  92. second_IncDec;
  93. in_typeinfo_x:
  94. second_TypeInfo;
  95. in_include_x_y,
  96. in_exclude_x_y:
  97. second_IncludeExclude;
  98. in_pi_real:
  99. second_pi;
  100. in_sin_real:
  101. second_sin_real;
  102. in_arctan_real:
  103. second_arctan_real;
  104. in_abs_real:
  105. second_abs_real;
  106. in_abs_long:
  107. second_abs_long;
  108. in_round_real:
  109. second_round_real;
  110. in_trunc_real:
  111. second_trunc_real;
  112. in_int_real:
  113. second_int_real;
  114. in_sqr_real:
  115. second_sqr_real;
  116. in_sqrt_real:
  117. second_sqrt_real;
  118. in_ln_real:
  119. second_ln_real;
  120. in_cos_real:
  121. second_cos_real;
  122. in_frac_real:
  123. second_frac_real;
  124. in_prefetch_var:
  125. second_prefetch;
  126. in_assigned_x:
  127. second_assigned;
  128. in_get_frame:
  129. second_get_frame;
  130. in_get_caller_frame:
  131. second_get_caller_frame;
  132. in_get_caller_addr:
  133. second_get_caller_addr;
  134. in_unaligned_x:
  135. begin
  136. secondpass(tcallparanode(left).left);
  137. location:=tcallparanode(left).left.location;
  138. if location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  139. location.reference.alignment:=1;
  140. end;
  141. in_aligned_x:
  142. begin
  143. secondpass(tcallparanode(left).left);
  144. location:=tcallparanode(left).left.location;
  145. if location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  146. location.reference.alignment:=resultdef.alignment;
  147. end;
  148. {$ifdef SUPPORT_MMX}
  149. in_mmx_pcmpeqb..in_mmx_pcmpgtw:
  150. begin
  151. location_reset(location,LOC_MMXREGISTER,OS_NO);
  152. if left.location.loc=LOC_REGISTER then
  153. begin
  154. {!!!!!!!}
  155. end
  156. else if tcallparanode(left).left.location.loc=LOC_REGISTER then
  157. begin
  158. {!!!!!!!}
  159. end
  160. else
  161. begin
  162. {!!!!!!!}
  163. end;
  164. end;
  165. {$endif SUPPORT_MMX}
  166. in_rol_x,
  167. in_rol_x_y,
  168. in_ror_x,
  169. in_ror_x_y,
  170. in_sar_x,
  171. in_sar_x_y:
  172. second_rox_sar;
  173. in_bsf_x,
  174. in_bsr_x:
  175. second_BsfBsr;
  176. in_new_x:
  177. second_new;
  178. in_setlength_x:
  179. second_setlength;
  180. in_box_x:
  181. second_box;
  182. in_popcnt_x:
  183. second_popcnt;
  184. in_seg_x:
  185. second_seg;
  186. in_fma_single,
  187. in_fma_double,
  188. in_fma_extended,
  189. in_fma_float128:
  190. second_fma;
  191. in_and_assign_x_y,
  192. in_or_assign_x_y,
  193. in_xor_assign_x_y,
  194. in_sar_assign_x_y,
  195. in_shl_assign_x_y,
  196. in_shr_assign_x_y,
  197. in_rol_assign_x_y,
  198. in_ror_assign_x_y:
  199. second_AndOrXorShiftRot_assign;
  200. in_neg_assign_x,
  201. in_not_assign_x:
  202. second_NegNot_assign;
  203. else internalerror(9);
  204. end;
  205. end;
  206. {*****************************************************************************
  207. SIZEOF / TYPEOF GENERIC HANDLING
  208. *****************************************************************************}
  209. { second_handle_ the sizeof and typeof routines }
  210. procedure tcginlinenode.second_SizeOfTypeOf;
  211. begin
  212. { handled in pass 1 }
  213. internalerror(2015122701);
  214. end;
  215. {*****************************************************************************
  216. LENGTH GENERIC HANDLING
  217. *****************************************************************************}
  218. procedure tcginlinenode.second_Length;
  219. var
  220. lengthlab : tasmlabel;
  221. hregister : tregister;
  222. lendef : tdef;
  223. href : treference;
  224. begin
  225. secondpass(left);
  226. if is_shortstring(left.resultdef) then
  227. begin
  228. location_copy(location,left.location);
  229. location.size:=OS_8;
  230. end
  231. else
  232. begin
  233. { length in ansi/wide strings and high in dynamic arrays is at offset -sizeof(pint) }
  234. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  235. current_asmdata.getjumplabel(lengthlab);
  236. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,left.resultdef,OC_EQ,0,left.location.register,lengthlab);
  237. { the length of a widestring is a 32 bit unsigned int. Since every
  238. character occupies 2 bytes, on a 32 bit platform you can express
  239. the maximum length using 31 bits. On a 64 bit platform, it may be
  240. 32 bits. This means that regardless of the platform, a location
  241. with size OS_SINT/ossinttype can hold the length without
  242. overflowing (this code returns an ossinttype value) }
  243. if is_widestring(left.resultdef) then
  244. lendef:=u32inttype
  245. else
  246. lendef:=ossinttype;
  247. { volatility of the ansistring/widestring refers to the volatility of the
  248. string pointer, not of the string data }
  249. hlcg.reference_reset_base(href,left.resultdef,left.location.register,-lendef.size,lendef.alignment,[]);
  250. { if the string pointer is nil, the length is 0 -> reuse the register
  251. that originally held the string pointer for the length, so that we
  252. can keep the original nil/0 as length in that case }
  253. hregister:=cg.makeregsize(current_asmdata.CurrAsmList,left.location.register,def_cgsize(resultdef));
  254. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,lendef,resultdef,href,hregister);
  255. if is_widestring(left.resultdef) then
  256. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHR,resultdef,1,hregister);
  257. { Dynamic arrays do not have their length attached but their maximum index }
  258. if is_dynamic_array(left.resultdef) then
  259. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_ADD,resultdef,1,hregister);
  260. cg.a_label(current_asmdata.CurrAsmList,lengthlab);
  261. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  262. location.register:=hregister;
  263. end;
  264. end;
  265. {*****************************************************************************
  266. PRED/SUCC GENERIC HANDLING
  267. *****************************************************************************}
  268. procedure tcginlinenode.second_PredSucc;
  269. var
  270. cgop : topcg;
  271. begin
  272. secondpass(left);
  273. if inlinenumber=in_pred_x then
  274. cgop:=OP_SUB
  275. else
  276. cgop:=OP_ADD;
  277. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  278. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  279. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  280. {$ifndef cpu64bitalu}
  281. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  282. begin
  283. location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  284. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  285. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,cgop,def_cgsize(resultdef),1,left.location.register64,location.register64);
  286. end
  287. else
  288. {$endif not cpu64bitalu}
  289. begin
  290. location.register:=hlcg.getregisterfordef(current_asmdata.CurrAsmList,resultdef);
  291. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,1,left.location.register,location.register);
  292. end;
  293. end;
  294. {*****************************************************************************
  295. INC/DEC GENERIC HANDLING
  296. *****************************************************************************}
  297. procedure tcginlinenode.second_IncDec;
  298. const
  299. addsubop:array[in_inc_x..in_dec_x] of TOpCG=(OP_ADD,OP_SUB);
  300. var
  301. addvalue : TConstExprInt;
  302. addconstant : boolean;
  303. {$ifndef cpu64bitalu}
  304. hregisterhi,
  305. {$endif not cpu64bitalu}
  306. hregister : tregister;
  307. begin
  308. { set defaults }
  309. addconstant:=true;
  310. hregister:=NR_NO;
  311. {$ifndef cpu64bitalu}
  312. hregisterhi:=NR_NO;
  313. {$endif not cpu64bitalu}
  314. { first secondpass second argument, because if the first arg }
  315. { is used in that expression then SSL may move it to another }
  316. { register }
  317. if assigned(tcallparanode(left).right) then
  318. secondpass(tcallparanode(tcallparanode(left).right).left);
  319. { load first parameter, must be a reference }
  320. secondpass(tcallparanode(left).left);
  321. { get addvalue }
  322. case tcallparanode(left).left.resultdef.typ of
  323. orddef,
  324. enumdef :
  325. addvalue:=1;
  326. pointerdef :
  327. begin
  328. if is_void(tpointerdef(tcallparanode(left).left.resultdef).pointeddef) then
  329. addvalue:=1
  330. else
  331. addvalue:=tpointerdef(tcallparanode(left).left.resultdef).pointeddef.size;
  332. end;
  333. else
  334. internalerror(10081);
  335. end;
  336. { second_ argument specified?, must be a s32bit in register }
  337. if assigned(tcallparanode(left).right) then
  338. begin
  339. { when constant, just multiply the addvalue }
  340. if is_constintnode(tcallparanode(tcallparanode(left).right).left) then
  341. addvalue:=addvalue*get_ordinal_value(tcallparanode(tcallparanode(left).right).left)
  342. else if is_constpointernode(tcallparanode(tcallparanode(left).right).left) then
  343. addvalue:=addvalue*tpointerconstnode(tcallparanode(tcallparanode(left).right).left).value
  344. else
  345. begin
  346. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,tcallparanode(tcallparanode(left).right).left.resultdef,left.resultdef,addvalue<=1);
  347. hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
  348. {$ifndef cpu64bitalu}
  349. hregisterhi:=tcallparanode(tcallparanode(left).right).left.location.register64.reghi;
  350. {$endif not cpu64bitalu}
  351. { insert multiply with addvalue if its >1 }
  352. if addvalue>1 then
  353. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,left.resultdef,addvalue.svalue,hregister);
  354. addconstant:=false;
  355. end;
  356. end;
  357. { write the add instruction }
  358. if addconstant then
  359. begin
  360. {$ifndef cpu64bitalu}
  361. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  362. cg64.a_op64_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],def_cgsize(left.resultdef),addvalue,tcallparanode(left).left.location)
  363. else
  364. {$endif not cpu64bitalu}
  365. hlcg.a_op_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],left.resultdef,
  366. {$ifdef cpu64bitalu}
  367. aint(addvalue.svalue),
  368. {$else cpu64bitalu}
  369. longint(addvalue.svalue), // can't use aint, because it breaks 16-bit and 8-bit CPUs
  370. {$endif cpu64bitalu}
  371. tcallparanode(left).left.location);
  372. end
  373. else
  374. begin
  375. {$ifndef cpu64bitalu}
  376. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  377. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],def_cgsize(left.resultdef),
  378. joinreg64(hregister,hregisterhi),tcallparanode(left).left.location)
  379. else
  380. {$endif not cpu64bitalu}
  381. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],left.resultdef,
  382. hregister,tcallparanode(left).left.location);
  383. end;
  384. { no overflow checking for pointers (see ninl), and range checking }
  385. { is not applicable for them }
  386. if (tcallparanode(left).left.resultdef.typ <> pointerdef) then
  387. begin
  388. { things which can overflow must NOT pass via here, but have to be }
  389. { handled via a regular add node (conversion in tinlinenode.pass_1) }
  390. { Or someone has to rewrite the above to use a_op_const_reg_reg_ov }
  391. { and friends in case of overflow checking, and ask everyone to }
  392. { implement these methods since they don't exist for all cpus (JM) }
  393. { Similarly, range checking also has to be handled separately, }
  394. { see mantis #14841 (JM) }
  395. if ([cs_check_overflow,cs_check_range] * current_settings.localswitches <> []) then
  396. internalerror(2006111010);
  397. // cg.g_overflowcheck(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).resultdef);
  398. // cg.g_rangecheck(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,
  399. // tcallparanode(left).left.resultdef);
  400. end;
  401. end;
  402. {*****************************************************************************
  403. AND/OR/XOR/SHIFT/ROTATE ASSIGN GENERIC HANDLING
  404. *****************************************************************************}
  405. procedure tcginlinenode.second_AndOrXorShiftRot_assign;
  406. const
  407. andorxorop:array[in_and_assign_x_y..in_ror_assign_x_y] of TOpCG=
  408. (OP_AND,OP_OR,OP_XOR,OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR);
  409. var
  410. maskvalue : TConstExprInt;
  411. maskconstant : boolean;
  412. {$ifndef cpu64bitalu}
  413. hregisterhi,
  414. {$endif not cpu64bitalu}
  415. hregister : tregister;
  416. begin
  417. { set defaults }
  418. maskconstant:=true;
  419. hregister:=NR_NO;
  420. maskvalue:=0;
  421. {$ifndef cpu64bitalu}
  422. hregisterhi:=NR_NO;
  423. {$endif not cpu64bitalu}
  424. { first secondpass first argument, because if the second arg }
  425. { is used in that expression then SSL may move it to another }
  426. { register }
  427. secondpass(tcallparanode(left).left);
  428. { load second parameter, must be a reference }
  429. secondpass(tcallparanode(tcallparanode(left).right).left);
  430. { when constant, just get the maskvalue }
  431. if is_constintnode(tcallparanode(left).left) then
  432. maskvalue:=get_ordinal_value(tcallparanode(left).left)
  433. else
  434. begin
  435. { for shift/rotate the shift count can be of different size than the shifted variable }
  436. if inlinenumber in [in_sar_assign_x_y,in_shl_assign_x_y,in_shr_assign_x_y,in_rol_assign_x_y,in_ror_assign_x_y] then
  437. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,tcallparanode(left).left.resultdef,true)
  438. else
  439. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,tcallparanode(left).right.resultdef,true);
  440. hregister:=tcallparanode(left).left.location.register;
  441. {$ifndef cpu64bitalu}
  442. hregisterhi:=tcallparanode(left).left.location.register64.reghi;
  443. {$endif not cpu64bitalu}
  444. maskconstant:=false;
  445. end;
  446. { write the and/or/xor/sar/shl/shr/rol/ror instruction }
  447. if maskconstant then
  448. begin
  449. if inlinenumber in [in_sar_assign_x_y,in_shl_assign_x_y,in_shr_assign_x_y,in_rol_assign_x_y,in_ror_assign_x_y] then
  450. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  451. maskvalue:=maskvalue and 63
  452. else
  453. maskvalue:=maskvalue and 31;
  454. {$ifndef cpu64bitalu}
  455. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  456. cg64.a_op64_const_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],def_cgsize(tcallparanode(left).right.resultdef),maskvalue.svalue,tcallparanode(tcallparanode(left).right).left.location)
  457. else
  458. {$endif not cpu64bitalu}
  459. hlcg.a_op_const_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],tcallparanode(left).right.resultdef,
  460. {$ifdef cpu64bitalu}
  461. aint(maskvalue.svalue),
  462. {$else cpu64bitalu}
  463. longint(maskvalue.svalue), // can't use aint, because it breaks 16-bit and 8-bit CPUs
  464. {$endif cpu64bitalu}
  465. tcallparanode(tcallparanode(left).right).left.location);
  466. end
  467. else
  468. begin
  469. {$ifndef cpu64bitalu}
  470. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  471. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],def_cgsize(tcallparanode(left).right.resultdef),
  472. joinreg64(hregister,hregisterhi),tcallparanode(tcallparanode(left).right).left.location)
  473. else
  474. {$endif not cpu64bitalu}
  475. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],tcallparanode(left).right.resultdef,
  476. hregister,tcallparanode(tcallparanode(left).right).left.location);
  477. end;
  478. end;
  479. {*****************************************************************************
  480. NEG/NOT ASSIGN GENERIC HANDLING
  481. *****************************************************************************}
  482. procedure tcginlinenode.second_NegNot_assign;
  483. const
  484. negnotop:array[in_neg_assign_x..in_not_assign_x] of TOpCG=(OP_NEG,OP_NOT);
  485. {$ifndef cpu64bitalu}
  486. var
  487. NR_NO64: tregister64=(reglo:NR_NO;reghi:NR_NO);
  488. {$endif not cpu64bitalu}
  489. begin
  490. { load parameter, must be a reference }
  491. secondpass(left);
  492. location_reset(location,LOC_VOID,OS_NO);
  493. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  494. begin
  495. {$ifndef cpu64bitalu}
  496. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  497. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],def_cgsize(left.resultdef),left.location.register64,left.location)
  498. else
  499. {$endif not cpu64bitalu}
  500. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],left.resultdef,left.location.register,left.location);
  501. end
  502. else if left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  503. begin
  504. {$ifndef cpu64bitalu}
  505. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  506. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],def_cgsize(left.resultdef),NR_NO64,left.location)
  507. else
  508. {$endif not cpu64bitalu}
  509. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],left.resultdef,NR_NO,left.location);
  510. end
  511. else
  512. internalerror(2017040701);
  513. end;
  514. {*****************************************************************************
  515. TYPEINFO GENERIC HANDLING
  516. *****************************************************************************}
  517. procedure tcginlinenode.second_typeinfo;
  518. begin
  519. internalerror(2013060301);
  520. end;
  521. {*****************************************************************************
  522. INCLUDE/EXCLUDE GENERIC HANDLING
  523. *****************************************************************************}
  524. procedure tcginlinenode.second_IncludeExclude;
  525. var
  526. setpara, elepara: tnode;
  527. begin
  528. { the set }
  529. secondpass(tcallparanode(left).left);
  530. { the element to set }
  531. secondpass(tcallparanode(tcallparanode(left).right).left);
  532. setpara:=tcallparanode(left).left;
  533. elepara:=tcallparanode(tcallparanode(left).right).left;
  534. if elepara.location.loc=LOC_CONSTANT then
  535. begin
  536. hlcg.a_bit_set_const_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
  537. setpara.resultdef,elepara.location.value-tsetdef(setpara.resultdef).setbase,setpara.location);
  538. end
  539. else
  540. begin
  541. hlcg.location_force_reg(current_asmdata.CurrAsmList,elepara.location,elepara.resultdef,u32inttype,true);
  542. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,u32inttype,elepara.location,tsetdef(setpara.resultdef).setbase);
  543. hlcg.a_bit_set_reg_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
  544. u32inttype,setpara.resultdef,elepara.location.register,setpara.location);
  545. end;
  546. end;
  547. {*****************************************************************************
  548. FLOAT GENERIC HANDLING
  549. *****************************************************************************}
  550. {
  551. These routines all call internal RTL routines, so if they are
  552. called here, they give an internal error
  553. }
  554. procedure tcginlinenode.second_pi;
  555. begin
  556. internalerror(20020718);
  557. end;
  558. procedure tcginlinenode.second_arctan_real;
  559. begin
  560. internalerror(20020718);
  561. end;
  562. procedure tcginlinenode.second_abs_real;
  563. begin
  564. internalerror(20020718);
  565. end;
  566. procedure tcginlinenode.second_round_real;
  567. begin
  568. internalerror(20020718);
  569. end;
  570. procedure tcginlinenode.second_trunc_real;
  571. begin
  572. internalerror(20020718);
  573. end;
  574. procedure tcginlinenode.second_int_real;
  575. begin
  576. internalerror(2016112702);
  577. end;
  578. procedure tcginlinenode.second_sqr_real;
  579. begin
  580. internalerror(20020718);
  581. end;
  582. procedure tcginlinenode.second_sqrt_real;
  583. begin
  584. internalerror(20020718);
  585. end;
  586. procedure tcginlinenode.second_ln_real;
  587. begin
  588. internalerror(20020718);
  589. end;
  590. procedure tcginlinenode.second_cos_real;
  591. begin
  592. internalerror(20020718);
  593. end;
  594. procedure tcginlinenode.second_sin_real;
  595. begin
  596. internalerror(20020718);
  597. end;
  598. procedure tcginlinenode.second_prefetch;
  599. begin
  600. end;
  601. procedure tcginlinenode.second_frac_real;
  602. begin
  603. internalerror(2017052104);
  604. end;
  605. procedure tcginlinenode.second_abs_long;
  606. var
  607. tempreg1, tempreg2: tregister;
  608. begin
  609. secondpass(left);
  610. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  611. location:=left.location;
  612. location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  613. tempreg1:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  614. tempreg2:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  615. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,left.resultdef,left.resultdef.size*8-1,left.location.register,tempreg1);
  616. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_XOR,left.resultdef,left.location.register,tempreg1,tempreg2);
  617. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmlist,OP_SUB,left.resultdef,tempreg1,tempreg2,location.register);
  618. end;
  619. {*****************************************************************************
  620. ASSIGNED GENERIC HANDLING
  621. *****************************************************************************}
  622. procedure tcginlinenode.second_assigned;
  623. begin
  624. internalerror(2013091602);
  625. end;
  626. procedure Tcginlinenode.second_get_frame;
  627. begin
  628. {$if defined(x86) or defined(arm)}
  629. if current_procinfo.framepointer=NR_STACK_POINTER_REG then
  630. begin
  631. location_reset(location,LOC_CONSTANT,OS_ADDR);
  632. location.value:=0;
  633. end
  634. else
  635. {$endif defined(x86) or defined(arm)}
  636. begin
  637. location_reset(location,LOC_CREGISTER,OS_ADDR);
  638. location.register:=current_procinfo.framepointer;
  639. end;
  640. end;
  641. procedure Tcginlinenode.second_get_caller_frame;
  642. var
  643. frame_reg:Tregister;
  644. use_frame_pointer:boolean;
  645. begin
  646. frame_reg:=NR_NO;
  647. if left<>nil then
  648. begin
  649. secondpass(left);
  650. if left.location.loc=LOC_CONSTANT then
  651. use_frame_pointer:=true
  652. else
  653. begin
  654. hlcg.location_force_reg(current_asmdata.currasmlist,left.location,left.resultdef,voidpointertype,false);
  655. frame_reg:=left.location.register;
  656. use_frame_pointer:=false;
  657. end
  658. end
  659. else
  660. begin
  661. use_frame_pointer:=current_procinfo.framepointer=NR_STACK_POINTER_REG;
  662. frame_reg:=current_procinfo.framepointer;
  663. end;
  664. if use_frame_pointer then
  665. begin
  666. location_reset(location,LOC_CREGISTER,OS_ADDR);
  667. location.register:=NR_FRAME_POINTER_REG;
  668. end
  669. else
  670. begin
  671. location_reset_ref(location,LOC_REFERENCE,OS_ADDR,sizeof(pint),[]);
  672. location.reference.base:=frame_reg;
  673. end;
  674. end;
  675. procedure Tcginlinenode.second_get_caller_addr;
  676. var
  677. frame_ref:Treference;
  678. begin
  679. if current_procinfo.framepointer=NR_STACK_POINTER_REG then
  680. begin
  681. location_reset(location,LOC_REGISTER,OS_ADDR);
  682. location.register:=cg.getaddressregister(current_asmdata.currasmlist);
  683. reference_reset_base(frame_ref,NR_STACK_POINTER_REG,{current_procinfo.calc_stackframe_size}tg.lasttemp,sizeof(pint),[]);
  684. cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
  685. end
  686. else
  687. begin
  688. location_reset(location,LOC_REGISTER,OS_ADDR);
  689. location.register:=cg.getaddressregister(current_asmdata.currasmlist);
  690. reference_reset_base(frame_ref,current_procinfo.framepointer,sizeof(pint),sizeof(pint),[]);
  691. cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
  692. end;
  693. end;
  694. procedure tcginlinenode.second_rox_sar;
  695. var
  696. op : topcg;
  697. op1,op2 : tnode;
  698. begin
  699. { one or two parameters? }
  700. if (left.nodetype=callparan) and
  701. assigned(tcallparanode(left).right) then
  702. begin
  703. op1:=tcallparanode(tcallparanode(left).right).left;
  704. op2:=tcallparanode(left).left;
  705. secondpass(op2);
  706. end
  707. else
  708. begin
  709. op1:=left;
  710. op2:=nil;
  711. end;
  712. secondpass(op1);
  713. case inlinenumber of
  714. in_ror_x,
  715. in_ror_x_y:
  716. op:=OP_ROR;
  717. in_rol_x,
  718. in_rol_x_y:
  719. op:=OP_ROL;
  720. in_sar_x,
  721. in_sar_x_y:
  722. op:=OP_SAR;
  723. else
  724. internalerror(2013120110);
  725. end;
  726. hlcg.location_force_reg(current_asmdata.CurrAsmList,op1.location,op1.resultdef,resultdef,true);
  727. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  728. {$ifndef cpu64bitalu}
  729. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  730. begin
  731. location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  732. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  733. end
  734. else
  735. {$endif not cpu64bitalu}
  736. location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  737. if assigned(op2) then
  738. begin
  739. { rotating by a constant directly coded: }
  740. if op2.nodetype=ordconstn then
  741. {$ifndef cpu64bitalu}
  742. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  743. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,op,def_cgsize(resultdef),
  744. tordconstnode(op2).value.uvalue and (resultdef.size*8-1),
  745. op1.location.register64, location.register64)
  746. else
  747. {$endif not cpu64bitalu}
  748. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,
  749. tordconstnode(op2).value.uvalue and (resultdef.size*8-1),
  750. op1.location.register, location.register)
  751. else
  752. begin
  753. {$ifndef cpu64bitalu}
  754. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  755. begin
  756. hlcg.location_force_reg(current_asmdata.CurrAsmList,op2.location,
  757. op2.resultdef,alusinttype,true);
  758. cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,op,def_cgsize(resultdef),
  759. joinreg64(op2.location.register,NR_NO),op1.location.register64,
  760. location.register64);
  761. end
  762. else
  763. {$endif not cpu64bitalu}
  764. begin
  765. hlcg.location_force_reg(current_asmdata.CurrAsmList,op2.location,
  766. op2.resultdef,resultdef,true);
  767. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,resultdef,
  768. op2.location.register,op1.location.register,
  769. location.register);
  770. end;
  771. end;
  772. end
  773. else
  774. {$ifndef cpu64bitalu}
  775. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  776. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,op,def_cgsize(resultdef),1,
  777. op1.location.register64,location.register64)
  778. else
  779. {$endif not cpu64bitalu}
  780. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,1,
  781. op1.location.register,location.register);
  782. end;
  783. procedure tcginlinenode.second_BsfBsr;
  784. var
  785. reverse: boolean;
  786. opsize: tcgsize;
  787. begin
  788. reverse:=(inlinenumber = in_bsr_x);
  789. secondpass(left);
  790. opsize:=tcgsize2unsigned[left.location.size];
  791. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  792. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(opsize),true);
  793. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  794. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  795. cg.a_bit_scan_reg_reg(current_asmdata.CurrAsmList,reverse,opsize,location.size,left.location.register,location.register);
  796. end;
  797. procedure tcginlinenode.second_new;
  798. begin
  799. internalerror(2011012202);
  800. end;
  801. procedure tcginlinenode.second_popcnt;
  802. begin
  803. internalerror(2012082601);
  804. end;
  805. procedure tcginlinenode.second_fma;
  806. begin
  807. internalerror(2014032701);
  808. end;
  809. begin
  810. cinlinenode:=tcginlinenode;
  811. end. s