m68k.inc 18 KB

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  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 1999-2000 by Carl-Eric Codere,
  4. member of the Free Pascal development team.
  5. See the file COPYING.FPC, included in this distribution,
  6. for details about the copyright.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  10. **********************************************************************}
  11. {****************************************************************************
  12. m68k.inc : Processor dependent implementation of system unit
  13. For Motorola 680x0 Processor.
  14. *****************************************************************************}
  15. {****************************************************************************}
  16. { Credit where credit is due: }
  17. { -Some of the copy routines taken from the Atari dlib source code: }
  18. { Dale Schumacher (alias: Dalnefre') [email protected] }
  19. { 399 Beacon Ave. St. Paul, MN 55104,USA }
  20. { -Some of the routines taken from the freeware ATARI Sozobon C compiler }
  21. { 1988 by Sozobon, Limited. Author: Johann Ruegg (freeware) }
  22. { Thanks to all these people wherever they maybe today! }
  23. {****************************************************************************}
  24. {$IF DEFINED(FPU68881) OR DEFINED(FPUCOLDFIRE)}
  25. function GetFPCR: DWord; assembler; nostackframe;
  26. asm
  27. fmove.l fpcr,d0
  28. end;
  29. function GetFPSR: DWord; assembler; nostackframe;
  30. asm
  31. fmove.l fpsr, d0
  32. end;
  33. procedure SetFPCR(x: DWord); assembler; nostackframe;
  34. asm
  35. fmove.l x, fpcr
  36. end;
  37. procedure SetFPSR(x: DWord); assembler; nostackframe;
  38. asm
  39. fmove.l x, fpsr
  40. end;
  41. {$DEFINE FPC_SYSTEM_HAS_SYSRESETFPU}
  42. procedure SysResetFPU;
  43. begin
  44. SetFPCR(Default68KFPCR);
  45. SetFPSR(0);
  46. end;
  47. {$DEFINE FPC_SYSTEM_HAS_SYSINITFPU}
  48. procedure SysInitFPU;
  49. begin
  50. end;
  51. procedure fpc_cpuinit;
  52. begin
  53. if IsLibrary then
  54. begin
  55. Default68kFPCR:=GetFPCR;
  56. end;
  57. SysResetFPU;
  58. end;
  59. {$ELSE}
  60. procedure fpc_cpuinit;
  61. begin
  62. SysResetFPU;
  63. if (not IsLibrary) then
  64. SysInitFPU;
  65. end;
  66. {$ENDIF}
  67. {$ifndef INTERNAL_BACKTRACE}
  68. {$define FPC_SYSTEM_HAS_GET_FRAME}
  69. function get_frame : pointer; assembler;nostackframe;
  70. asm
  71. move.l fp,d0
  72. end;
  73. {$endif not INTERNAL_BACKTRACE}
  74. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  75. function get_caller_addr(framebp : pointer;addr:pointer=nil) : pointer; assembler;
  76. asm
  77. move.l framebp,d0
  78. tst.l d0
  79. beq @Lnul_address
  80. move.l d0,a0
  81. move.l 4(a0),d0
  82. @Lnul_address:
  83. end;
  84. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  85. function get_caller_frame(framebp : pointer;addr:pointer=nil) : pointer; assembler;
  86. asm
  87. move.l framebp,d0
  88. tst.l d0
  89. beq @Lnul_frame
  90. move.l d0,a0
  91. move.l (a0),d0
  92. @Lnul_frame:
  93. end;
  94. {$define FPC_SYSTEM_HAS_SPTR}
  95. function Sptr : pointer; assembler;nostackframe;
  96. asm
  97. move.l sp,d0
  98. end;
  99. {$define FPC_SYSTEM_HAS_GET_PC_ADDR}
  100. function get_pc_addr : pointer;assembler;nostackframe;
  101. asm
  102. move.l (sp),d0
  103. end;
  104. {$define FPC_SYSTEM_HAS_FILLCHAR}
  105. procedure FillChar(var x; count : longint; value : byte); assembler; register; nostackframe;
  106. asm
  107. {$ifdef VER3_0}
  108. move.l x,a0
  109. move.l count,d0
  110. clr.l d1
  111. move.b value,d1
  112. {$endif VER3_0}
  113. { a0 is x, d0 is count, d1 is value }
  114. tst.l d0 { anything to fill at all? }
  115. ble @Lquit
  116. cmp.l #32,d0 { limits were tested against real hardware on various CPU }
  117. blt @LfillByte
  118. cmp.l #128,d0 { limits were tested against real hardware on various CPU }
  119. blt @LfillWord
  120. bra @LfillDWord
  121. {$ifndef CPUM68K_HAS_DBRA}
  122. @LfillByte:
  123. {$endif}
  124. @LfillByteLoop:
  125. move.b d1,(a0)+
  126. {$ifdef CPUM68K_HAS_DBRA}
  127. @LfillByte:
  128. dbra d0,@LfillByteLoop
  129. {$else}
  130. subq.l #1,d0
  131. bne @LfillByteLoop
  132. {$endif}
  133. rts
  134. @LfillWord:
  135. move.l d2,-(sp)
  136. move.l a0,d2
  137. btst #0,d2
  138. beq @Leven
  139. subq.l #1,d0
  140. move.b d1,(a0)+
  141. @Leven:
  142. move.b d1,d2 // copy value to upper byte
  143. {$ifdef CPUCOLDFIRE}
  144. lsl.l #8,d1
  145. {$else}
  146. lsl.w #8,d1
  147. {$endif}
  148. move.b d2,d1
  149. move.l d0,d2 // adjust d0 for leftover copy
  150. bclr #0,d2
  151. sub.l d2,d0
  152. lsr.l #1,d2
  153. {$ifdef CPUM68K_HAS_DBRA}
  154. subq.l #1,d2
  155. {$endif}
  156. @LfillWordLoop:
  157. move.w d1,(a0)+
  158. {$ifdef CPUM68K_HAS_DBRA}
  159. dbra d2,@LFillWordLoop
  160. {$else}
  161. subq.l #1,d2
  162. bne @LfillWordLoop
  163. {$endif}
  164. move.l (sp)+,d2
  165. tst.l d0
  166. bne @LfillByte
  167. rts
  168. @LfillDWord:
  169. move.l d2,-(sp)
  170. move.b d1,d2 // copy value to upper bytes
  171. {$ifdef CPUCOLDFIRE}
  172. lsl.l #8,d1
  173. {$else}
  174. lsl.w #8,d1
  175. {$endif}
  176. move.b d2,d1
  177. move.w d1,d2
  178. swap d1
  179. move.w d2,d1
  180. move.l a0,d2 // do initial byte and word fill, if the address is unaligned
  181. btst #0,d2
  182. beq @Ldeven
  183. subq.l #1,d0
  184. move.b d1,(a0)+
  185. @Ldeven:
  186. move.l a0,d2
  187. btst #1,d2
  188. beq @Ldquad
  189. subq.l #2,d0
  190. move.w d1,(a0)+
  191. @Ldquad:
  192. move.l d0,d2 // adjust d0 for leftover copy
  193. {$ifdef CPUCOLDFIRE}
  194. and.l #$fffffffc,d2
  195. {$else}
  196. and.b #$fc,d2
  197. {$endif}
  198. sub.l d2,d0
  199. lsr.l #2,d2
  200. bra @LfillLongLoopStart
  201. @LfillLongLoop:
  202. move.l d1,(a0)+
  203. move.l d1,(a0)+
  204. move.l d1,(a0)+
  205. move.l d1,(a0)+
  206. subq.l #4,d2
  207. @LfillLongLoopStart:
  208. cmp.l #4,d2
  209. bgt @LfillLongLoop
  210. {$ifdef CPUM68K_HAS_DBRA}
  211. subq.l #1,d2
  212. {$endif}
  213. @LfillDWordLoop:
  214. move.l d1,(a0)+
  215. {$ifdef CPUM68K_HAS_DBRA}
  216. dbra d2,@LFillDWordLoop
  217. {$else}
  218. subq.l #1,d2
  219. bne @LfillDWordLoop
  220. {$endif}
  221. move.l (sp)+,d2
  222. tst.l d0
  223. bne @LfillByte
  224. @Lquit:
  225. end;
  226. {$ifdef dummy}
  227. { procedure strcopy(dstr,sstr : pointer;len : longint);[public,alias: 'STRCOPY'];}
  228. procedure strcopy; assembler;[public,alias: 'FPC_STRCOPY'];
  229. {---------------------------------------------------}
  230. { Low-level routine to copy a string to another }
  231. { string with maximum length. Never call directly! }
  232. { On Entry: }
  233. { a1.l = string to copy to }
  234. { a0.l = source string }
  235. { d0.l = maximum length of copy }
  236. { registers destroyed: a0,a1,d0,d1 }
  237. {---------------------------------------------------}
  238. asm
  239. { move.l sstr,a0
  240. move.l dstr,a1
  241. move.l len,d1 }
  242. move.l d0,d1
  243. move.b (a0)+,d0 { Get source length }
  244. and.w #$ff,d0
  245. cmp.w d1,d0 { This is a signed comparison! }
  246. ble @LM4
  247. move.b d1,d0 { If longer than maximum size of target, cut
  248. source length }
  249. @LM4:
  250. andi.l #$ff,d0 { zero extend d0-byte }
  251. move.l d0,d1 { save length to copy }
  252. move.b d0,(a1)+ { save new length }
  253. { Check if copying length is zero - if so then }
  254. { exit without copying anything. }
  255. tst.b d1
  256. beq @Lend
  257. bra @LMSTRCOPY55
  258. @LMSTRCOPY56: { 68010 Fast loop mode }
  259. move.b (a0)+,(a1)+
  260. @LMSTRCOPY55:
  261. {$ifndef CPUM68K_HAS_DBRA}
  262. sub.l #1,d1
  263. bpl @LMSTRCOPY56
  264. {$else CPUM68K_HAS_DBRA}
  265. dbra d1,@LMSTRCOPY56
  266. {$endif CPUM68K_HAS_DBRA}
  267. @Lend:
  268. end;
  269. { Concatenate Strings }
  270. { PARAMETERS ARE REVERSED COMPARED TO NORMAL! }
  271. { therefore online assembler may not parse the params as normal }
  272. procedure strconcat(s1,s2 : pointer);[public,alias: 'STRCONCAT'];
  273. begin
  274. asm
  275. move.b #255,d0
  276. move.l s1,a0 { a0 = destination }
  277. move.l s2,a1 { a1 = source }
  278. sub.b (a0),d0 { copyl:= 255 -length(s1) }
  279. move.b (a1),d6
  280. and.w #$ff,d0 { Sign flags are checked! }
  281. and.w #$ff,d6
  282. cmp.w d6,d0 { if copyl > length(s2) then }
  283. ble @Lcontinue
  284. move.b (a1),d0 { copyl:=length(s2) }
  285. @Lcontinue:
  286. move.b (a0),d6
  287. and.l #$ff,d6
  288. lea 1(a0,d6),a0 { s1[length(s1)+1] }
  289. add.l #1,a1 { s2[1] }
  290. move.b d0,d6
  291. { Check if copying length is zero - if so then }
  292. { exit without copying anything. }
  293. tst.b d6
  294. beq @Lend
  295. bra @ALoop
  296. @Loop:
  297. move.b (a1)+,(a0)+ { s1[i] := s2[i]; }
  298. @ALoop:
  299. {$ifndef CPUM68K_HAS_DBRA}
  300. sub.l #1,d6
  301. bpl @Loop
  302. {$else CPUM68K_HAS_DBRA}
  303. dbra d6,@Loop
  304. {$endif CPUM68K_HAS_DBRA}
  305. move.l s1,a0
  306. add.b d0,(a0) { change to new string length }
  307. @Lend:
  308. end ['d0','d1','a0','a1','d6'];
  309. end;
  310. { Compares strings }
  311. { DO NOT CALL directly. }
  312. { a0 = pointer to first string to compare }
  313. { a1 = pointer to second string to compare }
  314. { ALL FLAGS are set appropriately. }
  315. { ZF = strings are equal }
  316. { REGISTERS DESTROYED: a0, a1, d0, d1, d6 }
  317. procedure strcmp; assembler;[public,alias:'FPC_STRCMP'];
  318. asm
  319. move.b (a0)+,d0 { Get length of first string }
  320. move.b (a1)+,d6 { Get length of 2nd string }
  321. move.b d6,d1 { Save length of string for final compare }
  322. cmp.b d0,d6 { Get shortest string length }
  323. ble @LSTRCONCAT1
  324. move.b d0,d6 { Set length to shortest string }
  325. @LSTRCONCAT1:
  326. tst.b d6 { Both strings have a length of zero, exit }
  327. beq @LSTRCONCAT2
  328. andi.l #$ff,d6
  329. subq.l #1,d6 { subtract first attempt }
  330. { if value is -1 then don't loop and just compare lengths of }
  331. { both strings before exiting. }
  332. bmi @LSTRCONCAT2
  333. or.l d0,d0 { Make sure to set Zerfo flag to 0 }
  334. @LSTRCONCAT5:
  335. { Workaroung for GAS v.134 bug }
  336. { old: cmp.b (a1)+,(a0)+ }
  337. cmpm.b (a1)+,(a0)+
  338. @LSTRCONCAT4:
  339. dbne d6,@LSTRCONCAT5 { Repeat until not equal }
  340. bne @LSTRCONCAT3
  341. @LSTRCONCAT2:
  342. { If length of both string are equal }
  343. { Then set zero flag }
  344. cmp.b d1,d0 { Compare length - set flag if equal length strings }
  345. @LSTRCONCAT3:
  346. end;
  347. {$endif dummy}
  348. {$define FPC_SYSTEM_HAS_MOVE}
  349. procedure move(const source;var dest;count : longint); assembler;
  350. { base pointer+8 = source }
  351. { base pointer+12 = destination }
  352. { base pointer+16 = number of bytes to move}
  353. asm
  354. move.l count, d0 { number of bytes }
  355. ble @LMOVE5 { anything to copy at all? }
  356. move.l dest, a1 { destination }
  357. move.l source, a0 { source }
  358. {$ifdef CPUM68K_HAS_DBRA}
  359. cmpi.l #65535, d0 { check, if this is a word move }
  360. ble @LMEMSET00 { use fast dbra mode 68010+ }
  361. {$endif CPUM68K_HAS_DBRA}
  362. cmp.l a0,a1 { check copy direction }
  363. bls @LMOVE3
  364. add.l d0,a0 { move pointers to end }
  365. add.l d0,a1
  366. @LMOVE1:
  367. move.b -(a0),-(a1) { (s < d) copy loop }
  368. subq.l #1,d0
  369. bne @LMOVE1
  370. bra @LMOVE5
  371. @LMOVE3:
  372. move.b (a0)+,(a1)+ { (s >= d) copy loop }
  373. subq.l #1,d0
  374. bne @LMOVE3
  375. bra @LMOVE5
  376. {$ifdef CPUM68K_HAS_DBRA}
  377. @LMEMSET00: { use fast loop mode 68010+ }
  378. cmp.l a0,a1 { check copy direction }
  379. bls @LMOVE04
  380. add.l d0,a0 { move pointers to end }
  381. add.l d0,a1
  382. bra @LMOVE02
  383. @LMOVE01:
  384. move.b -(a0),-(a1) { (s < d) copy loop }
  385. @LMOVE02:
  386. dbra d0,@LMOVE01
  387. bra @LMOVE5
  388. @LMOVE03:
  389. move.b (a0)+,(a1)+ { (s >= d) copy loop }
  390. @LMOVE04:
  391. dbra d0,@LMOVE03
  392. {$endif CPUM68K_HAS_DBRA}
  393. { end fast loop mode }
  394. @LMOVE5:
  395. end;
  396. {$ifdef CPUM68K_HAS_UNALIGNED}
  397. {$define FPC_SYSTEM_HAS_FILLWORD}
  398. procedure FillWord(var x; count : longint; value : word); assembler;
  399. asm
  400. move.l x, a0 { destination }
  401. move.w value, d1 { fill data }
  402. move.l count, d0 { number of bytes to fill }
  403. ble @LMEMSET3 { anything to fill at all? }
  404. bra @LMEMSET21
  405. @LMEMSET11:
  406. move.w d1,(a0)+
  407. @LMEMSET21:
  408. subq.l #1,d0
  409. bpl @LMEMSET11
  410. @LMEMSET3:
  411. end;
  412. {$endif}
  413. {$IFNDEF FPC_SYSTEM_HAS_INTERLOCKEDFUNCS}
  414. function InterLockedDecrement (var Target: longint) : longint;
  415. {$IFDEF CPUM68K_HAS_CAS}
  416. register; assembler;
  417. asm
  418. move.l (a0), d0
  419. @loop:
  420. move.l d0, d1
  421. subq.l #1, d1
  422. cas.l d0, d1, (a0)
  423. bne @loop
  424. move.l d1, d0
  425. end;
  426. {$ELSE}
  427. begin
  428. {$warning FIX ME}
  429. Dec(Target);
  430. Result := Target;
  431. end;
  432. {$ENDIF}
  433. function InterLockedIncrement (var Target: longint) : longint;
  434. {$IFDEF CPUM68K_HAS_CAS}
  435. register; assembler;
  436. asm
  437. move.l (a0), d0
  438. @loop:
  439. move.l d0, d1
  440. addq.l #1, d1
  441. cas.l d0, d1, (a0)
  442. bne @loop
  443. move.l d1, d0
  444. end;
  445. {$ELSE}
  446. begin
  447. {$warning FIX ME}
  448. Inc(Target);
  449. Result := Target;
  450. end;
  451. {$ENDIF}
  452. function InterLockedExchange (var Target: longint;Source : longint) : longint;
  453. {$IFDEF CPUM68K_HAS_CAS}
  454. register; assembler;
  455. asm
  456. move.l Source, d1
  457. move.l (a0), d0
  458. @loop:
  459. cas.l d0, d1, (a0)
  460. bne @loop
  461. end;
  462. {$ELSE}
  463. begin
  464. {$warning FIX ME}
  465. Result := Target;
  466. Target := Source;
  467. end;
  468. {$ENDIF}
  469. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint;
  470. {$IFDEF CPUM68K_HAS_CAS}
  471. register; assembler;
  472. asm
  473. move.l Source, a1
  474. move.l (a0), d0
  475. @loop:
  476. move.l a1, d1
  477. add.l d0, d1
  478. cas.l d0, d1, (a0)
  479. bne @loop
  480. end;
  481. {$ELSE}
  482. begin
  483. {$warning FIX ME}
  484. Result := Target;
  485. Target := Target + Source;
  486. end;
  487. {$ENDIF}
  488. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint;
  489. {$IFDEF CPUM68K_HAS_CAS}
  490. register; assembler;
  491. asm
  492. // Target = a0, NewValue = d0, Comperand = d1
  493. exg.l d0, d1
  494. cas.l d0, d1, (a0)
  495. end;
  496. {$ELSE}
  497. begin
  498. {$warning FIX ME}
  499. Result := Target;
  500. if Target = Comperand then
  501. Target := NewValue;
  502. end;
  503. {$ENDIF}
  504. {$ENDIF FPC_SYSTEM_HAS_INTERLOCKEDFUNCS}
  505. {$ifndef FPC_SYSTEM_HAS_TEST68K}
  506. procedure Test68k(var CPU: byte; var FPU: byte);
  507. begin
  508. {$warning Implement me!}
  509. CPU:=0;
  510. FPU:=0;
  511. end;
  512. {$endif}
  513. {$if defined(CPUM68K_HAS_BYTEREV) or defined(CPUM68K_HAS_ROLROR)}
  514. { Disabled for now, because not all cases below were tested. (KB) }
  515. {.$define FPC_SYSTEM_HAS_SWAPENDIAN}
  516. {$endif}
  517. {$if defined(FPC_SYSTEM_HAS_SWAPENDIAN)}
  518. function SwapEndian(const AValue: SmallInt): SmallInt; assembler; nostackframe;
  519. asm
  520. {$if defined(CPUM68K_HAS_ROLROR)}
  521. move.w avalue, d0
  522. ror.w #8, d0
  523. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  524. move.w avalue, d0
  525. byterev d0
  526. swap d0
  527. {$else}
  528. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  529. clr.l d0
  530. move.w avalue, d0
  531. move.w d0, d1
  532. lsr.l #8, d0
  533. lsl.l #8, d1
  534. or.l d1, d0
  535. {$endif}
  536. end;
  537. function SwapEndian(const AValue: Word): Word; assembler; nostackframe;
  538. asm
  539. {$if defined(CPUM68K_HAS_ROLROR)}
  540. move.w avalue, d0
  541. ror.w #8, d0
  542. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  543. move.w avalue, d0
  544. byterev d0
  545. swap d0
  546. {$else}
  547. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  548. clr.l d0
  549. move.w avalue, d0
  550. move.w d0, d1
  551. lsr.l #8, d0
  552. lsl.l #8, d1
  553. or.l d1, d0
  554. {$endif}
  555. end;
  556. function SwapEndian(const AValue: LongInt): LongInt; assembler; nostackframe;
  557. asm
  558. {$if defined(CPUM68K_HAS_ROLROR)}
  559. move.l avalue, d0
  560. ror.w #8, d0
  561. swap d0
  562. ror.w #8, d0
  563. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  564. move.l avalue, d0
  565. byterev d0
  566. {$else}
  567. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  568. move.l avalue, d0
  569. move.l d0, d1
  570. andi.l #$ff00ff00, d0
  571. andi.l #$00ff00ff, d1
  572. lsr.l #8, d0
  573. lsl.l #8, d1
  574. or.l d1, d0
  575. swap d0
  576. {$endif}
  577. end;
  578. function SwapEndian(const AValue: DWord): DWord; assembler; nostackframe;
  579. asm
  580. {$if defined(CPUM68K_HAS_ROLROR)}
  581. move.l avalue, d0
  582. ror.w #8, d0
  583. swap d0
  584. ror.w #8, d0
  585. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  586. move.l avalue, d0
  587. byterev d0
  588. {$else}
  589. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  590. move.l avalue, d0
  591. move.l d0, d1
  592. andi.l #$ff00ff00, d0
  593. andi.l #$00ff00ff, d1
  594. lsr.l #8, d0
  595. lsl.l #8, d1
  596. or.l d1, d0
  597. swap d0
  598. {$endif}
  599. end;
  600. function SwapEndian(const AValue: Int64): Int64; assembler; nostackframe;
  601. asm
  602. {$if defined(CPUM68K_HAS_ROLROR)}
  603. move.l avalue+4, d0
  604. ror.w #8, d0
  605. swap d0
  606. ror.w #8, d0
  607. move.l avalue, d1
  608. ror.w #8, d1
  609. swap d1
  610. ror.w #8, d1
  611. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  612. move.l avalue+4, d0
  613. move.l avalue, d1
  614. byterev d0
  615. byterev d1
  616. {$else}
  617. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  618. move.l d2, -(sp)
  619. move.l avalue+4, d0
  620. move.l d0, d1
  621. andi.l #$ff00ff00, d0
  622. andi.l #$00ff00ff, d1
  623. lsr.l #8, d0
  624. lsl.l #8, d1
  625. or.l d1, d0
  626. swap d0
  627. move.l avalue, d1
  628. move.l d1, d2
  629. andi.l #$ff00ff00, d1
  630. andi.l #$00ff00ff, d2
  631. lsr.l #8, d1
  632. lsl.l #8, d2
  633. or.l d2, d1
  634. swap d1
  635. move.l (sp)+, d2
  636. {$endif}
  637. end;
  638. function SwapEndian(const AValue: QWord): QWord; assembler; nostackframe;
  639. asm
  640. {$if defined(CPUM68K_HAS_ROLROR)}
  641. move.l avalue+4, d0
  642. ror.w #8, d0
  643. swap d0
  644. ror.w #8, d0
  645. move.l avalue, d1
  646. ror.w #8, d1
  647. swap d1
  648. ror.w #8, d1
  649. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  650. move.l avalue+4, d0
  651. move.l avalue, d1
  652. byterev d0
  653. byterev d1
  654. {$else}
  655. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  656. move.l d2, -(sp)
  657. move.l avalue+4, d0
  658. move.l d0, d1
  659. andi.l #$ff00ff00, d0
  660. andi.l #$00ff00ff, d1
  661. lsr.l #8, d0
  662. lsl.l #8, d1
  663. or.l d1, d0
  664. swap d0
  665. move.l avalue, d1
  666. move.l d1, d2
  667. andi.l #$ff00ff00, d1
  668. andi.l #$00ff00ff, d2
  669. lsr.l #8, d1
  670. lsl.l #8, d2
  671. or.l d2, d1
  672. swap d1
  673. move.l (sp)+, d2
  674. {$endif}
  675. end;
  676. {$endif FPC_SYSTEM_HAS_SWAPENDIAN}
  677. procedure fpc_cpucodeinit;
  678. begin
  679. Test68k(Test68000,Test68881);
  680. end;