Jonas Maebe 61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm) 10 anni fa
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a64att.inc c0548cadb0 * added some missing instructions and aliases, reordered them according 10 anni fa
a64atts.inc c0548cadb0 * added some missing instructions and aliases, reordered them according 10 anni fa
a64ins.dat c0548cadb0 * added some missing instructions and aliases, reordered them according 10 anni fa
a64nop.inc 0197b84b7f + instruction table generator for arm64 13 anni fa
a64op.inc c0548cadb0 * added some missing instructions and aliases, reordered them according 10 anni fa
a64reg.dat f1fb880f18 * fixed debug register values for vector registers 10 anni fa
a64tab.inc 0197b84b7f + instruction table generator for arm64 13 anni fa
aasmcpu.pas 67b8aceaee * synchronized with privatetrunk till r30095 10 anni fa
agcpugas.pas 879afbb7be * removed -Oodfa warnings 10 anni fa
aoptcpu.pas e1af3ecc5d + assembler optimizer unit skeleton 13 anni fa
aoptcpub.pas 55bc5d7972 * completed TAoptBaseCpu.RegModifiedByInstruction() 10 anni fa
aoptcpud.pas e1af3ecc5d + assembler optimizer unit skeleton 13 anni fa
cgcpu.pas 61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm) 10 anni fa
cpubase.pas bc5a33ffac * fixed flags_to_cond() and inverse_cond() for C_GE 10 anni fa
cpuinfo.pas 14bd77f11c * removed ARM copy/paste stuff 10 anni fa
cpunode.pas 1de8e53edd + AArch64 jump table support 10 anni fa
cpupara.pas bd203a5b57 * synchronised with trunk till r30240 10 anni fa
cpupi.pas 41fba0c4f7 * switched to using the stack pointer as base register for the temp allocator 10 anni fa
cputarg.pas 5bdd14e252 + AArch64 cputarg 10 anni fa
hlcgcpu.pas 67b8aceaee * synchronized with privatetrunk till r30095 10 anni fa
itcpugas.pas 046184dfe9 + ARM64 GAS instruction table unit 13 anni fa
ncpuadd.pas b821e31442 * force constants into a registers in the 32x32->64 optimized case 10 anni fa
ncpucnv.pas a81e81c775 + override second_int_to_bool(), because the generic version assumes that 10 anni fa
ncpuinl.pas 41fba0c4f7 * switched to using the stack pointer as base register for the temp allocator 10 anni fa
ncpumat.pas ada5060a34 * set pi_do_call for AArch64 mod/div nodes, as they call FPC_DIVBYZERO 10 anni fa
ncpumem.pas 07f31d560c + also perform sign/zero-extensions of the index in vecn using extended 10 anni fa
ncpuset.pas 1de8e53edd + AArch64 jump table support 10 anni fa
ra64con.inc 9c55fa6f6c + FPCR, FPSR and TPIDR registers 10 anni fa
ra64dwa.inc f1fb880f18 * fixed debug register values for vector registers 10 anni fa
ra64nor.inc 9c55fa6f6c + FPCR, FPSR and TPIDR registers 10 anni fa
ra64num.inc 9c55fa6f6c + FPCR, FPSR and TPIDR registers 10 anni fa
ra64rni.inc 9c55fa6f6c + FPCR, FPSR and TPIDR registers 10 anni fa
ra64sri.inc 9c55fa6f6c + FPCR, FPSR and TPIDR registers 10 anni fa
ra64sta.inc f1fb880f18 * fixed debug register values for vector registers 10 anni fa
ra64std.inc 9c55fa6f6c + FPCR, FPSR and TPIDR registers 10 anni fa
ra64sup.inc 9c55fa6f6c + FPCR, FPSR and TPIDR registers 10 anni fa
racpu.pas 558b8967b6 + Aarch64 assembler reader 10 anni fa
racpugas.pas 879afbb7be * removed -Oodfa warnings 10 anni fa
rgcpu.pas 67b8aceaee * synchronized with privatetrunk till r30095 10 anni fa
symcpu.pas 02495c17bd Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". 11 anni fa