cgcpu.pas 66 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_load_reg_cgpara(list : TAsmList; size : tcgsize;r : tregister; const cgpara : tcgpara);override;
  40. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  41. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { fpu move instructions }
  50. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  51. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  52. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  53. { comparison operations }
  54. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  55. l : tasmlabel);override;
  56. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  57. procedure a_jmp_name(list : TAsmList;const s : string); override;
  58. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  59. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  60. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  61. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  62. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  63. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  64. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);override;
  65. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  66. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  67. procedure g_save_registers(list : TAsmList);override;
  68. procedure g_restore_registers(list : TAsmList);override;
  69. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  70. procedure fixref(list : TAsmList;var ref : treference);
  71. function normalize_ref(list : TAsmList;ref : treference;
  72. tmpreg : tregister) : treference;
  73. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  74. procedure a_adjust_sp(list: TAsmList; value: longint);
  75. function GetLoad(const ref : treference) : tasmop;
  76. function GetStore(const ref: treference): tasmop;
  77. protected
  78. procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  79. procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
  80. end;
  81. tcg64favr = class(tcg64f32)
  82. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  83. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  84. end;
  85. procedure create_codegen;
  86. const
  87. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  88. A_NONE,A_MULS,A_MUL,A_NEG,A_COM,A_OR,
  89. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  90. implementation
  91. uses
  92. globals,verbose,systems,cutils,
  93. fmodule,
  94. symconst,symsym,symtable,
  95. tgobj,rgobj,
  96. procinfo,cpupi,
  97. paramgr;
  98. procedure tcgavr.init_register_allocators;
  99. begin
  100. inherited init_register_allocators;
  101. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  102. [RS_R8,RS_R9,
  103. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  104. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  105. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7],first_int_imreg,[]);
  106. { rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  107. [RS_R26,RS_R30],first_int_imreg,[]); }
  108. end;
  109. procedure tcgavr.done_register_allocators;
  110. begin
  111. rg[R_INTREGISTER].free;
  112. // rg[R_ADDRESSREGISTER].free;
  113. inherited done_register_allocators;
  114. end;
  115. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  116. var
  117. tmp1,tmp2,tmp3 : TRegister;
  118. begin
  119. case size of
  120. OS_8,OS_S8:
  121. Result:=inherited getintregister(list, size);
  122. OS_16,OS_S16:
  123. begin
  124. Result:=inherited getintregister(list, OS_8);
  125. { ensure that the high register can be retrieved by
  126. GetNextReg
  127. }
  128. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  129. internalerror(2011021331);
  130. end;
  131. OS_32,OS_S32:
  132. begin
  133. Result:=inherited getintregister(list, OS_8);
  134. tmp1:=inherited getintregister(list, OS_8);
  135. { ensure that the high register can be retrieved by
  136. GetNextReg
  137. }
  138. if tmp1<>GetNextReg(Result) then
  139. internalerror(2011021332);
  140. tmp2:=inherited getintregister(list, OS_8);
  141. { ensure that the upper register can be retrieved by
  142. GetNextReg
  143. }
  144. if tmp2<>GetNextReg(tmp1) then
  145. internalerror(2011021333);
  146. tmp3:=inherited getintregister(list, OS_8);
  147. { ensure that the upper register can be retrieved by
  148. GetNextReg
  149. }
  150. if tmp3<>GetNextReg(tmp2) then
  151. internalerror(2011021334);
  152. end;
  153. else
  154. internalerror(2011021330);
  155. end;
  156. end;
  157. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  158. begin
  159. Result:=getintregister(list,OS_ADDR);
  160. end;
  161. procedure tcgavr.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara);
  162. procedure load_para_loc(r : TRegister;paraloc : PCGParaLocation);
  163. var
  164. ref : treference;
  165. begin
  166. paramanager.allocparaloc(list,paraloc);
  167. case paraloc^.loc of
  168. LOC_REGISTER,LOC_CREGISTER:
  169. a_load_reg_reg(list,paraloc^.size,paraloc^.size,r,paraloc^.register);
  170. LOC_REFERENCE,LOC_CREFERENCE:
  171. begin
  172. reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,2);
  173. a_load_reg_ref(list,paraloc^.size,paraloc^.size,r,ref);
  174. end;
  175. else
  176. internalerror(2002071004);
  177. end;
  178. end;
  179. var
  180. i, i2 : longint;
  181. hp : PCGParaLocation;
  182. begin
  183. { if use_push(cgpara) then
  184. begin
  185. if tcgsize2size[cgpara.Size] > 2 then
  186. begin
  187. if tcgsize2size[cgpara.Size] <> 4 then
  188. internalerror(2013031101);
  189. if cgpara.location^.Next = nil then
  190. begin
  191. if tcgsize2size[cgpara.location^.size] <> 4 then
  192. internalerror(2013031101);
  193. end
  194. else
  195. begin
  196. if tcgsize2size[cgpara.location^.size] <> 2 then
  197. internalerror(2013031101);
  198. if tcgsize2size[cgpara.location^.Next^.size] <> 2 then
  199. internalerror(2013031101);
  200. if cgpara.location^.Next^.Next <> nil then
  201. internalerror(2013031101);
  202. end;
  203. if tcgsize2size[cgpara.size]>cgpara.alignment then
  204. pushsize:=cgpara.size
  205. else
  206. pushsize:=int_cgsize(cgpara.alignment);
  207. pushsize2 := int_cgsize(tcgsize2size[pushsize] - 2);
  208. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize2],makeregsize(list,GetNextReg(r),pushsize2)));
  209. list.concat(taicpu.op_reg(A_PUSH,S_W,makeregsize(list,r,OS_16)));
  210. end
  211. else
  212. begin
  213. cgpara.check_simple_location;
  214. if tcgsize2size[cgpara.location^.size]>cgpara.alignment then
  215. pushsize:=cgpara.location^.size
  216. else
  217. pushsize:=int_cgsize(cgpara.alignment);
  218. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize],makeregsize(list,r,pushsize)));
  219. end;
  220. end
  221. else }
  222. begin
  223. if not(tcgsize2size[cgpara.Size] in [1..4]) then
  224. internalerror(2014011101);
  225. hp:=cgpara.location;
  226. i:=0;
  227. while i<tcgsize2size[cgpara.Size] do
  228. begin
  229. if not(assigned(hp)) then
  230. internalerror(2014011102);
  231. inc(i, tcgsize2size[hp^.Size]);
  232. if hp^.Loc=LOC_REGISTER then
  233. begin
  234. load_para_loc(r,hp);
  235. hp:=hp^.Next;
  236. r:=GetNextReg(r);
  237. end
  238. else
  239. begin
  240. load_para_loc(r,hp);
  241. for i2:=1 to tcgsize2size[hp^.Size] do
  242. r:=GetNextReg(r);
  243. hp:=hp^.Next;
  244. end;
  245. end;
  246. if assigned(hp) then
  247. internalerror(2014011103);
  248. end;
  249. end;
  250. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);
  251. var
  252. i : longint;
  253. hp : PCGParaLocation;
  254. begin
  255. if not(tcgsize2size[paraloc.Size] in [1..4]) then
  256. internalerror(2014011101);
  257. hp:=paraloc.location;
  258. for i:=1 to tcgsize2size[paraloc.Size] do
  259. begin
  260. if not(assigned(hp)) or
  261. (tcgsize2size[hp^.size]<>1) or
  262. (hp^.shiftval<>0) then
  263. internalerror(2014011105);
  264. case hp^.loc of
  265. LOC_REGISTER,LOC_CREGISTER:
  266. a_load_const_reg(list,hp^.size,(a shr (8*(i-1))) and $ff,hp^.register);
  267. LOC_REFERENCE,LOC_CREFERENCE:
  268. begin
  269. list.concat(taicpu.op_const(A_PUSH,(a shr (8*(i-1))) and $ff));
  270. end;
  271. else
  272. internalerror(2002071004);
  273. end;
  274. hp:=hp^.Next;
  275. end;
  276. if assigned(hp) then
  277. internalerror(2014011104);
  278. end;
  279. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  280. var
  281. tmpref, ref: treference;
  282. location: pcgparalocation;
  283. sizeleft: tcgint;
  284. begin
  285. location := paraloc.location;
  286. tmpref := r;
  287. sizeleft := paraloc.intsize;
  288. while assigned(location) do
  289. begin
  290. paramanager.allocparaloc(list,location);
  291. case location^.loc of
  292. LOC_REGISTER,LOC_CREGISTER:
  293. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  294. LOC_REFERENCE:
  295. begin
  296. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  297. { doubles in softemu mode have a strange order of registers and references }
  298. if location^.size=OS_32 then
  299. g_concatcopy(list,tmpref,ref,4)
  300. else
  301. begin
  302. g_concatcopy(list,tmpref,ref,sizeleft);
  303. if assigned(location^.next) then
  304. internalerror(2005010710);
  305. end;
  306. end;
  307. LOC_VOID:
  308. begin
  309. // nothing to do
  310. end;
  311. else
  312. internalerror(2002081103);
  313. end;
  314. inc(tmpref.offset,tcgsize2size[location^.size]);
  315. dec(sizeleft,tcgsize2size[location^.size]);
  316. location := location^.next;
  317. end;
  318. end;
  319. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  320. var
  321. tmpreg: tregister;
  322. begin
  323. tmpreg:=getaddressregister(list);
  324. a_loadaddr_ref_reg(list,r,tmpreg);
  325. a_load_reg_cgpara(list,OS_ADDR,tmpreg,paraloc);
  326. end;
  327. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  328. begin
  329. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  330. list.concat(taicpu.op_sym(A_CALL,current_asmdata.RefAsmSymbol(s)))
  331. else
  332. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  333. include(current_procinfo.flags,pi_do_call);
  334. end;
  335. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  336. begin
  337. a_reg_alloc(list,NR_ZLO);
  338. a_reg_alloc(list,NR_ZHI);
  339. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  340. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  341. list.concat(taicpu.op_none(A_ICALL));
  342. a_reg_dealloc(list,NR_ZLO);
  343. a_reg_dealloc(list,NR_ZHI);
  344. include(current_procinfo.flags,pi_do_call);
  345. end;
  346. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
  347. begin
  348. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  349. internalerror(2012102403);
  350. a_op_const_reg_internal(list,Op,size,a,reg,NR_NO);
  351. end;
  352. procedure tcgavr.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister);
  353. begin
  354. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  355. internalerror(2012102401);
  356. a_op_reg_reg_internal(list,Op,size,src,NR_NO,dst,NR_NO);
  357. end;
  358. procedure tcgavr.a_op_reg_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  359. var
  360. countreg,
  361. tmpreg: tregister;
  362. i : integer;
  363. instr : taicpu;
  364. paraloc1,paraloc2,paraloc3 : TCGPara;
  365. l1,l2 : tasmlabel;
  366. pd : tprocdef;
  367. procedure NextSrcDst;
  368. begin
  369. if i=5 then
  370. begin
  371. dst:=dsthi;
  372. src:=srchi;
  373. end
  374. else
  375. begin
  376. dst:=GetNextReg(dst);
  377. src:=GetNextReg(src);
  378. end;
  379. end;
  380. { iterates TmpReg through all registers of dst }
  381. procedure NextTmp;
  382. begin
  383. if i=5 then
  384. tmpreg:=dsthi
  385. else
  386. tmpreg:=GetNextReg(tmpreg);
  387. end;
  388. begin
  389. case op of
  390. OP_ADD:
  391. begin
  392. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  393. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  394. begin
  395. for i:=2 to tcgsize2size[size] do
  396. begin
  397. NextSrcDst;
  398. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  399. end;
  400. end;
  401. end;
  402. OP_SUB:
  403. begin
  404. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  405. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  406. begin
  407. for i:=2 to tcgsize2size[size] do
  408. begin
  409. NextSrcDst;
  410. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  411. end;
  412. end;
  413. end;
  414. OP_NEG:
  415. begin
  416. if src<>dst then
  417. begin
  418. if size in [OS_S64,OS_64] then
  419. begin
  420. a_load_reg_reg(list,OS_32,OS_32,src,dst);
  421. a_load_reg_reg(list,OS_32,OS_32,srchi,dsthi);
  422. end
  423. else
  424. a_load_reg_reg(list,size,size,src,dst);
  425. end;
  426. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  427. begin
  428. tmpreg:=GetNextReg(dst);
  429. for i:=2 to tcgsize2size[size] do
  430. begin
  431. list.concat(taicpu.op_reg(A_COM,tmpreg));
  432. NextTmp;
  433. end;
  434. list.concat(taicpu.op_reg(A_NEG,dst));
  435. tmpreg:=GetNextReg(dst);
  436. for i:=2 to tcgsize2size[size] do
  437. begin
  438. list.concat(taicpu.op_reg_const(A_SBCI,tmpreg,-1));
  439. NextTmp;
  440. end;
  441. end;
  442. end;
  443. OP_NOT:
  444. begin
  445. for i:=1 to tcgsize2size[size] do
  446. begin
  447. if src<>dst then
  448. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  449. list.concat(taicpu.op_reg(A_COM,dst));
  450. NextSrcDst;
  451. end;
  452. end;
  453. OP_MUL,OP_IMUL:
  454. begin
  455. if size in [OS_8,OS_S8] then
  456. begin
  457. getcpuregister(list,NR_R0);
  458. getcpuregister(list,NR_R1);
  459. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  460. ungetcpuregister(list,NR_R1);
  461. list.concat(taicpu.op_reg_reg(A_MOV,dst,NR_R0));
  462. ungetcpuregister(list,NR_R0);
  463. end
  464. else if size=OS_16 then
  465. begin
  466. pd:=search_system_proc('fpc_mul_word');
  467. paraloc1.init;
  468. paraloc2.init;
  469. paraloc3.init;
  470. paramanager.getintparaloc(list,pd,1,paraloc1);
  471. paramanager.getintparaloc(list,pd,2,paraloc2);
  472. paramanager.getintparaloc(list,pd,3,paraloc3);
  473. a_load_const_cgpara(list,OS_8,0,paraloc3);
  474. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  475. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  476. paramanager.freecgpara(list,paraloc3);
  477. paramanager.freecgpara(list,paraloc2);
  478. paramanager.freecgpara(list,paraloc1);
  479. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  480. a_call_name(list,'FPC_MUL_WORD',false);
  481. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  482. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  483. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  484. paraloc3.done;
  485. paraloc2.done;
  486. paraloc1.done;
  487. end
  488. else
  489. internalerror(2011022002);
  490. end;
  491. OP_DIV,OP_IDIV:
  492. { special stuff, needs separate handling inside code }
  493. { generator }
  494. internalerror(2011022001);
  495. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  496. begin
  497. current_asmdata.getjumplabel(l1);
  498. current_asmdata.getjumplabel(l2);
  499. countreg:=getintregister(list,OS_8);
  500. a_load_reg_reg(list,size,OS_8,src,countreg);
  501. list.concat(taicpu.op_reg_const(A_CPI,countreg,0));
  502. a_jmp_flags(list,F_EQ,l2);
  503. cg.a_label(list,l1);
  504. case op of
  505. OP_SHR:
  506. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  507. OP_SHL:
  508. list.concat(taicpu.op_reg(A_LSL,dst));
  509. OP_SAR:
  510. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  511. OP_ROR:
  512. begin
  513. { load carry? }
  514. if not(size in [OS_8,OS_S8]) then
  515. begin
  516. list.concat(taicpu.op_none(A_CLC));
  517. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  518. list.concat(taicpu.op_none(A_SEC));
  519. end;
  520. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  521. end;
  522. OP_ROL:
  523. begin
  524. { load carry? }
  525. if not(size in [OS_8,OS_S8]) then
  526. begin
  527. list.concat(taicpu.op_none(A_CLC));
  528. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1),7));
  529. list.concat(taicpu.op_none(A_SEC));
  530. end;
  531. list.concat(taicpu.op_reg(A_ROL,dst))
  532. end;
  533. else
  534. internalerror(2011030901);
  535. end;
  536. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  537. begin
  538. for i:=2 to tcgsize2size[size] do
  539. begin
  540. case op of
  541. OP_ROR,
  542. OP_SHR:
  543. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  544. OP_ROL,
  545. OP_SHL:
  546. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg64(dst,dsthi,i-1)));
  547. OP_SAR:
  548. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  549. else
  550. internalerror(2011030902);
  551. end;
  552. end;
  553. end;
  554. a_op_const_reg(list,OP_SUB,OS_8,1,countreg);
  555. a_jmp_flags(list,F_NE,l1);
  556. // keep registers alive
  557. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  558. cg.a_label(list,l2);
  559. end;
  560. OP_AND,OP_OR,OP_XOR:
  561. begin
  562. for i:=1 to tcgsize2size[size] do
  563. begin
  564. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  565. NextSrcDst;
  566. end;
  567. end;
  568. else
  569. internalerror(2011022004);
  570. end;
  571. end;
  572. procedure tcgavr.a_op_const_reg_internal(list: TAsmList; Op: TOpCG;
  573. size: TCGSize; a: tcgint; reg, reghi: TRegister);
  574. var
  575. mask : qword;
  576. shift : byte;
  577. i : byte;
  578. tmpreg : tregister;
  579. tmpreg64 : tregister64;
  580. procedure NextReg;
  581. begin
  582. if i=5 then
  583. reg:=reghi
  584. else
  585. reg:=GetNextReg(reg);
  586. end;
  587. begin
  588. mask:=$ff;
  589. shift:=0;
  590. case op of
  591. OP_OR:
  592. begin
  593. for i:=1 to tcgsize2size[size] do
  594. begin
  595. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  596. NextReg;
  597. mask:=mask shl 8;
  598. inc(shift,8);
  599. end;
  600. end;
  601. OP_AND:
  602. begin
  603. for i:=1 to tcgsize2size[size] do
  604. begin
  605. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  606. NextReg;
  607. mask:=mask shl 8;
  608. inc(shift,8);
  609. end;
  610. end;
  611. OP_SUB:
  612. begin
  613. list.concat(taicpu.op_reg_const(A_SUBI,reg,a and mask));
  614. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  615. begin
  616. for i:=2 to tcgsize2size[size] do
  617. begin
  618. NextReg;
  619. mask:=mask shl 8;
  620. inc(shift,8);
  621. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  622. end;
  623. end;
  624. end;
  625. {OP_ADD:
  626. begin
  627. list.concat(taicpu.op_reg_const(A_SUBI,reg,(-a) and mask));
  628. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  629. begin
  630. for i:=2 to tcgsize2size[size] do
  631. begin
  632. NextReg;
  633. mask:=mask shl 8;
  634. inc(shift,8);
  635. list.concat(taicpu.op_reg_const(A_ADC,reg,(a and mask) shr shift));
  636. end;
  637. end;
  638. end; }
  639. else
  640. begin
  641. if size in [OS_64,OS_S64] then
  642. begin
  643. tmpreg64.reglo:=getintregister(list,OS_32);
  644. tmpreg64.reghi:=getintregister(list,OS_32);
  645. cg64.a_load64_const_reg(list,a,tmpreg64);
  646. cg64.a_op64_reg_reg(list,op,size,tmpreg64,joinreg64(reg,reghi));
  647. end
  648. else
  649. begin
  650. tmpreg:=getintregister(list,size);
  651. a_load_const_reg(list,size,a,tmpreg);
  652. a_op_reg_reg(list,op,size,tmpreg,reg);
  653. end;
  654. end;
  655. end;
  656. end;
  657. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);
  658. var
  659. mask : qword;
  660. shift : byte;
  661. i : byte;
  662. begin
  663. mask:=$ff;
  664. shift:=0;
  665. for i:=1 to tcgsize2size[size] do
  666. begin
  667. if ((qword(a) and mask) shr shift)=0 then
  668. emit_mov(list,reg,NR_R1)
  669. else
  670. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  671. mask:=mask shl 8;
  672. inc(shift,8);
  673. reg:=GetNextReg(reg);
  674. end;
  675. end;
  676. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  677. procedure maybegetcpuregister(list:tasmlist;reg : tregister);
  678. begin
  679. { allocate the register only, if a cpu register is passed }
  680. if getsupreg(reg)<first_int_imreg then
  681. getcpuregister(list,reg);
  682. end;
  683. var
  684. tmpref : treference;
  685. l : tasmlabel;
  686. begin
  687. Result:=ref;
  688. if ref.addressmode<>AM_UNCHANGED then
  689. internalerror(2011021701);
  690. { Be sure to have a base register }
  691. if (ref.base=NR_NO) then
  692. begin
  693. { only symbol+offset? }
  694. if ref.index=NR_NO then
  695. exit;
  696. ref.base:=ref.index;
  697. ref.index:=NR_NO;
  698. end;
  699. if assigned(ref.symbol) or (ref.offset<>0) then
  700. begin
  701. reference_reset(tmpref,0);
  702. tmpref.symbol:=ref.symbol;
  703. tmpref.offset:=ref.offset;
  704. tmpref.refaddr:=addr_lo8;
  705. maybegetcpuregister(list,tmpreg);
  706. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  707. tmpref.refaddr:=addr_hi8;
  708. maybegetcpuregister(list,GetNextReg(tmpreg));
  709. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  710. if (ref.base<>NR_NO) then
  711. begin
  712. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  713. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  714. end;
  715. if (ref.index<>NR_NO) then
  716. begin
  717. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  718. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  719. end;
  720. ref.symbol:=nil;
  721. ref.offset:=0;
  722. ref.base:=tmpreg;
  723. ref.index:=NR_NO;
  724. end
  725. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  726. begin
  727. maybegetcpuregister(list,tmpreg);
  728. emit_mov(list,tmpreg,ref.base);
  729. maybegetcpuregister(list,GetNextReg(tmpreg));
  730. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  731. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  732. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  733. ref.base:=tmpreg;
  734. ref.index:=NR_NO;
  735. end
  736. else if (ref.base<>NR_NO) then
  737. begin
  738. maybegetcpuregister(list,tmpreg);
  739. emit_mov(list,tmpreg,ref.base);
  740. maybegetcpuregister(list,GetNextReg(tmpreg));
  741. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  742. ref.base:=tmpreg;
  743. ref.index:=NR_NO;
  744. end
  745. else if (ref.index<>NR_NO) then
  746. begin
  747. maybegetcpuregister(list,tmpreg);
  748. emit_mov(list,tmpreg,ref.index);
  749. maybegetcpuregister(list,GetNextReg(tmpreg));
  750. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  751. ref.base:=tmpreg;
  752. ref.index:=NR_NO;
  753. end;
  754. Result:=ref;
  755. end;
  756. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  757. var
  758. href : treference;
  759. conv_done: boolean;
  760. tmpreg : tregister;
  761. i : integer;
  762. QuickRef : Boolean;
  763. begin
  764. QuickRef:=false;
  765. if not((Ref.addressmode=AM_UNCHANGED) and
  766. (Ref.symbol=nil) and
  767. ((Ref.base=NR_R28) or
  768. (Ref.base=NR_R29)) and
  769. (Ref.Index=NR_No) and
  770. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  771. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  772. href:=normalize_ref(list,Ref,NR_R30)
  773. else
  774. begin
  775. QuickRef:=true;
  776. href:=Ref;
  777. end;
  778. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  779. internalerror(2011021307);
  780. conv_done:=false;
  781. if tosize<>fromsize then
  782. begin
  783. conv_done:=true;
  784. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  785. fromsize:=tosize;
  786. case fromsize of
  787. OS_8:
  788. begin
  789. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  790. href.addressmode:=AM_POSTINCREMENT;
  791. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  792. for i:=2 to tcgsize2size[tosize] do
  793. begin
  794. if QuickRef then
  795. inc(href.offset);
  796. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  797. href.addressmode:=AM_POSTINCREMENT
  798. else
  799. href.addressmode:=AM_UNCHANGED;
  800. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  801. end;
  802. end;
  803. OS_S8:
  804. begin
  805. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  806. href.addressmode:=AM_POSTINCREMENT;
  807. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  808. if tcgsize2size[tosize]>1 then
  809. begin
  810. tmpreg:=getintregister(list,OS_8);
  811. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  812. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  813. list.concat(taicpu.op_reg(A_COM,tmpreg));
  814. for i:=2 to tcgsize2size[tosize] do
  815. begin
  816. if QuickRef then
  817. inc(href.offset);
  818. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  819. href.addressmode:=AM_POSTINCREMENT
  820. else
  821. href.addressmode:=AM_UNCHANGED;
  822. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  823. end;
  824. end;
  825. end;
  826. OS_16:
  827. begin
  828. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  829. href.addressmode:=AM_POSTINCREMENT;
  830. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  831. if QuickRef then
  832. inc(href.offset)
  833. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  834. href.addressmode:=AM_POSTINCREMENT
  835. else
  836. href.addressmode:=AM_UNCHANGED;
  837. reg:=GetNextReg(reg);
  838. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  839. for i:=3 to tcgsize2size[tosize] do
  840. begin
  841. if QuickRef then
  842. inc(href.offset);
  843. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  844. href.addressmode:=AM_POSTINCREMENT
  845. else
  846. href.addressmode:=AM_UNCHANGED;
  847. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  848. end;
  849. end;
  850. OS_S16:
  851. begin
  852. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  853. href.addressmode:=AM_POSTINCREMENT;
  854. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  855. if QuickRef then
  856. inc(href.offset)
  857. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  858. href.addressmode:=AM_POSTINCREMENT
  859. else
  860. href.addressmode:=AM_UNCHANGED;
  861. reg:=GetNextReg(reg);
  862. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  863. if tcgsize2size[tosize]>2 then
  864. begin
  865. tmpreg:=getintregister(list,OS_8);
  866. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  867. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  868. list.concat(taicpu.op_reg(A_COM,tmpreg));
  869. for i:=3 to tcgsize2size[tosize] do
  870. begin
  871. if QuickRef then
  872. inc(href.offset);
  873. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  874. href.addressmode:=AM_POSTINCREMENT
  875. else
  876. href.addressmode:=AM_UNCHANGED;
  877. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  878. end;
  879. end;
  880. end;
  881. else
  882. conv_done:=false;
  883. end;
  884. end;
  885. if not conv_done then
  886. begin
  887. for i:=1 to tcgsize2size[fromsize] do
  888. begin
  889. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  890. href.addressmode:=AM_POSTINCREMENT
  891. else
  892. href.addressmode:=AM_UNCHANGED;
  893. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  894. if QuickRef then
  895. inc(href.offset);
  896. reg:=GetNextReg(reg);
  897. end;
  898. end;
  899. if not(QuickRef) then
  900. begin
  901. ungetcpuregister(list,href.base);
  902. ungetcpuregister(list,GetNextReg(href.base));
  903. end;
  904. end;
  905. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  906. const Ref : treference;reg : tregister);
  907. var
  908. href : treference;
  909. conv_done: boolean;
  910. tmpreg : tregister;
  911. i : integer;
  912. QuickRef : boolean;
  913. begin
  914. QuickRef:=false;
  915. if not((Ref.addressmode=AM_UNCHANGED) and
  916. (Ref.symbol=nil) and
  917. ((Ref.base=NR_R28) or
  918. (Ref.base=NR_R29)) and
  919. (Ref.Index=NR_No) and
  920. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  921. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  922. href:=normalize_ref(list,Ref,NR_R30)
  923. else
  924. begin
  925. QuickRef:=true;
  926. href:=Ref;
  927. end;
  928. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  929. internalerror(2011021307);
  930. conv_done:=false;
  931. if tosize<>fromsize then
  932. begin
  933. conv_done:=true;
  934. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  935. fromsize:=tosize;
  936. case fromsize of
  937. OS_8:
  938. begin
  939. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  940. for i:=2 to tcgsize2size[tosize] do
  941. begin
  942. reg:=GetNextReg(reg);
  943. list.concat(taicpu.op_reg(A_CLR,reg));
  944. end;
  945. end;
  946. OS_S8:
  947. begin
  948. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  949. tmpreg:=reg;
  950. if tcgsize2size[tosize]>1 then
  951. begin
  952. reg:=GetNextReg(reg);
  953. list.concat(taicpu.op_reg(A_CLR,reg));
  954. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  955. list.concat(taicpu.op_reg(A_COM,reg));
  956. tmpreg:=reg;
  957. for i:=3 to tcgsize2size[tosize] do
  958. begin
  959. reg:=GetNextReg(reg);
  960. emit_mov(list,reg,tmpreg);
  961. end;
  962. end;
  963. end;
  964. OS_16:
  965. begin
  966. if not(QuickRef) then
  967. href.addressmode:=AM_POSTINCREMENT;
  968. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  969. if QuickRef then
  970. inc(href.offset);
  971. href.addressmode:=AM_UNCHANGED;
  972. reg:=GetNextReg(reg);
  973. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  974. for i:=3 to tcgsize2size[tosize] do
  975. begin
  976. reg:=GetNextReg(reg);
  977. list.concat(taicpu.op_reg(A_CLR,reg));
  978. end;
  979. end;
  980. OS_S16:
  981. begin
  982. if not(QuickRef) then
  983. href.addressmode:=AM_POSTINCREMENT;
  984. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  985. if QuickRef then
  986. inc(href.offset);
  987. href.addressmode:=AM_UNCHANGED;
  988. reg:=GetNextReg(reg);
  989. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  990. tmpreg:=reg;
  991. reg:=GetNextReg(reg);
  992. list.concat(taicpu.op_reg(A_CLR,reg));
  993. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  994. list.concat(taicpu.op_reg(A_COM,reg));
  995. tmpreg:=reg;
  996. for i:=4 to tcgsize2size[tosize] do
  997. begin
  998. reg:=GetNextReg(reg);
  999. emit_mov(list,reg,tmpreg);
  1000. end;
  1001. end;
  1002. else
  1003. conv_done:=false;
  1004. end;
  1005. end;
  1006. if not conv_done then
  1007. begin
  1008. for i:=1 to tcgsize2size[fromsize] do
  1009. begin
  1010. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  1011. href.addressmode:=AM_POSTINCREMENT
  1012. else
  1013. href.addressmode:=AM_UNCHANGED;
  1014. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1015. if QuickRef then
  1016. inc(href.offset);
  1017. reg:=GetNextReg(reg);
  1018. end;
  1019. end;
  1020. if not(QuickRef) then
  1021. begin
  1022. ungetcpuregister(list,href.base);
  1023. ungetcpuregister(list,GetNextReg(href.base));
  1024. end;
  1025. end;
  1026. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  1027. var
  1028. conv_done: boolean;
  1029. tmpreg : tregister;
  1030. i : integer;
  1031. begin
  1032. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  1033. internalerror(2011021310);
  1034. conv_done:=false;
  1035. if tosize<>fromsize then
  1036. begin
  1037. conv_done:=true;
  1038. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  1039. fromsize:=tosize;
  1040. case fromsize of
  1041. OS_8:
  1042. begin
  1043. emit_mov(list,reg2,reg1);
  1044. for i:=2 to tcgsize2size[tosize] do
  1045. begin
  1046. reg2:=GetNextReg(reg2);
  1047. list.concat(taicpu.op_reg(A_CLR,reg2));
  1048. end;
  1049. end;
  1050. OS_S8:
  1051. begin
  1052. emit_mov(list,reg2,reg1);
  1053. if tcgsize2size[tosize]>1 then
  1054. begin
  1055. reg2:=GetNextReg(reg2);
  1056. list.concat(taicpu.op_reg(A_CLR,reg2));
  1057. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1058. list.concat(taicpu.op_reg(A_COM,reg2));
  1059. tmpreg:=reg2;
  1060. for i:=3 to tcgsize2size[tosize] do
  1061. begin
  1062. reg2:=GetNextReg(reg2);
  1063. emit_mov(list,reg2,tmpreg);
  1064. end;
  1065. end;
  1066. end;
  1067. OS_16:
  1068. begin
  1069. emit_mov(list,reg2,reg1);
  1070. reg1:=GetNextReg(reg1);
  1071. reg2:=GetNextReg(reg2);
  1072. emit_mov(list,reg2,reg1);
  1073. for i:=3 to tcgsize2size[tosize] do
  1074. begin
  1075. reg2:=GetNextReg(reg2);
  1076. list.concat(taicpu.op_reg(A_CLR,reg2));
  1077. end;
  1078. end;
  1079. OS_S16:
  1080. begin
  1081. emit_mov(list,reg2,reg1);
  1082. reg1:=GetNextReg(reg1);
  1083. reg2:=GetNextReg(reg2);
  1084. emit_mov(list,reg2,reg1);
  1085. if tcgsize2size[tosize]>2 then
  1086. begin
  1087. reg2:=GetNextReg(reg2);
  1088. list.concat(taicpu.op_reg(A_CLR,reg2));
  1089. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1090. list.concat(taicpu.op_reg(A_COM,reg2));
  1091. tmpreg:=reg2;
  1092. for i:=4 to tcgsize2size[tosize] do
  1093. begin
  1094. reg2:=GetNextReg(reg2);
  1095. emit_mov(list,reg2,tmpreg);
  1096. end;
  1097. end;
  1098. end;
  1099. else
  1100. conv_done:=false;
  1101. end;
  1102. end;
  1103. if not conv_done and (reg1<>reg2) then
  1104. begin
  1105. for i:=1 to tcgsize2size[fromsize] do
  1106. begin
  1107. emit_mov(list,reg2,reg1);
  1108. reg1:=GetNextReg(reg1);
  1109. reg2:=GetNextReg(reg2);
  1110. end;
  1111. end;
  1112. end;
  1113. procedure tcgavr.a_loadfpu_reg_reg(list: TAsmList; fromsize,tosize: tcgsize; reg1, reg2: tregister);
  1114. begin
  1115. internalerror(2012010702);
  1116. end;
  1117. procedure tcgavr.a_loadfpu_ref_reg(list: TAsmList; fromsize,tosize: tcgsize; const ref: treference; reg: tregister);
  1118. begin
  1119. internalerror(2012010703);
  1120. end;
  1121. procedure tcgavr.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  1122. begin
  1123. internalerror(2012010704);
  1124. end;
  1125. { comparison operations }
  1126. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  1127. cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
  1128. var
  1129. swapped : boolean;
  1130. tmpreg : tregister;
  1131. i : byte;
  1132. begin
  1133. if a=0 then
  1134. begin
  1135. swapped:=false;
  1136. { swap parameters? }
  1137. case cmp_op of
  1138. OC_GT:
  1139. begin
  1140. swapped:=true;
  1141. cmp_op:=OC_LT;
  1142. end;
  1143. OC_LTE:
  1144. begin
  1145. swapped:=true;
  1146. cmp_op:=OC_GTE;
  1147. end;
  1148. OC_BE:
  1149. begin
  1150. swapped:=true;
  1151. cmp_op:=OC_AE;
  1152. end;
  1153. OC_A:
  1154. begin
  1155. swapped:=true;
  1156. cmp_op:=OC_B;
  1157. end;
  1158. end;
  1159. if swapped then
  1160. list.concat(taicpu.op_reg_reg(A_CP,reg,NR_R1))
  1161. else
  1162. list.concat(taicpu.op_reg_reg(A_CP,NR_R1,reg));
  1163. for i:=2 to tcgsize2size[size] do
  1164. begin
  1165. reg:=GetNextReg(reg);
  1166. if swapped then
  1167. list.concat(taicpu.op_reg_reg(A_CPC,reg,NR_R1))
  1168. else
  1169. list.concat(taicpu.op_reg_reg(A_CPC,NR_R1,reg));
  1170. end;
  1171. a_jmp_cond(list,cmp_op,l);
  1172. end
  1173. else
  1174. inherited a_cmp_const_reg_label(list,size,cmp_op,a,reg,l);
  1175. end;
  1176. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  1177. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  1178. var
  1179. swapped : boolean;
  1180. tmpreg : tregister;
  1181. i : byte;
  1182. begin
  1183. swapped:=false;
  1184. { swap parameters? }
  1185. case cmp_op of
  1186. OC_GT:
  1187. begin
  1188. swapped:=true;
  1189. cmp_op:=OC_LT;
  1190. end;
  1191. OC_LTE:
  1192. begin
  1193. swapped:=true;
  1194. cmp_op:=OC_GTE;
  1195. end;
  1196. OC_BE:
  1197. begin
  1198. swapped:=true;
  1199. cmp_op:=OC_AE;
  1200. end;
  1201. OC_A:
  1202. begin
  1203. swapped:=true;
  1204. cmp_op:=OC_B;
  1205. end;
  1206. end;
  1207. if swapped then
  1208. begin
  1209. tmpreg:=reg1;
  1210. reg1:=reg2;
  1211. reg2:=tmpreg;
  1212. end;
  1213. list.concat(taicpu.op_reg_reg(A_CP,reg2,reg1));
  1214. for i:=2 to tcgsize2size[size] do
  1215. begin
  1216. reg1:=GetNextReg(reg1);
  1217. reg2:=GetNextReg(reg2);
  1218. list.concat(taicpu.op_reg_reg(A_CPC,reg2,reg1));
  1219. end;
  1220. a_jmp_cond(list,cmp_op,l);
  1221. end;
  1222. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  1223. var
  1224. ai : taicpu;
  1225. begin
  1226. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1227. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s))
  1228. else
  1229. ai:=taicpu.op_sym(A_RJMP,current_asmdata.RefAsmSymbol(s));
  1230. ai.is_jmp:=true;
  1231. list.concat(ai);
  1232. end;
  1233. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  1234. var
  1235. ai : taicpu;
  1236. begin
  1237. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1238. ai:=taicpu.op_sym(A_JMP,l)
  1239. else
  1240. ai:=taicpu.op_sym(A_RJMP,l);
  1241. ai.is_jmp:=true;
  1242. list.concat(ai);
  1243. end;
  1244. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  1245. var
  1246. ai : taicpu;
  1247. begin
  1248. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  1249. ai.is_jmp:=true;
  1250. list.concat(ai);
  1251. end;
  1252. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  1253. var
  1254. l : TAsmLabel;
  1255. tmpflags : TResFlags;
  1256. begin
  1257. current_asmdata.getjumplabel(l);
  1258. {
  1259. if flags_to_cond(f) then
  1260. begin
  1261. tmpflags:=f;
  1262. inverse_flags(tmpflags);
  1263. list.concat(taicpu.op_reg(A_CLR,reg));
  1264. a_jmp_flags(list,tmpflags,l);
  1265. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1266. end
  1267. else
  1268. }
  1269. begin
  1270. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1271. a_jmp_flags(list,f,l);
  1272. list.concat(taicpu.op_reg(A_CLR,reg));
  1273. end;
  1274. cg.a_label(list,l);
  1275. end;
  1276. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  1277. var
  1278. i : integer;
  1279. begin
  1280. case value of
  1281. 0:
  1282. ;
  1283. {-14..-1:
  1284. begin
  1285. if ((-value) mod 2)<>0 then
  1286. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1287. for i:=1 to (-value) div 2 do
  1288. list.concat(taicpu.op_const(A_RCALL,0));
  1289. end;
  1290. 1..7:
  1291. begin
  1292. for i:=1 to value do
  1293. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1294. end;}
  1295. else
  1296. begin
  1297. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1298. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1299. // get SREG
  1300. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1301. // block interrupts
  1302. list.concat(taicpu.op_none(A_CLI));
  1303. // write high SP
  1304. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1305. // release interrupts
  1306. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1307. // write low SP
  1308. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1309. end;
  1310. end;
  1311. end;
  1312. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1313. begin
  1314. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1315. result:=A_LDS
  1316. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1317. result:=A_LDD
  1318. else
  1319. result:=A_LD;
  1320. end;
  1321. function tcgavr.GetStore(const ref: treference) : tasmop;
  1322. begin
  1323. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1324. result:=A_STS
  1325. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1326. result:=A_STD
  1327. else
  1328. result:=A_ST;
  1329. end;
  1330. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1331. var
  1332. regs : tcpuregisterset;
  1333. reg : tsuperregister;
  1334. begin
  1335. if not(nostackframe) then
  1336. begin
  1337. { save int registers }
  1338. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1339. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1340. regs:=regs+[RS_R28,RS_R29];
  1341. for reg:=RS_R31 downto RS_R0 do
  1342. if reg in regs then
  1343. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1344. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1345. begin
  1346. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1347. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1348. end
  1349. else
  1350. { the framepointer cannot be omitted on avr because sp
  1351. is not a register but part of the i/o map
  1352. }
  1353. internalerror(2011021901);
  1354. a_adjust_sp(list,-localsize);
  1355. end;
  1356. end;
  1357. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1358. var
  1359. regs : tcpuregisterset;
  1360. reg : TSuperRegister;
  1361. LocalSize : longint;
  1362. begin
  1363. if not(nostackframe) then
  1364. begin
  1365. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1366. begin
  1367. LocalSize:=current_procinfo.calc_stackframe_size;
  1368. a_adjust_sp(list,LocalSize);
  1369. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1370. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1371. regs:=regs+[RS_R28,RS_R29];
  1372. for reg:=RS_R0 to RS_R31 do
  1373. if reg in regs then
  1374. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1375. end
  1376. else
  1377. { the framepointer cannot be omitted on avr because sp
  1378. is not a register but part of the i/o map
  1379. }
  1380. internalerror(2011021902);
  1381. end;
  1382. list.concat(taicpu.op_none(A_RET));
  1383. end;
  1384. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1385. var
  1386. tmpref : treference;
  1387. begin
  1388. if ref.addressmode<>AM_UNCHANGED then
  1389. internalerror(2011021701);
  1390. if assigned(ref.symbol) or (ref.offset<>0) then
  1391. begin
  1392. reference_reset(tmpref,0);
  1393. tmpref.symbol:=ref.symbol;
  1394. tmpref.offset:=ref.offset;
  1395. tmpref.refaddr:=addr_lo8;
  1396. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1397. tmpref.refaddr:=addr_hi8;
  1398. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1399. if (ref.base<>NR_NO) then
  1400. begin
  1401. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1402. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1403. end;
  1404. if (ref.index<>NR_NO) then
  1405. begin
  1406. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1407. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1408. end;
  1409. end
  1410. else if (ref.base<>NR_NO)then
  1411. begin
  1412. emit_mov(list,r,ref.base);
  1413. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1414. if (ref.index<>NR_NO) then
  1415. begin
  1416. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1417. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1418. end;
  1419. end
  1420. else if (ref.index<>NR_NO) then
  1421. begin
  1422. emit_mov(list,r,ref.index);
  1423. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1424. end;
  1425. end;
  1426. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1427. begin
  1428. internalerror(2011021320);
  1429. end;
  1430. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  1431. var
  1432. paraloc1,paraloc2,paraloc3 : TCGPara;
  1433. pd : tprocdef;
  1434. begin
  1435. pd:=search_system_proc('MOVE');
  1436. paraloc1.init;
  1437. paraloc2.init;
  1438. paraloc3.init;
  1439. paramanager.getintparaloc(list,pd,1,paraloc1);
  1440. paramanager.getintparaloc(list,pd,2,paraloc2);
  1441. paramanager.getintparaloc(list,pd,3,paraloc3);
  1442. a_load_const_cgpara(list,OS_SINT,len,paraloc3);
  1443. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1444. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1445. paramanager.freecgpara(list,paraloc3);
  1446. paramanager.freecgpara(list,paraloc2);
  1447. paramanager.freecgpara(list,paraloc1);
  1448. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1449. a_call_name_static(list,'FPC_MOVE');
  1450. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1451. paraloc3.done;
  1452. paraloc2.done;
  1453. paraloc1.done;
  1454. end;
  1455. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
  1456. var
  1457. countreg,tmpreg : tregister;
  1458. srcref,dstref : treference;
  1459. copysize,countregsize : tcgsize;
  1460. l : TAsmLabel;
  1461. i : longint;
  1462. SrcQuickRef, DestQuickRef : Boolean;
  1463. begin
  1464. if len>16 then
  1465. begin
  1466. current_asmdata.getjumplabel(l);
  1467. reference_reset(srcref,0);
  1468. reference_reset(dstref,0);
  1469. srcref.base:=NR_R30;
  1470. srcref.addressmode:=AM_POSTINCREMENT;
  1471. dstref.base:=NR_R26;
  1472. dstref.addressmode:=AM_POSTINCREMENT;
  1473. copysize:=OS_8;
  1474. if len<256 then
  1475. countregsize:=OS_8
  1476. else if len<65536 then
  1477. countregsize:=OS_16
  1478. else
  1479. internalerror(2011022007);
  1480. countreg:=getintregister(list,countregsize);
  1481. a_load_const_reg(list,countregsize,len,countreg);
  1482. a_loadaddr_ref_reg(list,source,NR_R30);
  1483. tmpreg:=getaddressregister(list);
  1484. a_loadaddr_ref_reg(list,dest,tmpreg);
  1485. { X is used for spilling code so we can load it
  1486. only by a push/pop sequence, this can be
  1487. optimized later on by the peephole optimizer
  1488. }
  1489. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1490. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1491. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1492. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1493. cg.a_label(list,l);
  1494. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1495. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1496. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1497. a_jmp_flags(list,F_NE,l);
  1498. // keep registers alive
  1499. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1500. end
  1501. else
  1502. begin
  1503. SrcQuickRef:=false;
  1504. DestQuickRef:=false;
  1505. if not((source.addressmode=AM_UNCHANGED) and
  1506. (source.symbol=nil) and
  1507. ((source.base=NR_R28) or
  1508. (source.base=NR_R29)) and
  1509. (source.Index=NR_NO) and
  1510. (source.Offset in [0..64-len])) and
  1511. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1512. srcref:=normalize_ref(list,source,NR_R30)
  1513. else
  1514. begin
  1515. SrcQuickRef:=true;
  1516. srcref:=source;
  1517. end;
  1518. if not((dest.addressmode=AM_UNCHANGED) and
  1519. (dest.symbol=nil) and
  1520. ((dest.base=NR_R28) or
  1521. (dest.base=NR_R29)) and
  1522. (dest.Index=NR_No) and
  1523. (dest.Offset in [0..64-len])) and
  1524. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1525. begin
  1526. if not(SrcQuickRef) then
  1527. begin
  1528. tmpreg:=getaddressregister(list);
  1529. dstref:=normalize_ref(list,dest,tmpreg);
  1530. { X is used for spilling code so we can load it
  1531. only by a push/pop sequence, this can be
  1532. optimized later on by the peephole optimizer
  1533. }
  1534. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1535. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1536. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1537. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1538. dstref.base:=NR_R26;
  1539. end
  1540. else
  1541. dstref:=normalize_ref(list,dest,NR_R30);
  1542. end
  1543. else
  1544. begin
  1545. DestQuickRef:=true;
  1546. dstref:=dest;
  1547. end;
  1548. for i:=1 to len do
  1549. begin
  1550. if not(SrcQuickRef) and (i<len) then
  1551. srcref.addressmode:=AM_POSTINCREMENT
  1552. else
  1553. srcref.addressmode:=AM_UNCHANGED;
  1554. if not(DestQuickRef) and (i<len) then
  1555. dstref.addressmode:=AM_POSTINCREMENT
  1556. else
  1557. dstref.addressmode:=AM_UNCHANGED;
  1558. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1559. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1560. if SrcQuickRef then
  1561. inc(srcref.offset);
  1562. if DestQuickRef then
  1563. inc(dstref.offset);
  1564. end;
  1565. if not(SrcQuickRef) then
  1566. begin
  1567. ungetcpuregister(list,srcref.base);
  1568. ungetcpuregister(list,GetNextReg(srcref.base));
  1569. end;
  1570. end;
  1571. end;
  1572. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1573. var
  1574. hl : tasmlabel;
  1575. ai : taicpu;
  1576. cond : TAsmCond;
  1577. begin
  1578. if not(cs_check_overflow in current_settings.localswitches) then
  1579. exit;
  1580. current_asmdata.getjumplabel(hl);
  1581. if not ((def.typ=pointerdef) or
  1582. ((def.typ=orddef) and
  1583. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  1584. pasbool8,pasbool16,pasbool32,pasbool64]))) then
  1585. cond:=C_VC
  1586. else
  1587. cond:=C_CC;
  1588. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1589. ai.SetCondition(cond);
  1590. ai.is_jmp:=true;
  1591. list.concat(ai);
  1592. a_call_name(list,'FPC_OVERFLOW',false);
  1593. a_label(list,hl);
  1594. end;
  1595. procedure tcgavr.g_save_registers(list: TAsmList);
  1596. begin
  1597. { this is done by the entry code }
  1598. end;
  1599. procedure tcgavr.g_restore_registers(list: TAsmList);
  1600. begin
  1601. { this is done by the exit code }
  1602. end;
  1603. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1604. var
  1605. ai1,ai2 : taicpu;
  1606. hl : TAsmLabel;
  1607. begin
  1608. ai1:=Taicpu.Op_sym(A_BRxx,l);
  1609. ai1.is_jmp:=true;
  1610. hl:=nil;
  1611. case cond of
  1612. OC_EQ:
  1613. ai1.SetCondition(C_EQ);
  1614. OC_GT:
  1615. begin
  1616. { emulate GT }
  1617. current_asmdata.getjumplabel(hl);
  1618. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1619. ai2.SetCondition(C_EQ);
  1620. ai2.is_jmp:=true;
  1621. list.concat(ai2);
  1622. ai1.SetCondition(C_GE);
  1623. end;
  1624. OC_LT:
  1625. ai1.SetCondition(C_LT);
  1626. OC_GTE:
  1627. ai1.SetCondition(C_GE);
  1628. OC_LTE:
  1629. begin
  1630. { emulate LTE }
  1631. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1632. ai2.SetCondition(C_EQ);
  1633. ai2.is_jmp:=true;
  1634. list.concat(ai2);
  1635. ai1.SetCondition(C_LT);
  1636. end;
  1637. OC_NE:
  1638. ai1.SetCondition(C_NE);
  1639. OC_BE:
  1640. begin
  1641. { emulate BE }
  1642. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1643. ai2.SetCondition(C_EQ);
  1644. ai2.is_jmp:=true;
  1645. list.concat(ai2);
  1646. ai1.SetCondition(C_LO);
  1647. end;
  1648. OC_B:
  1649. ai1.SetCondition(C_LO);
  1650. OC_AE:
  1651. ai1.SetCondition(C_SH);
  1652. OC_A:
  1653. begin
  1654. { emulate A (unsigned GT) }
  1655. current_asmdata.getjumplabel(hl);
  1656. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1657. ai2.SetCondition(C_EQ);
  1658. ai2.is_jmp:=true;
  1659. list.concat(ai2);
  1660. ai1.SetCondition(C_SH);
  1661. end;
  1662. else
  1663. internalerror(2011082501);
  1664. end;
  1665. list.concat(ai1);
  1666. if assigned(hl) then
  1667. a_label(list,hl);
  1668. end;
  1669. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1670. var
  1671. instr: taicpu;
  1672. begin
  1673. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1674. list.Concat(instr);
  1675. { Notify the register allocator that we have written a move instruction so
  1676. it can try to eliminate it. }
  1677. add_move_instruction(instr);
  1678. end;
  1679. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1680. begin
  1681. if not(size in [OS_S64,OS_64]) then
  1682. internalerror(2012102402);
  1683. tcgavr(cg).a_op_reg_reg_internal(list,Op,size,regsrc.reglo,regsrc.reghi,regdst.reglo,regdst.reghi);
  1684. end;
  1685. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1686. begin
  1687. tcgavr(cg).a_op_const_reg_internal(list,Op,size,value,reg.reglo,reg.reghi);
  1688. end;
  1689. procedure create_codegen;
  1690. begin
  1691. cg:=tcgavr.create;
  1692. cg64:=tcg64favr.create;
  1693. end;
  1694. end.