ngppcadd.pas 19 KB

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  1. {
  2. Copyright (c) 2000-2006 by Florian Klaempfl and Jonas Maebe
  3. Code generation for add nodes on the PowerPC (32 and 64 bit generic)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ngppcadd;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,ncgadd,cpubase;
  22. type
  23. tgenppcaddnode = class(tcgaddnode)
  24. function pass_1: tnode; override;
  25. protected
  26. procedure pass_left_and_right;
  27. procedure load_left_right(cmpop, load_constants: boolean);
  28. function getresflags : tresflags;
  29. procedure emit_compare(unsigned: boolean); virtual; abstract;
  30. procedure second_addfloat;override;
  31. procedure second_addboolean;override;
  32. procedure second_addsmallset;override;
  33. end;
  34. implementation
  35. {*****************************************************************************
  36. Pass 1
  37. *****************************************************************************}
  38. uses
  39. globtype,systems,
  40. cutils,verbose,globals,
  41. symconst,symdef,paramgr,
  42. aasmbase,aasmtai,aasmdata,aasmcpu,defutil,htypechk,
  43. cgbase,cpuinfo,pass_1,pass_2,regvars,
  44. cpupara,cgcpu,cgutils,procinfo,
  45. ncon,nset,
  46. ncgutil,tgobj,rgobj,rgcpu,cgobj;
  47. {*****************************************************************************
  48. Pass 1
  49. *****************************************************************************}
  50. function tgenppcaddnode.pass_1: tnode;
  51. begin
  52. typecheckpass(left);
  53. if (nodetype in [equaln,unequaln]) and
  54. (left.resultdef.deftype = orddef) and
  55. is_64bit(left.resultdef) then
  56. begin
  57. result := nil;
  58. firstpass(left);
  59. firstpass(right);
  60. expectloc := LOC_FLAGS;
  61. calcregisters(self,2,0,0);
  62. exit;
  63. end;
  64. result := inherited pass_1;
  65. end;
  66. {*****************************************************************************
  67. Helpers
  68. *****************************************************************************}
  69. procedure tgenppcaddnode.pass_left_and_right;
  70. begin
  71. { calculate the operator which is more difficult }
  72. firstcomplex(self);
  73. { in case of constant put it to the left }
  74. if (left.nodetype=ordconstn) then
  75. swapleftright;
  76. secondpass(left);
  77. secondpass(right);
  78. end;
  79. procedure tgenppcaddnode.load_left_right(cmpop, load_constants: boolean);
  80. procedure load_node(var n: tnode);
  81. begin
  82. case n.location.loc of
  83. LOC_REGISTER,
  84. LOC_CREGISTER:
  85. ;
  86. LOC_REFERENCE,LOC_CREFERENCE:
  87. location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resultdef),false);
  88. LOC_CONSTANT:
  89. begin
  90. if load_constants then
  91. location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resultdef),false);
  92. end;
  93. else
  94. location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resultdef),false);
  95. end;
  96. end;
  97. begin
  98. load_node(left);
  99. load_node(right);
  100. if not(cmpop) then
  101. begin
  102. location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  103. {$ifndef cpu64bit}
  104. if is_64bit(resultdef) then
  105. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  106. {$endif cpu64bit}
  107. end;
  108. end;
  109. function tgenppcaddnode.getresflags : tresflags;
  110. begin
  111. if (left.resultdef.deftype <> floatdef) then
  112. result.cr := RS_CR0
  113. else
  114. result.cr := RS_CR1;
  115. case nodetype of
  116. equaln : result.flag:=F_EQ;
  117. unequaln : result.flag:=F_NE;
  118. else
  119. if nf_swaped in flags then
  120. case nodetype of
  121. ltn : result.flag:=F_GT;
  122. lten : result.flag:=F_GE;
  123. gtn : result.flag:=F_LT;
  124. gten : result.flag:=F_LE;
  125. end
  126. else
  127. case nodetype of
  128. ltn : result.flag:=F_LT;
  129. lten : result.flag:=F_LE;
  130. gtn : result.flag:=F_GT;
  131. gten : result.flag:=F_GE;
  132. end;
  133. end
  134. end;
  135. {*****************************************************************************
  136. AddBoolean
  137. *****************************************************************************}
  138. procedure tgenppcaddnode.second_addboolean;
  139. var
  140. cgop : TOpCg;
  141. cgsize : TCgSize;
  142. cmpop,
  143. isjump : boolean;
  144. otl,ofl : tasmlabel;
  145. begin
  146. { calculate the operator which is more difficult }
  147. firstcomplex(self);
  148. cmpop:=false;
  149. if (torddef(left.resultdef).typ=bool8bit) or
  150. (torddef(right.resultdef).typ=bool8bit) then
  151. cgsize:=OS_8
  152. else
  153. if (torddef(left.resultdef).typ=bool16bit) or
  154. (torddef(right.resultdef).typ=bool16bit) then
  155. cgsize:=OS_16
  156. else
  157. cgsize:=OS_32;
  158. if ((cs_full_boolean_eval in aktlocalswitches) and
  159. not(nf_short_bool in flags)) or
  160. (nodetype in [unequaln,ltn,lten,gtn,gten,equaln,xorn]) then
  161. begin
  162. if left.nodetype in [ordconstn,realconstn] then
  163. swapleftright;
  164. isjump:=(left.expectloc=LOC_JUMP);
  165. if isjump then
  166. begin
  167. otl:=current_procinfo.CurrTrueLabel;
  168. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  169. ofl:=current_procinfo.CurrFalseLabel;
  170. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  171. end;
  172. secondpass(left);
  173. if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
  174. location_force_reg(current_asmdata.CurrAsmList,left.location,cgsize,false);
  175. if isjump then
  176. begin
  177. current_procinfo.CurrTrueLabel:=otl;
  178. current_procinfo.CurrFalseLabel:=ofl;
  179. end
  180. else if left.location.loc=LOC_JUMP then
  181. internalerror(2003122901);
  182. isjump:=(right.expectloc=LOC_JUMP);
  183. if isjump then
  184. begin
  185. otl:=current_procinfo.CurrTrueLabel;
  186. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  187. ofl:=current_procinfo.CurrFalseLabel;
  188. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  189. end;
  190. secondpass(right);
  191. if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
  192. location_force_reg(current_asmdata.CurrAsmList,right.location,cgsize,false);
  193. if isjump then
  194. begin
  195. current_procinfo.CurrTrueLabel:=otl;
  196. current_procinfo.CurrFalseLabel:=ofl;
  197. end
  198. else if right.location.loc=LOC_JUMP then
  199. internalerror(200312292);
  200. cmpop := nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
  201. { set result location }
  202. if not cmpop then
  203. location_reset(location,LOC_REGISTER,def_cgsize(resultdef))
  204. else
  205. location_reset(location,LOC_FLAGS,OS_NO);
  206. load_left_right(cmpop,false);
  207. if (left.location.loc = LOC_CONSTANT) then
  208. swapleftright;
  209. { compare the }
  210. case nodetype of
  211. ltn,lten,gtn,gten,
  212. equaln,unequaln :
  213. begin
  214. if (right.location.loc <> LOC_CONSTANT) then
  215. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMPLW,
  216. left.location.register,right.location.register))
  217. else
  218. current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMPLWI,
  219. left.location.register,longint(right.location.value)));
  220. location.resflags := getresflags;
  221. end;
  222. else
  223. begin
  224. case nodetype of
  225. xorn :
  226. cgop:=OP_XOR;
  227. orn :
  228. cgop:=OP_OR;
  229. andn :
  230. cgop:=OP_AND;
  231. else
  232. internalerror(200203247);
  233. end;
  234. if right.location.loc <> LOC_CONSTANT then
  235. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  236. left.location.register,right.location.register,
  237. location.register)
  238. else
  239. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  240. right.location.value,left.location.register,
  241. location.register);
  242. end;
  243. end;
  244. end
  245. else
  246. inherited second_addboolean;
  247. end;
  248. {*****************************************************************************
  249. AddFloat
  250. *****************************************************************************}
  251. procedure tgenppcaddnode.second_addfloat;
  252. var
  253. op : TAsmOp;
  254. cmpop,
  255. singleprec : boolean;
  256. begin
  257. pass_left_and_right;
  258. cmpop:=false;
  259. singleprec:=tfloatdef(left.resultdef).typ=s32real;
  260. case nodetype of
  261. addn :
  262. if singleprec then
  263. op:=A_FADDS
  264. else
  265. op:=A_FADD;
  266. muln :
  267. if singleprec then
  268. op:=A_FMULS
  269. else
  270. op:=A_FMUL;
  271. subn :
  272. if singleprec then
  273. op:=A_FSUBS
  274. else
  275. op:=A_FSUB;
  276. slashn :
  277. if singleprec then
  278. op:=A_FDIVS
  279. else
  280. op:=A_FDIV;
  281. ltn,lten,gtn,gten,
  282. equaln,unequaln :
  283. begin
  284. op:=A_FCMPO;
  285. cmpop:=true;
  286. end;
  287. else
  288. internalerror(200403182);
  289. end;
  290. // get the operands in the correct order, there are no special cases
  291. // here, everything is register-based
  292. if nf_swaped in flags then
  293. swapleftright;
  294. // put both operands in a register
  295. location_force_fpureg(current_asmdata.CurrAsmList,right.location,true);
  296. location_force_fpureg(current_asmdata.CurrAsmList,left.location,true);
  297. // initialize de result
  298. if not cmpop then
  299. begin
  300. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  301. location.register := cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  302. end
  303. else
  304. begin
  305. location_reset(location,LOC_FLAGS,OS_NO);
  306. location.resflags := getresflags;
  307. end;
  308. // emit the actual operation
  309. if not cmpop then
  310. begin
  311. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,
  312. location.register,left.location.register,
  313. right.location.register))
  314. end
  315. else
  316. begin
  317. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,
  318. newreg(R_SPECIALREGISTER,location.resflags.cr,R_SUBNONE),left.location.register,right.location.register))
  319. end;
  320. end;
  321. {*****************************************************************************
  322. AddSmallSet
  323. *****************************************************************************}
  324. procedure tgenppcaddnode.second_addsmallset;
  325. var
  326. cgop : TOpCg;
  327. tmpreg : tregister;
  328. opdone,
  329. cmpop : boolean;
  330. begin
  331. pass_left_and_right;
  332. { when a setdef is passed, it has to be a smallset }
  333. if ((left.resultdef.deftype=setdef) and
  334. (tsetdef(left.resultdef).settype<>smallset)) or
  335. ((right.resultdef.deftype=setdef) and
  336. (tsetdef(right.resultdef).settype<>smallset)) then
  337. internalerror(200203301);
  338. opdone := false;
  339. cmpop:=nodetype in [equaln,unequaln,lten,gten];
  340. { set result location }
  341. if not cmpop then
  342. location_reset(location,LOC_REGISTER,def_cgsize(resultdef))
  343. else
  344. location_reset(location,LOC_FLAGS,OS_NO);
  345. load_left_right(cmpop,false);
  346. if not(cmpop) then
  347. location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  348. case nodetype of
  349. addn :
  350. begin
  351. if (nf_swaped in flags) and (left.nodetype=setelementn) then
  352. swapleftright;
  353. { are we adding set elements ? }
  354. if right.nodetype=setelementn then
  355. begin
  356. { no range support for smallsets! }
  357. if assigned(tsetelementnode(right).right) then
  358. internalerror(43244);
  359. if (right.location.loc = LOC_CONSTANT) then
  360. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,
  361. aint(aword(1) shl aword(right.location.value)),
  362. left.location.register,location.register)
  363. else
  364. begin
  365. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  366. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,1,tmpreg);
  367. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_SHL,OS_INT,
  368. right.location.register,tmpreg);
  369. if left.location.loc <> LOC_CONSTANT then
  370. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,tmpreg,
  371. left.location.register,location.register)
  372. else
  373. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,
  374. left.location.value,tmpreg,location.register);
  375. end;
  376. opdone := true;
  377. end
  378. else
  379. cgop := OP_OR;
  380. end;
  381. symdifn :
  382. cgop:=OP_XOR;
  383. muln :
  384. cgop:=OP_AND;
  385. subn :
  386. begin
  387. cgop:=OP_AND;
  388. if (not(nf_swaped in flags)) then
  389. if (right.location.loc=LOC_CONSTANT) then
  390. right.location.value := not(right.location.value)
  391. else
  392. opdone := true
  393. else if (left.location.loc=LOC_CONSTANT) then
  394. left.location.value := not(left.location.value)
  395. else
  396. begin
  397. swapleftright;
  398. opdone := true;
  399. end;
  400. if opdone then
  401. begin
  402. if left.location.loc = LOC_CONSTANT then
  403. begin
  404. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  405. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
  406. left.location.value,tmpreg);
  407. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC,
  408. location.register,tmpreg,right.location.register));
  409. end
  410. else
  411. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC,
  412. location.register,left.location.register,
  413. right.location.register));
  414. end;
  415. end;
  416. equaln,
  417. unequaln :
  418. begin
  419. emit_compare(true);
  420. opdone := true;
  421. end;
  422. lten,gten:
  423. begin
  424. If (not(nf_swaped in flags) and
  425. (nodetype = lten)) or
  426. ((nf_swaped in flags) and
  427. (nodetype = gten)) then
  428. swapleftright;
  429. // now we have to check whether left >= right
  430. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  431. if left.location.loc = LOC_CONSTANT then
  432. begin
  433. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,
  434. not(left.location.value),right.location.register,tmpreg);
  435. current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMPWI,tmpreg,0));
  436. // the two instructions above should be folded together by
  437. // the peepholeoptimizer
  438. end
  439. else
  440. begin
  441. if right.location.loc = LOC_CONSTANT then
  442. begin
  443. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
  444. right.location.value,tmpreg);
  445. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
  446. tmpreg,left.location.register));
  447. end
  448. else
  449. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
  450. right.location.register,left.location.register));
  451. end;
  452. location.resflags.cr := RS_CR0;
  453. location.resflags.flag := F_EQ;
  454. opdone := true;
  455. end;
  456. else
  457. internalerror(2002072701);
  458. end;
  459. if not opdone then
  460. begin
  461. // these are all commutative operations
  462. if (left.location.loc = LOC_CONSTANT) then
  463. swapleftright;
  464. if (right.location.loc = LOC_CONSTANT) then
  465. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  466. right.location.value,left.location.register,
  467. location.register)
  468. else
  469. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  470. right.location.register,left.location.register,
  471. location.register);
  472. end;
  473. end;
  474. end.