n386inl.pas 18 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Generate i386 inline nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit n386inl;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. node,ninl,ncginl;
  23. type
  24. ti386inlinenode = class(tcginlinenode)
  25. { first pass override
  26. so that the code generator will actually generate
  27. these nodes.
  28. }
  29. function first_pi: tnode ; override;
  30. function first_arctan_real: tnode; override;
  31. function first_abs_real: tnode; override;
  32. function first_sqr_real: tnode; override;
  33. function first_sqrt_real: tnode; override;
  34. function first_ln_real: tnode; override;
  35. function first_cos_real: tnode; override;
  36. function first_sin_real: tnode; override;
  37. { second pass override to generate these nodes }
  38. procedure second_IncludeExclude;override;
  39. procedure second_pi; override;
  40. procedure second_arctan_real; override;
  41. procedure second_abs_real; override;
  42. procedure second_sqr_real; override;
  43. procedure second_sqrt_real; override;
  44. procedure second_ln_real; override;
  45. procedure second_cos_real; override;
  46. procedure second_sin_real; override;
  47. private
  48. procedure load_fpu_location;
  49. end;
  50. implementation
  51. uses
  52. systems,
  53. cutils,verbose,
  54. defutil,
  55. aasmtai,
  56. cgbase,pass_2,
  57. cpubase,paramgr,
  58. nbas,ncon,ncal,ncnv,nld,
  59. cga,cgx86,cgobj;
  60. {*****************************************************************************
  61. TI386INLINENODE
  62. *****************************************************************************}
  63. function ti386inlinenode.first_pi : tnode;
  64. begin
  65. expectloc:=LOC_FPUREGISTER;
  66. registersfpu:=1;
  67. first_pi := nil;
  68. end;
  69. function ti386inlinenode.first_arctan_real : tnode;
  70. begin
  71. expectloc:=LOC_FPUREGISTER;
  72. registers32:=left.registers32;
  73. registersfpu:=max(left.registersfpu,2);
  74. {$ifdef SUPPORT_MMX}
  75. registersmmx:=left.registersmmx;
  76. {$endif SUPPORT_MMX}
  77. first_arctan_real := nil;
  78. end;
  79. function ti386inlinenode.first_abs_real : tnode;
  80. begin
  81. expectloc:=LOC_FPUREGISTER;
  82. registers32:=left.registers32;
  83. registersfpu:=max(left.registersfpu,1);
  84. {$ifdef SUPPORT_MMX}
  85. registersmmx:=left.registersmmx;
  86. {$endif SUPPORT_MMX}
  87. first_abs_real := nil;
  88. end;
  89. function ti386inlinenode.first_sqr_real : tnode;
  90. begin
  91. expectloc:=LOC_FPUREGISTER;
  92. registers32:=left.registers32;
  93. registersfpu:=max(left.registersfpu,1);
  94. {$ifdef SUPPORT_MMX}
  95. registersmmx:=left.registersmmx;
  96. {$endif SUPPORT_MMX}
  97. first_sqr_real := nil;
  98. end;
  99. function ti386inlinenode.first_sqrt_real : tnode;
  100. begin
  101. expectloc:=LOC_FPUREGISTER;
  102. registers32:=left.registers32;
  103. registersfpu:=max(left.registersfpu,1);
  104. {$ifdef SUPPORT_MMX}
  105. registersmmx:=left.registersmmx;
  106. {$endif SUPPORT_MMX}
  107. first_sqrt_real := nil;
  108. end;
  109. function ti386inlinenode.first_ln_real : tnode;
  110. begin
  111. expectloc:=LOC_FPUREGISTER;
  112. registers32:=left.registers32;
  113. registersfpu:=max(left.registersfpu,2);
  114. {$ifdef SUPPORT_MMX}
  115. registersmmx:=left.registersmmx;
  116. {$endif SUPPORT_MMX}
  117. first_ln_real := nil;
  118. end;
  119. function ti386inlinenode.first_cos_real : tnode;
  120. begin
  121. expectloc:=LOC_FPUREGISTER;
  122. registers32:=left.registers32;
  123. registersfpu:=max(left.registersfpu,1);
  124. {$ifdef SUPPORT_MMX}
  125. registersmmx:=left.registersmmx;
  126. {$endif SUPPORT_MMX}
  127. first_cos_real := nil;
  128. end;
  129. function ti386inlinenode.first_sin_real : tnode;
  130. begin
  131. expectloc:=LOC_FPUREGISTER;
  132. registers32:=left.registers32;
  133. registersfpu:=max(left.registersfpu,1);
  134. {$ifdef SUPPORT_MMX}
  135. registersmmx:=left.registersmmx;
  136. {$endif SUPPORT_MMX}
  137. first_sin_real := nil;
  138. end;
  139. procedure ti386inlinenode.second_Pi;
  140. begin
  141. location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
  142. emit_none(A_FLDPI,S_NO);
  143. tcgx86(cg).inc_fpu_stack;
  144. location.register:=NR_FPU_RESULT_REG;
  145. end;
  146. { load the FPU into the an fpu register }
  147. procedure ti386inlinenode.load_fpu_location;
  148. begin
  149. location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
  150. location.register:=NR_FPU_RESULT_REG;
  151. secondpass(left);
  152. case left.location.loc of
  153. LOC_FPUREGISTER:
  154. ;
  155. LOC_CFPUREGISTER:
  156. begin
  157. cg.a_loadfpu_reg_reg(exprasmlist,left.location.size,
  158. left.location.register,location.register);
  159. end;
  160. LOC_REFERENCE,LOC_CREFERENCE:
  161. begin
  162. cg.a_loadfpu_ref_reg(exprasmlist,
  163. def_cgsize(left.resulttype.def),
  164. left.location.reference,location.register);
  165. location_release(exprasmlist,left.location);
  166. end
  167. else
  168. internalerror(309991);
  169. end;
  170. end;
  171. procedure ti386inlinenode.second_arctan_real;
  172. begin
  173. load_fpu_location;
  174. emit_none(A_FLD1,S_NO);
  175. emit_none(A_FPATAN,S_NO);
  176. end;
  177. procedure ti386inlinenode.second_abs_real;
  178. begin
  179. load_fpu_location;
  180. emit_none(A_FABS,S_NO);
  181. end;
  182. procedure ti386inlinenode.second_sqr_real;
  183. begin
  184. load_fpu_location;
  185. emit_reg_reg(A_FMUL,S_NO,NR_ST0,NR_ST0);
  186. end;
  187. procedure ti386inlinenode.second_sqrt_real;
  188. begin
  189. load_fpu_location;
  190. emit_none(A_FSQRT,S_NO);
  191. end;
  192. procedure ti386inlinenode.second_ln_real;
  193. begin
  194. load_fpu_location;
  195. emit_none(A_FLDLN2,S_NO);
  196. emit_none(A_FXCH,S_NO);
  197. emit_none(A_FYL2X,S_NO);
  198. end;
  199. procedure ti386inlinenode.second_cos_real;
  200. begin
  201. load_fpu_location;
  202. emit_none(A_FCOS,S_NO);
  203. end;
  204. procedure ti386inlinenode.second_sin_real;
  205. begin
  206. load_fpu_location;
  207. emit_none(A_FSIN,S_NO)
  208. end;
  209. {*****************************************************************************
  210. INCLUDE/EXCLUDE GENERIC HANDLING
  211. *****************************************************************************}
  212. procedure ti386inlinenode.second_IncludeExclude;
  213. var
  214. hregister : tregister;
  215. asmop : tasmop;
  216. L : cardinal;
  217. cgop : topcg;
  218. begin
  219. secondpass(tcallparanode(left).left);
  220. if tcallparanode(tcallparanode(left).right).left.nodetype=ordconstn then
  221. begin
  222. { calculate bit position }
  223. l:=cardinal(1 shl (tordconstnode(tcallparanode(tcallparanode(left).right).left).value mod 32));
  224. { determine operator }
  225. if inlinenumber=in_include_x_y then
  226. cgop:=OP_OR
  227. else
  228. begin
  229. cgop:=OP_AND;
  230. l:=not(l);
  231. end;
  232. if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
  233. begin
  234. inc(tcallparanode(left).left.location.reference.offset,
  235. (tordconstnode(tcallparanode(tcallparanode(left).right).left).value div 32)*4);
  236. cg.a_op_const_ref(exprasmlist,cgop,OS_INT,l,tcallparanode(left).left.location.reference);
  237. location_release(exprasmlist,tcallparanode(left).left.location);
  238. end
  239. else
  240. { LOC_CREGISTER }
  241. begin
  242. cg.a_op_const_reg(exprasmlist,cgop,tcallparanode(left).left.location.size,
  243. l,tcallparanode(left).left.location.register);
  244. end;
  245. end
  246. else
  247. begin
  248. { generate code for the element to set }
  249. secondpass(tcallparanode(tcallparanode(left).right).left);
  250. { determine asm operator }
  251. if inlinenumber=in_include_x_y then
  252. asmop:=A_BTS
  253. else
  254. asmop:=A_BTR;
  255. if tcallparanode(tcallparanode(left).right).left.location.loc in [LOC_CREGISTER,LOC_REGISTER] then
  256. { we don't need a mod 32 because this is done automatically }
  257. { by the bts instruction. For proper checking we would }
  258. { note: bts doesn't do any mod'ing, that's why we can also use }
  259. { it for normalsets! (JM) }
  260. { need a cmp and jmp, but this should be done by the }
  261. { type cast code which does range checking if necessary (FK) }
  262. begin
  263. hregister:=cg.makeregsize(Tcallparanode(Tcallparanode(left).right).left.location.register,OS_INT);
  264. end
  265. else
  266. begin
  267. hregister:=cg.getintregister(exprasmlist,OS_INT);
  268. end;
  269. location_release(exprasmlist,tcallparanode(tcallparanode(left).right).left.location);
  270. cg.a_load_loc_reg(exprasmlist,OS_INT,tcallparanode(tcallparanode(left).right).left.location,hregister);
  271. if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
  272. emit_reg_ref(asmop,S_L,hregister,tcallparanode(left).left.location.reference)
  273. else
  274. emit_reg_reg(asmop,S_L,hregister,tcallparanode(left).left.location.register);
  275. cg.ungetregister(exprasmlist,hregister);
  276. location_release(exprasmlist,Tcallparanode(left).left.location);
  277. end;
  278. end;
  279. begin
  280. cinlinenode:=ti386inlinenode;
  281. end.
  282. {
  283. $Log$
  284. Revision 1.70 2003-10-10 17:48:14 peter
  285. * old trgobj moved to x86/rgcpu and renamed to trgx86fpu
  286. * tregisteralloctor renamed to trgobj
  287. * removed rgobj from a lot of units
  288. * moved location_* and reference_* to cgobj
  289. * first things for mmx register allocation
  290. Revision 1.69 2003/10/09 21:31:37 daniel
  291. * Register allocator splitted, ans abstract now
  292. Revision 1.68 2003/10/01 20:34:49 peter
  293. * procinfo unit contains tprocinfo
  294. * cginfo renamed to cgbase
  295. * moved cgmessage to verbose
  296. * fixed ppc and sparc compiles
  297. Revision 1.67 2003/09/28 21:48:20 peter
  298. * fix register leaks
  299. Revision 1.66 2003/09/07 22:09:35 peter
  300. * preparations for different default calling conventions
  301. * various RA fixes
  302. Revision 1.65 2003/09/03 15:55:01 peter
  303. * NEWRA branch merged
  304. Revision 1.64.2.2 2003/08/31 15:46:26 peter
  305. * more updates for tregister
  306. Revision 1.64.2.1 2003/08/29 17:29:00 peter
  307. * next batch of updates
  308. Revision 1.64 2003/07/02 22:18:04 peter
  309. * paraloc splitted in callerparaloc,calleeparaloc
  310. * sparc calling convention updates
  311. Revision 1.63 2003/06/03 13:01:59 daniel
  312. * Register allocator finished
  313. Revision 1.62 2003/06/01 21:38:06 peter
  314. * getregisterfpu size parameter added
  315. * op_const_reg size parameter added
  316. * sparc updates
  317. Revision 1.61 2003/05/30 23:49:18 jonas
  318. * a_load_loc_reg now has an extra size parameter for the destination
  319. register (properly fixes what I worked around in revision 1.106 of
  320. ncgutil.pas)
  321. Revision 1.60 2003/04/23 09:50:31 peter
  322. * wrong location_copy for include/exclude
  323. Revision 1.59 2003/04/22 23:50:23 peter
  324. * firstpass uses expectloc
  325. * checks if there are differences between the expectloc and
  326. location.loc from secondpass in EXTDEBUG
  327. Revision 1.58 2003/04/22 14:33:38 peter
  328. * removed some notes/hints
  329. Revision 1.57 2003/04/22 10:09:35 daniel
  330. + Implemented the actual register allocator
  331. + Scratch registers unavailable when new register allocator used
  332. + maybe_save/maybe_restore unavailable when new register allocator used
  333. Revision 1.56 2003/02/19 22:00:15 daniel
  334. * Code generator converted to new register notation
  335. - Horribily outdated todo.txt removed
  336. Revision 1.55 2003/01/08 18:43:57 daniel
  337. * Tregister changed into a record
  338. Revision 1.54 2002/11/25 17:43:26 peter
  339. * splitted defbase in defutil,symutil,defcmp
  340. * merged isconvertable and is_equal into compare_defs(_ext)
  341. * made operator search faster by walking the list only once
  342. Revision 1.53 2002/09/07 15:25:10 peter
  343. * old logs removed and tabs fixed
  344. Revision 1.52 2002/08/02 07:44:31 jonas
  345. * made assigned() handling generic
  346. * add nodes now can also evaluate constant expressions at compile time
  347. that contain nil nodes
  348. Revision 1.51 2002/07/26 11:16:35 jonas
  349. * fixed (actual and potential) range errors
  350. Revision 1.50 2002/07/25 18:02:33 carl
  351. + added generic inline nodes
  352. Revision 1.49 2002/07/20 11:58:02 florian
  353. * types.pas renamed to defbase.pas because D6 contains a types
  354. unit so this would conflicts if D6 programms are compiled
  355. + Willamette/SSE2 instructions to assembler added
  356. Revision 1.48 2002/07/11 14:41:33 florian
  357. * start of the new generic parameter handling
  358. Revision 1.47 2002/07/07 09:52:34 florian
  359. * powerpc target fixed, very simple units can be compiled
  360. * some basic stuff for better callparanode handling, far from being finished
  361. Revision 1.46 2002/07/01 18:46:33 peter
  362. * internal linker
  363. * reorganized aasm layer
  364. Revision 1.45 2002/07/01 16:23:56 peter
  365. * cg64 patch
  366. * basics for currency
  367. * asnode updates for class and interface (not finished)
  368. Revision 1.44 2002/05/18 13:34:25 peter
  369. * readded missing revisions
  370. Revision 1.43 2002/05/16 19:46:51 carl
  371. + defines.inc -> fpcdefs.inc to avoid conflicts if compiling by hand
  372. + try to fix temp allocation (still in ifdef)
  373. + generic constructor calls
  374. + start of tassembler / tmodulebase class cleanup
  375. Revision 1.41 2002/05/13 19:54:38 peter
  376. * removed n386ld and n386util units
  377. * maybe_save/maybe_restore added instead of the old maybe_push
  378. Revision 1.40 2002/05/12 16:53:17 peter
  379. * moved entry and exitcode to ncgutil and cgobj
  380. * foreach gets extra argument for passing local data to the
  381. iterator function
  382. * -CR checks also class typecasts at runtime by changing them
  383. into as
  384. * fixed compiler to cycle with the -CR option
  385. * fixed stabs with elf writer, finally the global variables can
  386. be watched
  387. * removed a lot of routines from cga unit and replaced them by
  388. calls to cgobj
  389. * u32bit-s32bit updates for and,or,xor nodes. When one element is
  390. u32bit then the other is typecasted also to u32bit without giving
  391. a rangecheck warning/error.
  392. * fixed pascal calling method with reversing also the high tree in
  393. the parast, detected by tcalcst3 test
  394. Revision 1.39 2002/04/23 19:16:35 peter
  395. * add pinline unit that inserts compiler supported functions using
  396. one or more statements
  397. * moved finalize and setlength from ninl to pinline
  398. Revision 1.38 2002/04/21 15:35:54 carl
  399. * changeregsize -> rg.makeregsize
  400. Revision 1.37 2002/04/19 15:39:35 peter
  401. * removed some more routines from cga
  402. * moved location_force_reg/mem to ncgutil
  403. * moved arrayconstructnode secondpass to ncgld
  404. Revision 1.36 2002/04/15 19:44:21 peter
  405. * fixed stackcheck that would be called recursively when a stack
  406. error was found
  407. * generic changeregsize(reg,size) for i386 register resizing
  408. * removed some more routines from cga unit
  409. * fixed returnvalue handling
  410. * fixed default stacksize of linux and go32v2, 8kb was a bit small :-)
  411. Revision 1.35 2002/04/04 19:06:11 peter
  412. * removed unused units
  413. * use tlocation.size in cg.a_*loc*() routines
  414. Revision 1.34 2002/04/02 17:11:36 peter
  415. * tlocation,treference update
  416. * LOC_CONSTANT added for better constant handling
  417. * secondadd splitted in multiple routines
  418. * location_force_reg added for loading a location to a register
  419. of a specified size
  420. * secondassignment parses now first the right and then the left node
  421. (this is compatible with Kylix). This saves a lot of push/pop especially
  422. with string operations
  423. * adapted some routines to use the new cg methods
  424. Revision 1.33 2002/03/31 20:26:39 jonas
  425. + a_loadfpu_* and a_loadmm_* methods in tcg
  426. * register allocation is now second_d by a class and is mostly processor
  427. independent (+rgobj.pas and i386/rgcpu.pas)
  428. * temp allocation is now second_d by a class (+tgobj.pas, -i386\tgcpu.pas)
  429. * some small improvements and fixes to the optimizer
  430. * some register allocation fixes
  431. * some fpuvaroffset fixes in the unary minus node
  432. * push/popusedregisters is now called rg.save/restoreusedregisters and
  433. (for i386) uses temps instead of push/pop's when using -Op3 (that code is
  434. also better optimizable)
  435. * fixed and optimized register saving/restoring for new/dispose nodes
  436. * LOC_FPU locations now also require their "register" field to be set to
  437. R_ST, not R_ST0 (the latter is used for LOC_CFPUREGISTER locations only)
  438. - list field removed of the tnode class because it's not used currently
  439. and can cause hard-to-find bugs
  440. Revision 1.32 2002/03/04 19:10:14 peter
  441. * removed compiler warnings
  442. }