cpuasm.pas 46 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl and Peter Vreman
  4. Contains the assembler object for the i386
  5. * This code was inspired by the NASM sources
  6. The Netwide Assembler is copyright (C) 1996 Simon Tatham and
  7. Julian Hall. All rights reserved.
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. ****************************************************************************
  20. }
  21. unit cpuasm;
  22. {$i defines.inc}
  23. { Optimize addressing and skip already passed nodes }
  24. {$ifndef NASMDEBUG}
  25. {$define OPTEA}
  26. {$define PASS2FLAG}
  27. {$endif ndef NASMDEBUG}
  28. { Give warnings when an immediate is found in the reference struct }
  29. {.$define REF_IMMEDIATE_WARN}
  30. interface
  31. uses
  32. cobjects,cclasses,
  33. aasm,globals,verbose,
  34. cpubase;
  35. const
  36. MaxPrefixes=4;
  37. type
  38. tairegalloc = class(tai)
  39. allocation : boolean;
  40. reg : tregister;
  41. constructor alloc(r : tregister);
  42. constructor dealloc(r : tregister);
  43. end;
  44. { alignment for operator }
  45. tai_align = class(tai_align_abstract)
  46. reg : tregister;
  47. constructor create(b:byte);
  48. constructor create_op(b: byte; _op: byte);
  49. function getfillbuf:pchar;
  50. end;
  51. taicpu = class(tai)
  52. is_jmp : boolean; { is this instruction a jump? (needed for optimizer) }
  53. opcode : tasmop;
  54. opsize : topsize;
  55. condition : TAsmCond;
  56. ops : longint;
  57. oper : array[0..2] of toper;
  58. constructor op_none(op : tasmop;_size : topsize);
  59. constructor op_reg(op : tasmop;_size : topsize;_op1 : tregister);
  60. constructor op_const(op : tasmop;_size : topsize;_op1 : longint);
  61. constructor op_ref(op : tasmop;_size : topsize;_op1 : preference);
  62. constructor op_reg_reg(op : tasmop;_size : topsize;_op1,_op2 : tregister);
  63. constructor op_reg_ref(op : tasmop;_size : topsize;_op1 : tregister;_op2 : preference);
  64. constructor op_reg_const(op:tasmop; _size: topsize; _op1: tregister; _op2: longint);
  65. constructor op_const_reg(op : tasmop;_size : topsize;_op1 : longint;_op2 : tregister);
  66. constructor op_const_const(op : tasmop;_size : topsize;_op1,_op2 : longint);
  67. constructor op_const_ref(op : tasmop;_size : topsize;_op1 : longint;_op2 : preference);
  68. constructor op_ref_reg(op : tasmop;_size : topsize;_op1 : preference;_op2 : tregister);
  69. { this is only allowed if _op1 is an int value (_op1^.isintvalue=true) }
  70. constructor op_ref_ref(op : tasmop;_size : topsize;_op1,_op2 : preference);
  71. constructor op_reg_reg_reg(op : tasmop;_size : topsize;_op1,_op2,_op3 : tregister);
  72. constructor op_const_reg_reg(op : tasmop;_size : topsize;_op1 : longint;_op2 : tregister;_op3 : tregister);
  73. constructor op_const_ref_reg(op : tasmop;_size : topsize;_op1 : longint;_op2 : preference;_op3 : tregister);
  74. constructor op_reg_reg_ref(op : tasmop;_size : topsize;_op1,_op2 : tregister; _op3 : preference);
  75. constructor op_const_reg_ref(op : tasmop;_size : topsize;_op1 : longint;_op2 : tregister;_op3 : preference);
  76. { this is for Jmp instructions }
  77. constructor op_cond_sym(op : tasmop;cond:TAsmCond;_size : topsize;_op1 : pasmsymbol);
  78. constructor op_sym(op : tasmop;_size : topsize;_op1 : pasmsymbol);
  79. constructor op_sym_ofs(op : tasmop;_size : topsize;_op1 : pasmsymbol;_op1ofs:longint);
  80. constructor op_sym_ofs_reg(op : tasmop;_size : topsize;_op1 : pasmsymbol;_op1ofs:longint;_op2 : tregister);
  81. constructor op_sym_ofs_ref(op : tasmop;_size : topsize;_op1 : pasmsymbol;_op1ofs:longint;_op2 : preference);
  82. procedure loadconst(opidx:longint;l:longint);
  83. procedure loadsymbol(opidx:longint;s:pasmsymbol;sofs:longint);
  84. procedure loadref(opidx:longint;p:preference);
  85. procedure loadreg(opidx:longint;r:tregister);
  86. procedure loadoper(opidx:longint;o:toper);
  87. procedure changeopsize(siz:topsize);
  88. procedure SetCondition(c:TAsmCond);
  89. destructor destroy;override;
  90. function getcopy:tlinkedlistitem;override;
  91. function GetString:string;
  92. procedure SwapOperands;
  93. procedure CheckNonCommutativeOpcodes;
  94. private
  95. segprefix : tregister;
  96. procedure init(op : tasmop;_size : topsize); { this need to be called by all constructor }
  97. {$ifndef NOAG386BIN}
  98. public
  99. { the next will reset all instructions that can change in pass 2 }
  100. procedure ResetPass2;
  101. function Pass1(offset:longint):longint;virtual;
  102. procedure Pass2;virtual;
  103. private
  104. { next fields are filled in pass1, so pass2 is faster }
  105. insentry : PInsEntry;
  106. insoffset,
  107. inssize : longint;
  108. LastInsOffset : longint; { need to be public to be reset }
  109. function InsEnd:longint;
  110. procedure create_ot;
  111. function Matches(p:PInsEntry):longint;
  112. function calcsize(p:PInsEntry):longint;
  113. procedure gencode;
  114. function NeedAddrPrefix(opidx:byte):boolean;
  115. {$endif NOAG386BIN}
  116. end;
  117. implementation
  118. uses
  119. cutils,
  120. ogbase;
  121. {*****************************************************************************
  122. TaiRegAlloc
  123. *****************************************************************************}
  124. constructor tairegalloc.alloc(r : tregister);
  125. begin
  126. inherited create;
  127. typ:=ait_regalloc;
  128. allocation:=true;
  129. reg:=r;
  130. end;
  131. constructor tairegalloc.dealloc(r : tregister);
  132. begin
  133. inherited create;
  134. typ:=ait_regalloc;
  135. allocation:=false;
  136. reg:=r;
  137. end;
  138. {****************************************************************************
  139. TAI_ALIGN
  140. ****************************************************************************}
  141. constructor tai_align.create(b: byte);
  142. begin
  143. inherited create(b);
  144. reg := R_ECX;
  145. end;
  146. constructor tai_align.create_op(b: byte; _op: byte);
  147. begin
  148. inherited create_op(b,_op);
  149. reg := R_NO;
  150. end;
  151. function tai_align.getfillbuf:pchar;
  152. const
  153. alignarray:array[0..5] of string[8]=(
  154. #$8D#$B4#$26#$00#$00#$00#$00,
  155. #$8D#$B6#$00#$00#$00#$00,
  156. #$8D#$74#$26#$00,
  157. #$8D#$76#$00,
  158. #$89#$F6,
  159. #$90
  160. );
  161. var
  162. bufptr : pchar;
  163. j : longint;
  164. begin
  165. if not use_op then
  166. begin
  167. bufptr:=@buf;
  168. while (fillsize>0) do
  169. begin
  170. for j:=0 to 5 do
  171. if (fillsize>=length(alignarray[j])) then
  172. break;
  173. move(alignarray[j][1],bufptr^,length(alignarray[j]));
  174. inc(bufptr,length(alignarray[j]));
  175. dec(fillsize,length(alignarray[j]));
  176. end;
  177. end;
  178. getfillbuf:=pchar(@buf);
  179. end;
  180. {*****************************************************************************
  181. Taicpu Constructors
  182. *****************************************************************************}
  183. procedure taicpu.loadconst(opidx:longint;l:longint);
  184. begin
  185. if opidx>=ops then
  186. ops:=opidx+1;
  187. with oper[opidx] do
  188. begin
  189. if typ=top_ref then
  190. disposereference(ref);
  191. val:=l;
  192. typ:=top_const;
  193. end;
  194. end;
  195. procedure taicpu.loadsymbol(opidx:longint;s:pasmsymbol;sofs:longint);
  196. begin
  197. if opidx>=ops then
  198. ops:=opidx+1;
  199. with oper[opidx] do
  200. begin
  201. if typ=top_ref then
  202. disposereference(ref);
  203. sym:=s;
  204. symofs:=sofs;
  205. typ:=top_symbol;
  206. end;
  207. { Mark the symbol as used }
  208. if assigned(s) then
  209. inc(s^.refs);
  210. end;
  211. procedure taicpu.loadref(opidx:longint;p:preference);
  212. begin
  213. if opidx>=ops then
  214. ops:=opidx+1;
  215. with oper[opidx] do
  216. begin
  217. if typ=top_ref then
  218. disposereference(ref);
  219. if p^.is_immediate then
  220. begin
  221. {$ifdef REF_IMMEDIATE_WARN}
  222. Comment(V_Warning,'Reference immediate');
  223. {$endif}
  224. val:=p^.offset;
  225. disposereference(p);
  226. typ:=top_const;
  227. end
  228. else
  229. begin
  230. ref:=p;
  231. if not(ref^.segment in [R_DS,R_NO]) then
  232. segprefix:=ref^.segment;
  233. typ:=top_ref;
  234. { mark symbol as used }
  235. if assigned(ref^.symbol) then
  236. inc(ref^.symbol^.refs);
  237. end;
  238. end;
  239. end;
  240. procedure taicpu.loadreg(opidx:longint;r:tregister);
  241. begin
  242. if opidx>=ops then
  243. ops:=opidx+1;
  244. with oper[opidx] do
  245. begin
  246. if typ=top_ref then
  247. disposereference(ref);
  248. reg:=r;
  249. typ:=top_reg;
  250. end;
  251. end;
  252. procedure taicpu.loadoper(opidx:longint;o:toper);
  253. begin
  254. if opidx>=ops then
  255. ops:=opidx+1;
  256. if oper[opidx].typ=top_ref then
  257. disposereference(oper[opidx].ref);
  258. oper[opidx]:=o;
  259. { copy also the reference }
  260. if oper[opidx].typ=top_ref then
  261. oper[opidx].ref:=newreference(o.ref^);
  262. end;
  263. procedure taicpu.changeopsize(siz:topsize);
  264. begin
  265. opsize:=siz;
  266. end;
  267. procedure taicpu.init(op : tasmop;_size : topsize);
  268. begin
  269. typ:=ait_instruction;
  270. is_jmp:=false;
  271. segprefix:=R_NO;
  272. opcode:=op;
  273. opsize:=_size;
  274. ops:=0;
  275. condition:=c_none;
  276. fillchar(oper,sizeof(oper),0);
  277. {$ifndef NOAG386BIN}
  278. insentry:=nil;
  279. LastInsOffset:=-1;
  280. InsOffset:=0;
  281. InsSize:=0;
  282. {$endif}
  283. end;
  284. constructor taicpu.op_none(op : tasmop;_size : topsize);
  285. begin
  286. inherited create;
  287. init(op,_size);
  288. end;
  289. constructor taicpu.op_reg(op : tasmop;_size : topsize;_op1 : tregister);
  290. begin
  291. inherited create;
  292. init(op,_size);
  293. ops:=1;
  294. loadreg(0,_op1);
  295. end;
  296. constructor taicpu.op_const(op : tasmop;_size : topsize;_op1 : longint);
  297. begin
  298. inherited create;
  299. init(op,_size);
  300. ops:=1;
  301. loadconst(0,_op1);
  302. end;
  303. constructor taicpu.op_ref(op : tasmop;_size : topsize;_op1 : preference);
  304. begin
  305. inherited create;
  306. init(op,_size);
  307. ops:=1;
  308. loadref(0,_op1);
  309. end;
  310. constructor taicpu.op_reg_reg(op : tasmop;_size : topsize;_op1,_op2 : tregister);
  311. begin
  312. inherited create;
  313. init(op,_size);
  314. ops:=2;
  315. loadreg(0,_op1);
  316. loadreg(1,_op2);
  317. end;
  318. constructor taicpu.op_reg_const(op:tasmop; _size: topsize; _op1: tregister; _op2: longint);
  319. begin
  320. inherited create;
  321. init(op,_size);
  322. ops:=2;
  323. loadreg(0,_op1);
  324. loadconst(1,_op2);
  325. end;
  326. constructor taicpu.op_reg_ref(op : tasmop;_size : topsize;_op1 : tregister;_op2 : preference);
  327. begin
  328. inherited create;
  329. init(op,_size);
  330. ops:=2;
  331. loadreg(0,_op1);
  332. loadref(1,_op2);
  333. end;
  334. constructor taicpu.op_const_reg(op : tasmop;_size : topsize;_op1 : longint;_op2 : tregister);
  335. begin
  336. inherited create;
  337. init(op,_size);
  338. ops:=2;
  339. loadconst(0,_op1);
  340. loadreg(1,_op2);
  341. end;
  342. constructor taicpu.op_const_const(op : tasmop;_size : topsize;_op1,_op2 : longint);
  343. begin
  344. inherited create;
  345. init(op,_size);
  346. ops:=2;
  347. loadconst(0,_op1);
  348. loadconst(1,_op2);
  349. end;
  350. constructor taicpu.op_const_ref(op : tasmop;_size : topsize;_op1 : longint;_op2 : preference);
  351. begin
  352. inherited create;
  353. init(op,_size);
  354. ops:=2;
  355. loadconst(0,_op1);
  356. loadref(1,_op2);
  357. end;
  358. constructor taicpu.op_ref_reg(op : tasmop;_size : topsize;_op1 : preference;_op2 : tregister);
  359. begin
  360. inherited create;
  361. init(op,_size);
  362. ops:=2;
  363. loadref(0,_op1);
  364. loadreg(1,_op2);
  365. end;
  366. constructor taicpu.op_ref_ref(op : tasmop;_size : topsize;_op1,_op2 : preference);
  367. begin
  368. inherited create;
  369. init(op,_size);
  370. ops:=2;
  371. loadref(0,_op1);
  372. loadref(1,_op2);
  373. end;
  374. constructor taicpu.op_reg_reg_reg(op : tasmop;_size : topsize;_op1,_op2,_op3 : tregister);
  375. begin
  376. inherited create;
  377. init(op,_size);
  378. ops:=3;
  379. loadreg(0,_op1);
  380. loadreg(1,_op2);
  381. loadreg(2,_op3);
  382. end;
  383. constructor taicpu.op_const_reg_reg(op : tasmop;_size : topsize;_op1 : longint;_op2 : tregister;_op3 : tregister);
  384. begin
  385. inherited create;
  386. init(op,_size);
  387. ops:=3;
  388. loadconst(0,_op1);
  389. loadreg(1,_op2);
  390. loadreg(2,_op3);
  391. end;
  392. constructor taicpu.op_reg_reg_ref(op : tasmop;_size : topsize;_op1,_op2 : tregister;_op3 : preference);
  393. begin
  394. inherited create;
  395. init(op,_size);
  396. ops:=3;
  397. loadreg(0,_op1);
  398. loadreg(1,_op2);
  399. loadref(2,_op3);
  400. end;
  401. constructor taicpu.op_const_ref_reg(op : tasmop;_size : topsize;_op1 : longint;_op2 : preference;_op3 : tregister);
  402. begin
  403. inherited create;
  404. init(op,_size);
  405. ops:=3;
  406. loadconst(0,_op1);
  407. loadref(1,_op2);
  408. loadreg(2,_op3);
  409. end;
  410. constructor taicpu.op_const_reg_ref(op : tasmop;_size : topsize;_op1 : longint;_op2 : tregister;_op3 : preference);
  411. begin
  412. inherited create;
  413. init(op,_size);
  414. ops:=3;
  415. loadconst(0,_op1);
  416. loadreg(1,_op2);
  417. loadref(2,_op3);
  418. end;
  419. constructor taicpu.op_cond_sym(op : tasmop;cond:TAsmCond;_size : topsize;_op1 : pasmsymbol);
  420. begin
  421. inherited create;
  422. init(op,_size);
  423. condition:=cond;
  424. ops:=1;
  425. loadsymbol(0,_op1,0);
  426. end;
  427. constructor taicpu.op_sym(op : tasmop;_size : topsize;_op1 : pasmsymbol);
  428. begin
  429. inherited create;
  430. init(op,_size);
  431. ops:=1;
  432. loadsymbol(0,_op1,0);
  433. end;
  434. constructor taicpu.op_sym_ofs(op : tasmop;_size : topsize;_op1 : pasmsymbol;_op1ofs:longint);
  435. begin
  436. inherited create;
  437. init(op,_size);
  438. ops:=1;
  439. loadsymbol(0,_op1,_op1ofs);
  440. end;
  441. constructor taicpu.op_sym_ofs_reg(op : tasmop;_size : topsize;_op1 : pasmsymbol;_op1ofs:longint;_op2 : tregister);
  442. begin
  443. inherited create;
  444. init(op,_size);
  445. ops:=2;
  446. loadsymbol(0,_op1,_op1ofs);
  447. loadreg(1,_op2);
  448. end;
  449. constructor taicpu.op_sym_ofs_ref(op : tasmop;_size : topsize;_op1 : pasmsymbol;_op1ofs:longint;_op2 : preference);
  450. begin
  451. inherited create;
  452. init(op,_size);
  453. ops:=2;
  454. loadsymbol(0,_op1,_op1ofs);
  455. loadref(1,_op2);
  456. end;
  457. destructor taicpu.destroy;
  458. var
  459. i : longint;
  460. begin
  461. if is_jmp then
  462. dec(PasmLabel(oper[0].sym)^.refs)
  463. else
  464. for i:=1 to ops do
  465. if (oper[i-1].typ=top_ref) then
  466. dispose(oper[i-1].ref);
  467. inherited destroy;
  468. end;
  469. function taicpu.getcopy:tlinkedlistitem;
  470. var
  471. i : longint;
  472. p : taicpu;
  473. begin
  474. p:=taicpu(inherited getcopy);
  475. { make a copy of the references }
  476. for i:=1 to ops do
  477. if (p.oper[i-1].typ=top_ref) then
  478. begin
  479. new(p.oper[i-1].ref);
  480. p.oper[i-1].ref^:=oper[i-1].ref^;
  481. end;
  482. getcopy:=p;
  483. end;
  484. procedure taicpu.SetCondition(c:TAsmCond);
  485. begin
  486. condition:=c;
  487. end;
  488. function taicpu.GetString:string;
  489. var
  490. i : longint;
  491. s : string;
  492. addsize : boolean;
  493. begin
  494. s:='['+int_op2str[opcode];
  495. for i:=1to ops do
  496. begin
  497. if i=1 then
  498. s:=s+' '
  499. else
  500. s:=s+',';
  501. { type }
  502. addsize:=false;
  503. if (oper[i-1].ot and OT_XMMREG)=OT_XMMREG then
  504. s:=s+'xmmreg'
  505. else
  506. if (oper[i-1].ot and OT_MMXREG)=OT_MMXREG then
  507. s:=s+'mmxreg'
  508. else
  509. if (oper[i-1].ot and OT_FPUREG)=OT_FPUREG then
  510. s:=s+'fpureg'
  511. else
  512. if (oper[i-1].ot and OT_REGISTER)=OT_REGISTER then
  513. begin
  514. s:=s+'reg';
  515. addsize:=true;
  516. end
  517. else
  518. if (oper[i-1].ot and OT_IMMEDIATE)=OT_IMMEDIATE then
  519. begin
  520. s:=s+'imm';
  521. addsize:=true;
  522. end
  523. else
  524. if (oper[i-1].ot and OT_MEMORY)=OT_MEMORY then
  525. begin
  526. s:=s+'mem';
  527. addsize:=true;
  528. end
  529. else
  530. s:=s+'???';
  531. { size }
  532. if addsize then
  533. begin
  534. if (oper[i-1].ot and OT_BITS8)<>0 then
  535. s:=s+'8'
  536. else
  537. if (oper[i-1].ot and OT_BITS16)<>0 then
  538. s:=s+'16'
  539. else
  540. if (oper[i-1].ot and OT_BITS32)<>0 then
  541. s:=s+'32'
  542. else
  543. s:=s+'??';
  544. { signed }
  545. if (oper[i-1].ot and OT_SIGNED)<>0 then
  546. s:=s+'s';
  547. end;
  548. end;
  549. GetString:=s+']';
  550. end;
  551. procedure taicpu.SwapOperands;
  552. var
  553. p : TOper;
  554. begin
  555. { Fix the operands which are in AT&T style and we need them in Intel style }
  556. case ops of
  557. 2 : begin
  558. { 0,1 -> 1,0 }
  559. p:=oper[0];
  560. oper[0]:=oper[1];
  561. oper[1]:=p;
  562. end;
  563. 3 : begin
  564. { 0,1,2 -> 2,1,0 }
  565. p:=oper[0];
  566. oper[0]:=oper[2];
  567. oper[2]:=p;
  568. end;
  569. end;
  570. end;
  571. { This check must be done with the operand in ATT order
  572. i.e.after swapping in the intel reader
  573. but before swapping in the NASM and TASM writers PM }
  574. procedure taicpu.CheckNonCommutativeOpcodes;
  575. begin
  576. if ((ops=2) and
  577. (oper[0].typ=top_reg) and
  578. (oper[1].typ=top_reg) and
  579. { if the first is ST and the second is also a register
  580. it is necessarily ST1 .. ST7 }
  581. (oper[0].reg=R_ST)) or
  582. ((ops=1) and
  583. (oper[0].typ=top_reg) and
  584. (oper[0].reg in [R_ST1..R_ST7])) or
  585. (ops=0) then
  586. if opcode=A_FSUBR then
  587. opcode:=A_FSUB
  588. else if opcode=A_FSUB then
  589. opcode:=A_FSUBR
  590. else if opcode=A_FDIVR then
  591. opcode:=A_FDIV
  592. else if opcode=A_FDIV then
  593. opcode:=A_FDIVR
  594. else if opcode=A_FSUBRP then
  595. opcode:=A_FSUBP
  596. else if opcode=A_FSUBP then
  597. opcode:=A_FSUBRP
  598. else if opcode=A_FDIVRP then
  599. opcode:=A_FDIVP
  600. else if opcode=A_FDIVP then
  601. opcode:=A_FDIVRP;
  602. end;
  603. {*****************************************************************************
  604. Assembler
  605. *****************************************************************************}
  606. {$ifndef NOAG386BIN}
  607. type
  608. ea=packed record
  609. sib_present : boolean;
  610. bytes : byte;
  611. size : byte;
  612. modrm : byte;
  613. sib : byte;
  614. end;
  615. procedure taicpu.create_ot;
  616. {
  617. this function will also fix some other fields which only needs to be once
  618. }
  619. var
  620. i,l,relsize : longint;
  621. begin
  622. if ops=0 then
  623. exit;
  624. { update oper[].ot field }
  625. for i:=0 to ops-1 do
  626. with oper[i] do
  627. begin
  628. case typ of
  629. top_reg :
  630. ot:=reg_2_type[reg];
  631. top_ref :
  632. begin
  633. { create ot field }
  634. ot:=OT_MEMORY or opsize_2_type[i,opsize];
  635. if (ref^.base=R_NO) and (ref^.index=R_NO) then
  636. ot:=ot or OT_MEM_OFFS;
  637. { handle also the offsetfixup }
  638. inc(ref^.offset,ref^.offsetfixup);
  639. ref^.offsetfixup:=0;
  640. { fix scalefactor }
  641. if (ref^.index=R_NO) then
  642. ref^.scalefactor:=0
  643. else
  644. if (ref^.scalefactor=0) then
  645. ref^.scalefactor:=1;
  646. end;
  647. top_const :
  648. begin
  649. if (opsize<>S_W) and (val>=-128) and (val<=127) then
  650. ot:=OT_IMM8 or OT_SIGNED
  651. else
  652. ot:=OT_IMMEDIATE or opsize_2_type[i,opsize];
  653. end;
  654. top_symbol :
  655. begin
  656. if LastInsOffset=-1 then
  657. l:=0
  658. else
  659. l:=InsOffset-LastInsOffset;
  660. inc(l,symofs);
  661. if assigned(sym) then
  662. inc(l,sym^.address);
  663. { instruction size will then always become 2 (PFV) }
  664. relsize:=(InsOffset+2)-l;
  665. if (not assigned(sym) or
  666. ((sym^.bind<>AB_EXTERNAL) and (sym^.address<>0))) and
  667. (relsize>=-128) and (relsize<=127) then
  668. ot:=OT_IMM32 or OT_SHORT
  669. else
  670. ot:=OT_IMM32 or OT_NEAR;
  671. end;
  672. end;
  673. end;
  674. end;
  675. function taicpu.InsEnd:longint;
  676. begin
  677. InsEnd:=InsOffset+InsSize;
  678. end;
  679. function taicpu.Matches(p:PInsEntry):longint;
  680. { * IF_SM stands for Size Match: any operand whose size is not
  681. * explicitly specified by the template is `really' intended to be
  682. * the same size as the first size-specified operand.
  683. * Non-specification is tolerated in the input instruction, but
  684. * _wrong_ specification is not.
  685. *
  686. * IF_SM2 invokes Size Match on only the first _two_ operands, for
  687. * three-operand instructions such as SHLD: it implies that the
  688. * first two operands must match in size, but that the third is
  689. * required to be _unspecified_.
  690. *
  691. * IF_SB invokes Size Byte: operands with unspecified size in the
  692. * template are really bytes, and so no non-byte specification in
  693. * the input instruction will be tolerated. IF_SW similarly invokes
  694. * Size Word, and IF_SD invokes Size Doubleword.
  695. *
  696. * (The default state if neither IF_SM nor IF_SM2 is specified is
  697. * that any operand with unspecified size in the template is
  698. * required to have unspecified size in the instruction too...)
  699. }
  700. var
  701. i,j,asize,oprs : longint;
  702. siz : array[0..2] of longint;
  703. begin
  704. Matches:=100;
  705. { Check the opcode and operands }
  706. if (p^.opcode<>opcode) or (p^.ops<>ops) then
  707. begin
  708. Matches:=0;
  709. exit;
  710. end;
  711. { Check that no spurious colons or TOs are present }
  712. for i:=0 to p^.ops-1 do
  713. if (oper[i].ot and (not p^.optypes[i]) and (OT_COLON or OT_TO))<>0 then
  714. begin
  715. Matches:=0;
  716. exit;
  717. end;
  718. { Check that the operand flags all match up }
  719. for i:=0 to p^.ops-1 do
  720. begin
  721. if (p^.optypes[i] and (not oper[i].ot) or
  722. ((p^.optypes[i] and OT_SIZE_MASK) and
  723. ((p^.optypes[i] xor oper[i].ot) and OT_SIZE_MASK)))<>0 then
  724. begin
  725. if ((p^.optypes[i] and (not oper[i].ot) and OT_NON_SIZE) or
  726. (oper[i].ot and OT_SIZE_MASK))<>0 then
  727. begin
  728. Matches:=0;
  729. exit;
  730. end
  731. else
  732. Matches:=1;
  733. end;
  734. end;
  735. { Check operand sizes }
  736. { as default an untyped size can get all the sizes, this is different
  737. from nasm, but else we need to do a lot checking which opcodes want
  738. size or not with the automatic size generation }
  739. asize:=longint($ffffffff);
  740. if (p^.flags and IF_SB)<>0 then
  741. asize:=OT_BITS8
  742. else if (p^.flags and IF_SW)<>0 then
  743. asize:=OT_BITS16
  744. else if (p^.flags and IF_SD)<>0 then
  745. asize:=OT_BITS32;
  746. if (p^.flags and IF_ARMASK)<>0 then
  747. begin
  748. siz[0]:=0;
  749. siz[1]:=0;
  750. siz[2]:=0;
  751. if (p^.flags and IF_AR0)<>0 then
  752. siz[0]:=asize
  753. else if (p^.flags and IF_AR1)<>0 then
  754. siz[1]:=asize
  755. else if (p^.flags and IF_AR2)<>0 then
  756. siz[2]:=asize;
  757. end
  758. else
  759. begin
  760. { siz[0]:=asize;
  761. siz[1]:=asize;
  762. siz[2]:=asize; }
  763. { we can leave because the size for all operands is forced to be
  764. the same }
  765. exit;
  766. end;
  767. if (p^.flags and (IF_SM or IF_SM2))<>0 then
  768. begin
  769. if (p^.flags and IF_SM2)<>0 then
  770. oprs:=2
  771. else
  772. oprs:=p^.ops;
  773. for i:=0 to oprs-1 do
  774. if ((p^.optypes[i] and OT_SIZE_MASK) <> 0) then
  775. begin
  776. for j:=0 to oprs-1 do
  777. siz[j]:=p^.optypes[i] and OT_SIZE_MASK;
  778. break;
  779. end;
  780. end
  781. else
  782. oprs:=2;
  783. { Check operand sizes }
  784. for i:=0to p^.ops-1 do
  785. begin
  786. if ((p^.optypes[i] and OT_SIZE_MASK)=0) and
  787. ((oper[i].ot and OT_SIZE_MASK and (not siz[i]))<>0) and
  788. { Immediates can always include smaller size }
  789. ((oper[i].ot and OT_IMMEDIATE)=0) and
  790. (((p^.optypes[i] and OT_SIZE_MASK) or siz[i])<(oper[i].ot and OT_SIZE_MASK)) then
  791. Matches:=2;
  792. end;
  793. end;
  794. procedure taicpu.ResetPass2;
  795. begin
  796. { we are here in a second pass, check if the instruction can be optimized }
  797. if assigned(InsEntry) and
  798. ((InsEntry^.flags and IF_PASS2)<>0) then
  799. begin
  800. InsEntry:=nil;
  801. InsSize:=0;
  802. end;
  803. LastInsOffset:=-1;
  804. end;
  805. function taicpu.Pass1(offset:longint):longint;
  806. var
  807. m,i : longint;
  808. begin
  809. Pass1:=0;
  810. { Save the old offset and set the new offset }
  811. InsOffset:=Offset;
  812. { Things which may only be done once, not when a second pass is done to
  813. optimize }
  814. if Insentry=nil then
  815. begin
  816. { Check if error last time then InsSize=-1 }
  817. if InsSize=-1 then
  818. exit;
  819. { We need intel style operands }
  820. SwapOperands;
  821. { create the .ot fields }
  822. create_ot;
  823. { set the file postion }
  824. aktfilepos:=fileinfo;
  825. end
  826. else
  827. begin
  828. {$ifdef PASS2FLAG}
  829. { we are here in a second pass, check if the instruction can be optimized }
  830. if (InsEntry^.flags and IF_PASS2)=0 then
  831. begin
  832. Pass1:=InsSize;
  833. exit;
  834. end;
  835. { update the .ot fields, some top_const can be updated }
  836. create_ot;
  837. {$endif}
  838. end;
  839. { Lookup opcode in the table }
  840. InsSize:=-1;
  841. i:=instabcache^[opcode];
  842. if i=-1 then
  843. begin
  844. Message1(asmw_e_opcode_not_in_table,att_op2str[opcode]);
  845. exit;
  846. end;
  847. insentry:=@instab[i];
  848. while (insentry^.opcode=opcode) do
  849. begin
  850. m:=matches(insentry);
  851. if m=100 then
  852. begin
  853. InsSize:=calcsize(insentry);
  854. if (segprefix<>R_NO) then
  855. inc(InsSize);
  856. Pass1:=InsSize;
  857. LastInsOffset:=InsOffset;
  858. exit;
  859. end;
  860. inc(i);
  861. insentry:=@instab[i];
  862. end;
  863. if insentry^.opcode<>opcode then
  864. Message1(asmw_e_invalid_opcode_and_operands,GetString);
  865. { No instruction found, set insentry to nil and inssize to -1 }
  866. insentry:=nil;
  867. inssize:=-1;
  868. LastInsOffset:=-1;
  869. end;
  870. procedure taicpu.Pass2;
  871. var
  872. c : longint;
  873. begin
  874. { error in pass1 ? }
  875. if insentry=nil then
  876. exit;
  877. aktfilepos:=fileinfo;
  878. { Segment override }
  879. if (segprefix<>R_NO) then
  880. begin
  881. case segprefix of
  882. R_CS : c:=$2e;
  883. R_DS : c:=$3e;
  884. R_ES : c:=$26;
  885. R_FS : c:=$64;
  886. R_GS : c:=$65;
  887. R_SS : c:=$36;
  888. end;
  889. objectdata.writebytes(c,1);
  890. { fix the offset for GenNode }
  891. inc(InsOffset);
  892. end;
  893. { Generate the instruction }
  894. GenCode;
  895. end;
  896. function taicpu.NeedAddrPrefix(opidx:byte):boolean;
  897. var
  898. i,b : tregister;
  899. begin
  900. if (OT_MEMORY and (not oper[opidx].ot))=0 then
  901. begin
  902. i:=oper[opidx].ref^.index;
  903. b:=oper[opidx].ref^.base;
  904. if not(i in [R_NO,R_EAX,R_EBX,R_ECX,R_EDX,R_EBP,R_ESP,R_ESI,R_EDI]) or
  905. not(b in [R_NO,R_EAX,R_EBX,R_ECX,R_EDX,R_EBP,R_ESP,R_ESI,R_EDI]) then
  906. begin
  907. NeedAddrPrefix:=true;
  908. exit;
  909. end;
  910. end;
  911. NeedAddrPrefix:=false;
  912. end;
  913. function regval(r:tregister):byte;
  914. begin
  915. case r of
  916. R_EAX,R_AX,R_AL,R_ES,R_CR0,R_DR0,R_ST,R_ST0,R_MM0,R_XMM0 :
  917. regval:=0;
  918. R_ECX,R_CX,R_CL,R_CS,R_DR1,R_ST1,R_MM1,R_XMM1 :
  919. regval:=1;
  920. R_EDX,R_DX,R_DL,R_SS,R_CR2,R_DR2,R_ST2,R_MM2,R_XMM2 :
  921. regval:=2;
  922. R_EBX,R_BX,R_BL,R_DS,R_CR3,R_DR3,R_TR3,R_ST3,R_MM3,R_XMM3 :
  923. regval:=3;
  924. R_ESP,R_SP,R_AH,R_FS,R_CR4,R_TR4,R_ST4,R_MM4,R_XMM4 :
  925. regval:=4;
  926. R_EBP,R_BP,R_CH,R_GS,R_TR5,R_ST5,R_MM5,R_XMM5 :
  927. regval:=5;
  928. R_ESI,R_SI,R_DH,R_DR6,R_TR6,R_ST6,R_MM6,R_XMM6 :
  929. regval:=6;
  930. R_EDI,R_DI,R_BH,R_DR7,R_TR7,R_ST7,R_MM7,R_XMM7 :
  931. regval:=7;
  932. else
  933. begin
  934. internalerror(777001);
  935. regval:=0;
  936. end;
  937. end;
  938. end;
  939. function process_ea(const input:toper;var output:ea;rfield:longint):boolean;
  940. const
  941. regs : array[0..63] of tregister=(
  942. R_MM0, R_EAX, R_AX, R_AL, R_XMM0, R_NO, R_NO, R_NO,
  943. R_MM1, R_ECX, R_CX, R_CL, R_XMM1, R_NO, R_NO, R_NO,
  944. R_MM2, R_EDX, R_DX, R_DL, R_XMM2, R_NO, R_NO, R_NO,
  945. R_MM3, R_EBX, R_BX, R_BL, R_XMM3, R_NO, R_NO, R_NO,
  946. R_MM4, R_ESP, R_SP, R_AH, R_XMM4, R_NO, R_NO, R_NO,
  947. R_MM5, R_EBP, R_BP, R_CH, R_XMM5, R_NO, R_NO, R_NO,
  948. R_MM6, R_ESI, R_SI, R_DH, R_XMM6, R_NO, R_NO, R_NO,
  949. R_MM7, R_EDI, R_DI, R_BH, R_XMM7, R_NO, R_NO, R_NO
  950. );
  951. var
  952. j : longint;
  953. i,b : tregister;
  954. sym : pasmsymbol;
  955. md,s : byte;
  956. base,index,scalefactor,
  957. o : longint;
  958. begin
  959. process_ea:=false;
  960. { register ? }
  961. if (input.typ=top_reg) then
  962. begin
  963. j:=0;
  964. while (j<=high(regs)) do
  965. begin
  966. if input.reg=regs[j] then
  967. break;
  968. inc(j);
  969. end;
  970. if j<=high(regs) then
  971. begin
  972. output.sib_present:=false;
  973. output.bytes:=0;
  974. output.modrm:=$c0 or (rfield shl 3) or (j shr 3);
  975. output.size:=1;
  976. process_ea:=true;
  977. end;
  978. exit;
  979. end;
  980. { memory reference }
  981. i:=input.ref^.index;
  982. b:=input.ref^.base;
  983. s:=input.ref^.scalefactor;
  984. o:=input.ref^.offset;
  985. sym:=input.ref^.symbol;
  986. { it's direct address }
  987. if (b=R_NO) and (i=R_NO) then
  988. begin
  989. { it's a pure offset }
  990. output.sib_present:=false;
  991. output.bytes:=4;
  992. output.modrm:=5 or (rfield shl 3);
  993. end
  994. else
  995. { it's an indirection }
  996. begin
  997. { 16 bit address? }
  998. if not((i in [R_NO,R_EAX,R_EBX,R_ECX,R_EDX,R_EBP,R_ESP,R_ESI,R_EDI]) and
  999. (b in [R_NO,R_EAX,R_EBX,R_ECX,R_EDX,R_EBP,R_ESP,R_ESI,R_EDI])) then
  1000. Message(asmw_e_16bit_not_supported);
  1001. {$ifdef OPTEA}
  1002. { make single reg base }
  1003. if (b=R_NO) and (s=1) then
  1004. begin
  1005. b:=i;
  1006. i:=R_NO;
  1007. end;
  1008. { convert [3,5,9]*EAX to EAX+[2,4,8]*EAX }
  1009. if (b=R_NO) and
  1010. (((s=2) and (i<>R_ESP)) or
  1011. (s=3) or (s=5) or (s=9)) then
  1012. begin
  1013. b:=i;
  1014. dec(s);
  1015. end;
  1016. { swap ESP into base if scalefactor is 1 }
  1017. if (s=1) and (i=R_ESP) then
  1018. begin
  1019. i:=b;
  1020. b:=R_ESP;
  1021. end;
  1022. {$endif}
  1023. { wrong, for various reasons }
  1024. if (i=R_ESP) or ((s<>1) and (s<>2) and (s<>4) and (s<>8) and (i<>R_NO)) then
  1025. exit;
  1026. { base }
  1027. case b of
  1028. R_EAX : base:=0;
  1029. R_ECX : base:=1;
  1030. R_EDX : base:=2;
  1031. R_EBX : base:=3;
  1032. R_ESP : base:=4;
  1033. R_NO,
  1034. R_EBP : base:=5;
  1035. R_ESI : base:=6;
  1036. R_EDI : base:=7;
  1037. else
  1038. exit;
  1039. end;
  1040. { index }
  1041. case i of
  1042. R_EAX : index:=0;
  1043. R_ECX : index:=1;
  1044. R_EDX : index:=2;
  1045. R_EBX : index:=3;
  1046. R_NO : index:=4;
  1047. R_EBP : index:=5;
  1048. R_ESI : index:=6;
  1049. R_EDI : index:=7;
  1050. else
  1051. exit;
  1052. end;
  1053. case s of
  1054. 0,
  1055. 1 : scalefactor:=0;
  1056. 2 : scalefactor:=1;
  1057. 4 : scalefactor:=2;
  1058. 8 : scalefactor:=3;
  1059. else
  1060. exit;
  1061. end;
  1062. if (b=R_NO) or
  1063. ((b<>R_EBP) and (o=0) and (sym=nil)) then
  1064. md:=0
  1065. else
  1066. if ((o>=-128) and (o<=127) and (sym=nil)) then
  1067. md:=1
  1068. else
  1069. md:=2;
  1070. if (b=R_NO) or (md=2) then
  1071. output.bytes:=4
  1072. else
  1073. output.bytes:=md;
  1074. { SIB needed ? }
  1075. if (i=R_NO) and (b<>R_ESP) then
  1076. begin
  1077. output.sib_present:=false;
  1078. output.modrm:=(md shl 6) or (rfield shl 3) or base;
  1079. end
  1080. else
  1081. begin
  1082. output.sib_present:=true;
  1083. output.modrm:=(md shl 6) or (rfield shl 3) or 4;
  1084. output.sib:=(scalefactor shl 6) or (index shl 3) or base;
  1085. end;
  1086. end;
  1087. if output.sib_present then
  1088. output.size:=2+output.bytes
  1089. else
  1090. output.size:=1+output.bytes;
  1091. process_ea:=true;
  1092. end;
  1093. function taicpu.calcsize(p:PInsEntry):longint;
  1094. var
  1095. codes : pchar;
  1096. c : byte;
  1097. len : longint;
  1098. ea_data : ea;
  1099. begin
  1100. len:=0;
  1101. codes:=@p^.code;
  1102. repeat
  1103. c:=ord(codes^);
  1104. inc(codes);
  1105. case c of
  1106. 0 :
  1107. break;
  1108. 1,2,3 :
  1109. begin
  1110. inc(codes,c);
  1111. inc(len,c);
  1112. end;
  1113. 8,9,10 :
  1114. begin
  1115. inc(codes);
  1116. inc(len);
  1117. end;
  1118. 4,5,6,7 :
  1119. begin
  1120. if opsize=S_W then
  1121. inc(len,2)
  1122. else
  1123. inc(len);
  1124. end;
  1125. 15,
  1126. 12,13,14,
  1127. 16,17,18,
  1128. 20,21,22,
  1129. 40,41,42 :
  1130. inc(len);
  1131. 24,25,26,
  1132. 31,
  1133. 48,49,50 :
  1134. inc(len,2);
  1135. 28,29,30, { we don't have 16 bit immediates code }
  1136. 32,33,34,
  1137. 52,53,54,
  1138. 56,57,58 :
  1139. inc(len,4);
  1140. 192,193,194 :
  1141. if NeedAddrPrefix(c-192) then
  1142. inc(len);
  1143. 208 :
  1144. inc(len);
  1145. 200,
  1146. 201,
  1147. 202,
  1148. 209,
  1149. 210,
  1150. 217,218,219 : ;
  1151. 216 :
  1152. begin
  1153. inc(codes);
  1154. inc(len);
  1155. end;
  1156. 224,225,226 :
  1157. begin
  1158. InternalError(777002);
  1159. end;
  1160. else
  1161. begin
  1162. if (c>=64) and (c<=191) then
  1163. begin
  1164. if not process_ea(oper[(c shr 3) and 7], ea_data, 0) then
  1165. Message(asmw_e_invalid_effective_address)
  1166. else
  1167. inc(len,ea_data.size);
  1168. end
  1169. else
  1170. InternalError(777003);
  1171. end;
  1172. end;
  1173. until false;
  1174. calcsize:=len;
  1175. end;
  1176. procedure taicpu.GenCode;
  1177. {
  1178. * the actual codes (C syntax, i.e. octal):
  1179. * \0 - terminates the code. (Unless it's a literal of course.)
  1180. * \1, \2, \3 - that many literal bytes follow in the code stream
  1181. * \4, \6 - the POP/PUSH (respectively) codes for CS, DS, ES, SS
  1182. * (POP is never used for CS) depending on operand 0
  1183. * \5, \7 - the second byte of POP/PUSH codes for FS, GS, depending
  1184. * on operand 0
  1185. * \10, \11, \12 - a literal byte follows in the code stream, to be added
  1186. * to the register value of operand 0, 1 or 2
  1187. * \17 - encodes the literal byte 0. (Some compilers don't take
  1188. * kindly to a zero byte in the _middle_ of a compile time
  1189. * string constant, so I had to put this hack in.)
  1190. * \14, \15, \16 - a signed byte immediate operand, from operand 0, 1 or 2
  1191. * \20, \21, \22 - a byte immediate operand, from operand 0, 1 or 2
  1192. * \24, \25, \26 - an unsigned byte immediate operand, from operand 0, 1 or 2
  1193. * \30, \31, \32 - a word immediate operand, from operand 0, 1 or 2
  1194. * \34, \35, \36 - select between \3[012] and \4[012] depending on 16/32 bit
  1195. * assembly mode or the address-size override on the operand
  1196. * \37 - a word constant, from the _segment_ part of operand 0
  1197. * \40, \41, \42 - a long immediate operand, from operand 0, 1 or 2
  1198. * \50, \51, \52 - a byte relative operand, from operand 0, 1 or 2
  1199. * \60, \61, \62 - a word relative operand, from operand 0, 1 or 2
  1200. * \64, \65, \66 - select between \6[012] and \7[012] depending on 16/32 bit
  1201. * assembly mode or the address-size override on the operand
  1202. * \70, \71, \72 - a long relative operand, from operand 0, 1 or 2
  1203. * \1ab - a ModRM, calculated on EA in operand a, with the spare
  1204. * field the register value of operand b.
  1205. * \2ab - a ModRM, calculated on EA in operand a, with the spare
  1206. * field equal to digit b.
  1207. * \30x - might be an 0x67 byte, depending on the address size of
  1208. * the memory reference in operand x.
  1209. * \310 - indicates fixed 16-bit address size, i.e. optional 0x67.
  1210. * \311 - indicates fixed 32-bit address size, i.e. optional 0x67.
  1211. * \320 - indicates fixed 16-bit operand size, i.e. optional 0x66.
  1212. * \321 - indicates fixed 32-bit operand size, i.e. optional 0x66.
  1213. * \322 - indicates that this instruction is only valid when the
  1214. * operand size is the default (instruction to disassembler,
  1215. * generates no code in the assembler)
  1216. * \330 - a literal byte follows in the code stream, to be added
  1217. * to the condition code value of the instruction.
  1218. * \340 - reserve <operand 0> bytes of uninitialised storage.
  1219. * Operand 0 had better be a segmentless constant.
  1220. }
  1221. var
  1222. currval : longint;
  1223. currsym : pasmsymbol;
  1224. procedure getvalsym(opidx:longint);
  1225. begin
  1226. case oper[opidx].typ of
  1227. top_ref :
  1228. begin
  1229. currval:=oper[opidx].ref^.offset;
  1230. currsym:=oper[opidx].ref^.symbol;
  1231. end;
  1232. top_const :
  1233. begin
  1234. currval:=oper[opidx].val;
  1235. currsym:=nil;
  1236. end;
  1237. top_symbol :
  1238. begin
  1239. currval:=oper[opidx].symofs;
  1240. currsym:=oper[opidx].sym;
  1241. end;
  1242. else
  1243. Message(asmw_e_immediate_or_reference_expected);
  1244. end;
  1245. end;
  1246. const
  1247. CondVal:array[TAsmCond] of byte=($0,
  1248. $7, $3, $2, $6, $2, $4, $F, $D, $C, $E, $6, $2,
  1249. $3, $7, $3, $5, $E, $C, $D, $F, $1, $B, $9, $5,
  1250. $0, $A, $A, $B, $8, $4);
  1251. var
  1252. c : byte;
  1253. pb,
  1254. codes : pchar;
  1255. bytes : array[0..3] of byte;
  1256. rfield,
  1257. data,s,opidx : longint;
  1258. ea_data : ea;
  1259. begin
  1260. codes:=insentry^.code;
  1261. { Force word push/pop for registers }
  1262. if (opsize=S_W) and ((codes[0]=#4) or (codes[0]=#6) or
  1263. ((codes[0]=#1) and ((codes[2]=#5) or (codes[2]=#7)))) then
  1264. begin
  1265. bytes[0]:=$66;
  1266. objectdata.writebytes(bytes,1);
  1267. end;
  1268. repeat
  1269. c:=ord(codes^);
  1270. inc(codes);
  1271. case c of
  1272. 0 :
  1273. break;
  1274. 1,2,3 :
  1275. begin
  1276. objectdata.writebytes(codes^,c);
  1277. inc(codes,c);
  1278. end;
  1279. 4,6 :
  1280. begin
  1281. case oper[0].reg of
  1282. R_CS :
  1283. begin
  1284. if c=4 then
  1285. bytes[0]:=$f
  1286. else
  1287. bytes[0]:=$e;
  1288. end;
  1289. R_NO,
  1290. R_DS :
  1291. begin
  1292. if c=4 then
  1293. bytes[0]:=$1f
  1294. else
  1295. bytes[0]:=$1e;
  1296. end;
  1297. R_ES :
  1298. begin
  1299. if c=4 then
  1300. bytes[0]:=$7
  1301. else
  1302. bytes[0]:=$6;
  1303. end;
  1304. R_SS :
  1305. begin
  1306. if c=4 then
  1307. bytes[0]:=$17
  1308. else
  1309. bytes[0]:=$16;
  1310. end;
  1311. else
  1312. InternalError(777004);
  1313. end;
  1314. objectdata.writebytes(bytes,1);
  1315. end;
  1316. 5,7 :
  1317. begin
  1318. case oper[0].reg of
  1319. R_FS :
  1320. begin
  1321. if c=5 then
  1322. bytes[0]:=$a1
  1323. else
  1324. bytes[0]:=$a0;
  1325. end;
  1326. R_GS :
  1327. begin
  1328. if c=5 then
  1329. bytes[0]:=$a9
  1330. else
  1331. bytes[0]:=$a8;
  1332. end;
  1333. else
  1334. InternalError(777005);
  1335. end;
  1336. objectdata.writebytes(bytes,1);
  1337. end;
  1338. 8,9,10 :
  1339. begin
  1340. bytes[0]:=ord(codes^)+regval(oper[c-8].reg);
  1341. inc(codes);
  1342. objectdata.writebytes(bytes,1);
  1343. end;
  1344. 15 :
  1345. begin
  1346. bytes[0]:=0;
  1347. objectdata.writebytes(bytes,1);
  1348. end;
  1349. 12,13,14 :
  1350. begin
  1351. getvalsym(c-12);
  1352. if (currval<-128) or (currval>127) then
  1353. Message2(asmw_e_value_exceeds_bounds,'signed byte',tostr(currval));
  1354. if assigned(currsym) then
  1355. objectdata.writereloc(currval,1,currsym,relative_false)
  1356. else
  1357. objectdata.writebytes(currval,1);
  1358. end;
  1359. 16,17,18 :
  1360. begin
  1361. getvalsym(c-16);
  1362. if (currval<-256) or (currval>255) then
  1363. Message2(asmw_e_value_exceeds_bounds,'byte',tostr(currval));
  1364. if assigned(currsym) then
  1365. objectdata.writereloc(currval,1,currsym,relative_false)
  1366. else
  1367. objectdata.writebytes(currval,1);
  1368. end;
  1369. 20,21,22 :
  1370. begin
  1371. getvalsym(c-20);
  1372. if (currval<0) or (currval>255) then
  1373. Message2(asmw_e_value_exceeds_bounds,'unsigned byte',tostr(currval));
  1374. if assigned(currsym) then
  1375. objectdata.writereloc(currval,1,currsym,relative_false)
  1376. else
  1377. objectdata.writebytes(currval,1);
  1378. end;
  1379. 24,25,26 :
  1380. begin
  1381. getvalsym(c-24);
  1382. if (currval<-65536) or (currval>65535) then
  1383. Message2(asmw_e_value_exceeds_bounds,'word',tostr(currval));
  1384. if assigned(currsym) then
  1385. objectdata.writereloc(currval,2,currsym,relative_false)
  1386. else
  1387. objectdata.writebytes(currval,2);
  1388. end;
  1389. 28,29,30 :
  1390. begin
  1391. getvalsym(c-28);
  1392. if assigned(currsym) then
  1393. objectdata.writereloc(currval,4,currsym,relative_false)
  1394. else
  1395. objectdata.writebytes(currval,4);
  1396. end;
  1397. 32,33,34 :
  1398. begin
  1399. getvalsym(c-32);
  1400. if assigned(currsym) then
  1401. objectdata.writereloc(currval,4,currsym,relative_false)
  1402. else
  1403. objectdata.writebytes(currval,4);
  1404. end;
  1405. 40,41,42 :
  1406. begin
  1407. getvalsym(c-40);
  1408. data:=currval-insend;
  1409. if assigned(currsym) then
  1410. inc(data,currsym^.address);
  1411. if (data>127) or (data<-128) then
  1412. Message1(asmw_e_short_jmp_out_of_range,tostr(data));
  1413. objectdata.writebytes(data,1);
  1414. end;
  1415. 52,53,54 :
  1416. begin
  1417. getvalsym(c-52);
  1418. if assigned(currsym) then
  1419. objectdata.writereloc(currval,4,currsym,relative_true)
  1420. else
  1421. objectdata.writereloc(currval-insend,4,nil,relative_false)
  1422. end;
  1423. 56,57,58 :
  1424. begin
  1425. getvalsym(c-56);
  1426. if assigned(currsym) then
  1427. objectdata.writereloc(currval,4,currsym,relative_true)
  1428. else
  1429. objectdata.writereloc(currval-insend,4,nil,relative_false)
  1430. end;
  1431. 192,193,194 :
  1432. begin
  1433. if NeedAddrPrefix(c-192) then
  1434. begin
  1435. bytes[0]:=$67;
  1436. objectdata.writebytes(bytes,1);
  1437. end;
  1438. end;
  1439. 200 :
  1440. begin
  1441. bytes[0]:=$67;
  1442. objectdata.writebytes(bytes,1);
  1443. end;
  1444. 208 :
  1445. begin
  1446. bytes[0]:=$66;
  1447. objectdata.writebytes(bytes,1);
  1448. end;
  1449. 216 :
  1450. begin
  1451. bytes[0]:=ord(codes^)+condval[condition];
  1452. inc(codes);
  1453. objectdata.writebytes(bytes,1);
  1454. end;
  1455. 201,
  1456. 202,
  1457. 209,
  1458. 210,
  1459. 217,218,219 :
  1460. begin
  1461. { these are dissambler hints or 32 bit prefixes which
  1462. are not needed }
  1463. end;
  1464. 31,
  1465. 48,49,50,
  1466. 224,225,226 :
  1467. begin
  1468. InternalError(777006);
  1469. end
  1470. else
  1471. begin
  1472. if (c>=64) and (c<=191) then
  1473. begin
  1474. if (c<127) then
  1475. begin
  1476. if (oper[c and 7].typ=top_reg) then
  1477. rfield:=regval(oper[c and 7].reg)
  1478. else
  1479. rfield:=regval(oper[c and 7].ref^.base);
  1480. end
  1481. else
  1482. rfield:=c and 7;
  1483. opidx:=(c shr 3) and 7;
  1484. if not process_ea(oper[opidx], ea_data, rfield) then
  1485. Message(asmw_e_invalid_effective_address);
  1486. pb:=@bytes;
  1487. pb^:=chr(ea_data.modrm);
  1488. inc(pb);
  1489. if ea_data.sib_present then
  1490. begin
  1491. pb^:=chr(ea_data.sib);
  1492. inc(pb);
  1493. end;
  1494. s:=pb-pchar(@bytes);
  1495. objectdata.writebytes(bytes,s);
  1496. case ea_data.bytes of
  1497. 0 : ;
  1498. 1 :
  1499. begin
  1500. if (oper[opidx].ot and OT_MEMORY)=OT_MEMORY then
  1501. objectdata.writereloc(oper[opidx].ref^.offset,1,oper[opidx].ref^.symbol,relative_false)
  1502. else
  1503. begin
  1504. bytes[0]:=oper[opidx].ref^.offset;
  1505. objectdata.writebytes(bytes,1);
  1506. end;
  1507. inc(s);
  1508. end;
  1509. 2,4 :
  1510. begin
  1511. objectdata.writereloc(oper[opidx].ref^.offset,ea_data.bytes,
  1512. oper[opidx].ref^.symbol,relative_false);
  1513. inc(s,ea_data.bytes);
  1514. end;
  1515. end;
  1516. end
  1517. else
  1518. InternalError(777007);
  1519. end;
  1520. end;
  1521. until false;
  1522. end;
  1523. {$endif NOAG386BIN}
  1524. end.
  1525. {
  1526. $Log$
  1527. Revision 1.6 2000-12-25 00:07:31 peter
  1528. + new tlinkedlist class (merge of old tstringqueue,tcontainer and
  1529. tlinkedlist objects)
  1530. Revision 1.5 2000/12/23 19:59:35 peter
  1531. * object to class for ow/og objects
  1532. * split objectdata from objectoutput
  1533. Revision 1.4 2000/12/07 17:19:45 jonas
  1534. * new constant handling: from now on, hex constants >$7fffffff are
  1535. parsed as unsigned constants (otherwise, $80000000 got sign extended
  1536. and became $ffffffff80000000), all constants in the longint range
  1537. become longints, all constants >$7fffffff and <=cardinal($ffffffff)
  1538. are cardinals and the rest are int64's.
  1539. * added lots of longint typecast to prevent range check errors in the
  1540. compiler and rtl
  1541. * type casts of symbolic ordinal constants are now preserved
  1542. * fixed bug where the original resulttype wasn't restored correctly
  1543. after doing a 64bit rangecheck
  1544. Revision 1.3 2000/11/12 22:20:37 peter
  1545. * create generic toutputsection for binary writers
  1546. Revision 1.2 2000/10/15 10:50:46 florian
  1547. * fixed xmm register access
  1548. Revision 1.1 2000/10/15 09:39:37 peter
  1549. * moved cpu*.pas to i386/
  1550. * renamed n386 to common cpunode
  1551. Revision 1.5 2000/09/24 15:06:14 peter
  1552. * use defines.inc
  1553. Revision 1.4 2000/08/27 16:11:50 peter
  1554. * moved some util functions from globals,cobjects to cutils
  1555. * splitted files into finput,fmodule
  1556. Revision 1.3 2000/07/13 12:08:25 michael
  1557. + patched to 1.1.0 with former 1.09patch from peter
  1558. Revision 1.2 2000/07/13 11:32:38 michael
  1559. + removed logs
  1560. }