cg64f32.pas 23 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl
  4. Member of the Free Pascal development team
  5. This unit implements the code generation for 64 bit int
  6. arithmethics on 32 bit processors
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. ****************************************************************************
  19. }
  20. unit cg64f32;
  21. {$i defines.inc}
  22. interface
  23. uses
  24. aasm,
  25. cpuinfo, cpubase,
  26. cginfo, cgobj,
  27. node,symtype;
  28. type
  29. tcg64f32 = class(tcg)
  30. procedure a_load64_const_ref(list : taasmoutput;valuelo, valuehi : AWord;const ref : treference);
  31. procedure a_load64_reg_ref(list : taasmoutput;reglo, reghi : tregister;const ref : treference);
  32. procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reglo,reghi : tregister);
  33. procedure a_load64_reg_reg(list : taasmoutput;reglosrc,reghisrc,reglodst,reghidst : tregister);
  34. procedure a_load64_const_reg(list : taasmoutput;valuelosrc,valuehisrc:AWord;reglodst,reghidst : tregister);
  35. procedure a_load64_loc_reg(list : taasmoutput;const l : tlocation;reglo,reghi : tregister);
  36. procedure a_load64_loc_ref(list : taasmoutput;const l : tlocation;const ref : treference);
  37. procedure a_load64_const_loc(list : taasmoutput;valuelo, valuehi : AWord;const l : tlocation);
  38. procedure a_load64_reg_loc(list : taasmoutput;reglo, reghi : tregister;const l : tlocation);
  39. procedure a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);
  40. procedure a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);
  41. procedure a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);
  42. procedure a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);
  43. procedure a_load64high_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);
  44. procedure a_load64low_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);
  45. procedure a_op64_ref_reg(list : taasmoutput;op:TOpCG;const ref : treference;reglo,reghi : tregister);virtual;abstract;
  46. procedure a_op64_reg_reg(list : taasmoutput;op:TOpCG;reglosrc,reghisrc,reglodst,reghidst : tregister);virtual;abstract;
  47. procedure a_op64_reg_ref(list : taasmoutput;op:TOpCG;reglosrc,reghisrc : tregister;const ref : treference);virtual;abstract;
  48. procedure a_op64_const_reg(list : taasmoutput;op:TOpCG;valuelosrc,valuehisrc:AWord;reglodst,reghidst : tregister);virtual;abstract;
  49. procedure a_op64_const_ref(list : taasmoutput;op:TOpCG;valuelosrc,valuehisrc:AWord;const ref : treference);virtual;abstract;
  50. procedure a_op64_const_loc(list : taasmoutput;op:TOpCG;valuelosrc,valuehisrc:aword;const l: tlocation);
  51. procedure a_op64_reg_loc(list : taasmoutput;op:TOpCG;reglo,reghi : tregister;const l : tlocation);
  52. procedure a_op64_loc_reg(list : taasmoutput;op:TOpCG;const l : tlocation;reglo,reghi : tregister);
  53. procedure a_param64_reg(list : taasmoutput;reglo,reghi : tregister;nr : longint);
  54. procedure a_param64_const(list : taasmoutput;valuelo,valuehi : aword;nr : longint);
  55. procedure a_param64_ref(list : taasmoutput;const r : treference;nr : longint);
  56. procedure a_param64_loc(list : taasmoutput;const l : tlocation;nr : longint);
  57. { override to catch 64bit rangechecks }
  58. procedure g_rangecheck(list: taasmoutput; const p: tnode;
  59. const todef: tdef); override;
  60. private
  61. { produces range check code for 32bit processors when one of the }
  62. { operands is 64 bit }
  63. procedure g_rangecheck64(list : taasmoutput; p : tnode;todef : tdef);
  64. end;
  65. implementation
  66. uses
  67. globtype,globals,systems,
  68. cgbase,
  69. verbose,
  70. symbase,symconst,symdef,types;
  71. procedure tcg64f32.a_load64_reg_ref(list : taasmoutput;reglo, reghi : tregister;const ref : treference);
  72. var
  73. tmpreg: tregister;
  74. tmpref: treference;
  75. begin
  76. if target_info.endian = endian_big then
  77. begin
  78. tmpreg := reglo;
  79. reglo := reghi;
  80. reghi := tmpreg;
  81. end;
  82. a_load_reg_ref(list,OS_32,reglo,ref);
  83. tmpref := ref;
  84. inc(tmpref.offset,4);
  85. a_load_reg_ref(list,OS_32,reghi,tmpref);
  86. end;
  87. procedure tcg64f32.a_load64_const_ref(list : taasmoutput;valuelo, valuehi : AWord;const ref : treference);
  88. var
  89. tmpvalue: AWord;
  90. tmpref: treference;
  91. begin
  92. if target_info.endian = endian_big then
  93. begin
  94. tmpvalue := valuelo;
  95. valuelo := valuehi;
  96. valuehi := tmpvalue;
  97. end;
  98. a_load_const_ref(list,OS_32,valuelo,ref);
  99. tmpref := ref;
  100. inc(tmpref.offset,4);
  101. a_load_const_ref(list,OS_32,valuehi,tmpref);
  102. end;
  103. procedure tcg64f32.a_load64_ref_reg(list : taasmoutput;const ref : treference;reglo,reghi : tregister);
  104. var
  105. tmpreg: tregister;
  106. tmpref: treference;
  107. got_scratch: boolean;
  108. begin
  109. if target_info.endian = endian_big then
  110. begin
  111. tmpreg := reglo;
  112. reglo := reghi;
  113. reghi := tmpreg;
  114. end;
  115. got_scratch:=false;
  116. tmpref := ref;
  117. if (tmpref.base=reglo) then
  118. begin
  119. tmpreg := get_scratch_reg(list);
  120. got_scratch:=true;
  121. a_load_reg_reg(list,OS_ADDR,tmpref.base,tmpreg);
  122. tmpref.base:=tmpreg;
  123. end
  124. else
  125. if (tmpref.index=reglo) then
  126. begin
  127. tmpreg := get_scratch_reg(list);
  128. got_scratch:=true;
  129. a_load_reg_reg(list,OS_ADDR,tmpref.index,tmpreg);
  130. tmpref.index:=tmpreg;
  131. end;
  132. a_load_ref_reg(list,OS_32,tmpref,reglo);
  133. inc(tmpref.offset,4);
  134. a_load_ref_reg(list,OS_32,tmpref,reghi);
  135. if got_scratch then
  136. free_scratch_reg(list,tmpreg);
  137. end;
  138. procedure tcg64f32.a_load64_reg_reg(list : taasmoutput;reglosrc,reghisrc,reglodst,reghidst : tregister);
  139. begin
  140. a_load_reg_reg(list,OS_32,reglosrc,reglodst);
  141. a_load_reg_reg(list,OS_32,reghisrc,reghidst);
  142. end;
  143. procedure tcg64f32.a_load64_const_reg(list : taasmoutput;valuelosrc,valuehisrc:AWord;reglodst,reghidst : tregister);
  144. begin
  145. a_load_const_reg(list,OS_32,valuelosrc,reglodst);
  146. a_load_const_reg(list,OS_32,valuehisrc,reghidst);
  147. end;
  148. procedure tcg64f32.a_load64_loc_reg(list : taasmoutput;const l : tlocation;reglo,reghi : tregister);
  149. begin
  150. case l.loc of
  151. LOC_REFERENCE, LOC_CREFERENCE:
  152. a_load64_ref_reg(list,l.reference,reglo,reghi);
  153. LOC_REGISTER,LOC_CREGISTER:
  154. a_load64_reg_reg(list,l.registerlow,l.registerhigh,reglo,reghi);
  155. LOC_CONSTANT :
  156. a_load64_const_reg(list,l.valuelow,l.valuehigh,reglo,reghi);
  157. else
  158. internalerror(200112292);
  159. end;
  160. end;
  161. procedure tcg64f32.a_load64_loc_ref(list : taasmoutput;const l : tlocation;const ref : treference);
  162. begin
  163. case l.loc of
  164. LOC_REGISTER,LOC_CREGISTER:
  165. a_load64_reg_ref(list,l.registerlow,l.registerhigh,ref);
  166. LOC_CONSTANT :
  167. a_load64_const_ref(list,l.valuelow,l.valuehigh,ref);
  168. else
  169. internalerror(200203288);
  170. end;
  171. end;
  172. procedure tcg64f32.a_load64_const_loc(list : taasmoutput;valuelo, valuehi : AWord;const l : tlocation);
  173. begin
  174. case l.loc of
  175. LOC_REFERENCE, LOC_CREFERENCE:
  176. a_load64_const_ref(list,valuelo,valuehi,l.reference);
  177. LOC_REGISTER,LOC_CREGISTER:
  178. a_load64_const_reg(list,valuelo,valuehi,l.registerlow,l.registerhigh);
  179. else
  180. internalerror(200112293);
  181. end;
  182. end;
  183. procedure tcg64f32.a_load64_reg_loc(list : taasmoutput;reglo,reghi : tregister;const l : tlocation);
  184. begin
  185. case l.loc of
  186. LOC_REFERENCE, LOC_CREFERENCE:
  187. a_load64_reg_ref(list,reglo,reghi,l.reference);
  188. LOC_REGISTER,LOC_CREGISTER:
  189. a_load64_reg_reg(list,reglo,reghi,l.registerlow,l.registerhigh);
  190. else
  191. internalerror(200112293);
  192. end;
  193. end;
  194. procedure tcg64f32.a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);
  195. var
  196. tmpref: treference;
  197. begin
  198. if target_info.endian = endian_big then
  199. a_load_reg_ref(list,OS_32,reg,ref)
  200. else
  201. begin
  202. tmpref := ref;
  203. inc(tmpref.offset,4);
  204. a_load_reg_ref(list,OS_32,reg,tmpref)
  205. end;
  206. end;
  207. procedure tcg64f32.a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);
  208. var
  209. tmpref: treference;
  210. begin
  211. if target_info.endian = endian_little then
  212. a_load_reg_ref(list,OS_32,reg,ref)
  213. else
  214. begin
  215. tmpref := ref;
  216. inc(tmpref.offset,4);
  217. a_load_reg_ref(list,OS_32,reg,tmpref)
  218. end;
  219. end;
  220. procedure tcg64f32.a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);
  221. var
  222. tmpref: treference;
  223. begin
  224. if target_info.endian = endian_big then
  225. a_load_ref_reg(list,OS_32,ref,reg)
  226. else
  227. begin
  228. tmpref := ref;
  229. inc(tmpref.offset,4);
  230. a_load_ref_reg(list,OS_32,tmpref,reg)
  231. end;
  232. end;
  233. procedure tcg64f32.a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);
  234. var
  235. tmpref: treference;
  236. begin
  237. if target_info.endian = endian_little then
  238. a_load_ref_reg(list,OS_32,ref,reg)
  239. else
  240. begin
  241. tmpref := ref;
  242. inc(tmpref.offset,4);
  243. a_load_ref_reg(list,OS_32,tmpref,reg)
  244. end;
  245. end;
  246. procedure tcg64f32.a_load64low_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);
  247. begin
  248. case l.loc of
  249. LOC_REFERENCE,
  250. LOC_CREFERENCE :
  251. a_load64low_ref_reg(list,l.reference,reg);
  252. LOC_REGISTER :
  253. a_load_reg_reg(list,OS_32,l.registerlow,reg);
  254. LOC_CONSTANT :
  255. a_load_const_reg(list,OS_32,l.valuelow,reg);
  256. else
  257. internalerror(200203244);
  258. end;
  259. end;
  260. procedure tcg64f32.a_load64high_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);
  261. begin
  262. case l.loc of
  263. LOC_REFERENCE,
  264. LOC_CREFERENCE :
  265. a_load64high_ref_reg(list,l.reference,reg);
  266. LOC_REGISTER :
  267. a_load_reg_reg(list,OS_32,l.registerhigh,reg);
  268. LOC_CONSTANT :
  269. a_load_const_reg(list,OS_32,l.valuehigh,reg);
  270. else
  271. internalerror(200203244);
  272. end;
  273. end;
  274. procedure tcg64f32.a_op64_const_loc(list : taasmoutput;op:TOpCG;valuelosrc,valuehisrc:aword;const l: tlocation);
  275. begin
  276. case l.loc of
  277. LOC_REFERENCE, LOC_CREFERENCE:
  278. a_op64_const_reg(list,op,valuelosrc,valuehisrc,l.registerlow,l.registerhigh);
  279. LOC_REGISTER,LOC_CREGISTER:
  280. a_op64_const_ref(list,op,valuelosrc,valuehisrc,l.reference);
  281. else
  282. internalerror(200203292);
  283. end;
  284. end;
  285. procedure tcg64f32.a_op64_reg_loc(list : taasmoutput;op:TOpCG;reglo,reghi : tregister;const l : tlocation);
  286. begin
  287. case l.loc of
  288. LOC_REFERENCE, LOC_CREFERENCE:
  289. a_op64_reg_ref(list,op,reglo,reghi,l.reference);
  290. LOC_REGISTER,LOC_CREGISTER:
  291. a_op64_reg_reg(list,op,reglo,reghi,l.registerlow,l.registerhigh);
  292. else
  293. internalerror(2002032422);
  294. end;
  295. end;
  296. procedure tcg64f32.a_op64_loc_reg(list : taasmoutput;op:TOpCG;const l : tlocation;reglo,reghi : tregister);
  297. begin
  298. case l.loc of
  299. LOC_REFERENCE, LOC_CREFERENCE:
  300. a_op64_ref_reg(list,op,l.reference,reglo,reghi);
  301. LOC_REGISTER,LOC_CREGISTER:
  302. a_op64_reg_reg(list,op,l.registerlow,l.registerhigh,reglo,reghi);
  303. LOC_CONSTANT :
  304. a_op64_const_reg(list,op,l.valuelow,l.valuehigh,reglo,reghi);
  305. else
  306. internalerror(200203242);
  307. end;
  308. end;
  309. procedure tcg64f32.a_param64_reg(list : taasmoutput;reglo,reghi : tregister;nr : longint);
  310. begin
  311. a_param_reg(list,OS_32,reghi,nr);
  312. a_param_reg(list,OS_32,reglo,nr+1);
  313. end;
  314. procedure tcg64f32.a_param64_const(list : taasmoutput;valuelo,valuehi : aword;nr : longint);
  315. begin
  316. a_param_const(list,OS_32,valuehi,nr);
  317. a_param_const(list,OS_32,valuelo,nr+1);
  318. end;
  319. procedure tcg64f32.a_param64_ref(list : taasmoutput;const r : treference;nr : longint);
  320. var
  321. tmpref: treference;
  322. begin
  323. a_param_ref(list,OS_32,r,nr);
  324. tmpref := r;
  325. inc(tmpref.offset,4);
  326. a_param_ref(list,OS_32,tmpref,nr+1);
  327. end;
  328. procedure tcg64f32.a_param64_loc(list : taasmoutput;const l:tlocation;nr : longint);
  329. begin
  330. case l.loc of
  331. LOC_REGISTER,
  332. LOC_CREGISTER :
  333. a_param64_reg(list,l.registerlow,l.registerhigh,nr);
  334. LOC_CONSTANT :
  335. a_param64_const(list,l.valuelow,l.valuehigh,nr);
  336. LOC_CREFERENCE,
  337. LOC_REFERENCE :
  338. a_param64_ref(list,l.reference,nr);
  339. else
  340. internalerror(200203287);
  341. end;
  342. end;
  343. procedure tcg64f32.g_rangecheck(list: taasmoutput; const p: tnode;
  344. const todef: tdef);
  345. begin
  346. { range checking on and range checkable value? }
  347. if not(cs_check_range in aktlocalswitches) or
  348. not(todef.deftype in [orddef,enumdef,arraydef]) then
  349. exit;
  350. { special case for 64bit rangechecks }
  351. if is_64bitint(p.resulttype.def) or is_64bitint(todef) then
  352. g_rangecheck64(list,p,todef)
  353. else
  354. inherited g_rangecheck(list,p,todef);
  355. end;
  356. procedure tcg64f32.g_rangecheck64(list : taasmoutput; p : tnode;todef : tdef);
  357. var
  358. neglabel,
  359. poslabel,
  360. endlabel: tasmlabel;
  361. hreg : tregister;
  362. hdef : torddef;
  363. fromdef : tdef;
  364. opsize : tcgsize;
  365. oldregisterdef: boolean;
  366. from_signed,to_signed: boolean;
  367. got_scratch: boolean;
  368. begin
  369. fromdef:=p.resulttype.def;
  370. from_signed := is_signed(fromdef);
  371. to_signed := is_signed(todef);
  372. if not is_64bitint(todef) then
  373. begin
  374. oldregisterdef := registerdef;
  375. registerdef := false;
  376. { get the high dword in a register }
  377. if p.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  378. begin
  379. hreg := p.location.registerhigh;
  380. got_scratch := false
  381. end
  382. else
  383. begin
  384. hreg := get_scratch_reg(list);
  385. got_scratch := true;
  386. a_load64high_ref_reg(list,p.location.reference,hreg);
  387. end;
  388. getlabel(poslabel);
  389. { check high dword, must be 0 (for positive numbers) }
  390. a_cmp_const_reg_label(list,OS_32,OC_EQ,0,hreg,poslabel);
  391. { It can also be $ffffffff, but only for negative numbers }
  392. if from_signed and to_signed then
  393. begin
  394. getlabel(neglabel);
  395. a_cmp_const_reg_label(list,OS_32,OC_EQ,aword(-1),hreg,neglabel);
  396. end;
  397. { !!! freeing of register should happen directly after compare! (JM) }
  398. if got_scratch then
  399. free_scratch_reg(list,hreg);
  400. { For all other values we have a range check error }
  401. a_call_name(list,'FPC_RANGEERROR',0);
  402. { if the high dword = 0, the low dword can be considered a }
  403. { simple cardinal }
  404. a_label(list,poslabel);
  405. hdef:=torddef.create(u32bit,0,cardinal($ffffffff));
  406. { the real p.resulttype.def is already saved in fromdef }
  407. p.resulttype.def := hdef;
  408. { no use in calling just "g_rangecheck" since that one will }
  409. { simply call the inherited method too (JM) }
  410. inherited g_rangecheck(list,p,todef);
  411. hdef.free;
  412. { restore original resulttype.def }
  413. p.resulttype.def := todef;
  414. if from_signed and to_signed then
  415. begin
  416. getlabel(endlabel);
  417. a_jmp_cond(list,OC_NONE,endlabel);
  418. { if the high dword = $ffffffff, then the low dword (when }
  419. { considered as a longint) must be < 0 }
  420. a_label(list,neglabel);
  421. if p.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  422. begin
  423. hreg := p.location.registerlow;
  424. got_scratch := false
  425. end
  426. else
  427. begin
  428. hreg := get_scratch_reg(list);
  429. got_scratch := true;
  430. a_load64low_ref_reg(list,p.location.reference,hreg);
  431. end;
  432. { get a new neglabel (JM) }
  433. getlabel(neglabel);
  434. a_cmp_const_reg_label(list,OS_32,OC_LT,0,hreg,neglabel);
  435. { !!! freeing of register should happen directly after compare! (JM) }
  436. if got_scratch then
  437. free_scratch_reg(list,hreg);
  438. a_call_name(list,'FPC_RANGEERROR',0);
  439. { if we get here, the 64bit value lies between }
  440. { longint($80000000) and -1 (JM) }
  441. a_label(list,neglabel);
  442. hdef:=torddef.create(s32bit,longint($80000000),-1);
  443. p.resulttype.def := hdef;
  444. inherited g_rangecheck(list,p,todef);
  445. hdef.free;
  446. a_label(list,endlabel);
  447. end;
  448. registerdef := oldregisterdef;
  449. p.resulttype.def := fromdef;
  450. { restore p's resulttype.def }
  451. end
  452. else
  453. { todef = 64bit int }
  454. { no 64bit subranges supported, so only a small check is necessary }
  455. { if both are signed or both are unsigned, no problem! }
  456. if (from_signed xor to_signed) and
  457. { also not if the fromdef is unsigned and < 64bit, since that will }
  458. { always fit in a 64bit int (todef is 64bit) }
  459. (from_signed or
  460. (torddef(fromdef).typ = u64bit)) then
  461. begin
  462. { in all cases, there is only a problem if the higest bit is set }
  463. if p.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  464. begin
  465. if is_64bitint(fromdef) then
  466. begin
  467. hreg := p.location.registerhigh;
  468. opsize := OS_32;
  469. end
  470. else
  471. begin
  472. hreg := p.location.register;
  473. opsize := def_cgsize(p.resulttype.def);
  474. end;
  475. got_scratch := false;
  476. end
  477. else
  478. begin
  479. hreg := get_scratch_reg(list);
  480. got_scratch := true;
  481. opsize := def_cgsize(p.resulttype.def);
  482. if opsize in [OS_64,OS_S64] then
  483. a_load64high_ref_reg(list,p.location.reference,hreg)
  484. else
  485. a_load_ref_reg(list,opsize,p.location.reference,hreg);
  486. end;
  487. getlabel(poslabel);
  488. a_cmp_const_reg_label(list,opsize,OC_GTE,0,hreg,poslabel);
  489. { !!! freeing of register should happen directly after compare! (JM) }
  490. if got_scratch then
  491. free_scratch_reg(list,hreg);
  492. a_call_name(list,'FPC_RANGEERROR',0);
  493. a_label(list,poslabel);
  494. end;
  495. end;
  496. (*
  497. procedure int64f32_assignment_int64_reg(p : passignmentnode);
  498. begin
  499. end;
  500. begin
  501. p2_assignment:=@int64f32_assignement_int64;
  502. *)
  503. end.
  504. {
  505. $Log$
  506. Revision 1.6 2002-04-03 10:41:35 jonas
  507. + a_load64_const_loc method
  508. Revision 1.5 2002/04/02 17:11:27 peter
  509. * tlocation,treference update
  510. * LOC_CONSTANT added for better constant handling
  511. * secondadd splitted in multiple routines
  512. * location_force_reg added for loading a location to a register
  513. of a specified size
  514. * secondassignment parses now first the right and then the left node
  515. (this is compatible with Kylix). This saves a lot of push/pop especially
  516. with string operations
  517. * adapted some routines to use the new cg methods
  518. Revision 1.4 2002/03/04 19:10:11 peter
  519. * removed compiler warnings
  520. Revision 1.3 2002/01/24 12:33:52 jonas
  521. * adapted ranges of native types to int64 (e.g. high cardinal is no
  522. longer longint($ffffffff), but just $fffffff in psystem)
  523. * small additional fix in 64bit rangecheck code generation for 32 bit
  524. processors
  525. * adaption of ranges required the matching talgorithm used for selecting
  526. which overloaded procedure to call to be adapted. It should now always
  527. select the closest match for ordinal parameters.
  528. + inttostr(qword) in sysstr.inc/sysstrh.inc
  529. + abs(int64), sqr(int64), sqr(qword) in systemh.inc/generic.inc (previous
  530. fixes were required to be able to add them)
  531. * is_in_limit() moved from ncal to types unit, should always be used
  532. instead of direct comparisons of low/high values of orddefs because
  533. qword is a special case
  534. Revision 1.2 2001/12/30 17:24:48 jonas
  535. * range checking is now processor independent (part in cgobj,
  536. part in cg64f32) and should work correctly again (it needed
  537. some changes after the changes of the low and high of
  538. tordef's to int64)
  539. * maketojumpbool() is now processor independent (in ncgutil)
  540. * getregister32 is now called getregisterint
  541. Revision 1.1 2001/12/29 15:29:58 jonas
  542. * powerpc/cgcpu.pas compiles :)
  543. * several powerpc-related fixes
  544. * cpuasm unit is now based on common tainst unit
  545. + nppcmat unit for powerpc (almost complete)
  546. Revision 1.1 2000/07/13 06:30:07 michael
  547. + Initial import
  548. Revision 1.1 2000/03/01 15:36:13 florian
  549. * some new stuff for the new cg
  550. }