cgobj.pas 98 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432
  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. {# @abstract(Abstract code generator)
  38. This class implements an abstract instruction generator. Some of
  39. the methods of this class are generic, while others must
  40. be overriden for all new processors which will be supported
  41. by Free Pascal. For 32-bit processors, the base class
  42. sould be @link(tcg64f32) and not @var(tcg).
  43. }
  44. tcg = class
  45. public
  46. alignment : talignment;
  47. rg : array[tregistertype] of trgobj;
  48. t_times : longint;
  49. {$ifdef flowgraph}
  50. aktflownode:word;
  51. {$endif}
  52. {************************************************}
  53. { basic routines }
  54. constructor create;
  55. {# Initialize the register allocators needed for the codegenerator.}
  56. procedure init_register_allocators;virtual;
  57. {# Clean up the register allocators needed for the codegenerator.}
  58. procedure done_register_allocators;virtual;
  59. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  60. procedure set_regalloc_extend_backwards(b: boolean);
  61. {$ifdef flowgraph}
  62. procedure init_flowgraph;
  63. procedure done_flowgraph;
  64. {$endif}
  65. {# Gets a register suitable to do integer operations on.}
  66. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  67. {# Gets a register suitable to do integer operations on.}
  68. function getaddressregister(list:TAsmList):Tregister;virtual;
  69. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  70. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  72. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  73. the cpu specific child cg object have such a method?}
  74. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  75. procedure add_move_instruction(instr:Taicpu);virtual;
  76. function uses_registers(rt:Tregistertype):boolean;virtual;
  77. {# Get a specific register.}
  78. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  79. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  80. {# Get multiple registers specified.}
  81. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  82. {# Free multiple registers specified.}
  83. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. procedure allocallcpuregisters(list:TAsmList);virtual;
  85. procedure deallocallcpuregisters(list:TAsmList);virtual;
  86. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  87. procedure translate_register(var reg : tregister);
  88. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  89. {# Emit a label to the instruction stream. }
  90. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  91. {# Allocates register r by inserting a pai_realloc record }
  92. procedure a_reg_alloc(list : TAsmList;r : tregister);
  93. {# Deallocates register r by inserting a pa_regdealloc record}
  94. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  95. { Synchronize register, make sure it is still valid }
  96. procedure a_reg_sync(list : TAsmList;r : tregister);
  97. {# Pass a parameter, which is located in a register, to a routine.
  98. This routine should push/send the parameter to the routine, as
  99. required by the specific processor ABI and routine modifiers.
  100. This must be overriden for each CPU target.
  101. @param(size size of the operand in the register)
  102. @param(r register source of the operand)
  103. @param(cgpara where the parameter will be stored)
  104. }
  105. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  106. {# Pass a parameter, which is a constant, to a routine.
  107. A generic version is provided. This routine should
  108. be overriden for optimization purposes if the cpu
  109. permits directly sending this type of parameter.
  110. @param(size size of the operand in constant)
  111. @param(a value of constant to send)
  112. @param(cgpara where the parameter will be stored)
  113. }
  114. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  115. {# Pass the value of a parameter, which is located in memory, to a routine.
  116. A generic version is provided. This routine should
  117. be overriden for optimization purposes if the cpu
  118. permits directly sending this type of parameter.
  119. @param(size size of the operand in constant)
  120. @param(r Memory reference of value to send)
  121. @param(cgpara where the parameter will be stored)
  122. }
  123. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  124. {# Pass the value of a parameter, which can be located either in a register or memory location,
  125. to a routine.
  126. A generic version is provided.
  127. @param(l location of the operand to send)
  128. @param(nr parameter number (starting from one) of routine (from left to right))
  129. @param(cgpara where the parameter will be stored)
  130. }
  131. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  132. {# Pass the address of a reference to a routine. This routine
  133. will calculate the address of the reference, and pass this
  134. calculated address as a parameter.
  135. A generic version is provided. This routine should
  136. be overriden for optimization purposes if the cpu
  137. permits directly sending this type of parameter.
  138. @param(r reference to get address from)
  139. @param(nr parameter number (starting from one) of routine (from left to right))
  140. }
  141. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  142. { Remarks:
  143. * If a method specifies a size you have only to take care
  144. of that number of bits, i.e. load_const_reg with OP_8 must
  145. only load the lower 8 bit of the specified register
  146. the rest of the register can be undefined
  147. if necessary the compiler will call a method
  148. to zero or sign extend the register
  149. * The a_load_XX_XX with OP_64 needn't to be
  150. implemented for 32 bit
  151. processors, the code generator takes care of that
  152. * the addr size is for work with the natural pointer
  153. size
  154. * the procedures without fpu/mm are only for integer usage
  155. * normally the first location is the source and the
  156. second the destination
  157. }
  158. {# Emits instruction to call the method specified by symbol name.
  159. This routine must be overriden for each new target cpu.
  160. There is no a_call_ref because loading the reference will use
  161. a temp register on most cpu's resulting in conflicts with the
  162. registers used for the parameters (PFV)
  163. }
  164. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  165. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  166. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  167. { same as a_call_name, might be overriden on certain architectures to emit
  168. static calls without usage of a got trampoline }
  169. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  170. { move instructions }
  171. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  172. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  173. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  174. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  175. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  176. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  177. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  178. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  179. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  180. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  181. procedure a_load_loc_subsetreg(list : TAsmList;subsetregsize,subsetsize: tcgsize; startbit: byte; const loc: tlocation; subsetreg : tregister);
  182. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  183. procedure a_load_subsetreg_reg(list : TAsmList; subsetregsize, subsetsize: tcgsize; startbit: byte; tosize: tcgsize; subsetreg, destreg: tregister); virtual;
  184. procedure a_load_reg_subsetreg(list : TAsmList; fromsize: tcgsize; subsetregsize, subsetsize: tcgsize; startbit: byte; fromreg, subsetreg: tregister); virtual;
  185. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetregsize, fromsubsetsize: tcgsize; fromstartbit: byte; tosubsetregsize, tosubsetsize: tcgsize; tostartbit: byte; fromsubsetreg, tosubsetreg: tregister); virtual;
  186. procedure a_load_subsetreg_ref(list : TAsmList; subsetregsize, subsetsize: tcgsize; startbit: byte; tosize: tcgsize; subsetreg: tregister; const destref: treference); virtual;
  187. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetregsize, subsetsize: tcgsize; startbit: byte; const fromref: treference; subsetreg: tregister); virtual;
  188. procedure a_load_const_subsetreg(list: TAsmlist; subsetregsize, subsetsize: tcgsize; startbit: byte; a: aint; subsetreg: tregister); virtual;
  189. procedure a_load_subsetreg_loc(list: TAsmlist; subsetregsize, subsetsize: tcgsize; startbit: byte; subsetreg: tregister; const loc: tlocation); virtual;
  190. { fpu move instructions }
  191. procedure a_loadfpu_reg_reg(list: TAsmList; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  192. procedure a_loadfpu_ref_reg(list: TAsmList; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  193. procedure a_loadfpu_reg_ref(list: TAsmList; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  194. procedure a_loadfpu_loc_reg(list: TAsmList; const loc: tlocation; const reg: tregister);
  195. procedure a_loadfpu_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation);
  196. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  197. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  198. { vector register move instructions }
  199. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  200. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  201. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  202. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  203. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  204. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  205. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  206. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  207. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  208. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  209. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  210. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  211. { basic arithmetic operations }
  212. { note: for operators which require only one argument (not, neg), use }
  213. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  214. { that in this case the *second* operand is used as both source and }
  215. { destination (JM) }
  216. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  217. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  218. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetregsize, subsetsize : TCGSize; startbit: byte; a : aint; subsetreg: TRegister); virtual;
  219. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  220. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  221. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  222. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  223. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetregsize, subsetsize : TCGSize; startbit: byte; reg, subsetreg: TRegister); virtual;
  224. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  225. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  226. { trinary operations for processors that support them, 'emulated' }
  227. { on others. None with "ref" arguments since I don't think there }
  228. { are any processors that support it (JM) }
  229. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  230. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  231. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  232. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  233. { comparison operations }
  234. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  235. l : tasmlabel);virtual; abstract;
  236. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  237. l : tasmlabel); virtual;
  238. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  239. l : tasmlabel);
  240. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  241. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  242. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  243. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetregsize, subsetsize : tcgsize; startbit : byte; cmpsize : tcgsize; cmp_op : topcmp; subsetreg, reg : tregister; l : tasmlabel); virtual;
  244. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  245. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  246. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  247. l : tasmlabel);
  248. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  249. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  250. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  251. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  252. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  253. }
  254. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  255. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  256. {
  257. This routine tries to optimize the op_const_reg/ref opcode, and should be
  258. called at the start of a_op_const_reg/ref. It returns the actual opcode
  259. to emit, and the constant value to emit. This function can opcode OP_NONE to
  260. remove the opcode and OP_MOVE to replace it with a simple load
  261. @param(op The opcode to emit, returns the opcode which must be emitted)
  262. @param(a The constant which should be emitted, returns the constant which must
  263. be emitted)
  264. }
  265. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  266. {#
  267. This routine is used in exception management nodes. It should
  268. save the exception reason currently in the FUNCTION_RETURN_REG. The
  269. save should be done either to a temp (pointed to by href).
  270. or on the stack (pushing the value on the stack).
  271. The size of the value to save is OS_S32. The default version
  272. saves the exception reason to a temp. memory area.
  273. }
  274. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  275. {#
  276. This routine is used in exception management nodes. It should
  277. save the exception reason constant. The
  278. save should be done either to a temp (pointed to by href).
  279. or on the stack (pushing the value on the stack).
  280. The size of the value to save is OS_S32. The default version
  281. saves the exception reason to a temp. memory area.
  282. }
  283. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  284. {#
  285. This routine is used in exception management nodes. It should
  286. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  287. should either be in the temp. area (pointed to by href , href should
  288. *NOT* be freed) or on the stack (the value should be popped).
  289. The size of the value to save is OS_S32. The default version
  290. saves the exception reason to a temp. memory area.
  291. }
  292. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  293. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  294. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  295. {# This should emit the opcode to copy len bytes from the source
  296. to destination.
  297. It must be overriden for each new target processor.
  298. @param(source Source reference of copy)
  299. @param(dest Destination reference of copy)
  300. }
  301. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  302. {# This should emit the opcode to copy len bytes from the an unaligned source
  303. to destination.
  304. It must be overriden for each new target processor.
  305. @param(source Source reference of copy)
  306. @param(dest Destination reference of copy)
  307. }
  308. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  309. {# This should emit the opcode to a shortrstring from the source
  310. to destination.
  311. @param(source Source reference of copy)
  312. @param(dest Destination reference of copy)
  313. }
  314. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  315. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  316. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  317. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  318. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  319. {# Generates range checking code. It is to note
  320. that this routine does not need to be overriden,
  321. as it takes care of everything.
  322. @param(p Node which contains the value to check)
  323. @param(todef Type definition of node to range check)
  324. }
  325. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  326. {# Generates overflow checking code for a node }
  327. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  328. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  329. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  330. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  331. {# Emits instructions when compilation is done in profile
  332. mode (this is set as a command line option). The default
  333. behavior does nothing, should be overriden as required.
  334. }
  335. procedure g_profilecode(list : TAsmList);virtual;
  336. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  337. @param(size Number of bytes to allocate)
  338. }
  339. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  340. {# Emits instruction for allocating the locals in entry
  341. code of a routine. This is one of the first
  342. routine called in @var(genentrycode).
  343. @param(localsize Number of bytes to allocate as locals)
  344. }
  345. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  346. {# Emits instructions for returning from a subroutine.
  347. Should also restore the framepointer and stack.
  348. @param(parasize Number of bytes of parameters to deallocate from stack)
  349. }
  350. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  351. {# This routine is called when generating the code for the entry point
  352. of a routine. It should save all registers which are not used in this
  353. routine, and which should be declared as saved in the std_saved_registers
  354. set.
  355. This routine is mainly used when linking to code which is generated
  356. by ABI-compliant compilers (like GCC), to make sure that the reserved
  357. registers of that ABI are not clobbered.
  358. @param(usedinproc Registers which are used in the code of this routine)
  359. }
  360. procedure g_save_standard_registers(list:TAsmList);virtual;
  361. {# This routine is called when generating the code for the exit point
  362. of a routine. It should restore all registers which were previously
  363. saved in @var(g_save_standard_registers).
  364. @param(usedinproc Registers which are used in the code of this routine)
  365. }
  366. procedure g_restore_standard_registers(list:TAsmList);virtual;
  367. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  368. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  369. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  370. end;
  371. {$ifndef cpu64bit}
  372. {# @abstract(Abstract code generator for 64 Bit operations)
  373. This class implements an abstract code generator class
  374. for 64 Bit operations.
  375. }
  376. tcg64 = class
  377. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  378. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  379. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  380. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  381. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  382. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  383. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  384. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  385. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  386. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  387. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  388. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  389. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  390. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  391. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  392. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  393. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  394. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  395. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  396. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  397. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  398. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  399. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  400. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  401. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  402. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  403. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  404. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  405. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  406. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  407. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  408. {
  409. This routine tries to optimize the const_reg opcode, and should be
  410. called at the start of a_op64_const_reg. It returns the actual opcode
  411. to emit, and the constant value to emit. If this routine returns
  412. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  413. @param(op The opcode to emit, returns the opcode which must be emitted)
  414. @param(a The constant which should be emitted, returns the constant which must
  415. be emitted)
  416. @param(reg The register to emit the opcode with, returns the register with
  417. which the opcode will be emitted)
  418. }
  419. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  420. { override to catch 64bit rangechecks }
  421. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  422. end;
  423. {$endif cpu64bit}
  424. var
  425. {# Main code generator class }
  426. cg : tcg;
  427. {$ifndef cpu64bit}
  428. {# Code generator class for all operations working with 64-Bit operands }
  429. cg64 : tcg64;
  430. {$endif cpu64bit}
  431. implementation
  432. uses
  433. globals,options,systems,
  434. verbose,defutil,paramgr,symsym,
  435. tgobj,cutils,procinfo;
  436. {*****************************************************************************
  437. basic functionallity
  438. ******************************************************************************}
  439. constructor tcg.create;
  440. begin
  441. end;
  442. {*****************************************************************************
  443. register allocation
  444. ******************************************************************************}
  445. procedure tcg.init_register_allocators;
  446. begin
  447. fillchar(rg,sizeof(rg),0);
  448. add_reg_instruction_hook:=@add_reg_instruction;
  449. end;
  450. procedure tcg.done_register_allocators;
  451. begin
  452. { Safety }
  453. fillchar(rg,sizeof(rg),0);
  454. add_reg_instruction_hook:=nil;
  455. end;
  456. {$ifdef flowgraph}
  457. procedure Tcg.init_flowgraph;
  458. begin
  459. aktflownode:=0;
  460. end;
  461. procedure Tcg.done_flowgraph;
  462. begin
  463. end;
  464. {$endif}
  465. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  466. begin
  467. if not assigned(rg[R_INTREGISTER]) then
  468. internalerror(200312122);
  469. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  470. end;
  471. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  472. begin
  473. if not assigned(rg[R_FPUREGISTER]) then
  474. internalerror(200312123);
  475. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  476. end;
  477. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  478. begin
  479. if not assigned(rg[R_MMREGISTER]) then
  480. internalerror(2003121214);
  481. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  482. end;
  483. function tcg.getaddressregister(list:TAsmList):Tregister;
  484. begin
  485. if assigned(rg[R_ADDRESSREGISTER]) then
  486. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  487. else
  488. begin
  489. if not assigned(rg[R_INTREGISTER]) then
  490. internalerror(200312121);
  491. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  492. end;
  493. end;
  494. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  495. var
  496. subreg:Tsubregister;
  497. begin
  498. subreg:=cgsize2subreg(size);
  499. result:=reg;
  500. setsubreg(result,subreg);
  501. { notify RA }
  502. if result<>reg then
  503. list.concat(tai_regalloc.resize(result));
  504. end;
  505. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  506. begin
  507. if not assigned(rg[getregtype(r)]) then
  508. internalerror(200312125);
  509. rg[getregtype(r)].getcpuregister(list,r);
  510. end;
  511. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  512. begin
  513. if not assigned(rg[getregtype(r)]) then
  514. internalerror(200312126);
  515. rg[getregtype(r)].ungetcpuregister(list,r);
  516. end;
  517. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  518. begin
  519. if assigned(rg[rt]) then
  520. rg[rt].alloccpuregisters(list,r)
  521. else
  522. internalerror(200310092);
  523. end;
  524. procedure tcg.allocallcpuregisters(list:TAsmList);
  525. begin
  526. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  527. {$ifndef i386}
  528. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  529. {$ifdef cpumm}
  530. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  531. {$endif cpumm}
  532. {$endif i386}
  533. end;
  534. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  535. begin
  536. if assigned(rg[rt]) then
  537. rg[rt].dealloccpuregisters(list,r)
  538. else
  539. internalerror(200310093);
  540. end;
  541. procedure tcg.deallocallcpuregisters(list:TAsmList);
  542. begin
  543. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  544. {$ifndef i386}
  545. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  546. {$ifdef cpumm}
  547. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  548. {$endif cpumm}
  549. {$endif i386}
  550. end;
  551. function tcg.uses_registers(rt:Tregistertype):boolean;
  552. begin
  553. if assigned(rg[rt]) then
  554. result:=rg[rt].uses_registers
  555. else
  556. result:=false;
  557. end;
  558. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  559. var
  560. rt : tregistertype;
  561. begin
  562. rt:=getregtype(r);
  563. { Only add it when a register allocator is configured.
  564. No IE can be generated, because the VMT is written
  565. without a valid rg[] }
  566. if assigned(rg[rt]) then
  567. rg[rt].add_reg_instruction(instr,r);
  568. end;
  569. procedure tcg.add_move_instruction(instr:Taicpu);
  570. var
  571. rt : tregistertype;
  572. begin
  573. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  574. if assigned(rg[rt]) then
  575. rg[rt].add_move_instruction(instr)
  576. else
  577. internalerror(200310095);
  578. end;
  579. procedure tcg.set_regalloc_extend_backwards(b: boolean);
  580. var
  581. rt : tregistertype;
  582. begin
  583. for rt:=low(rg) to high(rg) do
  584. begin
  585. if assigned(rg[rt]) then
  586. rg[rt].extend_live_range_backwards := b;;
  587. end;
  588. end;
  589. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  590. var
  591. rt : tregistertype;
  592. begin
  593. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  594. begin
  595. if assigned(rg[rt]) then
  596. rg[rt].do_register_allocation(list,headertai);
  597. end;
  598. { running the other register allocator passes could require addition int/addr. registers
  599. when spilling so run int/addr register allocation at the end }
  600. if assigned(rg[R_INTREGISTER]) then
  601. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  602. if assigned(rg[R_ADDRESSREGISTER]) then
  603. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  604. end;
  605. procedure tcg.translate_register(var reg : tregister);
  606. begin
  607. rg[getregtype(reg)].translate_register(reg);
  608. end;
  609. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  610. begin
  611. list.concat(tai_regalloc.alloc(r,nil));
  612. end;
  613. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  614. begin
  615. list.concat(tai_regalloc.dealloc(r,nil));
  616. end;
  617. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  618. var
  619. instr : tai;
  620. begin
  621. instr:=tai_regalloc.sync(r);
  622. list.concat(instr);
  623. add_reg_instruction(instr,r);
  624. end;
  625. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  626. begin
  627. list.concat(tai_label.create(l));
  628. end;
  629. {*****************************************************************************
  630. for better code generation these methods should be overridden
  631. ******************************************************************************}
  632. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  633. var
  634. ref : treference;
  635. begin
  636. cgpara.check_simple_location;
  637. case cgpara.location^.loc of
  638. LOC_REGISTER,LOC_CREGISTER:
  639. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  640. LOC_REFERENCE,LOC_CREFERENCE:
  641. begin
  642. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  643. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  644. end
  645. else
  646. internalerror(2002071004);
  647. end;
  648. end;
  649. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  650. var
  651. ref : treference;
  652. begin
  653. cgpara.check_simple_location;
  654. case cgpara.location^.loc of
  655. LOC_REGISTER,LOC_CREGISTER:
  656. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  657. LOC_REFERENCE,LOC_CREFERENCE:
  658. begin
  659. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  660. a_load_const_ref(list,cgpara.location^.size,a,ref);
  661. end
  662. else
  663. internalerror(2002071004);
  664. end;
  665. end;
  666. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  667. var
  668. ref : treference;
  669. begin
  670. cgpara.check_simple_location;
  671. case cgpara.location^.loc of
  672. LOC_REGISTER,LOC_CREGISTER:
  673. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  674. LOC_REFERENCE,LOC_CREFERENCE:
  675. begin
  676. reference_reset(ref);
  677. ref.base:=cgpara.location^.reference.index;
  678. ref.offset:=cgpara.location^.reference.offset;
  679. if (size <> OS_NO) and
  680. (tcgsize2size[size] < sizeof(aint)) then
  681. begin
  682. if (cgpara.size = OS_NO) or
  683. assigned(cgpara.location^.next) then
  684. internalerror(2006052401);
  685. a_load_ref_ref(list,size,cgpara.size,r,ref);
  686. end
  687. else
  688. { use concatcopy, because the parameter can be larger than }
  689. { what the OS_* constants can handle }
  690. g_concatcopy(list,r,ref,cgpara.intsize);
  691. end
  692. else
  693. internalerror(2002071004);
  694. end;
  695. end;
  696. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  697. begin
  698. case l.loc of
  699. LOC_REGISTER,
  700. LOC_CREGISTER :
  701. a_param_reg(list,l.size,l.register,cgpara);
  702. LOC_CONSTANT :
  703. a_param_const(list,l.size,l.value,cgpara);
  704. LOC_CREFERENCE,
  705. LOC_REFERENCE :
  706. a_param_ref(list,l.size,l.reference,cgpara);
  707. else
  708. internalerror(2002032211);
  709. end;
  710. end;
  711. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  712. var
  713. hr : tregister;
  714. begin
  715. cgpara.check_simple_location;
  716. hr:=getaddressregister(list);
  717. a_loadaddr_ref_reg(list,r,hr);
  718. a_param_reg(list,OS_ADDR,hr,cgpara);
  719. end;
  720. {****************************************************************************
  721. some generic implementations
  722. ****************************************************************************}
  723. {$ifopt r+}
  724. {$define rangeon}
  725. {$endif}
  726. {$ifopt q+}
  727. {$define overflowon}
  728. {$endif}
  729. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetregsize, subsetsize: tcgsize; startbit: byte; tosize: tcgsize; subsetreg, destreg: tregister);
  730. var
  731. bitmask: aint;
  732. tmpreg: tregister;
  733. stopbit: byte;
  734. begin
  735. tmpreg:=getintregister(list,subsetregsize);
  736. a_op_const_reg_reg(list,OP_SHR,subsetregsize,startbit,subsetreg,tmpreg);
  737. stopbit := startbit+(tcgsize2size[subsetsize] * 8);
  738. // on x86(64), 1 shl 32(64) = 1 instead of 0
  739. if (stopbit - startbit <> AIntBits) then
  740. bitmask := (1 shl (stopbit-startbit)) - 1
  741. else
  742. bitmask := -1;
  743. a_op_const_reg(list,OP_AND,subsetregsize,bitmask,tmpreg);
  744. tmpreg := makeregsize(list,tmpreg,subsetsize);
  745. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  746. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  747. end;
  748. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize: tcgsize; subsetregsize, subsetsize: tcgsize; startbit: byte; fromreg, subsetreg: tregister);
  749. var
  750. bitmask: aint;
  751. tmpreg: tregister;
  752. stopbit: byte;
  753. begin
  754. stopbit := startbit+(tcgsize2size[subsetsize] * 8);
  755. // on x86(64), 1 shl 32(64) = 1 instead of 0
  756. if (stopbit <> AIntBits) then
  757. bitmask := not(((1 shl stopbit)-1) xor ((1 shl startbit)-1))
  758. else
  759. bitmask := not(-1 xor ((1 shl startbit)-1));
  760. tmpreg:=getintregister(list,subsetregsize);
  761. a_load_reg_reg(list,fromsize,subsetregsize,fromreg,tmpreg);
  762. a_op_const_reg(list,OP_SHL,subsetregsize,startbit,tmpreg);
  763. a_op_const_reg(list,OP_AND,subsetregsize,not(bitmask),tmpreg);
  764. a_op_const_reg(list,OP_AND,subsetregsize,bitmask,subsetreg);
  765. a_op_reg_reg(list,OP_OR,subsetregsize,tmpreg,subsetreg);
  766. end;
  767. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetregsize, fromsubsetsize: tcgsize; fromstartbit: byte; tosubsetregsize, tosubsetsize: tcgsize; tostartbit: byte; fromsubsetreg, tosubsetreg: tregister);
  768. var
  769. tmpreg: tregister;
  770. begin
  771. tmpreg := getintregister(list,tosubsetsize);
  772. a_load_subsetreg_reg(list,fromsubsetregsize,fromsubsetsize,fromstartbit,tosubsetsize,fromsubsetreg,tmpreg);
  773. a_load_reg_subsetreg(list,tosubsetsize,tosubsetregsize,tosubsetsize,tostartbit,tmpreg,tosubsetreg);
  774. end;
  775. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetregsize, subsetsize: tcgsize; startbit: byte; tosize: tcgsize; subsetreg: tregister; const destref: treference);
  776. var
  777. tmpreg: tregister;
  778. begin
  779. tmpreg := getintregister(list,tosize);
  780. a_load_subsetreg_reg(list,subsetregsize,subsetsize,startbit,tosize,subsetreg,tmpreg);
  781. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  782. end;
  783. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetregsize, subsetsize: tcgsize; startbit: byte; const fromref: treference; subsetreg: tregister);
  784. var
  785. tmpreg: tregister;
  786. begin
  787. tmpreg := getintregister(list,subsetsize);
  788. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  789. a_load_reg_subsetreg(list,subsetsize,subsetregsize,subsetsize,startbit,tmpreg,subsetreg);
  790. end;
  791. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetregsize, subsetsize: tcgsize; startbit: byte; a: aint; subsetreg: tregister);
  792. var
  793. bitmask: aint;
  794. stopbit: byte;
  795. begin
  796. stopbit := startbit+(tcgsize2size[subsetsize] * 8);
  797. // on x86(64), 1 shl 32(64) = 1 instead of 0
  798. if (stopbit <> AIntBits) then
  799. bitmask := not(((1 shl stopbit)-1) xor ((1 shl startbit)-1))
  800. else
  801. bitmask := (1 shl startbit) - 1;
  802. a_op_const_reg(list,OP_AND,subsetregsize,bitmask,subsetreg);
  803. a_op_const_reg(list,OP_OR,subsetregsize,(a shl startbit) and not(bitmask),subsetreg);
  804. end;
  805. {$ifdef rangeon}
  806. {$r+}
  807. {$undef rangeon}
  808. {$endif}
  809. {$ifdef overflowon}
  810. {$q+}
  811. {$undef overflowon}
  812. {$endif}
  813. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  814. var
  815. tmpreg: tregister;
  816. begin
  817. { verify if we have the same reference }
  818. if references_equal(sref,dref) then
  819. exit;
  820. tmpreg:=getintregister(list,tosize);
  821. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  822. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  823. end;
  824. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  825. var
  826. tmpreg: tregister;
  827. begin
  828. tmpreg:=getintregister(list,size);
  829. a_load_const_reg(list,size,a,tmpreg);
  830. a_load_reg_ref(list,size,size,tmpreg,ref);
  831. end;
  832. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  833. begin
  834. case loc.loc of
  835. LOC_REFERENCE,LOC_CREFERENCE:
  836. a_load_const_ref(list,loc.size,a,loc.reference);
  837. LOC_REGISTER,LOC_CREGISTER:
  838. a_load_const_reg(list,loc.size,a,loc.register);
  839. LOC_SUBSETREG,LOC_CSUBSETREG:
  840. a_load_const_subsetreg(list,loc.subsetregsize,loc.size,loc.startbit,a,loc.subsetreg);
  841. else
  842. internalerror(200203272);
  843. end;
  844. end;
  845. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  846. begin
  847. case loc.loc of
  848. LOC_REFERENCE,LOC_CREFERENCE:
  849. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  850. LOC_REGISTER,LOC_CREGISTER:
  851. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  852. LOC_SUBSETREG,LOC_CSUBSETREG:
  853. a_load_reg_subsetreg(list,fromsize,loc.subsetregsize,loc.size,loc.startbit,reg,loc.subsetreg);
  854. else
  855. internalerror(200203271);
  856. end;
  857. end;
  858. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  859. begin
  860. case loc.loc of
  861. LOC_REFERENCE,LOC_CREFERENCE:
  862. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  863. LOC_REGISTER,LOC_CREGISTER:
  864. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  865. LOC_CONSTANT:
  866. a_load_const_reg(list,tosize,loc.value,reg);
  867. LOC_SUBSETREG,LOC_CSUBSETREG:
  868. a_load_subsetreg_reg(list,loc.subsetregsize,loc.size,loc.startbit,tosize,loc.subsetreg,reg);
  869. else
  870. internalerror(200109092);
  871. end;
  872. end;
  873. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  874. begin
  875. case loc.loc of
  876. LOC_REFERENCE,LOC_CREFERENCE:
  877. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  878. LOC_REGISTER,LOC_CREGISTER:
  879. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  880. LOC_CONSTANT:
  881. a_load_const_ref(list,tosize,loc.value,ref);
  882. LOC_SUBSETREG,LOC_CSUBSETREG:
  883. a_load_subsetreg_ref(list,loc.subsetregsize,loc.size,loc.startbit,tosize,loc.subsetreg,ref);
  884. else
  885. internalerror(200109302);
  886. end;
  887. end;
  888. procedure tcg.a_load_loc_subsetreg(list : TAsmList;subsetregsize,subsetsize: tcgsize; startbit: byte; const loc: tlocation; subsetreg : tregister);
  889. begin
  890. case loc.loc of
  891. LOC_REFERENCE,LOC_CREFERENCE:
  892. a_load_ref_subsetreg(list,loc.size,subsetregsize,subsetsize,startbit,loc.reference,subsetreg);
  893. LOC_REGISTER,LOC_CREGISTER:
  894. a_load_reg_subsetreg(list,loc.size,subsetregsize,subsetsize,startbit,loc.register,subsetreg);
  895. LOC_CONSTANT:
  896. a_load_const_subsetreg(list,subsetregsize,subsetsize,startbit,loc.value,subsetreg);
  897. LOC_SUBSETREG,LOC_CSUBSETREG:
  898. a_load_subsetreg_subsetreg(list,loc.subsetregsize,loc.size,loc.startbit,subsetregsize,subsetsize,startbit,loc.subsetreg,subsetreg);
  899. else
  900. internalerror(2006052310);
  901. end;
  902. end;
  903. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetregsize, subsetsize: tcgsize; startbit: byte; subsetreg: tregister; const loc: tlocation);
  904. begin
  905. case loc.loc of
  906. LOC_REFERENCE,LOC_CREFERENCE:
  907. a_load_subsetreg_ref(list,subsetregsize,subsetsize,startbit,loc.size,subsetreg,loc.reference);
  908. LOC_REGISTER,LOC_CREGISTER:
  909. a_load_subsetreg_reg(list,subsetregsize,subsetsize,startbit,loc.size,subsetreg,loc.register);
  910. LOC_SUBSETREG,LOC_CSUBSETREG:
  911. a_load_subsetreg_subsetreg(list,subsetregsize,subsetsize,startbit,loc.subsetregsize,loc.size,loc.startbit,subsetreg,loc.subsetreg);
  912. else
  913. internalerror(2006051510);
  914. end;
  915. end;
  916. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  917. var
  918. powerval : longint;
  919. begin
  920. case op of
  921. OP_OR :
  922. begin
  923. { or with zero returns same result }
  924. if a = 0 then
  925. op:=OP_NONE
  926. else
  927. { or with max returns max }
  928. if a = -1 then
  929. op:=OP_MOVE;
  930. end;
  931. OP_AND :
  932. begin
  933. { and with max returns same result }
  934. if (a = -1) then
  935. op:=OP_NONE
  936. else
  937. { and with 0 returns 0 }
  938. if a=0 then
  939. op:=OP_MOVE;
  940. end;
  941. OP_DIV :
  942. begin
  943. { division by 1 returns result }
  944. if a = 1 then
  945. op:=OP_NONE
  946. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in aktlocalswitches) then
  947. begin
  948. a := powerval;
  949. op:= OP_SHR;
  950. end;
  951. end;
  952. OP_IDIV:
  953. begin
  954. if a = 1 then
  955. op:=OP_NONE;
  956. end;
  957. OP_MUL,OP_IMUL:
  958. begin
  959. if a = 1 then
  960. op:=OP_NONE
  961. else
  962. if a=0 then
  963. op:=OP_MOVE
  964. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in aktlocalswitches) then
  965. begin
  966. a := powerval;
  967. op:= OP_SHL;
  968. end;
  969. end;
  970. OP_ADD,OP_SUB:
  971. begin
  972. if a = 0 then
  973. op:=OP_NONE;
  974. end;
  975. OP_SAR,OP_SHL,OP_SHR:
  976. begin
  977. if a = 0 then
  978. op:=OP_NONE;
  979. end;
  980. end;
  981. end;
  982. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; const loc: tlocation; const reg: tregister);
  983. begin
  984. case loc.loc of
  985. LOC_REFERENCE, LOC_CREFERENCE:
  986. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  987. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  988. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  989. else
  990. internalerror(200203301);
  991. end;
  992. end;
  993. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation);
  994. begin
  995. case loc.loc of
  996. LOC_REFERENCE, LOC_CREFERENCE:
  997. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  998. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  999. a_loadfpu_reg_reg(list,size,reg,loc.register);
  1000. else
  1001. internalerror(48991);
  1002. end;
  1003. end;
  1004. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  1005. var
  1006. ref : treference;
  1007. begin
  1008. case cgpara.location^.loc of
  1009. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1010. begin
  1011. cgpara.check_simple_location;
  1012. a_loadfpu_reg_reg(list,size,r,cgpara.location^.register);
  1013. end;
  1014. LOC_REFERENCE,LOC_CREFERENCE:
  1015. begin
  1016. cgpara.check_simple_location;
  1017. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1018. a_loadfpu_reg_ref(list,size,r,ref);
  1019. end;
  1020. LOC_REGISTER,LOC_CREGISTER:
  1021. begin
  1022. { paramfpu_ref does the check_simpe_location check here if necessary }
  1023. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  1024. a_loadfpu_reg_ref(list,size,r,ref);
  1025. a_paramfpu_ref(list,size,ref,cgpara);
  1026. tg.Ungettemp(list,ref);
  1027. end;
  1028. else
  1029. internalerror(2002071004);
  1030. end;
  1031. end;
  1032. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  1033. var
  1034. href : treference;
  1035. begin
  1036. cgpara.check_simple_location;
  1037. case cgpara.location^.loc of
  1038. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1039. a_loadfpu_ref_reg(list,size,ref,cgpara.location^.register);
  1040. LOC_REFERENCE,LOC_CREFERENCE:
  1041. begin
  1042. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1043. { concatcopy should choose the best way to copy the data }
  1044. g_concatcopy(list,ref,href,tcgsize2size[size]);
  1045. end;
  1046. else
  1047. internalerror(200402201);
  1048. end;
  1049. end;
  1050. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  1051. var
  1052. tmpreg : tregister;
  1053. begin
  1054. tmpreg:=getintregister(list,size);
  1055. a_load_ref_reg(list,size,size,ref,tmpreg);
  1056. a_op_const_reg(list,op,size,a,tmpreg);
  1057. a_load_reg_ref(list,size,size,tmpreg,ref);
  1058. end;
  1059. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetregsize, subsetsize : TCGSize; startbit: byte; a : aint; subsetreg: TRegister);
  1060. var
  1061. tmpreg: tregister;
  1062. begin
  1063. tmpreg := cg.getintregister(list, size);
  1064. a_load_subsetreg_reg(list,subsetregsize,subsetsize,startbit,size,subsetreg,tmpreg);
  1065. a_op_const_reg(list,op,size,a,tmpreg);
  1066. a_load_reg_subsetreg(list,size,subsetregsize,subsetsize,startbit,tmpreg,subsetreg);
  1067. end;
  1068. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  1069. begin
  1070. case loc.loc of
  1071. LOC_REGISTER, LOC_CREGISTER:
  1072. a_op_const_reg(list,op,loc.size,a,loc.register);
  1073. LOC_REFERENCE, LOC_CREFERENCE:
  1074. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1075. LOC_SUBSETREG, LOC_CSUBSETREG:
  1076. a_op_const_subsetreg(list,op,loc.size,loc.subsetregsize,loc.size,loc.startbit,a,loc.subsetreg);
  1077. else
  1078. internalerror(200109061);
  1079. end;
  1080. end;
  1081. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1082. var
  1083. tmpreg : tregister;
  1084. begin
  1085. tmpreg:=getintregister(list,size);
  1086. a_load_ref_reg(list,size,size,ref,tmpreg);
  1087. a_op_reg_reg(list,op,size,reg,tmpreg);
  1088. a_load_reg_ref(list,size,size,tmpreg,ref);
  1089. end;
  1090. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1091. var
  1092. tmpreg: tregister;
  1093. begin
  1094. case op of
  1095. OP_NOT,OP_NEG:
  1096. { handle it as "load ref,reg; op reg" }
  1097. begin
  1098. a_load_ref_reg(list,size,size,ref,reg);
  1099. a_op_reg_reg(list,op,size,reg,reg);
  1100. end;
  1101. else
  1102. begin
  1103. tmpreg:=getintregister(list,size);
  1104. a_load_ref_reg(list,size,size,ref,tmpreg);
  1105. a_op_reg_reg(list,op,size,tmpreg,reg);
  1106. end;
  1107. end;
  1108. end;
  1109. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetregsize, subsetsize : TCGSize; startbit: byte; reg, subsetreg: TRegister);
  1110. var
  1111. tmpreg: tregister;
  1112. begin
  1113. tmpreg := cg.getintregister(list, opsize);
  1114. a_load_subsetreg_reg(list,subsetregsize,subsetsize,startbit,opsize,subsetreg,tmpreg);
  1115. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1116. a_load_reg_subsetreg(list,opsize,subsetregsize,subsetsize,startbit,tmpreg,subsetreg);
  1117. end;
  1118. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  1119. begin
  1120. case loc.loc of
  1121. LOC_REGISTER, LOC_CREGISTER:
  1122. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1123. LOC_REFERENCE, LOC_CREFERENCE:
  1124. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1125. LOC_SUBSETREG, LOC_CSUBSETREG:
  1126. a_op_reg_subsetreg(list,op,loc.size,loc.subsetregsize,loc.size,loc.startbit,reg,loc.subsetreg);
  1127. else
  1128. internalerror(200109061);
  1129. end;
  1130. end;
  1131. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1132. var
  1133. tmpreg: tregister;
  1134. begin
  1135. case loc.loc of
  1136. LOC_REGISTER,LOC_CREGISTER:
  1137. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1138. LOC_REFERENCE,LOC_CREFERENCE:
  1139. begin
  1140. tmpreg:=getintregister(list,loc.size);
  1141. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1142. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1143. end;
  1144. LOC_SUBSETREG, LOC_CSUBSETREG:
  1145. begin
  1146. tmpreg:=getintregister(list,loc.size);
  1147. a_load_subsetreg_reg(list,loc.subsetregsize,loc.size,loc.startbit,loc.size,loc.subsetreg,tmpreg);
  1148. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  1149. a_load_reg_subsetreg(list,loc.size,loc.subsetregsize,loc.size,loc.startbit,tmpreg,loc.subsetreg);
  1150. end;
  1151. else
  1152. internalerror(200109061);
  1153. end;
  1154. end;
  1155. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  1156. a:aint;src,dst:Tregister);
  1157. begin
  1158. a_load_reg_reg(list,size,size,src,dst);
  1159. a_op_const_reg(list,op,size,a,dst);
  1160. end;
  1161. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  1162. size: tcgsize; src1, src2, dst: tregister);
  1163. var
  1164. tmpreg: tregister;
  1165. begin
  1166. if (dst<>src1) then
  1167. begin
  1168. a_load_reg_reg(list,size,size,src2,dst);
  1169. a_op_reg_reg(list,op,size,src1,dst);
  1170. end
  1171. else
  1172. begin
  1173. tmpreg:=getintregister(list,size);
  1174. a_load_reg_reg(list,size,size,src2,tmpreg);
  1175. a_op_reg_reg(list,op,size,src1,tmpreg);
  1176. a_load_reg_reg(list,size,size,tmpreg,dst);
  1177. end;
  1178. end;
  1179. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1180. begin
  1181. a_op_const_reg_reg(list,op,size,a,src,dst);
  1182. ovloc.loc:=LOC_VOID;
  1183. end;
  1184. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1185. begin
  1186. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  1187. ovloc.loc:=LOC_VOID;
  1188. end;
  1189. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  1190. l : tasmlabel);
  1191. var
  1192. tmpreg: tregister;
  1193. begin
  1194. tmpreg:=getintregister(list,size);
  1195. a_load_ref_reg(list,size,size,ref,tmpreg);
  1196. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1197. end;
  1198. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  1199. l : tasmlabel);
  1200. var
  1201. tmpreg : tregister;
  1202. begin
  1203. case loc.loc of
  1204. LOC_REGISTER,LOC_CREGISTER:
  1205. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1206. LOC_REFERENCE,LOC_CREFERENCE:
  1207. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1208. LOC_SUBSETREG, LOC_CSUBSETREG:
  1209. begin
  1210. tmpreg:=getintregister(list,size);
  1211. a_load_subsetreg_reg(list,loc.subsetregsize,loc.size,loc.startbit,size,loc.subsetreg,tmpreg);
  1212. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1213. end
  1214. else
  1215. internalerror(200109061);
  1216. end;
  1217. end;
  1218. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1219. var
  1220. tmpreg: tregister;
  1221. begin
  1222. tmpreg:=getintregister(list,size);
  1223. a_load_ref_reg(list,size,size,ref,tmpreg);
  1224. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1225. end;
  1226. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1227. var
  1228. tmpreg: tregister;
  1229. begin
  1230. tmpreg:=getintregister(list,size);
  1231. a_load_ref_reg(list,size,size,ref,tmpreg);
  1232. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1233. end;
  1234. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  1235. begin
  1236. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  1237. end;
  1238. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1239. begin
  1240. case loc.loc of
  1241. LOC_REGISTER,
  1242. LOC_CREGISTER:
  1243. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1244. LOC_REFERENCE,
  1245. LOC_CREFERENCE :
  1246. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1247. LOC_CONSTANT:
  1248. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1249. LOC_SUBSETREG,
  1250. LOC_CSUBSETREG:
  1251. a_cmp_subsetreg_reg_label(list,loc.subsetregsize,loc.size,loc.startbit,size,cmp_op,loc.subsetreg,reg,l);
  1252. else
  1253. internalerror(200203231);
  1254. end;
  1255. end;
  1256. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetregsize, subsetsize : tcgsize; startbit : byte; cmpsize : tcgsize; cmp_op : topcmp; subsetreg, reg : tregister; l : tasmlabel);
  1257. var
  1258. tmpreg: tregister;
  1259. begin
  1260. tmpreg:=getintregister(list, cmpsize);
  1261. a_load_subsetreg_reg(list,subsetregsize,subsetsize,startbit,cmpsize,subsetreg,tmpreg);
  1262. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  1263. end;
  1264. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1265. l : tasmlabel);
  1266. var
  1267. tmpreg: tregister;
  1268. begin
  1269. case loc.loc of
  1270. LOC_REGISTER,LOC_CREGISTER:
  1271. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1272. LOC_REFERENCE,LOC_CREFERENCE:
  1273. begin
  1274. tmpreg:=getintregister(list,size);
  1275. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1276. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1277. end;
  1278. LOC_SUBSETREG, LOC_CSUBSETREG:
  1279. begin
  1280. tmpreg:=getintregister(list, size);
  1281. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1282. a_cmp_subsetreg_reg_label(list,loc.subsetregsize,loc.size,loc.startbit,size,swap_opcmp(cmp_op),loc.subsetreg,tmpreg,l);
  1283. end;
  1284. else
  1285. internalerror(200109061);
  1286. end;
  1287. end;
  1288. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1289. begin
  1290. case loc.loc of
  1291. LOC_MMREGISTER,LOC_CMMREGISTER:
  1292. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1293. LOC_REFERENCE,LOC_CREFERENCE:
  1294. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1295. else
  1296. internalerror(200310121);
  1297. end;
  1298. end;
  1299. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1300. begin
  1301. case loc.loc of
  1302. LOC_MMREGISTER,LOC_CMMREGISTER:
  1303. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1304. LOC_REFERENCE,LOC_CREFERENCE:
  1305. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1306. else
  1307. internalerror(200310122);
  1308. end;
  1309. end;
  1310. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  1311. var
  1312. href : treference;
  1313. begin
  1314. cgpara.check_simple_location;
  1315. case cgpara.location^.loc of
  1316. LOC_MMREGISTER,LOC_CMMREGISTER:
  1317. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  1318. LOC_REFERENCE,LOC_CREFERENCE:
  1319. begin
  1320. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1321. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  1322. end
  1323. else
  1324. internalerror(200310123);
  1325. end;
  1326. end;
  1327. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  1328. var
  1329. hr : tregister;
  1330. hs : tmmshuffle;
  1331. begin
  1332. cgpara.check_simple_location;
  1333. hr:=getmmregister(list,cgpara.location^.size);
  1334. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  1335. if realshuffle(shuffle) then
  1336. begin
  1337. hs:=shuffle^;
  1338. removeshuffles(hs);
  1339. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  1340. end
  1341. else
  1342. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  1343. end;
  1344. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  1345. begin
  1346. case loc.loc of
  1347. LOC_MMREGISTER,LOC_CMMREGISTER:
  1348. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  1349. LOC_REFERENCE,LOC_CREFERENCE:
  1350. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  1351. else
  1352. internalerror(200310123);
  1353. end;
  1354. end;
  1355. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1356. var
  1357. hr : tregister;
  1358. hs : tmmshuffle;
  1359. begin
  1360. hr:=getmmregister(list,size);
  1361. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1362. if realshuffle(shuffle) then
  1363. begin
  1364. hs:=shuffle^;
  1365. removeshuffles(hs);
  1366. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1367. end
  1368. else
  1369. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1370. end;
  1371. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1372. var
  1373. hr : tregister;
  1374. hs : tmmshuffle;
  1375. begin
  1376. hr:=getmmregister(list,size);
  1377. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1378. if realshuffle(shuffle) then
  1379. begin
  1380. hs:=shuffle^;
  1381. removeshuffles(hs);
  1382. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1383. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1384. end
  1385. else
  1386. begin
  1387. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1388. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1389. end;
  1390. end;
  1391. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1392. begin
  1393. case loc.loc of
  1394. LOC_CMMREGISTER,LOC_MMREGISTER:
  1395. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1396. LOC_CREFERENCE,LOC_REFERENCE:
  1397. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1398. else
  1399. internalerror(200312232);
  1400. end;
  1401. end;
  1402. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  1403. begin
  1404. g_concatcopy(list,source,dest,len);
  1405. end;
  1406. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  1407. var
  1408. cgpara1,cgpara2,cgpara3 : TCGPara;
  1409. begin
  1410. cgpara1.init;
  1411. cgpara2.init;
  1412. cgpara3.init;
  1413. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1414. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1415. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1416. paramanager.allocparaloc(list,cgpara3);
  1417. a_paramaddr_ref(list,dest,cgpara3);
  1418. paramanager.allocparaloc(list,cgpara2);
  1419. a_paramaddr_ref(list,source,cgpara2);
  1420. paramanager.allocparaloc(list,cgpara1);
  1421. a_param_const(list,OS_INT,len,cgpara1);
  1422. paramanager.freeparaloc(list,cgpara3);
  1423. paramanager.freeparaloc(list,cgpara2);
  1424. paramanager.freeparaloc(list,cgpara1);
  1425. allocallcpuregisters(list);
  1426. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  1427. deallocallcpuregisters(list);
  1428. cgpara3.done;
  1429. cgpara2.done;
  1430. cgpara1.done;
  1431. end;
  1432. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  1433. var
  1434. href : treference;
  1435. incrfunc : string;
  1436. cgpara1,cgpara2 : TCGPara;
  1437. begin
  1438. cgpara1.init;
  1439. cgpara2.init;
  1440. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1441. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1442. if is_interfacecom(t) then
  1443. incrfunc:='FPC_INTF_INCR_REF'
  1444. else if is_ansistring(t) then
  1445. incrfunc:='FPC_ANSISTR_INCR_REF'
  1446. else if is_widestring(t) then
  1447. incrfunc:='FPC_WIDESTR_INCR_REF'
  1448. else if is_dynamic_array(t) then
  1449. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1450. else
  1451. incrfunc:='';
  1452. { call the special incr function or the generic addref }
  1453. if incrfunc<>'' then
  1454. begin
  1455. paramanager.allocparaloc(list,cgpara1);
  1456. { widestrings aren't ref. counted on all platforms so we need the address
  1457. to create a real copy }
  1458. if is_widestring(t) then
  1459. a_paramaddr_ref(list,ref,cgpara1)
  1460. else
  1461. { these functions get the pointer by value }
  1462. a_param_ref(list,OS_ADDR,ref,cgpara1);
  1463. paramanager.freeparaloc(list,cgpara1);
  1464. allocallcpuregisters(list);
  1465. a_call_name(list,incrfunc);
  1466. deallocallcpuregisters(list);
  1467. end
  1468. else
  1469. begin
  1470. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1471. paramanager.allocparaloc(list,cgpara2);
  1472. a_paramaddr_ref(list,href,cgpara2);
  1473. paramanager.allocparaloc(list,cgpara1);
  1474. a_paramaddr_ref(list,ref,cgpara1);
  1475. paramanager.freeparaloc(list,cgpara1);
  1476. paramanager.freeparaloc(list,cgpara2);
  1477. allocallcpuregisters(list);
  1478. a_call_name(list,'FPC_ADDREF');
  1479. deallocallcpuregisters(list);
  1480. end;
  1481. cgpara2.done;
  1482. cgpara1.done;
  1483. end;
  1484. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  1485. var
  1486. href : treference;
  1487. decrfunc : string;
  1488. needrtti : boolean;
  1489. cgpara1,cgpara2 : TCGPara;
  1490. tempreg1,tempreg2 : TRegister;
  1491. begin
  1492. cgpara1.init;
  1493. cgpara2.init;
  1494. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1495. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1496. needrtti:=false;
  1497. if is_interfacecom(t) then
  1498. decrfunc:='FPC_INTF_DECR_REF'
  1499. else if is_ansistring(t) then
  1500. decrfunc:='FPC_ANSISTR_DECR_REF'
  1501. else if is_widestring(t) then
  1502. decrfunc:='FPC_WIDESTR_DECR_REF'
  1503. else if is_dynamic_array(t) then
  1504. begin
  1505. decrfunc:='FPC_DYNARRAY_DECR_REF';
  1506. needrtti:=true;
  1507. end
  1508. else
  1509. decrfunc:='';
  1510. { call the special decr function or the generic decref }
  1511. if decrfunc<>'' then
  1512. begin
  1513. if needrtti then
  1514. begin
  1515. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1516. tempreg2:=getaddressregister(list);
  1517. a_loadaddr_ref_reg(list,href,tempreg2);
  1518. end;
  1519. tempreg1:=getaddressregister(list);
  1520. a_loadaddr_ref_reg(list,ref,tempreg1);
  1521. if needrtti then
  1522. begin
  1523. paramanager.allocparaloc(list,cgpara2);
  1524. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  1525. paramanager.freeparaloc(list,cgpara2);
  1526. end;
  1527. paramanager.allocparaloc(list,cgpara1);
  1528. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  1529. paramanager.freeparaloc(list,cgpara1);
  1530. allocallcpuregisters(list);
  1531. a_call_name(list,decrfunc);
  1532. deallocallcpuregisters(list);
  1533. end
  1534. else
  1535. begin
  1536. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1537. paramanager.allocparaloc(list,cgpara2);
  1538. a_paramaddr_ref(list,href,cgpara2);
  1539. paramanager.allocparaloc(list,cgpara1);
  1540. a_paramaddr_ref(list,ref,cgpara1);
  1541. paramanager.freeparaloc(list,cgpara1);
  1542. paramanager.freeparaloc(list,cgpara2);
  1543. allocallcpuregisters(list);
  1544. a_call_name(list,'FPC_DECREF');
  1545. deallocallcpuregisters(list);
  1546. end;
  1547. cgpara2.done;
  1548. cgpara1.done;
  1549. end;
  1550. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  1551. var
  1552. href : treference;
  1553. cgpara1,cgpara2 : TCGPara;
  1554. begin
  1555. cgpara1.init;
  1556. cgpara2.init;
  1557. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1558. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1559. if is_ansistring(t) or
  1560. is_widestring(t) or
  1561. is_interfacecom(t) or
  1562. is_dynamic_array(t) then
  1563. a_load_const_ref(list,OS_ADDR,0,ref)
  1564. else
  1565. begin
  1566. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1567. paramanager.allocparaloc(list,cgpara2);
  1568. a_paramaddr_ref(list,href,cgpara2);
  1569. paramanager.allocparaloc(list,cgpara1);
  1570. a_paramaddr_ref(list,ref,cgpara1);
  1571. paramanager.freeparaloc(list,cgpara1);
  1572. paramanager.freeparaloc(list,cgpara2);
  1573. allocallcpuregisters(list);
  1574. a_call_name(list,'FPC_INITIALIZE');
  1575. deallocallcpuregisters(list);
  1576. end;
  1577. cgpara1.done;
  1578. cgpara2.done;
  1579. end;
  1580. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  1581. var
  1582. href : treference;
  1583. cgpara1,cgpara2 : TCGPara;
  1584. begin
  1585. cgpara1.init;
  1586. cgpara2.init;
  1587. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1588. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1589. if is_ansistring(t) or
  1590. is_widestring(t) or
  1591. is_interfacecom(t) then
  1592. begin
  1593. g_decrrefcount(list,t,ref);
  1594. a_load_const_ref(list,OS_ADDR,0,ref);
  1595. end
  1596. else
  1597. begin
  1598. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1599. paramanager.allocparaloc(list,cgpara2);
  1600. a_paramaddr_ref(list,href,cgpara2);
  1601. paramanager.allocparaloc(list,cgpara1);
  1602. a_paramaddr_ref(list,ref,cgpara1);
  1603. paramanager.freeparaloc(list,cgpara1);
  1604. paramanager.freeparaloc(list,cgpara2);
  1605. allocallcpuregisters(list);
  1606. a_call_name(list,'FPC_FINALIZE');
  1607. deallocallcpuregisters(list);
  1608. end;
  1609. cgpara1.done;
  1610. cgpara2.done;
  1611. end;
  1612. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  1613. { generate range checking code for the value at location p. The type }
  1614. { type used is checked against todefs ranges. fromdef (p.resulttype.def) }
  1615. { is the original type used at that location. When both defs are equal }
  1616. { the check is also insert (needed for succ,pref,inc,dec) }
  1617. const
  1618. aintmax=high(aint);
  1619. var
  1620. neglabel : tasmlabel;
  1621. hreg : tregister;
  1622. lto,hto,
  1623. lfrom,hfrom : TConstExprInt;
  1624. fromsize, tosize: cardinal;
  1625. from_signed, to_signed: boolean;
  1626. begin
  1627. { range checking on and range checkable value? }
  1628. if not(cs_check_range in aktlocalswitches) or
  1629. not(fromdef.deftype in [orddef,enumdef]) then
  1630. exit;
  1631. {$ifndef cpu64bit}
  1632. { handle 64bit rangechecks separate for 32bit processors }
  1633. if is_64bit(fromdef) or is_64bit(todef) then
  1634. begin
  1635. cg64.g_rangecheck64(list,l,fromdef,todef);
  1636. exit;
  1637. end;
  1638. {$endif cpu64bit}
  1639. { only check when assigning to scalar, subranges are different, }
  1640. { when todef=fromdef then the check is always generated }
  1641. getrange(fromdef,lfrom,hfrom);
  1642. getrange(todef,lto,hto);
  1643. from_signed := is_signed(fromdef);
  1644. to_signed := is_signed(todef);
  1645. { check the rangetype of the array, not the array itself }
  1646. { (only change now, since getrange needs the arraydef) }
  1647. if (todef.deftype = arraydef) then
  1648. todef := tarraydef(todef).rangetype.def;
  1649. { no range check if from and to are equal and are both longint/dword }
  1650. { no range check if from and to are equal and are both longint/dword }
  1651. { (if we have a 32bit processor) or int64/qword, since such }
  1652. { operations can at most cause overflows (JM) }
  1653. { Note that these checks are mostly processor independent, they only }
  1654. { have to be changed once we introduce 64bit subrange types }
  1655. {$ifdef cpu64bit}
  1656. if (fromdef = todef) and
  1657. (fromdef.deftype=orddef) and
  1658. (((((torddef(fromdef).typ = s64bit) and
  1659. (lfrom = low(int64)) and
  1660. (hfrom = high(int64))) or
  1661. ((torddef(fromdef).typ = u64bit) and
  1662. (lfrom = low(qword)) and
  1663. (hfrom = high(qword))) or
  1664. ((torddef(fromdef).typ = scurrency) and
  1665. (lfrom = low(int64)) and
  1666. (hfrom = high(int64)))))) then
  1667. exit;
  1668. {$else cpu64bit}
  1669. if (fromdef = todef) and
  1670. (fromdef.deftype=orddef) and
  1671. (((((torddef(fromdef).typ = s32bit) and
  1672. (lfrom = low(longint)) and
  1673. (hfrom = high(longint))) or
  1674. ((torddef(fromdef).typ = u32bit) and
  1675. (lfrom = low(cardinal)) and
  1676. (hfrom = high(cardinal)))))) then
  1677. exit;
  1678. {$endif cpu64bit}
  1679. { optimize some range checks away in safe cases }
  1680. fromsize := fromdef.size;
  1681. tosize := todef.size;
  1682. if ((from_signed = to_signed) or
  1683. (not from_signed)) and
  1684. (lto<=lfrom) and (hto>=hfrom) and
  1685. (fromsize <= tosize) then
  1686. begin
  1687. { if fromsize < tosize, and both have the same signed-ness or }
  1688. { fromdef is unsigned, then all bit patterns from fromdef are }
  1689. { valid for todef as well }
  1690. if (fromsize < tosize) then
  1691. exit;
  1692. if (fromsize = tosize) and
  1693. (from_signed = to_signed) then
  1694. { only optimize away if all bit patterns which fit in fromsize }
  1695. { are valid for the todef }
  1696. begin
  1697. {$ifopt Q+}
  1698. {$define overflowon}
  1699. {$Q-}
  1700. {$endif}
  1701. if to_signed then
  1702. begin
  1703. { calculation of the low/high ranges must not overflow 64 bit
  1704. otherwise we end up comparing with zero for 64 bit data types on
  1705. 64 bit processors }
  1706. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  1707. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  1708. exit
  1709. end
  1710. else
  1711. begin
  1712. { calculation of the low/high ranges must not overflow 64 bit
  1713. otherwise we end up having all zeros for 64 bit data types on
  1714. 64 bit processors }
  1715. if (lto = 0) and
  1716. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  1717. exit
  1718. end;
  1719. {$ifdef overflowon}
  1720. {$Q+}
  1721. {$undef overflowon}
  1722. {$endif}
  1723. end
  1724. end;
  1725. { generate the rangecheck code for the def where we are going to }
  1726. { store the result }
  1727. { use the trick that }
  1728. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  1729. { To be able to do that, we have to make sure however that either }
  1730. { fromdef and todef are both signed or unsigned, or that we leave }
  1731. { the parts < 0 and > maxlongint out }
  1732. if from_signed xor to_signed then
  1733. begin
  1734. if from_signed then
  1735. { from is signed, to is unsigned }
  1736. begin
  1737. { if high(from) < 0 -> always range error }
  1738. if (hfrom < 0) or
  1739. { if low(to) > maxlongint also range error }
  1740. (lto > aintmax) then
  1741. begin
  1742. a_call_name(list,'FPC_RANGEERROR');
  1743. exit
  1744. end;
  1745. { from is signed and to is unsigned -> when looking at to }
  1746. { as an signed value, it must be < maxaint (otherwise }
  1747. { it will become negative, which is invalid since "to" is unsigned) }
  1748. if hto > aintmax then
  1749. hto := aintmax;
  1750. end
  1751. else
  1752. { from is unsigned, to is signed }
  1753. begin
  1754. if (lfrom > aintmax) or
  1755. (hto < 0) then
  1756. begin
  1757. a_call_name(list,'FPC_RANGEERROR');
  1758. exit
  1759. end;
  1760. { from is unsigned and to is signed -> when looking at to }
  1761. { as an unsigned value, it must be >= 0 (since negative }
  1762. { values are the same as values > maxlongint) }
  1763. if lto < 0 then
  1764. lto := 0;
  1765. end;
  1766. end;
  1767. hreg:=getintregister(list,OS_INT);
  1768. a_load_loc_reg(list,OS_INT,l,hreg);
  1769. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  1770. current_asmdata.getjumplabel(neglabel);
  1771. {
  1772. if from_signed then
  1773. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  1774. else
  1775. }
  1776. {$ifdef cpu64bit}
  1777. if qword(hto-lto)>qword(aintmax) then
  1778. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  1779. else
  1780. {$endif cpu64bit}
  1781. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  1782. a_call_name(list,'FPC_RANGEERROR');
  1783. a_label(list,neglabel);
  1784. end;
  1785. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  1786. begin
  1787. g_overflowCheck(list,loc,def);
  1788. end;
  1789. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  1790. var
  1791. tmpreg : tregister;
  1792. begin
  1793. tmpreg:=getintregister(list,size);
  1794. g_flags2reg(list,size,f,tmpreg);
  1795. a_load_reg_ref(list,size,size,tmpreg,ref);
  1796. end;
  1797. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  1798. var
  1799. OKLabel : tasmlabel;
  1800. cgpara1 : TCGPara;
  1801. begin
  1802. if (cs_check_object in aktlocalswitches) or
  1803. (cs_check_range in aktlocalswitches) then
  1804. begin
  1805. current_asmdata.getjumplabel(oklabel);
  1806. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  1807. cgpara1.init;
  1808. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1809. paramanager.allocparaloc(list,cgpara1);
  1810. a_param_const(list,OS_INT,210,cgpara1);
  1811. paramanager.freeparaloc(list,cgpara1);
  1812. a_call_name(list,'FPC_HANDLEERROR');
  1813. a_label(list,oklabel);
  1814. cgpara1.done;
  1815. end;
  1816. end;
  1817. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  1818. var
  1819. hrefvmt : treference;
  1820. cgpara1,cgpara2 : TCGPara;
  1821. begin
  1822. cgpara1.init;
  1823. cgpara2.init;
  1824. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1825. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1826. if (cs_check_object in aktlocalswitches) then
  1827. begin
  1828. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  1829. paramanager.allocparaloc(list,cgpara2);
  1830. a_paramaddr_ref(list,hrefvmt,cgpara2);
  1831. paramanager.allocparaloc(list,cgpara1);
  1832. a_param_reg(list,OS_ADDR,reg,cgpara1);
  1833. paramanager.freeparaloc(list,cgpara1);
  1834. paramanager.freeparaloc(list,cgpara2);
  1835. allocallcpuregisters(list);
  1836. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  1837. deallocallcpuregisters(list);
  1838. end
  1839. else
  1840. if (cs_check_range in aktlocalswitches) then
  1841. begin
  1842. paramanager.allocparaloc(list,cgpara1);
  1843. a_param_reg(list,OS_ADDR,reg,cgpara1);
  1844. paramanager.freeparaloc(list,cgpara1);
  1845. allocallcpuregisters(list);
  1846. a_call_name(list,'FPC_CHECK_OBJECT');
  1847. deallocallcpuregisters(list);
  1848. end;
  1849. cgpara1.done;
  1850. cgpara2.done;
  1851. end;
  1852. {*****************************************************************************
  1853. Entry/Exit Code Functions
  1854. *****************************************************************************}
  1855. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  1856. var
  1857. sizereg,sourcereg,lenreg : tregister;
  1858. cgpara1,cgpara2,cgpara3 : TCGPara;
  1859. begin
  1860. { because some abis don't support dynamic stack allocation properly
  1861. open array value parameters are copied onto the heap
  1862. }
  1863. { calculate necessary memory }
  1864. { read/write operations on one register make the life of the register allocator hard }
  1865. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  1866. begin
  1867. lenreg:=getintregister(list,OS_INT);
  1868. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  1869. end
  1870. else
  1871. lenreg:=lenloc.register;
  1872. sizereg:=getintregister(list,OS_INT);
  1873. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  1874. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  1875. { load source }
  1876. sourcereg:=getaddressregister(list);
  1877. a_loadaddr_ref_reg(list,ref,sourcereg);
  1878. { do getmem call }
  1879. cgpara1.init;
  1880. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1881. paramanager.allocparaloc(list,cgpara1);
  1882. a_param_reg(list,OS_INT,sizereg,cgpara1);
  1883. paramanager.freeparaloc(list,cgpara1);
  1884. allocallcpuregisters(list);
  1885. a_call_name(list,'FPC_GETMEM');
  1886. deallocallcpuregisters(list);
  1887. cgpara1.done;
  1888. { return the new address }
  1889. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  1890. { do move call }
  1891. cgpara1.init;
  1892. cgpara2.init;
  1893. cgpara3.init;
  1894. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1895. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1896. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1897. { load size }
  1898. paramanager.allocparaloc(list,cgpara3);
  1899. a_param_reg(list,OS_INT,sizereg,cgpara3);
  1900. { load destination }
  1901. paramanager.allocparaloc(list,cgpara2);
  1902. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  1903. { load source }
  1904. paramanager.allocparaloc(list,cgpara1);
  1905. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  1906. paramanager.freeparaloc(list,cgpara3);
  1907. paramanager.freeparaloc(list,cgpara2);
  1908. paramanager.freeparaloc(list,cgpara1);
  1909. allocallcpuregisters(list);
  1910. a_call_name(list,'FPC_MOVE');
  1911. deallocallcpuregisters(list);
  1912. cgpara3.done;
  1913. cgpara2.done;
  1914. cgpara1.done;
  1915. end;
  1916. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  1917. var
  1918. cgpara1 : TCGPara;
  1919. begin
  1920. { do move call }
  1921. cgpara1.init;
  1922. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1923. { load source }
  1924. paramanager.allocparaloc(list,cgpara1);
  1925. a_param_loc(list,l,cgpara1);
  1926. paramanager.freeparaloc(list,cgpara1);
  1927. allocallcpuregisters(list);
  1928. a_call_name(list,'FPC_FREEMEM');
  1929. deallocallcpuregisters(list);
  1930. cgpara1.done;
  1931. end;
  1932. procedure tcg.g_save_standard_registers(list:TAsmList);
  1933. var
  1934. href : treference;
  1935. size : longint;
  1936. r : integer;
  1937. begin
  1938. { Get temp }
  1939. size:=0;
  1940. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1941. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1942. inc(size,sizeof(aint));
  1943. if size>0 then
  1944. begin
  1945. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  1946. { Copy registers to temp }
  1947. href:=current_procinfo.save_regs_ref;
  1948. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1949. begin
  1950. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1951. begin
  1952. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  1953. inc(href.offset,sizeof(aint));
  1954. end;
  1955. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  1956. end;
  1957. end;
  1958. end;
  1959. procedure tcg.g_restore_standard_registers(list:TAsmList);
  1960. var
  1961. href : treference;
  1962. r : integer;
  1963. hreg : tregister;
  1964. begin
  1965. { Copy registers from temp }
  1966. href:=current_procinfo.save_regs_ref;
  1967. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1968. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1969. begin
  1970. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  1971. { Allocate register so the optimizer does not remove the load }
  1972. a_reg_alloc(list,hreg);
  1973. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  1974. inc(href.offset,sizeof(aint));
  1975. end;
  1976. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  1977. end;
  1978. procedure tcg.g_profilecode(list : TAsmList);
  1979. begin
  1980. end;
  1981. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  1982. begin
  1983. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  1984. end;
  1985. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  1986. begin
  1987. a_load_const_ref(list, OS_INT, a, href);
  1988. end;
  1989. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  1990. begin
  1991. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  1992. end;
  1993. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  1994. var
  1995. hsym : tsym;
  1996. href : treference;
  1997. paraloc : tcgparalocation;
  1998. begin
  1999. { calculate the parameter info for the procdef }
  2000. if not procdef.has_paraloc_info then
  2001. begin
  2002. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  2003. procdef.has_paraloc_info:=true;
  2004. end;
  2005. hsym:=tsym(procdef.parast.search('self'));
  2006. if not(assigned(hsym) and
  2007. (hsym.typ=paravarsym)) then
  2008. internalerror(200305251);
  2009. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  2010. case paraloc.loc of
  2011. LOC_REGISTER:
  2012. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  2013. LOC_REFERENCE:
  2014. begin
  2015. { offset in the wrapper needs to be adjusted for the stored
  2016. return address }
  2017. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  2018. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  2019. end
  2020. else
  2021. internalerror(200309189);
  2022. end;
  2023. end;
  2024. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  2025. begin
  2026. a_call_name(list,s);
  2027. end;
  2028. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  2029. var
  2030. l: tasmsymbol;
  2031. ref: treference;
  2032. begin
  2033. result := NR_NO;
  2034. case target_info.system of
  2035. system_powerpc_darwin,
  2036. system_i386_darwin:
  2037. begin
  2038. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  2039. if not(assigned(l)) then
  2040. begin
  2041. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_COMMON,AT_DATA);
  2042. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  2043. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  2044. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  2045. end;
  2046. result := cg.getaddressregister(list);
  2047. reference_reset_symbol(ref,l,0);
  2048. { ref.base:=current_procinfo.got;
  2049. ref.relsymbol:=current_procinfo.CurrGOTLabel;}
  2050. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  2051. end;
  2052. end;
  2053. end;
  2054. {*****************************************************************************
  2055. TCG64
  2056. *****************************************************************************}
  2057. {$ifndef cpu64bit}
  2058. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  2059. begin
  2060. a_load64_reg_reg(list,regsrc,regdst);
  2061. a_op64_const_reg(list,op,size,value,regdst);
  2062. end;
  2063. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  2064. var
  2065. tmpreg64 : tregister64;
  2066. begin
  2067. { when src1=dst then we need to first create a temp to prevent
  2068. overwriting src1 with src2 }
  2069. if (regsrc1.reghi=regdst.reghi) or
  2070. (regsrc1.reglo=regdst.reghi) or
  2071. (regsrc1.reghi=regdst.reglo) or
  2072. (regsrc1.reglo=regdst.reglo) then
  2073. begin
  2074. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2075. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2076. a_load64_reg_reg(list,regsrc2,tmpreg64);
  2077. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  2078. a_load64_reg_reg(list,tmpreg64,regdst);
  2079. end
  2080. else
  2081. begin
  2082. a_load64_reg_reg(list,regsrc2,regdst);
  2083. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  2084. end;
  2085. end;
  2086. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2087. begin
  2088. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  2089. ovloc.loc:=LOC_VOID;
  2090. end;
  2091. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2092. begin
  2093. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  2094. ovloc.loc:=LOC_VOID;
  2095. end;
  2096. {$endif cpu64bit}
  2097. initialization
  2098. ;
  2099. finalization
  2100. cg.free;
  2101. {$ifndef cpu64bit}
  2102. cg64.free;
  2103. {$endif cpu64bit}
  2104. end.