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aasmcpu.pas
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3e963a49e2
Added support for IT block merging
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13 years ago |
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agarmgas.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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aoptcpu.pas
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3558a40bf6
Fixed flags detections code for wide->short optimization code for Thumb-2
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13 years ago |
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aoptcpub.pas
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7e5b8584cf
* set MaxOps to 4 for the optimizer because fpc generates now mla instructions
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13 years ago |
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aoptcpuc.pas
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790a4fe2d3
* log and id tags removed
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20 years ago |
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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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20 years ago |
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armatt.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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armatts.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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armins.dat
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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armnop.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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armop.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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armreg.dat
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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armtab.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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cgcpu.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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cpubase.pas
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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cpuinfo.pas
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84ea70fddc
Fixed some minor formating issues
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13 years ago |
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cpunode.pas
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638d0d49c0
+ take advantage of the mla instruction when calculating array offsets
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13 years ago |
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cpupara.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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cpupi.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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cputarg.pas
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afa14de20d
+ some generic changes preparing for darwin/arm support
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17 years ago |
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hlcgcpu.pas
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72e9cfee24
* create/destroy also the high level code generator for all architectures,
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14 years ago |
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itcpugas.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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narmadd.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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narmcal.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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narmcnv.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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narmcon.pas
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0d57bba4c9
* fixed ARM and MIPS compilation after r14912
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15 years ago |
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narminl.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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narmmat.pas
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a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
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13 years ago |
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narmmem.pas
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638d0d49c0
+ take advantage of the mla instruction when calculating array offsets
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13 years ago |
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narmset.pas
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45383fd32d
+ a lot missing flag allocs/deallocs added
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13 years ago |
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pp.lpi.template
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1f032375c3
* improved template with help from Mattias Gaertner
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19 years ago |
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raarm.pas
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780e75bfac
o patch by Jeppe Johansen to fix mantis #17472:
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14 years ago |
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raarmgas.pas
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rarmcon.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rarmdwa.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rarmnor.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rarmnum.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rarmrni.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rarmsri.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rarmsta.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rarmstd.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rarmsup.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 years ago |
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rgcpu.pas
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3e963a49e2
Added support for IT block merging
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13 years ago |
Jeppe Johansen
3558a40bf6
Fixed flags detections code for wide->short optimization code for Thumb-2