cgobj.pas 190 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439
  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. tindsymflag = (is_data,is_weak);
  39. tindsymflags = set of tindsymflag;
  40. {# @abstract(Abstract code generator)
  41. This class implements an abstract instruction generator. Some of
  42. the methods of this class are generic, while others must
  43. be overridden for all new processors which will be supported
  44. by Free Pascal. For 32-bit processors, the base class
  45. should be @link(tcg64f32) and not @var(tcg).
  46. }
  47. tcg = class
  48. public
  49. { how many times is this current code executed }
  50. executionweight : longint;
  51. alignment : talignment;
  52. rg : array[tregistertype] of trgobj;
  53. {$ifdef flowgraph}
  54. aktflownode:word;
  55. {$endif}
  56. {************************************************}
  57. { basic routines }
  58. constructor create;
  59. {# Initialize the register allocators needed for the codegenerator.}
  60. procedure init_register_allocators;virtual;
  61. {# Clean up the register allocators needed for the codegenerator.}
  62. procedure done_register_allocators;virtual;
  63. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  64. procedure set_regalloc_live_range_direction(dir: TRADirection);
  65. {$ifdef flowgraph}
  66. procedure init_flowgraph;
  67. procedure done_flowgraph;
  68. {$endif}
  69. {# Gets a register suitable to do integer operations on.}
  70. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. {# Gets a register suitable to do integer operations on.}
  72. function getaddressregister(list:TAsmList):Tregister;virtual;
  73. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  74. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  75. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  76. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  77. the cpu specific child cg object have such a method?}
  78. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  79. procedure add_move_instruction(instr:Taicpu);virtual;
  80. function uses_registers(rt:Tregistertype):boolean;virtual;
  81. {# Get a specific register.}
  82. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  83. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  84. {# Get multiple registers specified.}
  85. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  86. {# Free multiple registers specified.}
  87. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  88. procedure allocallcpuregisters(list:TAsmList);virtual;
  89. procedure deallocallcpuregisters(list:TAsmList);virtual;
  90. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  91. procedure translate_register(var reg : tregister);
  92. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  93. {# Emit a label to the instruction stream. }
  94. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  95. {# Allocates register r by inserting a pai_realloc record }
  96. procedure a_reg_alloc(list : TAsmList;r : tregister);
  97. {# Deallocates register r by inserting a pa_regdealloc record}
  98. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  99. { Synchronize register, make sure it is still valid }
  100. procedure a_reg_sync(list : TAsmList;r : tregister);
  101. {# Pass a parameter, which is located in a register, to a routine.
  102. This routine should push/send the parameter to the routine, as
  103. required by the specific processor ABI and routine modifiers.
  104. It must generate register allocation information for the cgpara in
  105. case it consists of cpuregisters.
  106. @param(size size of the operand in the register)
  107. @param(r register source of the operand)
  108. @param(cgpara where the parameter will be stored)
  109. }
  110. procedure a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  111. {# Pass a parameter, which is a constant, to a routine.
  112. A generic version is provided. This routine should
  113. be overridden for optimization purposes if the cpu
  114. permits directly sending this type of parameter.
  115. It must generate register allocation information for the cgpara in
  116. case it consists of cpuregisters.
  117. @param(size size of the operand in constant)
  118. @param(a value of constant to send)
  119. @param(cgpara where the parameter will be stored)
  120. }
  121. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : TCGPara);virtual;
  122. {# Pass the value of a parameter, which is located in memory, to a routine.
  123. A generic version is provided. This routine should
  124. be overridden for optimization purposes if the cpu
  125. permits directly sending this type of parameter.
  126. It must generate register allocation information for the cgpara in
  127. case it consists of cpuregisters.
  128. @param(size size of the operand in constant)
  129. @param(r Memory reference of value to send)
  130. @param(cgpara where the parameter will be stored)
  131. }
  132. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  133. {# Pass the value of a parameter, which can be located either in a register or memory location,
  134. to a routine.
  135. A generic version is provided.
  136. @param(l location of the operand to send)
  137. @param(nr parameter number (starting from one) of routine (from left to right))
  138. @param(cgpara where the parameter will be stored)
  139. }
  140. procedure a_load_loc_cgpara(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  141. {# Pass the address of a reference to a routine. This routine
  142. will calculate the address of the reference, and pass this
  143. calculated address as a parameter.
  144. It must generate register allocation information for the cgpara in
  145. case it consists of cpuregisters.
  146. A generic version is provided. This routine should
  147. be overridden for optimization purposes if the cpu
  148. permits directly sending this type of parameter.
  149. @param(r reference to get address from)
  150. @param(nr parameter number (starting from one) of routine (from left to right))
  151. }
  152. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  153. {# Load a cgparaloc into a memory reference.
  154. It must generate register allocation information for the cgpara in
  155. case it consists of cpuregisters.
  156. @param(paraloc the source parameter sublocation)
  157. @param(ref the destination reference)
  158. @param(sizeleft indicates the total number of bytes left in all of
  159. the remaining sublocations of this parameter (the current
  160. sublocation and all of the sublocations coming after it).
  161. In case this location is also a reference, it is assumed
  162. to be the final part sublocation of the parameter and that it
  163. contains all of the "sizeleft" bytes).)
  164. @param(align the alignment of the paraloc in case it's a reference)
  165. }
  166. procedure a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : tcgint;align : longint);
  167. {# Load a cgparaloc into any kind of register (int, fp, mm).
  168. @param(regsize the size of the destination register)
  169. @param(paraloc the source parameter sublocation)
  170. @param(reg the destination register)
  171. @param(align the alignment of the paraloc in case it's a reference)
  172. }
  173. procedure a_load_cgparaloc_anyreg(list : TAsmList;regsize : tcgsize;const paraloc : TCGParaLocation;reg : tregister;align : longint);
  174. { Remarks:
  175. * If a method specifies a size you have only to take care
  176. of that number of bits, i.e. load_const_reg with OP_8 must
  177. only load the lower 8 bit of the specified register
  178. the rest of the register can be undefined
  179. if necessary the compiler will call a method
  180. to zero or sign extend the register
  181. * The a_load_XX_XX with OP_64 needn't to be
  182. implemented for 32 bit
  183. processors, the code generator takes care of that
  184. * the addr size is for work with the natural pointer
  185. size
  186. * the procedures without fpu/mm are only for integer usage
  187. * normally the first location is the source and the
  188. second the destination
  189. }
  190. {# Emits instruction to call the method specified by symbol name.
  191. This routine must be overridden for each new target cpu.
  192. }
  193. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  194. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  195. procedure a_call_ref(list : TAsmList;ref : treference);virtual;
  196. { same as a_call_name, might be overridden on certain architectures to emit
  197. static calls without usage of a got trampoline }
  198. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  199. { move instructions }
  200. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : tcgint;register : tregister);virtual; abstract;
  201. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : tcgint;const ref : treference);virtual;
  202. procedure a_load_const_loc(list : TAsmList;a : tcgint;const loc : tlocation);
  203. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  204. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  205. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  206. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  207. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  208. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  209. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  210. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  211. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  212. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  213. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  214. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  215. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  216. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  217. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  218. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  219. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  220. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: tcgint; const sreg: tsubsetregister); virtual;
  221. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  222. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  223. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  224. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  225. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  226. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  227. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: tcgint; const sref: tsubsetreference); virtual;
  228. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  229. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  230. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  231. { bit test instructions }
  232. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  233. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: tcgint; const ref: treference; destreg: tregister); virtual;
  234. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: tcgint; setreg, destreg: tregister); virtual;
  235. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: tcgint; const setreg: tsubsetregister; destreg: tregister); virtual;
  236. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  237. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  238. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: tcgint; const loc: tlocation; destreg: tregister);
  239. { bit set/clear instructions }
  240. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  241. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: tcgint; const ref: treference); virtual;
  242. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: tcgint; destreg: tregister); virtual;
  243. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: tcgint; const destreg: tsubsetregister); virtual;
  244. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  245. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  246. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: tcgint; const loc: tlocation);
  247. { bit scan instructions }
  248. procedure a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: tcgsize; src, dst: TRegister); virtual; abstract;
  249. { fpu move instructions }
  250. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  251. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  252. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  253. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  254. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  255. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  256. procedure a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  257. procedure a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  258. { vector register move instructions }
  259. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  260. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  261. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  262. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  263. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  264. procedure a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  265. procedure a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  266. procedure a_loadmm_loc_cgpara(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  267. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  268. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  269. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  270. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  271. procedure a_loadmm_intreg_reg(list: TAsmList; fromsize, tosize : tcgsize; intreg, mmreg: tregister; shuffle: pmmshuffle); virtual;
  272. procedure a_loadmm_reg_intreg(list: TAsmList; fromsize, tosize : tcgsize; mmreg, intreg: tregister; shuffle : pmmshuffle); virtual;
  273. { basic arithmetic operations }
  274. { note: for operators which require only one argument (not, neg), use }
  275. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  276. { that in this case the *second* operand is used as both source and }
  277. { destination (JM) }
  278. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); virtual; abstract;
  279. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; const ref: TReference); virtual;
  280. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : tcgint; const sreg: tsubsetregister); virtual;
  281. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : tcgint; const sref: tsubsetreference); virtual;
  282. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: tcgint; const loc: tlocation);
  283. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  284. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  285. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  286. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  287. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  288. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  289. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  290. { trinary operations for processors that support them, 'emulated' }
  291. { on others. None with "ref" arguments since I don't think there }
  292. { are any processors that support it (JM) }
  293. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister); virtual;
  294. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  295. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  296. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  297. { comparison operations }
  298. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  299. l : tasmlabel); virtual;
  300. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const ref : treference;
  301. l : tasmlabel); virtual;
  302. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: tcgint; const loc: tlocation;
  303. l : tasmlabel);
  304. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  305. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  306. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  307. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  308. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  309. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  310. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  311. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  312. l : tasmlabel);
  313. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  314. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  315. {$ifdef cpuflags}
  316. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  317. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  318. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  319. }
  320. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  321. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  322. {$endif cpuflags}
  323. {
  324. This routine tries to optimize the op_const_reg/ref opcode, and should be
  325. called at the start of a_op_const_reg/ref. It returns the actual opcode
  326. to emit, and the constant value to emit. This function can opcode OP_NONE to
  327. remove the opcode and OP_MOVE to replace it with a simple load
  328. @param(op The opcode to emit, returns the opcode which must be emitted)
  329. @param(a The constant which should be emitted, returns the constant which must
  330. be emitted)
  331. }
  332. procedure optimize_op_const(var op: topcg; var a : tcgint);virtual;
  333. {#
  334. This routine is used in exception management nodes. It should
  335. save the exception reason currently in the FUNCTION_RETURN_REG. The
  336. save should be done either to a temp (pointed to by href).
  337. or on the stack (pushing the value on the stack).
  338. The size of the value to save is OS_S32. The default version
  339. saves the exception reason to a temp. memory area.
  340. }
  341. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  342. {#
  343. This routine is used in exception management nodes. It should
  344. save the exception reason constant. The
  345. save should be done either to a temp (pointed to by href).
  346. or on the stack (pushing the value on the stack).
  347. The size of the value to save is OS_S32. The default version
  348. saves the exception reason to a temp. memory area.
  349. }
  350. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: tcgint);virtual;
  351. {#
  352. This routine is used in exception management nodes. It should
  353. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  354. should either be in the temp. area (pointed to by href , href should
  355. *NOT* be freed) or on the stack (the value should be popped).
  356. The size of the value to save is OS_S32. The default version
  357. saves the exception reason to a temp. memory area.
  358. }
  359. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  360. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  361. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  362. {# This should emit the opcode to copy len bytes from the source
  363. to destination.
  364. It must be overridden for each new target processor.
  365. @param(source Source reference of copy)
  366. @param(dest Destination reference of copy)
  367. }
  368. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);virtual; abstract;
  369. {# This should emit the opcode to copy len bytes from the an unaligned source
  370. to destination.
  371. It must be overridden for each new target processor.
  372. @param(source Source reference of copy)
  373. @param(dest Destination reference of copy)
  374. }
  375. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : tcgint);virtual;
  376. {# This should emit the opcode to a shortrstring from the source
  377. to destination.
  378. @param(source Source reference of copy)
  379. @param(dest Destination reference of copy)
  380. }
  381. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  382. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  383. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  384. procedure g_array_rtti_helper(list: TAsmList; t: tdef; const ref: treference; const highloc: tlocation;
  385. const name: string);
  386. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  387. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  388. {# Generates range checking code. It is to note
  389. that this routine does not need to be overridden,
  390. as it takes care of everything.
  391. @param(p Node which contains the value to check)
  392. @param(todef Type definition of node to range check)
  393. }
  394. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  395. {# Generates overflow checking code for a node }
  396. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  397. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  398. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);virtual;
  399. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  400. {# Emits instructions when compilation is done in profile
  401. mode (this is set as a command line option). The default
  402. behavior does nothing, should be overridden as required.
  403. }
  404. procedure g_profilecode(list : TAsmList);virtual;
  405. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  406. @param(size Number of bytes to allocate)
  407. }
  408. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  409. {# Emits instruction for allocating the locals in entry
  410. code of a routine. This is one of the first
  411. routine called in @var(genentrycode).
  412. @param(localsize Number of bytes to allocate as locals)
  413. }
  414. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  415. {# Emits instructions for returning from a subroutine.
  416. Should also restore the framepointer and stack.
  417. @param(parasize Number of bytes of parameters to deallocate from stack)
  418. }
  419. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  420. {# This routine is called when generating the code for the entry point
  421. of a routine. It should save all registers which are not used in this
  422. routine, and which should be declared as saved in the std_saved_registers
  423. set.
  424. This routine is mainly used when linking to code which is generated
  425. by ABI-compliant compilers (like GCC), to make sure that the reserved
  426. registers of that ABI are not clobbered.
  427. @param(usedinproc Registers which are used in the code of this routine)
  428. }
  429. procedure g_save_registers(list:TAsmList);virtual;
  430. {# This routine is called when generating the code for the exit point
  431. of a routine. It should restore all registers which were previously
  432. saved in @var(g_save_standard_registers).
  433. @param(usedinproc Registers which are used in the code of this routine)
  434. }
  435. procedure g_restore_registers(list:TAsmList);virtual;
  436. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  437. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);virtual;
  438. function g_indirect_sym_load(list:TAsmList;const symname: string; const flags: tindsymflags): tregister;virtual;
  439. { generate a stub which only purpose is to pass control the given external method,
  440. setting up any additional environment before doing so (if required).
  441. The default implementation issues a jump instruction to the external name. }
  442. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  443. { initialize the pic/got register }
  444. procedure g_maybe_got_init(list: TAsmList); virtual;
  445. { allocallcpuregisters, a_call_name, deallocallcpuregisters sequence }
  446. procedure g_call(list: TAsmList; const s: string);
  447. { Generate code to exit an unwind-protected region. The default implementation
  448. produces a simple jump to destination label. }
  449. procedure g_local_unwind(list: TAsmList; l: TAsmLabel);virtual;
  450. protected
  451. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  452. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  453. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister); virtual;
  454. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  455. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  456. function get_bit_const_ref_sref(bitnumber: tcgint; const ref: treference): tsubsetreference;
  457. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: tcgint; setreg: tregister): tsubsetregister;
  458. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  459. end;
  460. {$ifndef cpu64bitalu}
  461. {# @abstract(Abstract code generator for 64 Bit operations)
  462. This class implements an abstract code generator class
  463. for 64 Bit operations.
  464. }
  465. tcg64 = class
  466. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  467. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  468. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  469. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  470. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  471. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  472. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  473. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  474. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  475. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  476. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  477. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  478. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  479. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  480. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  481. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  482. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  483. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  484. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  485. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  486. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  487. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  488. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  489. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  490. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  491. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  492. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  493. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  494. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  495. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  496. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  497. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  498. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  499. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  500. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  501. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  502. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  503. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  504. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  505. procedure a_load64_reg_cgpara(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  506. procedure a_load64_const_cgpara(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  507. procedure a_load64_ref_cgpara(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  508. procedure a_load64_loc_cgpara(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  509. procedure a_loadmm_intreg64_reg(list: TAsmList; mmsize: tcgsize; intreg: tregister64; mmreg: tregister); virtual;abstract;
  510. procedure a_loadmm_reg_intreg64(list: TAsmList; mmsize: tcgsize; mmreg: tregister; intreg: tregister64); virtual;abstract;
  511. {
  512. This routine tries to optimize the const_reg opcode, and should be
  513. called at the start of a_op64_const_reg. It returns the actual opcode
  514. to emit, and the constant value to emit. If this routine returns
  515. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  516. @param(op The opcode to emit, returns the opcode which must be emitted)
  517. @param(a The constant which should be emitted, returns the constant which must
  518. be emitted)
  519. @param(reg The register to emit the opcode with, returns the register with
  520. which the opcode will be emitted)
  521. }
  522. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  523. { override to catch 64bit rangechecks }
  524. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  525. end;
  526. {$endif cpu64bitalu}
  527. var
  528. {# Main code generator class }
  529. cg : tcg;
  530. {$ifndef cpu64bitalu}
  531. {# Code generator class for all operations working with 64-Bit operands }
  532. cg64 : tcg64;
  533. {$endif cpu64bitalu}
  534. function asmsym2indsymflags(sym: TAsmSymbol): tindsymflags;
  535. procedure destroy_codegen;
  536. implementation
  537. uses
  538. globals,options,systems,
  539. verbose,defutil,paramgr,symsym,
  540. tgobj,cutils,procinfo,
  541. ncgrtti;
  542. {*****************************************************************************
  543. basic functionallity
  544. ******************************************************************************}
  545. constructor tcg.create;
  546. begin
  547. end;
  548. {*****************************************************************************
  549. register allocation
  550. ******************************************************************************}
  551. procedure tcg.init_register_allocators;
  552. begin
  553. fillchar(rg,sizeof(rg),0);
  554. add_reg_instruction_hook:=@add_reg_instruction;
  555. executionweight:=1;
  556. end;
  557. procedure tcg.done_register_allocators;
  558. begin
  559. { Safety }
  560. fillchar(rg,sizeof(rg),0);
  561. add_reg_instruction_hook:=nil;
  562. end;
  563. {$ifdef flowgraph}
  564. procedure Tcg.init_flowgraph;
  565. begin
  566. aktflownode:=0;
  567. end;
  568. procedure Tcg.done_flowgraph;
  569. begin
  570. end;
  571. {$endif}
  572. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  573. begin
  574. if not assigned(rg[R_INTREGISTER]) then
  575. internalerror(200312122);
  576. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  577. end;
  578. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  579. begin
  580. if not assigned(rg[R_FPUREGISTER]) then
  581. internalerror(200312123);
  582. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  583. end;
  584. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  585. begin
  586. if not assigned(rg[R_MMREGISTER]) then
  587. internalerror(2003121214);
  588. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  589. end;
  590. function tcg.getaddressregister(list:TAsmList):Tregister;
  591. begin
  592. if assigned(rg[R_ADDRESSREGISTER]) then
  593. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  594. else
  595. begin
  596. if not assigned(rg[R_INTREGISTER]) then
  597. internalerror(200312121);
  598. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  599. end;
  600. end;
  601. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  602. var
  603. subreg:Tsubregister;
  604. begin
  605. subreg:=cgsize2subreg(getregtype(reg),size);
  606. result:=reg;
  607. setsubreg(result,subreg);
  608. { notify RA }
  609. if result<>reg then
  610. list.concat(tai_regalloc.resize(result));
  611. end;
  612. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  613. begin
  614. if not assigned(rg[getregtype(r)]) then
  615. internalerror(200312125);
  616. rg[getregtype(r)].getcpuregister(list,r);
  617. end;
  618. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  619. begin
  620. if not assigned(rg[getregtype(r)]) then
  621. internalerror(200312126);
  622. rg[getregtype(r)].ungetcpuregister(list,r);
  623. end;
  624. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  625. begin
  626. if assigned(rg[rt]) then
  627. rg[rt].alloccpuregisters(list,r)
  628. else
  629. internalerror(200310092);
  630. end;
  631. procedure tcg.allocallcpuregisters(list:TAsmList);
  632. begin
  633. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  634. {$if not(defined(i386)) and not(defined(avr))}
  635. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  636. {$ifdef cpumm}
  637. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  638. {$endif cpumm}
  639. {$endif not(defined(i386)) and not(defined(avr))}
  640. end;
  641. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  642. begin
  643. if assigned(rg[rt]) then
  644. rg[rt].dealloccpuregisters(list,r)
  645. else
  646. internalerror(200310093);
  647. end;
  648. procedure tcg.deallocallcpuregisters(list:TAsmList);
  649. begin
  650. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  651. {$if not(defined(i386)) and not(defined(avr))}
  652. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  653. {$ifdef cpumm}
  654. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  655. {$endif cpumm}
  656. {$endif not(defined(i386)) and not(defined(avr))}
  657. end;
  658. function tcg.uses_registers(rt:Tregistertype):boolean;
  659. begin
  660. if assigned(rg[rt]) then
  661. result:=rg[rt].uses_registers
  662. else
  663. result:=false;
  664. end;
  665. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  666. var
  667. rt : tregistertype;
  668. begin
  669. rt:=getregtype(r);
  670. { Only add it when a register allocator is configured.
  671. No IE can be generated, because the VMT is written
  672. without a valid rg[] }
  673. if assigned(rg[rt]) then
  674. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  675. end;
  676. procedure tcg.add_move_instruction(instr:Taicpu);
  677. var
  678. rt : tregistertype;
  679. begin
  680. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  681. if assigned(rg[rt]) then
  682. rg[rt].add_move_instruction(instr)
  683. else
  684. internalerror(200310095);
  685. end;
  686. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  687. var
  688. rt : tregistertype;
  689. begin
  690. for rt:=low(rg) to high(rg) do
  691. begin
  692. if assigned(rg[rt]) then
  693. rg[rt].live_range_direction:=dir;
  694. end;
  695. end;
  696. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  697. var
  698. rt : tregistertype;
  699. begin
  700. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  701. begin
  702. if assigned(rg[rt]) then
  703. rg[rt].do_register_allocation(list,headertai);
  704. end;
  705. { running the other register allocator passes could require addition int/addr. registers
  706. when spilling so run int/addr register allocation at the end }
  707. if assigned(rg[R_INTREGISTER]) then
  708. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  709. if assigned(rg[R_ADDRESSREGISTER]) then
  710. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  711. end;
  712. procedure tcg.translate_register(var reg : tregister);
  713. begin
  714. rg[getregtype(reg)].translate_register(reg);
  715. end;
  716. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  717. begin
  718. list.concat(tai_regalloc.alloc(r,nil));
  719. end;
  720. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  721. begin
  722. list.concat(tai_regalloc.dealloc(r,nil));
  723. end;
  724. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  725. var
  726. instr : tai;
  727. begin
  728. instr:=tai_regalloc.sync(r);
  729. list.concat(instr);
  730. add_reg_instruction(instr,r);
  731. end;
  732. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  733. begin
  734. list.concat(tai_label.create(l));
  735. end;
  736. {*****************************************************************************
  737. for better code generation these methods should be overridden
  738. ******************************************************************************}
  739. procedure tcg.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  740. var
  741. ref : treference;
  742. begin
  743. cgpara.check_simple_location;
  744. paramanager.alloccgpara(list,cgpara);
  745. if cgpara.location^.shiftval<0 then
  746. a_op_const_reg(list,OP_SHL,cgpara.location^.size,-cgpara.location^.shiftval,r);
  747. case cgpara.location^.loc of
  748. LOC_REGISTER,LOC_CREGISTER:
  749. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  750. LOC_REFERENCE,LOC_CREFERENCE:
  751. begin
  752. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  753. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  754. end;
  755. LOC_MMREGISTER,LOC_CMMREGISTER:
  756. a_loadmm_intreg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register,mms_movescalar);
  757. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  758. begin
  759. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  760. a_load_reg_ref(list,size,size,r,ref);
  761. a_loadfpu_ref_cgpara(list,cgpara.location^.size,ref,cgpara);
  762. tg.Ungettemp(list,ref);
  763. end
  764. else
  765. internalerror(2002071004);
  766. end;
  767. end;
  768. procedure tcg.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : TCGPara);
  769. var
  770. ref : treference;
  771. begin
  772. cgpara.check_simple_location;
  773. paramanager.alloccgpara(list,cgpara);
  774. case cgpara.location^.loc of
  775. LOC_REGISTER,LOC_CREGISTER:
  776. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  777. LOC_REFERENCE,LOC_CREFERENCE:
  778. begin
  779. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  780. a_load_const_ref(list,cgpara.location^.size,a,ref);
  781. end
  782. else
  783. internalerror(2010053109);
  784. end;
  785. end;
  786. procedure tcg.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  787. var
  788. tmpref, ref: treference;
  789. tmpreg: tregister;
  790. location: pcgparalocation;
  791. orgsizeleft,
  792. sizeleft: tcgint;
  793. reghasvalue: boolean;
  794. begin
  795. location:=cgpara.location;
  796. tmpref:=r;
  797. sizeleft:=cgpara.intsize;
  798. while assigned(location) do
  799. begin
  800. paramanager.allocparaloc(list,location);
  801. case location^.loc of
  802. LOC_REGISTER,LOC_CREGISTER:
  803. begin
  804. { Parameter locations are often allocated in multiples of
  805. entire registers. If a parameter only occupies a part of
  806. such a register (e.g. a 16 bit int on a 32 bit
  807. architecture), the size of this parameter can only be
  808. determined by looking at the "size" parameter of this
  809. method -> if the size parameter is <= sizeof(aint), then
  810. we check that there is only one parameter location and
  811. then use this "size" to load the value into the parameter
  812. location }
  813. if (size<>OS_NO) and
  814. (tcgsize2size[size]<=sizeof(aint)) then
  815. begin
  816. cgpara.check_simple_location;
  817. a_load_ref_reg(list,size,location^.size,tmpref,location^.register);
  818. if location^.shiftval<0 then
  819. a_op_const_reg(list,OP_SHL,location^.size,-location^.shiftval,location^.register);
  820. end
  821. { there's a lot more data left, and the current paraloc's
  822. register is entirely filled with part of that data }
  823. else if (sizeleft>sizeof(aint)) then
  824. begin
  825. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  826. end
  827. { we're at the end of the data, and it can be loaded into
  828. the current location's register with a single regular
  829. load }
  830. else if (sizeleft in [1,2{$ifndef cpu16bitalu},4{$endif}{$ifdef cpu64bitalu},8{$endif}]) then
  831. begin
  832. a_load_ref_reg(list,int_cgsize(sizeleft),location^.size,tmpref,location^.register);
  833. if location^.shiftval<0 then
  834. a_op_const_reg(list,OP_SHL,location^.size,-location^.shiftval,location^.register);
  835. end
  836. { we're at the end of the data, and we need multiple loads
  837. to get it in the register because it's an irregular size }
  838. else
  839. begin
  840. { should be the last part }
  841. if assigned(location^.next) then
  842. internalerror(2010052907);
  843. { load the value piecewise to get it into the register }
  844. orgsizeleft:=sizeleft;
  845. reghasvalue:=false;
  846. {$ifdef cpu64bitalu}
  847. if sizeleft>=4 then
  848. begin
  849. a_load_ref_reg(list,OS_32,location^.size,tmpref,location^.register);
  850. dec(sizeleft,4);
  851. if target_info.endian=endian_big then
  852. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,location^.register);
  853. inc(tmpref.offset,4);
  854. reghasvalue:=true;
  855. end;
  856. {$endif cpu64bitalu}
  857. if sizeleft>=2 then
  858. begin
  859. tmpreg:=getintregister(list,location^.size);
  860. a_load_ref_reg(list,OS_16,location^.size,tmpref,tmpreg);
  861. dec(sizeleft,2);
  862. if reghasvalue then
  863. begin
  864. if target_info.endian=endian_big then
  865. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg)
  866. else
  867. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+2))*8,tmpreg);
  868. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register);
  869. end
  870. else
  871. begin
  872. if target_info.endian=endian_big then
  873. a_op_const_reg_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg,location^.register)
  874. else
  875. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  876. end;
  877. inc(tmpref.offset,2);
  878. reghasvalue:=true;
  879. end;
  880. if sizeleft=1 then
  881. begin
  882. tmpreg:=getintregister(list,location^.size);
  883. a_load_ref_reg(list,OS_8,location^.size,tmpref,tmpreg);
  884. dec(sizeleft,1);
  885. if reghasvalue then
  886. begin
  887. if target_info.endian=endian_little then
  888. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+1))*8,tmpreg);
  889. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register)
  890. end
  891. else
  892. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  893. inc(tmpref.offset);
  894. end;
  895. if location^.shiftval<0 then
  896. a_op_const_reg(list,OP_SHL,location^.size,-location^.shiftval,location^.register);
  897. { the loop will already adjust the offset and sizeleft }
  898. dec(tmpref.offset,orgsizeleft);
  899. sizeleft:=orgsizeleft;
  900. end;
  901. end;
  902. LOC_REFERENCE,LOC_CREFERENCE:
  903. begin
  904. if assigned(location^.next) then
  905. internalerror(2010052906);
  906. reference_reset_base(ref,location^.reference.index,location^.reference.offset,newalignment(cgpara.alignment,cgpara.intsize-sizeleft));
  907. if (size <> OS_NO) and
  908. (tcgsize2size[size] <= sizeof(aint)) then
  909. a_load_ref_ref(list,size,location^.size,tmpref,ref)
  910. else
  911. { use concatcopy, because the parameter can be larger than }
  912. { what the OS_* constants can handle }
  913. g_concatcopy(list,tmpref,ref,sizeleft);
  914. end;
  915. LOC_MMREGISTER,LOC_CMMREGISTER:
  916. begin
  917. case location^.size of
  918. OS_F32,
  919. OS_F64,
  920. OS_F128:
  921. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,mms_movescalar);
  922. OS_M8..OS_M128,
  923. OS_MS8..OS_MS128:
  924. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,nil);
  925. else
  926. internalerror(2010053101);
  927. end;
  928. end
  929. else
  930. internalerror(2010053111);
  931. end;
  932. inc(tmpref.offset,tcgsize2size[location^.size]);
  933. dec(sizeleft,tcgsize2size[location^.size]);
  934. location:=location^.next;
  935. end;
  936. end;
  937. procedure tcg.a_load_loc_cgpara(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  938. begin
  939. case l.loc of
  940. LOC_REGISTER,
  941. LOC_CREGISTER :
  942. a_load_reg_cgpara(list,l.size,l.register,cgpara);
  943. LOC_CONSTANT :
  944. a_load_const_cgpara(list,l.size,l.value,cgpara);
  945. LOC_CREFERENCE,
  946. LOC_REFERENCE :
  947. a_load_ref_cgpara(list,l.size,l.reference,cgpara);
  948. else
  949. internalerror(2002032211);
  950. end;
  951. end;
  952. procedure tcg.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);
  953. var
  954. hr : tregister;
  955. begin
  956. cgpara.check_simple_location;
  957. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  958. begin
  959. paramanager.allocparaloc(list,cgpara.location);
  960. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  961. end
  962. else
  963. begin
  964. hr:=getaddressregister(list);
  965. a_loadaddr_ref_reg(list,r,hr);
  966. a_load_reg_cgpara(list,OS_ADDR,hr,cgpara);
  967. end;
  968. end;
  969. procedure tcg.a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : tcgint;align : longint);
  970. var
  971. href : treference;
  972. hreg : tregister;
  973. cgsize: tcgsize;
  974. begin
  975. case paraloc.loc of
  976. LOC_REGISTER :
  977. begin
  978. hreg:=paraloc.register;
  979. cgsize:=paraloc.size;
  980. if paraloc.shiftval>0 then
  981. a_op_const_reg_reg(list,OP_SHL,OS_INT,paraloc.shiftval,paraloc.register,paraloc.register)
  982. else if (paraloc.shiftval<0) and
  983. (sizeleft in [1,2,4]) then
  984. begin
  985. a_op_const_reg_reg(list,OP_SHR,OS_INT,-paraloc.shiftval,paraloc.register,paraloc.register);
  986. { convert to a register of 1/2/4 bytes in size, since the
  987. original register had to be made larger to be able to hold
  988. the shifted value }
  989. cgsize:=int_cgsize(tcgsize2size[OS_INT]-(-paraloc.shiftval div 8));
  990. hreg:=getintregister(list,cgsize);
  991. a_load_reg_reg(list,OS_INT,cgsize,paraloc.register,hreg);
  992. end;
  993. a_load_reg_ref(list,paraloc.size,cgsize,hreg,ref);
  994. end;
  995. LOC_MMREGISTER :
  996. begin
  997. case paraloc.size of
  998. OS_F32,
  999. OS_F64,
  1000. OS_F128:
  1001. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,mms_movescalar);
  1002. OS_M8..OS_M128,
  1003. OS_MS8..OS_MS128:
  1004. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,nil);
  1005. else
  1006. internalerror(2010053102);
  1007. end;
  1008. end;
  1009. LOC_FPUREGISTER :
  1010. cg.a_loadfpu_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  1011. LOC_REFERENCE :
  1012. begin
  1013. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  1014. { use concatcopy, because it can also be a float which fails when
  1015. load_ref_ref is used. Don't copy data when the references are equal }
  1016. if not((href.base=ref.base) and (href.offset=ref.offset)) then
  1017. g_concatcopy(list,href,ref,sizeleft);
  1018. end;
  1019. else
  1020. internalerror(2002081302);
  1021. end;
  1022. end;
  1023. procedure tcg.a_load_cgparaloc_anyreg(list: TAsmList;regsize: tcgsize;const paraloc: TCGParaLocation;reg: tregister;align: longint);
  1024. var
  1025. href : treference;
  1026. begin
  1027. case paraloc.loc of
  1028. LOC_REGISTER :
  1029. begin
  1030. if paraloc.shiftval<0 then
  1031. a_op_const_reg_reg(list,OP_SHR,OS_INT,-paraloc.shiftval,paraloc.register,paraloc.register);
  1032. case getregtype(reg) of
  1033. R_INTREGISTER:
  1034. a_load_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  1035. R_MMREGISTER:
  1036. a_loadmm_intreg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1037. else
  1038. internalerror(2009112422);
  1039. end;
  1040. end;
  1041. LOC_MMREGISTER :
  1042. begin
  1043. case getregtype(reg) of
  1044. R_INTREGISTER:
  1045. a_loadmm_reg_intreg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1046. R_MMREGISTER:
  1047. begin
  1048. case paraloc.size of
  1049. OS_F32,
  1050. OS_F64,
  1051. OS_F128:
  1052. a_loadmm_reg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1053. OS_M8..OS_M128,
  1054. OS_MS8..OS_MS128:
  1055. a_loadmm_reg_reg(list,paraloc.size,paraloc.size,paraloc.register,reg,nil);
  1056. else
  1057. internalerror(2010053102);
  1058. end;
  1059. end;
  1060. else
  1061. internalerror(2010053104);
  1062. end;
  1063. end;
  1064. LOC_FPUREGISTER :
  1065. a_loadfpu_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  1066. LOC_REFERENCE :
  1067. begin
  1068. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  1069. case getregtype(reg) of
  1070. R_INTREGISTER :
  1071. a_load_ref_reg(list,paraloc.size,regsize,href,reg);
  1072. R_FPUREGISTER :
  1073. a_loadfpu_ref_reg(list,paraloc.size,regsize,href,reg);
  1074. R_MMREGISTER :
  1075. { not paraloc.size, because it may be OS_64 instead of
  1076. OS_F64 in case the parameter is passed using integer
  1077. conventions (e.g., on ARM) }
  1078. a_loadmm_ref_reg(list,regsize,regsize,href,reg,mms_movescalar);
  1079. else
  1080. internalerror(2004101012);
  1081. end;
  1082. end;
  1083. else
  1084. internalerror(2002081302);
  1085. end;
  1086. end;
  1087. {****************************************************************************
  1088. some generic implementations
  1089. ****************************************************************************}
  1090. {$push}
  1091. {$r-}
  1092. {$q-}
  1093. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  1094. var
  1095. bitmask: aword;
  1096. tmpreg: tregister;
  1097. stopbit: byte;
  1098. begin
  1099. tmpreg:=getintregister(list,sreg.subsetregsize);
  1100. if (subsetsize in [OS_S8..OS_S128]) then
  1101. begin
  1102. { sign extend in case the value has a bitsize mod 8 <> 0 }
  1103. { both instructions will be optimized away if not }
  1104. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  1105. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  1106. end
  1107. else
  1108. begin
  1109. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  1110. stopbit := sreg.startbit + sreg.bitlen;
  1111. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1112. // use aword to prevent overflow with 1 shl 31
  1113. if (stopbit - sreg.startbit <> AIntBits) then
  1114. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  1115. else
  1116. bitmask := high(aword);
  1117. a_op_const_reg(list,OP_AND,sreg.subsetregsize,tcgint(bitmask),tmpreg);
  1118. end;
  1119. tmpreg := makeregsize(list,tmpreg,subsetsize);
  1120. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  1121. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  1122. end;
  1123. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  1124. begin
  1125. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  1126. end;
  1127. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  1128. var
  1129. bitmask: aword;
  1130. tmpreg: tregister;
  1131. stopbit: byte;
  1132. begin
  1133. stopbit := sreg.startbit + sreg.bitlen;
  1134. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1135. if (stopbit <> AIntBits) then
  1136. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  1137. else
  1138. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  1139. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1140. begin
  1141. tmpreg:=getintregister(list,sreg.subsetregsize);
  1142. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  1143. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  1144. if (slopt <> SL_REGNOSRCMASK) then
  1145. a_op_const_reg(list,OP_AND,sreg.subsetregsize,tcgint(not(bitmask)),tmpreg);
  1146. end;
  1147. if (slopt <> SL_SETMAX) then
  1148. a_op_const_reg(list,OP_AND,sreg.subsetregsize,tcgint(bitmask),sreg.subsetreg);
  1149. case slopt of
  1150. SL_SETZERO : ;
  1151. SL_SETMAX :
  1152. if (sreg.bitlen <> AIntBits) then
  1153. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  1154. tcgint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  1155. sreg.subsetreg)
  1156. else
  1157. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  1158. else
  1159. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  1160. end;
  1161. end;
  1162. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  1163. var
  1164. tmpreg: tregister;
  1165. bitmask: aword;
  1166. stopbit: byte;
  1167. begin
  1168. if (fromsreg.bitlen >= tosreg.bitlen) then
  1169. begin
  1170. tmpreg := getintregister(list,tosreg.subsetregsize);
  1171. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  1172. if (fromsreg.startbit <= tosreg.startbit) then
  1173. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  1174. else
  1175. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  1176. stopbit := tosreg.startbit + tosreg.bitlen;
  1177. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1178. if (stopbit <> AIntBits) then
  1179. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  1180. else
  1181. bitmask := (aword(1) shl tosreg.startbit) - 1;
  1182. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,tcgint(bitmask),tosreg.subsetreg);
  1183. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,tcgint(not(bitmask)),tmpreg);
  1184. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  1185. end
  1186. else
  1187. begin
  1188. tmpreg := getintregister(list,tosubsetsize);
  1189. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1190. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1191. end;
  1192. end;
  1193. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  1194. var
  1195. tmpreg: tregister;
  1196. begin
  1197. tmpreg := getintregister(list,tosize);
  1198. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  1199. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1200. end;
  1201. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  1202. var
  1203. tmpreg: tregister;
  1204. begin
  1205. tmpreg := getintregister(list,subsetsize);
  1206. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1207. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  1208. end;
  1209. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: tcgint; const sreg: tsubsetregister);
  1210. var
  1211. bitmask: aword;
  1212. stopbit: byte;
  1213. begin
  1214. stopbit := sreg.startbit + sreg.bitlen;
  1215. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1216. if (stopbit <> AIntBits) then
  1217. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  1218. else
  1219. bitmask := (aword(1) shl sreg.startbit) - 1;
  1220. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  1221. a_op_const_reg(list,OP_AND,sreg.subsetregsize,tcgint(bitmask),sreg.subsetreg);
  1222. a_op_const_reg(list,OP_OR,sreg.subsetregsize,tcgint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  1223. end;
  1224. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  1225. begin
  1226. case loc.loc of
  1227. LOC_REFERENCE,LOC_CREFERENCE:
  1228. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  1229. LOC_REGISTER,LOC_CREGISTER:
  1230. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  1231. LOC_CONSTANT:
  1232. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  1233. LOC_SUBSETREG,LOC_CSUBSETREG:
  1234. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  1235. LOC_SUBSETREF,LOC_CSUBSETREF:
  1236. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  1237. else
  1238. internalerror(200608053);
  1239. end;
  1240. end;
  1241. (*
  1242. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  1243. in memory. They are like a regular reference, but contain an extra bit
  1244. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  1245. and a bit length (always constant).
  1246. Bit packed values are stored differently in memory depending on whether we
  1247. are on a big or a little endian system (compatible with at least GPC). The
  1248. size of the basic working unit is always the smallest power-of-2 byte size
  1249. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  1250. bytes, 17..32 bits -> 4 bytes etc).
  1251. On a big endian, 5-bit: values are stored like this:
  1252. 11111222 22333334 44445555 56666677 77788888
  1253. The leftmost bit of each 5-bit value corresponds to the most significant
  1254. bit.
  1255. On little endian, it goes like this:
  1256. 22211111 43333322 55554444 77666665 88888777
  1257. In this case, per byte the left-most bit is more significant than those on
  1258. the right, but the bits in the next byte are all more significant than
  1259. those in the previous byte (e.g., the 222 in the first byte are the low
  1260. three bits of that value, while the 22 in the second byte are the upper
  1261. two bits.
  1262. Big endian, 9 bit values:
  1263. 11111111 12222222 22333333 33344444 ...
  1264. Little endian, 9 bit values:
  1265. 11111111 22222221 33333322 44444333 ...
  1266. This is memory representation and the 16 bit values are byteswapped.
  1267. Similarly as in the previous case, the 2222222 string contains the lower
  1268. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  1269. registers (two 16 bit registers in the current implementation, although a
  1270. single 32 bit register would be possible too, in particular if 32 bit
  1271. alignment can be guaranteed), this becomes:
  1272. 22222221 11111111 44444333 33333322 ...
  1273. (l)ow u l l u l u
  1274. The startbit/bitindex in a subsetreference always refers to
  1275. a) on big endian: the most significant bit of the value
  1276. (bits counted from left to right, both memory an registers)
  1277. b) on little endian: the least significant bit when the value
  1278. is loaded in a register (bit counted from right to left)
  1279. Although a) results in more complex code for big endian systems, it's
  1280. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  1281. Apple's universal interfaces which depend on these layout differences).
  1282. Note: when changing the loadsize calculated in get_subsetref_load_info,
  1283. make sure the appropriate alignment is guaranteed, at least in case of
  1284. {$defined cpurequiresproperalignment}.
  1285. *)
  1286. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  1287. var
  1288. intloadsize: tcgint;
  1289. begin
  1290. intloadsize := packedbitsloadsize(sref.bitlen);
  1291. if (intloadsize = 0) then
  1292. internalerror(2006081310);
  1293. if (intloadsize > sizeof(aint)) then
  1294. intloadsize := sizeof(aint);
  1295. loadsize := int_cgsize(intloadsize);
  1296. if (loadsize = OS_NO) then
  1297. internalerror(2006081311);
  1298. if (sref.bitlen > sizeof(aint)*8) then
  1299. internalerror(2006081312);
  1300. extra_load :=
  1301. (sref.bitlen <> 1) and
  1302. ((sref.bitindexreg <> NR_NO) or
  1303. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1304. end;
  1305. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1306. var
  1307. restbits: byte;
  1308. begin
  1309. if (target_info.endian = endian_big) then
  1310. begin
  1311. { valuereg contains the upper bits, extra_value_reg the lower }
  1312. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1313. if (subsetsize in [OS_S8..OS_S128]) then
  1314. begin
  1315. { sign extend }
  1316. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1317. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1318. end
  1319. else
  1320. begin
  1321. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1322. { mask other bits }
  1323. if (sref.bitlen <> AIntBits) then
  1324. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
  1325. end;
  1326. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1327. end
  1328. else
  1329. begin
  1330. { valuereg contains the lower bits, extra_value_reg the upper }
  1331. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1332. if (subsetsize in [OS_S8..OS_S128]) then
  1333. begin
  1334. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1335. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1336. end
  1337. else
  1338. begin
  1339. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1340. { mask other bits }
  1341. if (sref.bitlen <> AIntBits) then
  1342. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1343. end;
  1344. end;
  1345. { merge }
  1346. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1347. end;
  1348. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister);
  1349. var
  1350. hl: tasmlabel;
  1351. tmpref: treference;
  1352. extra_value_reg,
  1353. tmpreg: tregister;
  1354. begin
  1355. tmpreg := getintregister(list,OS_INT);
  1356. tmpref := sref.ref;
  1357. inc(tmpref.offset,loadbitsize div 8);
  1358. extra_value_reg := getintregister(list,OS_INT);
  1359. if (target_info.endian = endian_big) then
  1360. begin
  1361. { since this is a dynamic index, it's possible that the value }
  1362. { is entirely in valuereg. }
  1363. { get the data in valuereg in the right place }
  1364. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1365. if (subsetsize in [OS_S8..OS_S128]) then
  1366. begin
  1367. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1368. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1369. end
  1370. else
  1371. begin
  1372. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1373. if (loadbitsize <> AIntBits) then
  1374. { mask left over bits }
  1375. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
  1376. end;
  1377. tmpreg := getintregister(list,OS_INT);
  1378. { ensure we don't load anything past the end of the array }
  1379. current_asmdata.getjumplabel(hl);
  1380. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1381. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1382. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1383. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1384. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1385. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1386. { load next "loadbitsize" bits of the array }
  1387. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1388. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1389. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1390. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1391. { => extra_value_reg is now 0 }
  1392. { merge }
  1393. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1394. { no need to mask, necessary masking happened earlier on }
  1395. a_label(list,hl);
  1396. end
  1397. else
  1398. begin
  1399. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1400. { ensure we don't load anything past the end of the array }
  1401. current_asmdata.getjumplabel(hl);
  1402. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1403. { Y-x = -(Y-x) }
  1404. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1405. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1406. { load next "loadbitsize" bits of the array }
  1407. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1408. { tmpreg is in the range 1..<cpu_bitsize>-1 -> always ok }
  1409. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1410. { merge }
  1411. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1412. a_label(list,hl);
  1413. { sign extend or mask other bits }
  1414. if (subsetsize in [OS_S8..OS_S128]) then
  1415. begin
  1416. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1417. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1418. end
  1419. else
  1420. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
  1421. end;
  1422. end;
  1423. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1424. var
  1425. tmpref: treference;
  1426. valuereg,extra_value_reg: tregister;
  1427. tosreg: tsubsetregister;
  1428. loadsize: tcgsize;
  1429. loadbitsize: byte;
  1430. extra_load: boolean;
  1431. begin
  1432. get_subsetref_load_info(sref,loadsize,extra_load);
  1433. loadbitsize := tcgsize2size[loadsize]*8;
  1434. { load the (first part) of the bit sequence }
  1435. valuereg := getintregister(list,OS_INT);
  1436. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1437. if not extra_load then
  1438. begin
  1439. { everything is guaranteed to be in a single register of loadsize }
  1440. if (sref.bitindexreg = NR_NO) then
  1441. begin
  1442. { use subsetreg routine, it may have been overridden with an optimized version }
  1443. tosreg.subsetreg := valuereg;
  1444. tosreg.subsetregsize := OS_INT;
  1445. { subsetregs always count bits from right to left }
  1446. if (target_info.endian = endian_big) then
  1447. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1448. else
  1449. tosreg.startbit := sref.startbit;
  1450. tosreg.bitlen := sref.bitlen;
  1451. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1452. exit;
  1453. end
  1454. else
  1455. begin
  1456. if (sref.startbit <> 0) then
  1457. internalerror(2006081510);
  1458. if (target_info.endian = endian_big) then
  1459. begin
  1460. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1461. if (subsetsize in [OS_S8..OS_S128]) then
  1462. begin
  1463. { sign extend to entire register }
  1464. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1465. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1466. end
  1467. else
  1468. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1469. end
  1470. else
  1471. begin
  1472. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1473. if (subsetsize in [OS_S8..OS_S128]) then
  1474. begin
  1475. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1476. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1477. end
  1478. end;
  1479. { mask other bits/sign extend }
  1480. if not(subsetsize in [OS_S8..OS_S128]) then
  1481. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
  1482. end
  1483. end
  1484. else
  1485. begin
  1486. { load next value as well }
  1487. extra_value_reg := getintregister(list,OS_INT);
  1488. if (sref.bitindexreg = NR_NO) then
  1489. begin
  1490. tmpref := sref.ref;
  1491. inc(tmpref.offset,loadbitsize div 8);
  1492. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1493. { can be overridden to optimize }
  1494. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1495. end
  1496. else
  1497. begin
  1498. if (sref.startbit <> 0) then
  1499. internalerror(2006080610);
  1500. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg);
  1501. end;
  1502. end;
  1503. { store in destination }
  1504. { avoid unnecessary sign extension and zeroing }
  1505. valuereg := makeregsize(list,valuereg,OS_INT);
  1506. destreg := makeregsize(list,destreg,OS_INT);
  1507. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1508. destreg := makeregsize(list,destreg,tosize);
  1509. end;
  1510. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1511. begin
  1512. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1513. end;
  1514. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1515. var
  1516. hl: tasmlabel;
  1517. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1518. tosreg, fromsreg: tsubsetregister;
  1519. tmpref: treference;
  1520. bitmask: aword;
  1521. loadsize: tcgsize;
  1522. loadbitsize: byte;
  1523. extra_load: boolean;
  1524. begin
  1525. { the register must be able to contain the requested value }
  1526. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1527. internalerror(2006081613);
  1528. get_subsetref_load_info(sref,loadsize,extra_load);
  1529. loadbitsize := tcgsize2size[loadsize]*8;
  1530. { load the (first part) of the bit sequence }
  1531. valuereg := getintregister(list,OS_INT);
  1532. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1533. { constant offset of bit sequence? }
  1534. if not extra_load then
  1535. begin
  1536. if (sref.bitindexreg = NR_NO) then
  1537. begin
  1538. { use subsetreg routine, it may have been overridden with an optimized version }
  1539. tosreg.subsetreg := valuereg;
  1540. tosreg.subsetregsize := OS_INT;
  1541. { subsetregs always count bits from right to left }
  1542. if (target_info.endian = endian_big) then
  1543. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1544. else
  1545. tosreg.startbit := sref.startbit;
  1546. tosreg.bitlen := sref.bitlen;
  1547. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1548. end
  1549. else
  1550. begin
  1551. if (sref.startbit <> 0) then
  1552. internalerror(2006081710);
  1553. { should be handled by normal code and will give wrong result }
  1554. { on x86 for the '1 shl bitlen' below }
  1555. if (sref.bitlen = AIntBits) then
  1556. internalerror(2006081711);
  1557. { zero the bits we have to insert }
  1558. if (slopt <> SL_SETMAX) then
  1559. begin
  1560. maskreg := getintregister(list,OS_INT);
  1561. if (target_info.endian = endian_big) then
  1562. begin
  1563. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1564. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1565. end
  1566. else
  1567. begin
  1568. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),maskreg);
  1569. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1570. end;
  1571. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1572. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1573. end;
  1574. { insert the value }
  1575. if (slopt <> SL_SETZERO) then
  1576. begin
  1577. tmpreg := getintregister(list,OS_INT);
  1578. if (slopt <> SL_SETMAX) then
  1579. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1580. else if (sref.bitlen <> AIntBits) then
  1581. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1582. else
  1583. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1584. if (target_info.endian = endian_big) then
  1585. begin
  1586. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1587. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1588. begin
  1589. if (loadbitsize <> AIntBits) then
  1590. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1591. else
  1592. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1593. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1594. end;
  1595. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1596. end
  1597. else
  1598. begin
  1599. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1600. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),tmpreg);
  1601. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1602. end;
  1603. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1604. end;
  1605. end;
  1606. { store back to memory }
  1607. valuereg := makeregsize(list,valuereg,loadsize);
  1608. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1609. exit;
  1610. end
  1611. else
  1612. begin
  1613. { load next value }
  1614. extra_value_reg := getintregister(list,OS_INT);
  1615. tmpref := sref.ref;
  1616. inc(tmpref.offset,loadbitsize div 8);
  1617. { should maybe be taken out too, can be done more efficiently }
  1618. { on e.g. i386 with shld/shrd }
  1619. if (sref.bitindexreg = NR_NO) then
  1620. begin
  1621. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1622. fromsreg.subsetreg := fromreg;
  1623. fromsreg.subsetregsize := fromsize;
  1624. tosreg.subsetreg := valuereg;
  1625. tosreg.subsetregsize := OS_INT;
  1626. { transfer first part }
  1627. fromsreg.bitlen := loadbitsize-sref.startbit;
  1628. tosreg.bitlen := fromsreg.bitlen;
  1629. if (target_info.endian = endian_big) then
  1630. begin
  1631. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1632. { upper bits of the value ... }
  1633. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1634. { ... to bit 0 }
  1635. tosreg.startbit := 0
  1636. end
  1637. else
  1638. begin
  1639. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1640. { lower bits of the value ... }
  1641. fromsreg.startbit := 0;
  1642. { ... to startbit }
  1643. tosreg.startbit := sref.startbit;
  1644. end;
  1645. case slopt of
  1646. SL_SETZERO,
  1647. SL_SETMAX:
  1648. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1649. else
  1650. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1651. end;
  1652. valuereg := makeregsize(list,valuereg,loadsize);
  1653. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1654. { transfer second part }
  1655. if (target_info.endian = endian_big) then
  1656. begin
  1657. { extra_value_reg must contain the lower bits of the value at bits }
  1658. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1659. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1660. { - bitlen - startbit }
  1661. fromsreg.startbit := 0;
  1662. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1663. end
  1664. else
  1665. begin
  1666. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1667. fromsreg.startbit := fromsreg.bitlen;
  1668. tosreg.startbit := 0;
  1669. end;
  1670. tosreg.subsetreg := extra_value_reg;
  1671. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1672. tosreg.bitlen := fromsreg.bitlen;
  1673. case slopt of
  1674. SL_SETZERO,
  1675. SL_SETMAX:
  1676. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1677. else
  1678. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1679. end;
  1680. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1681. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1682. exit;
  1683. end
  1684. else
  1685. begin
  1686. if (sref.startbit <> 0) then
  1687. internalerror(2006081812);
  1688. { should be handled by normal code and will give wrong result }
  1689. { on x86 for the '1 shl bitlen' below }
  1690. if (sref.bitlen = AIntBits) then
  1691. internalerror(2006081713);
  1692. { generate mask to zero the bits we have to insert }
  1693. if (slopt <> SL_SETMAX) then
  1694. begin
  1695. maskreg := getintregister(list,OS_INT);
  1696. if (target_info.endian = endian_big) then
  1697. begin
  1698. a_load_const_reg(list,OS_INT,tcgint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1699. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1700. end
  1701. else
  1702. begin
  1703. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),maskreg);
  1704. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1705. end;
  1706. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1707. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1708. end;
  1709. { insert the value }
  1710. if (slopt <> SL_SETZERO) then
  1711. begin
  1712. tmpreg := getintregister(list,OS_INT);
  1713. if (slopt <> SL_SETMAX) then
  1714. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1715. else if (sref.bitlen <> AIntBits) then
  1716. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1717. else
  1718. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1719. if (target_info.endian = endian_big) then
  1720. begin
  1721. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1722. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1723. { mask left over bits }
  1724. a_op_const_reg(list,OP_AND,OS_INT,tcgint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1725. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1726. end
  1727. else
  1728. begin
  1729. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1730. { mask left over bits }
  1731. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),tmpreg);
  1732. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1733. end;
  1734. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1735. end;
  1736. valuereg := makeregsize(list,valuereg,loadsize);
  1737. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1738. { make sure we do not read/write past the end of the array }
  1739. current_asmdata.getjumplabel(hl);
  1740. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1741. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1742. tmpindexreg := getintregister(list,OS_INT);
  1743. { load current array value }
  1744. if (slopt <> SL_SETZERO) then
  1745. begin
  1746. tmpreg := getintregister(list,OS_INT);
  1747. if (slopt <> SL_SETMAX) then
  1748. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1749. else if (sref.bitlen <> AIntBits) then
  1750. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1751. else
  1752. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1753. end;
  1754. { generate mask to zero the bits we have to insert }
  1755. if (slopt <> SL_SETMAX) then
  1756. begin
  1757. maskreg := getintregister(list,OS_INT);
  1758. if (target_info.endian = endian_big) then
  1759. begin
  1760. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1761. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1762. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),maskreg);
  1763. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1764. end
  1765. else
  1766. begin
  1767. { Y-x = -(x-Y) }
  1768. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1769. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1770. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),maskreg);
  1771. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1772. end;
  1773. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1774. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1775. end;
  1776. if (slopt <> SL_SETZERO) then
  1777. begin
  1778. if (target_info.endian = endian_big) then
  1779. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1780. else
  1781. begin
  1782. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1783. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),tmpreg);
  1784. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1785. end;
  1786. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1787. end;
  1788. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1789. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1790. a_label(list,hl);
  1791. end;
  1792. end;
  1793. end;
  1794. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1795. var
  1796. tmpreg: tregister;
  1797. begin
  1798. tmpreg := getintregister(list,tosubsetsize);
  1799. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1800. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1801. end;
  1802. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1803. var
  1804. tmpreg: tregister;
  1805. begin
  1806. tmpreg := getintregister(list,tosize);
  1807. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1808. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1809. end;
  1810. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1811. var
  1812. tmpreg: tregister;
  1813. begin
  1814. tmpreg := getintregister(list,subsetsize);
  1815. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1816. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1817. end;
  1818. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: tcgint; const sref: tsubsetreference);
  1819. var
  1820. tmpreg: tregister;
  1821. slopt: tsubsetloadopt;
  1822. begin
  1823. { perform masking of the source value in advance }
  1824. slopt := SL_REGNOSRCMASK;
  1825. if (sref.bitlen <> AIntBits) then
  1826. a := tcgint(aword(a) and ((aword(1) shl sref.bitlen) -1));
  1827. if (
  1828. { broken x86 "x shl regbitsize = x" }
  1829. ((sref.bitlen <> AIntBits) and
  1830. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1831. ((sref.bitlen = AIntBits) and
  1832. (a = -1))
  1833. ) then
  1834. slopt := SL_SETMAX
  1835. else if (a = 0) then
  1836. slopt := SL_SETZERO;
  1837. tmpreg := getintregister(list,subsetsize);
  1838. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1839. a_load_const_reg(list,subsetsize,a,tmpreg);
  1840. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1841. end;
  1842. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1843. begin
  1844. case loc.loc of
  1845. LOC_REFERENCE,LOC_CREFERENCE:
  1846. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1847. LOC_REGISTER,LOC_CREGISTER:
  1848. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1849. LOC_SUBSETREG,LOC_CSUBSETREG:
  1850. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1851. LOC_SUBSETREF,LOC_CSUBSETREF:
  1852. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1853. else
  1854. internalerror(200608054);
  1855. end;
  1856. end;
  1857. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1858. var
  1859. tmpreg: tregister;
  1860. begin
  1861. tmpreg := getintregister(list,tosubsetsize);
  1862. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1863. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1864. end;
  1865. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1866. var
  1867. tmpreg: tregister;
  1868. begin
  1869. tmpreg := getintregister(list,tosubsetsize);
  1870. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1871. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1872. end;
  1873. {$pop}
  1874. { generic bit address calculation routines }
  1875. function tcg.get_bit_const_ref_sref(bitnumber: tcgint; const ref: treference): tsubsetreference;
  1876. begin
  1877. result.ref:=ref;
  1878. inc(result.ref.offset,bitnumber div 8);
  1879. result.bitindexreg:=NR_NO;
  1880. result.startbit:=bitnumber mod 8;
  1881. result.bitlen:=1;
  1882. end;
  1883. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: tcgint; setreg: tregister): tsubsetregister;
  1884. begin
  1885. result.subsetreg:=setreg;
  1886. result.subsetregsize:=setregsize;
  1887. { subsetregs always count from the least significant to the most significant bit }
  1888. if (target_info.endian=endian_big) then
  1889. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1890. else
  1891. result.startbit:=bitnumber;
  1892. result.bitlen:=1;
  1893. end;
  1894. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1895. var
  1896. tmpreg,
  1897. tmpaddrreg: tregister;
  1898. begin
  1899. result.ref:=ref;
  1900. result.startbit:=0;
  1901. result.bitlen:=1;
  1902. tmpreg:=getintregister(list,bitnumbersize);
  1903. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1904. tmpaddrreg:=getaddressregister(list);
  1905. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1906. if (result.ref.base=NR_NO) then
  1907. result.ref.base:=tmpaddrreg
  1908. else if (result.ref.index=NR_NO) then
  1909. result.ref.index:=tmpaddrreg
  1910. else
  1911. begin
  1912. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1913. result.ref.index:=tmpaddrreg;
  1914. end;
  1915. tmpreg:=getintregister(list,OS_INT);
  1916. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1917. result.bitindexreg:=tmpreg;
  1918. end;
  1919. { bit testing routines }
  1920. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1921. var
  1922. tmpvalue: tregister;
  1923. begin
  1924. tmpvalue:=getintregister(list,valuesize);
  1925. if (target_info.endian=endian_little) then
  1926. begin
  1927. { rotate value register "bitnumber" bits to the right }
  1928. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1929. { extract the bit we want }
  1930. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1931. end
  1932. else
  1933. begin
  1934. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1935. { bit in uppermost position, then move it to the lowest position }
  1936. { "and" is not necessary since combination of shl/shr will clear }
  1937. { all other bits }
  1938. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1939. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1940. end;
  1941. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1942. end;
  1943. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: tcgint; const ref: treference; destreg: tregister);
  1944. begin
  1945. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1946. end;
  1947. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: tcgint; setreg, destreg: tregister);
  1948. begin
  1949. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1950. end;
  1951. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: tcgint; const setreg: tsubsetregister; destreg: tregister);
  1952. var
  1953. tmpsreg: tsubsetregister;
  1954. begin
  1955. { the first parameter is used to calculate the bit offset in }
  1956. { case of big endian, and therefore must be the size of the }
  1957. { set and not of the whole subsetreg }
  1958. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1959. { now fix the size of the subsetreg }
  1960. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1961. { correct offset of the set in the subsetreg }
  1962. inc(tmpsreg.startbit,setreg.startbit);
  1963. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1964. end;
  1965. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1966. begin
  1967. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1968. end;
  1969. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1970. var
  1971. tmpreg: tregister;
  1972. begin
  1973. case loc.loc of
  1974. LOC_REFERENCE,LOC_CREFERENCE:
  1975. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1976. LOC_REGISTER,LOC_CREGISTER,
  1977. LOC_SUBSETREG,LOC_CSUBSETREG,
  1978. LOC_CONSTANT:
  1979. begin
  1980. case loc.loc of
  1981. LOC_REGISTER,LOC_CREGISTER:
  1982. tmpreg:=loc.register;
  1983. LOC_SUBSETREG,LOC_CSUBSETREG:
  1984. begin
  1985. tmpreg:=getintregister(list,loc.size);
  1986. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1987. end;
  1988. LOC_CONSTANT:
  1989. begin
  1990. tmpreg:=getintregister(list,loc.size);
  1991. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1992. end;
  1993. end;
  1994. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1995. end;
  1996. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1997. else
  1998. internalerror(2007051701);
  1999. end;
  2000. end;
  2001. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: tcgint; const loc: tlocation; destreg: tregister);
  2002. begin
  2003. case loc.loc of
  2004. LOC_REFERENCE,LOC_CREFERENCE:
  2005. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  2006. LOC_REGISTER,LOC_CREGISTER:
  2007. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  2008. LOC_SUBSETREG,LOC_CSUBSETREG:
  2009. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  2010. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  2011. else
  2012. internalerror(2007051702);
  2013. end;
  2014. end;
  2015. { bit setting/clearing routines }
  2016. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  2017. var
  2018. tmpvalue: tregister;
  2019. begin
  2020. tmpvalue:=getintregister(list,destsize);
  2021. if (target_info.endian=endian_little) then
  2022. begin
  2023. a_load_const_reg(list,destsize,1,tmpvalue);
  2024. { rotate bit "bitnumber" bits to the left }
  2025. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  2026. end
  2027. else
  2028. begin
  2029. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  2030. { shr bitnumber" results in correct mask }
  2031. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  2032. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  2033. end;
  2034. { set/clear the bit we want }
  2035. if (doset) then
  2036. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  2037. else
  2038. begin
  2039. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  2040. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  2041. end;
  2042. end;
  2043. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: tcgint; const ref: treference);
  2044. begin
  2045. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  2046. end;
  2047. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: tcgint; destreg: tregister);
  2048. begin
  2049. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  2050. end;
  2051. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: tcgint; const destreg: tsubsetregister);
  2052. var
  2053. tmpsreg: tsubsetregister;
  2054. begin
  2055. { the first parameter is used to calculate the bit offset in }
  2056. { case of big endian, and therefore must be the size of the }
  2057. { set and not of the whole subsetreg }
  2058. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  2059. { now fix the size of the subsetreg }
  2060. tmpsreg.subsetregsize:=destreg.subsetregsize;
  2061. { correct offset of the set in the subsetreg }
  2062. inc(tmpsreg.startbit,destreg.startbit);
  2063. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  2064. end;
  2065. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  2066. begin
  2067. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  2068. end;
  2069. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  2070. var
  2071. tmpreg: tregister;
  2072. begin
  2073. case loc.loc of
  2074. LOC_REFERENCE:
  2075. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  2076. LOC_CREGISTER:
  2077. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  2078. { e.g. a 2-byte set in a record regvar }
  2079. LOC_CSUBSETREG:
  2080. begin
  2081. { hard to do in-place in a generic way, so operate on a copy }
  2082. tmpreg:=getintregister(list,loc.size);
  2083. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2084. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  2085. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2086. end;
  2087. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  2088. else
  2089. internalerror(2007051703)
  2090. end;
  2091. end;
  2092. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: tcgint; const loc: tlocation);
  2093. begin
  2094. case loc.loc of
  2095. LOC_REFERENCE:
  2096. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  2097. LOC_CREGISTER:
  2098. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  2099. LOC_CSUBSETREG:
  2100. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  2101. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  2102. else
  2103. internalerror(2007051704)
  2104. end;
  2105. end;
  2106. { memory/register loading }
  2107. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  2108. var
  2109. tmpref : treference;
  2110. tmpreg : tregister;
  2111. i : longint;
  2112. begin
  2113. if ref.alignment<tcgsize2size[fromsize] then
  2114. begin
  2115. tmpref:=ref;
  2116. { we take care of the alignment now }
  2117. tmpref.alignment:=0;
  2118. case FromSize of
  2119. OS_16,OS_S16:
  2120. begin
  2121. tmpreg:=getintregister(list,OS_16);
  2122. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  2123. if target_info.endian=endian_big then
  2124. inc(tmpref.offset);
  2125. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2126. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2127. tmpreg:=makeregsize(list,tmpreg,OS_16);
  2128. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  2129. if target_info.endian=endian_big then
  2130. dec(tmpref.offset)
  2131. else
  2132. inc(tmpref.offset);
  2133. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2134. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2135. end;
  2136. OS_32,OS_S32:
  2137. begin
  2138. { could add an optimised case for ref.alignment=2 }
  2139. tmpreg:=getintregister(list,OS_32);
  2140. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  2141. if target_info.endian=endian_big then
  2142. inc(tmpref.offset,3);
  2143. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2144. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2145. tmpreg:=makeregsize(list,tmpreg,OS_32);
  2146. for i:=1 to 3 do
  2147. begin
  2148. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  2149. if target_info.endian=endian_big then
  2150. dec(tmpref.offset)
  2151. else
  2152. inc(tmpref.offset);
  2153. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2154. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2155. tmpreg:=makeregsize(list,tmpreg,OS_32);
  2156. end;
  2157. end
  2158. else
  2159. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  2160. end;
  2161. end
  2162. else
  2163. a_load_reg_ref(list,fromsize,tosize,register,ref);
  2164. end;
  2165. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  2166. var
  2167. tmpref : treference;
  2168. tmpreg,
  2169. tmpreg2 : tregister;
  2170. i : longint;
  2171. begin
  2172. if ref.alignment in [1,2] then
  2173. begin
  2174. tmpref:=ref;
  2175. { we take care of the alignment now }
  2176. tmpref.alignment:=0;
  2177. case FromSize of
  2178. OS_16,OS_S16:
  2179. if ref.alignment=2 then
  2180. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  2181. else
  2182. begin
  2183. { first load in tmpreg, because the target register }
  2184. { may be used in ref as well }
  2185. if target_info.endian=endian_little then
  2186. inc(tmpref.offset);
  2187. tmpreg:=getintregister(list,OS_8);
  2188. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  2189. tmpreg:=makeregsize(list,tmpreg,OS_16);
  2190. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  2191. if target_info.endian=endian_little then
  2192. dec(tmpref.offset)
  2193. else
  2194. inc(tmpref.offset);
  2195. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  2196. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  2197. end;
  2198. OS_32,OS_S32:
  2199. if ref.alignment=2 then
  2200. begin
  2201. if target_info.endian=endian_little then
  2202. inc(tmpref.offset,2);
  2203. tmpreg:=getintregister(list,OS_32);
  2204. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  2205. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  2206. if target_info.endian=endian_little then
  2207. dec(tmpref.offset,2)
  2208. else
  2209. inc(tmpref.offset,2);
  2210. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  2211. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  2212. end
  2213. else
  2214. begin
  2215. if target_info.endian=endian_little then
  2216. inc(tmpref.offset,3);
  2217. tmpreg:=getintregister(list,OS_32);
  2218. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  2219. tmpreg2:=getintregister(list,OS_32);
  2220. for i:=1 to 3 do
  2221. begin
  2222. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  2223. if target_info.endian=endian_little then
  2224. dec(tmpref.offset)
  2225. else
  2226. inc(tmpref.offset);
  2227. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  2228. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  2229. end;
  2230. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  2231. end
  2232. else
  2233. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  2234. end;
  2235. end
  2236. else
  2237. a_load_ref_reg(list,fromsize,tosize,ref,register);
  2238. end;
  2239. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  2240. var
  2241. tmpreg: tregister;
  2242. begin
  2243. { verify if we have the same reference }
  2244. if references_equal(sref,dref) then
  2245. exit;
  2246. tmpreg:=getintregister(list,tosize);
  2247. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  2248. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  2249. end;
  2250. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : tcgint;const ref : treference);
  2251. var
  2252. tmpreg: tregister;
  2253. begin
  2254. tmpreg:=getintregister(list,size);
  2255. a_load_const_reg(list,size,a,tmpreg);
  2256. a_load_reg_ref(list,size,size,tmpreg,ref);
  2257. end;
  2258. procedure tcg.a_load_const_loc(list : TAsmList;a : tcgint;const loc: tlocation);
  2259. begin
  2260. case loc.loc of
  2261. LOC_REFERENCE,LOC_CREFERENCE:
  2262. a_load_const_ref(list,loc.size,a,loc.reference);
  2263. LOC_REGISTER,LOC_CREGISTER:
  2264. a_load_const_reg(list,loc.size,a,loc.register);
  2265. LOC_SUBSETREG,LOC_CSUBSETREG:
  2266. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  2267. LOC_SUBSETREF,LOC_CSUBSETREF:
  2268. a_load_const_subsetref(list,loc.size,a,loc.sref);
  2269. else
  2270. internalerror(200203272);
  2271. end;
  2272. end;
  2273. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  2274. begin
  2275. case loc.loc of
  2276. LOC_REFERENCE,LOC_CREFERENCE:
  2277. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2278. LOC_REGISTER,LOC_CREGISTER:
  2279. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2280. LOC_SUBSETREG,LOC_CSUBSETREG:
  2281. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  2282. LOC_SUBSETREF,LOC_CSUBSETREF:
  2283. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  2284. LOC_MMREGISTER,LOC_CMMREGISTER:
  2285. a_loadmm_intreg_reg(list,fromsize,loc.size,reg,loc.register,mms_movescalar);
  2286. else
  2287. internalerror(200203271);
  2288. end;
  2289. end;
  2290. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2291. begin
  2292. case loc.loc of
  2293. LOC_REFERENCE,LOC_CREFERENCE:
  2294. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2295. LOC_REGISTER,LOC_CREGISTER:
  2296. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2297. LOC_CONSTANT:
  2298. a_load_const_reg(list,tosize,loc.value,reg);
  2299. LOC_SUBSETREG,LOC_CSUBSETREG:
  2300. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2301. LOC_SUBSETREF,LOC_CSUBSETREF:
  2302. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2303. else
  2304. internalerror(200109092);
  2305. end;
  2306. end;
  2307. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2308. begin
  2309. case loc.loc of
  2310. LOC_REFERENCE,LOC_CREFERENCE:
  2311. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2312. LOC_REGISTER,LOC_CREGISTER:
  2313. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2314. LOC_CONSTANT:
  2315. a_load_const_ref(list,tosize,loc.value,ref);
  2316. LOC_SUBSETREG,LOC_CSUBSETREG:
  2317. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2318. LOC_SUBSETREF,LOC_CSUBSETREF:
  2319. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2320. else
  2321. internalerror(200109302);
  2322. end;
  2323. end;
  2324. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2325. begin
  2326. case loc.loc of
  2327. LOC_REFERENCE,LOC_CREFERENCE:
  2328. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2329. LOC_REGISTER,LOC_CREGISTER:
  2330. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2331. LOC_CONSTANT:
  2332. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2333. LOC_SUBSETREG,LOC_CSUBSETREG:
  2334. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2335. LOC_SUBSETREF,LOC_CSUBSETREF:
  2336. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2337. else
  2338. internalerror(2006052310);
  2339. end;
  2340. end;
  2341. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2342. begin
  2343. case loc.loc of
  2344. LOC_REFERENCE,LOC_CREFERENCE:
  2345. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2346. LOC_REGISTER,LOC_CREGISTER:
  2347. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2348. LOC_SUBSETREG,LOC_CSUBSETREG:
  2349. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2350. LOC_SUBSETREF,LOC_CSUBSETREF:
  2351. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2352. else
  2353. internalerror(2006051510);
  2354. end;
  2355. end;
  2356. procedure tcg.optimize_op_const(var op: topcg; var a : tcgint);
  2357. var
  2358. powerval : longint;
  2359. begin
  2360. case op of
  2361. OP_OR :
  2362. begin
  2363. { or with zero returns same result }
  2364. if a = 0 then
  2365. op:=OP_NONE
  2366. else
  2367. { or with max returns max }
  2368. if a = -1 then
  2369. op:=OP_MOVE;
  2370. end;
  2371. OP_AND :
  2372. begin
  2373. { and with max returns same result }
  2374. if (a = -1) then
  2375. op:=OP_NONE
  2376. else
  2377. { and with 0 returns 0 }
  2378. if a=0 then
  2379. op:=OP_MOVE;
  2380. end;
  2381. OP_DIV :
  2382. begin
  2383. { division by 1 returns result }
  2384. if a = 1 then
  2385. op:=OP_NONE
  2386. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2387. begin
  2388. a := powerval;
  2389. op:= OP_SHR;
  2390. end;
  2391. end;
  2392. OP_IDIV:
  2393. begin
  2394. if a = 1 then
  2395. op:=OP_NONE;
  2396. end;
  2397. OP_MUL,OP_IMUL:
  2398. begin
  2399. if a = 1 then
  2400. op:=OP_NONE
  2401. else
  2402. if a=0 then
  2403. op:=OP_MOVE
  2404. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2405. begin
  2406. a := powerval;
  2407. op:= OP_SHL;
  2408. end;
  2409. end;
  2410. OP_ADD,OP_SUB:
  2411. begin
  2412. if a = 0 then
  2413. op:=OP_NONE;
  2414. end;
  2415. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  2416. begin
  2417. if a = 0 then
  2418. op:=OP_NONE;
  2419. end;
  2420. end;
  2421. end;
  2422. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2423. begin
  2424. case loc.loc of
  2425. LOC_REFERENCE, LOC_CREFERENCE:
  2426. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2427. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2428. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2429. else
  2430. internalerror(200203301);
  2431. end;
  2432. end;
  2433. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2434. begin
  2435. case loc.loc of
  2436. LOC_REFERENCE, LOC_CREFERENCE:
  2437. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2438. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2439. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2440. else
  2441. internalerror(48991);
  2442. end;
  2443. end;
  2444. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2445. var
  2446. reg: tregister;
  2447. regsize: tcgsize;
  2448. begin
  2449. if (fromsize>=tosize) then
  2450. regsize:=fromsize
  2451. else
  2452. regsize:=tosize;
  2453. reg:=getfpuregister(list,regsize);
  2454. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2455. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2456. end;
  2457. procedure tcg.a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2458. var
  2459. ref : treference;
  2460. begin
  2461. paramanager.alloccgpara(list,cgpara);
  2462. case cgpara.location^.loc of
  2463. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2464. begin
  2465. cgpara.check_simple_location;
  2466. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2467. end;
  2468. LOC_REFERENCE,LOC_CREFERENCE:
  2469. begin
  2470. cgpara.check_simple_location;
  2471. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2472. a_loadfpu_reg_ref(list,size,size,r,ref);
  2473. end;
  2474. LOC_REGISTER,LOC_CREGISTER:
  2475. begin
  2476. { paramfpu_ref does the check_simpe_location check here if necessary }
  2477. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  2478. a_loadfpu_reg_ref(list,size,size,r,ref);
  2479. a_loadfpu_ref_cgpara(list,size,ref,cgpara);
  2480. tg.Ungettemp(list,ref);
  2481. end;
  2482. else
  2483. internalerror(2010053112);
  2484. end;
  2485. end;
  2486. procedure tcg.a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2487. var
  2488. href : treference;
  2489. hsize: tcgsize;
  2490. begin
  2491. case cgpara.location^.loc of
  2492. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2493. begin
  2494. cgpara.check_simple_location;
  2495. paramanager.alloccgpara(list,cgpara);
  2496. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2497. end;
  2498. LOC_REFERENCE,LOC_CREFERENCE:
  2499. begin
  2500. cgpara.check_simple_location;
  2501. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2502. { concatcopy should choose the best way to copy the data }
  2503. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2504. end;
  2505. LOC_REGISTER,LOC_CREGISTER:
  2506. begin
  2507. { force integer size }
  2508. hsize:=int_cgsize(tcgsize2size[size]);
  2509. {$ifndef cpu64bitalu}
  2510. if (hsize in [OS_S64,OS_64]) then
  2511. cg64.a_load64_ref_cgpara(list,ref,cgpara)
  2512. else
  2513. {$endif not cpu64bitalu}
  2514. begin
  2515. cgpara.check_simple_location;
  2516. a_load_ref_cgpara(list,hsize,ref,cgpara)
  2517. end;
  2518. end
  2519. else
  2520. internalerror(200402201);
  2521. end;
  2522. end;
  2523. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; const ref: TReference);
  2524. var
  2525. tmpreg : tregister;
  2526. begin
  2527. tmpreg:=getintregister(list,size);
  2528. a_load_ref_reg(list,size,size,ref,tmpreg);
  2529. a_op_const_reg(list,op,size,a,tmpreg);
  2530. a_load_reg_ref(list,size,size,tmpreg,ref);
  2531. end;
  2532. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : tcgint; const sreg: tsubsetregister);
  2533. var
  2534. tmpreg: tregister;
  2535. begin
  2536. tmpreg := getintregister(list, size);
  2537. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2538. a_op_const_reg(list,op,size,a,tmpreg);
  2539. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2540. end;
  2541. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : tcgint; const sref: tsubsetreference);
  2542. var
  2543. tmpreg: tregister;
  2544. begin
  2545. tmpreg := getintregister(list, size);
  2546. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2547. a_op_const_reg(list,op,size,a,tmpreg);
  2548. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2549. end;
  2550. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: tcgint; const loc: tlocation);
  2551. begin
  2552. case loc.loc of
  2553. LOC_REGISTER, LOC_CREGISTER:
  2554. a_op_const_reg(list,op,loc.size,a,loc.register);
  2555. LOC_REFERENCE, LOC_CREFERENCE:
  2556. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2557. LOC_SUBSETREG, LOC_CSUBSETREG:
  2558. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2559. LOC_SUBSETREF, LOC_CSUBSETREF:
  2560. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2561. else
  2562. internalerror(200109061);
  2563. end;
  2564. end;
  2565. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2566. var
  2567. tmpreg : tregister;
  2568. begin
  2569. tmpreg:=getintregister(list,size);
  2570. a_load_ref_reg(list,size,size,ref,tmpreg);
  2571. a_op_reg_reg(list,op,size,reg,tmpreg);
  2572. a_load_reg_ref(list,size,size,tmpreg,ref);
  2573. end;
  2574. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2575. var
  2576. tmpreg: tregister;
  2577. begin
  2578. case op of
  2579. OP_NOT,OP_NEG:
  2580. { handle it as "load ref,reg; op reg" }
  2581. begin
  2582. a_load_ref_reg(list,size,size,ref,reg);
  2583. a_op_reg_reg(list,op,size,reg,reg);
  2584. end;
  2585. else
  2586. begin
  2587. tmpreg:=getintregister(list,size);
  2588. a_load_ref_reg(list,size,size,ref,tmpreg);
  2589. a_op_reg_reg(list,op,size,tmpreg,reg);
  2590. end;
  2591. end;
  2592. end;
  2593. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2594. var
  2595. tmpreg: tregister;
  2596. begin
  2597. tmpreg := getintregister(list, opsize);
  2598. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2599. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2600. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2601. end;
  2602. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2603. var
  2604. tmpreg: tregister;
  2605. begin
  2606. tmpreg := getintregister(list, opsize);
  2607. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2608. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2609. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2610. end;
  2611. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2612. begin
  2613. case loc.loc of
  2614. LOC_REGISTER, LOC_CREGISTER:
  2615. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2616. LOC_REFERENCE, LOC_CREFERENCE:
  2617. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2618. LOC_SUBSETREG, LOC_CSUBSETREG:
  2619. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2620. LOC_SUBSETREF, LOC_CSUBSETREF:
  2621. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2622. else
  2623. internalerror(200109061);
  2624. end;
  2625. end;
  2626. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2627. var
  2628. tmpreg: tregister;
  2629. begin
  2630. case loc.loc of
  2631. LOC_REGISTER,LOC_CREGISTER:
  2632. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2633. LOC_REFERENCE,LOC_CREFERENCE:
  2634. begin
  2635. tmpreg:=getintregister(list,loc.size);
  2636. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2637. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2638. end;
  2639. LOC_SUBSETREG, LOC_CSUBSETREG:
  2640. begin
  2641. tmpreg:=getintregister(list,loc.size);
  2642. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2643. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2644. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2645. end;
  2646. LOC_SUBSETREF, LOC_CSUBSETREF:
  2647. begin
  2648. tmpreg:=getintregister(list,loc.size);
  2649. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2650. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2651. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2652. end;
  2653. else
  2654. internalerror(200109061);
  2655. end;
  2656. end;
  2657. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2658. a:tcgint;src,dst:Tregister);
  2659. begin
  2660. a_load_reg_reg(list,size,size,src,dst);
  2661. a_op_const_reg(list,op,size,a,dst);
  2662. end;
  2663. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2664. size: tcgsize; src1, src2, dst: tregister);
  2665. var
  2666. tmpreg: tregister;
  2667. begin
  2668. if (dst<>src1) then
  2669. begin
  2670. a_load_reg_reg(list,size,size,src2,dst);
  2671. a_op_reg_reg(list,op,size,src1,dst);
  2672. end
  2673. else
  2674. begin
  2675. { can we do a direct operation on the target register ? }
  2676. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2677. a_op_reg_reg(list,op,size,src2,dst)
  2678. else
  2679. begin
  2680. tmpreg:=getintregister(list,size);
  2681. a_load_reg_reg(list,size,size,src2,tmpreg);
  2682. a_op_reg_reg(list,op,size,src1,tmpreg);
  2683. a_load_reg_reg(list,size,size,tmpreg,dst);
  2684. end;
  2685. end;
  2686. end;
  2687. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2688. begin
  2689. a_op_const_reg_reg(list,op,size,a,src,dst);
  2690. ovloc.loc:=LOC_VOID;
  2691. end;
  2692. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2693. begin
  2694. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2695. ovloc.loc:=LOC_VOID;
  2696. end;
  2697. procedure tcg.a_cmp_const_reg_label(list: TAsmList; size: tcgsize;
  2698. cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);
  2699. var
  2700. tmpreg: tregister;
  2701. begin
  2702. tmpreg:=getintregister(list,size);
  2703. a_load_const_reg(list,size,a,tmpreg);
  2704. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2705. end;
  2706. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const ref : treference;
  2707. l : tasmlabel);
  2708. var
  2709. tmpreg: tregister;
  2710. begin
  2711. tmpreg:=getintregister(list,size);
  2712. a_load_ref_reg(list,size,size,ref,tmpreg);
  2713. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2714. end;
  2715. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const loc : tlocation;
  2716. l : tasmlabel);
  2717. var
  2718. tmpreg : tregister;
  2719. begin
  2720. case loc.loc of
  2721. LOC_REGISTER,LOC_CREGISTER:
  2722. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2723. LOC_REFERENCE,LOC_CREFERENCE:
  2724. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2725. LOC_SUBSETREG, LOC_CSUBSETREG:
  2726. begin
  2727. tmpreg:=getintregister(list,size);
  2728. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2729. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2730. end;
  2731. LOC_SUBSETREF, LOC_CSUBSETREF:
  2732. begin
  2733. tmpreg:=getintregister(list,size);
  2734. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2735. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2736. end;
  2737. else
  2738. internalerror(200109061);
  2739. end;
  2740. end;
  2741. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2742. var
  2743. tmpreg: tregister;
  2744. begin
  2745. tmpreg:=getintregister(list,size);
  2746. a_load_ref_reg(list,size,size,ref,tmpreg);
  2747. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2748. end;
  2749. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2750. var
  2751. tmpreg: tregister;
  2752. begin
  2753. tmpreg:=getintregister(list,size);
  2754. a_load_ref_reg(list,size,size,ref,tmpreg);
  2755. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2756. end;
  2757. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2758. begin
  2759. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2760. end;
  2761. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2762. begin
  2763. case loc.loc of
  2764. LOC_REGISTER,
  2765. LOC_CREGISTER:
  2766. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2767. LOC_REFERENCE,
  2768. LOC_CREFERENCE :
  2769. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2770. LOC_CONSTANT:
  2771. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2772. LOC_SUBSETREG,
  2773. LOC_CSUBSETREG:
  2774. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2775. LOC_SUBSETREF,
  2776. LOC_CSUBSETREF:
  2777. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2778. else
  2779. internalerror(200203231);
  2780. end;
  2781. end;
  2782. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2783. var
  2784. tmpreg: tregister;
  2785. begin
  2786. tmpreg:=getintregister(list, cmpsize);
  2787. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2788. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2789. end;
  2790. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2791. var
  2792. tmpreg: tregister;
  2793. begin
  2794. tmpreg:=getintregister(list, cmpsize);
  2795. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2796. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2797. end;
  2798. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2799. l : tasmlabel);
  2800. var
  2801. tmpreg: tregister;
  2802. begin
  2803. case loc.loc of
  2804. LOC_REGISTER,LOC_CREGISTER:
  2805. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2806. LOC_REFERENCE,LOC_CREFERENCE:
  2807. begin
  2808. tmpreg:=getintregister(list,size);
  2809. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2810. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2811. end;
  2812. LOC_SUBSETREG, LOC_CSUBSETREG:
  2813. begin
  2814. tmpreg:=getintregister(list, size);
  2815. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2816. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2817. end;
  2818. LOC_SUBSETREF, LOC_CSUBSETREF:
  2819. begin
  2820. tmpreg:=getintregister(list, size);
  2821. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2822. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2823. end;
  2824. else
  2825. internalerror(200109061);
  2826. end;
  2827. end;
  2828. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2829. var
  2830. tmpreg: tregister;
  2831. begin
  2832. case loc.loc of
  2833. LOC_MMREGISTER,LOC_CMMREGISTER:
  2834. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2835. LOC_REFERENCE,LOC_CREFERENCE:
  2836. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2837. LOC_REGISTER,LOC_CREGISTER:
  2838. a_loadmm_intreg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2839. LOC_SUBSETREF,LOC_CSUBSETREF,
  2840. LOC_SUBSETREG,LOC_CSUBSETREG:
  2841. begin
  2842. tmpreg:=getintregister(list,loc.size);
  2843. a_load_loc_reg(list,loc.size,loc,tmpreg);
  2844. a_loadmm_intreg_reg(list,loc.size,size,tmpreg,reg,shuffle);
  2845. end
  2846. else
  2847. internalerror(200310121);
  2848. end;
  2849. end;
  2850. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2851. begin
  2852. case loc.loc of
  2853. LOC_MMREGISTER,LOC_CMMREGISTER:
  2854. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2855. LOC_REFERENCE,LOC_CREFERENCE:
  2856. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2857. else
  2858. internalerror(200310122);
  2859. end;
  2860. end;
  2861. procedure tcg.a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2862. var
  2863. href : treference;
  2864. {$ifndef cpu64bitalu}
  2865. tmpreg : tregister;
  2866. reg64 : tregister64;
  2867. {$endif not cpu64bitalu}
  2868. begin
  2869. {$ifndef cpu64bitalu}
  2870. if not(cgpara.location^.loc in [LOC_REGISTER,LOC_CREGISTER]) or
  2871. (size<>OS_F64) then
  2872. {$endif not cpu64bitalu}
  2873. cgpara.check_simple_location;
  2874. paramanager.alloccgpara(list,cgpara);
  2875. case cgpara.location^.loc of
  2876. LOC_MMREGISTER,LOC_CMMREGISTER:
  2877. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2878. LOC_REFERENCE,LOC_CREFERENCE:
  2879. begin
  2880. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2881. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2882. end;
  2883. LOC_REGISTER,LOC_CREGISTER:
  2884. begin
  2885. if assigned(shuffle) and
  2886. not shufflescalar(shuffle) then
  2887. internalerror(2009112510);
  2888. {$ifndef cpu64bitalu}
  2889. if (size=OS_F64) then
  2890. begin
  2891. if not assigned(cgpara.location^.next) or
  2892. assigned(cgpara.location^.next^.next) then
  2893. internalerror(2009112512);
  2894. case cgpara.location^.next^.loc of
  2895. LOC_REGISTER,LOC_CREGISTER:
  2896. tmpreg:=cgpara.location^.next^.register;
  2897. LOC_REFERENCE,LOC_CREFERENCE:
  2898. tmpreg:=getintregister(list,OS_32);
  2899. else
  2900. internalerror(2009112910);
  2901. end;
  2902. if (target_info.endian=ENDIAN_BIG) then
  2903. begin
  2904. { paraloc^ -> high
  2905. paraloc^.next -> low }
  2906. reg64.reghi:=cgpara.location^.register;
  2907. reg64.reglo:=tmpreg;
  2908. end
  2909. else
  2910. begin
  2911. { paraloc^ -> low
  2912. paraloc^.next -> high }
  2913. reg64.reglo:=cgpara.location^.register;
  2914. reg64.reghi:=tmpreg;
  2915. end;
  2916. cg64.a_loadmm_reg_intreg64(list,size,reg,reg64);
  2917. if (cgpara.location^.next^.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  2918. begin
  2919. if not(cgpara.location^.next^.size in [OS_32,OS_S32]) then
  2920. internalerror(2009112911);
  2921. reference_reset_base(href,cgpara.location^.next^.reference.index,cgpara.location^.next^.reference.offset,cgpara.alignment);
  2922. a_load_reg_ref(list,OS_32,cgpara.location^.next^.size,tmpreg,href);
  2923. end;
  2924. end
  2925. else
  2926. {$endif not cpu64bitalu}
  2927. a_loadmm_reg_intreg(list,size,cgpara.location^.size,reg,cgpara.location^.register,mms_movescalar);
  2928. end
  2929. else
  2930. internalerror(200310123);
  2931. end;
  2932. end;
  2933. procedure tcg.a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2934. var
  2935. hr : tregister;
  2936. hs : tmmshuffle;
  2937. begin
  2938. cgpara.check_simple_location;
  2939. hr:=getmmregister(list,cgpara.location^.size);
  2940. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2941. if realshuffle(shuffle) then
  2942. begin
  2943. hs:=shuffle^;
  2944. removeshuffles(hs);
  2945. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,@hs);
  2946. end
  2947. else
  2948. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,shuffle);
  2949. end;
  2950. procedure tcg.a_loadmm_loc_cgpara(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2951. begin
  2952. case loc.loc of
  2953. LOC_MMREGISTER,LOC_CMMREGISTER:
  2954. a_loadmm_reg_cgpara(list,loc.size,loc.register,cgpara,shuffle);
  2955. LOC_REFERENCE,LOC_CREFERENCE:
  2956. a_loadmm_ref_cgpara(list,loc.size,loc.reference,cgpara,shuffle);
  2957. else
  2958. internalerror(200310123);
  2959. end;
  2960. end;
  2961. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2962. var
  2963. hr : tregister;
  2964. hs : tmmshuffle;
  2965. begin
  2966. hr:=getmmregister(list,size);
  2967. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2968. if realshuffle(shuffle) then
  2969. begin
  2970. hs:=shuffle^;
  2971. removeshuffles(hs);
  2972. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2973. end
  2974. else
  2975. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2976. end;
  2977. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2978. var
  2979. hr : tregister;
  2980. hs : tmmshuffle;
  2981. begin
  2982. hr:=getmmregister(list,size);
  2983. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2984. if realshuffle(shuffle) then
  2985. begin
  2986. hs:=shuffle^;
  2987. removeshuffles(hs);
  2988. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2989. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2990. end
  2991. else
  2992. begin
  2993. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2994. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2995. end;
  2996. end;
  2997. procedure tcg.a_loadmm_intreg_reg(list: tasmlist; fromsize,tosize: tcgsize; intreg,mmreg: tregister; shuffle: pmmshuffle);
  2998. var
  2999. tmpref: treference;
  3000. begin
  3001. if (tcgsize2size[fromsize]<>4) or
  3002. (tcgsize2size[tosize]<>4) then
  3003. internalerror(2009112503);
  3004. tg.gettemp(list,4,4,tt_normal,tmpref);
  3005. a_load_reg_ref(list,fromsize,fromsize,intreg,tmpref);
  3006. a_loadmm_ref_reg(list,tosize,tosize,tmpref,mmreg,shuffle);
  3007. tg.ungettemp(list,tmpref);
  3008. end;
  3009. procedure tcg.a_loadmm_reg_intreg(list: tasmlist; fromsize,tosize: tcgsize; mmreg,intreg: tregister; shuffle: pmmshuffle);
  3010. var
  3011. tmpref: treference;
  3012. begin
  3013. if (tcgsize2size[fromsize]<>4) or
  3014. (tcgsize2size[tosize]<>4) then
  3015. internalerror(2009112504);
  3016. tg.gettemp(list,8,8,tt_normal,tmpref);
  3017. cg.a_loadmm_reg_ref(list,fromsize,fromsize,mmreg,tmpref,shuffle);
  3018. a_load_ref_reg(list,tosize,tosize,tmpref,intreg);
  3019. tg.ungettemp(list,tmpref);
  3020. end;
  3021. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  3022. begin
  3023. case loc.loc of
  3024. LOC_CMMREGISTER,LOC_MMREGISTER:
  3025. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  3026. LOC_CREFERENCE,LOC_REFERENCE:
  3027. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  3028. else
  3029. internalerror(200312232);
  3030. end;
  3031. end;
  3032. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : tcgint);
  3033. begin
  3034. g_concatcopy(list,source,dest,len);
  3035. end;
  3036. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  3037. var
  3038. cgpara1,cgpara2,cgpara3 : TCGPara;
  3039. begin
  3040. cgpara1.init;
  3041. cgpara2.init;
  3042. cgpara3.init;
  3043. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3044. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3045. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3046. a_loadaddr_ref_cgpara(list,dest,cgpara3);
  3047. a_loadaddr_ref_cgpara(list,source,cgpara2);
  3048. a_load_const_cgpara(list,OS_INT,len,cgpara1);
  3049. paramanager.freecgpara(list,cgpara3);
  3050. paramanager.freecgpara(list,cgpara2);
  3051. paramanager.freecgpara(list,cgpara1);
  3052. allocallcpuregisters(list);
  3053. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  3054. deallocallcpuregisters(list);
  3055. cgpara3.done;
  3056. cgpara2.done;
  3057. cgpara1.done;
  3058. end;
  3059. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  3060. var
  3061. cgpara1,cgpara2 : TCGPara;
  3062. begin
  3063. cgpara1.init;
  3064. cgpara2.init;
  3065. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3066. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3067. a_loadaddr_ref_cgpara(list,dest,cgpara2);
  3068. a_loadaddr_ref_cgpara(list,source,cgpara1);
  3069. paramanager.freecgpara(list,cgpara2);
  3070. paramanager.freecgpara(list,cgpara1);
  3071. allocallcpuregisters(list);
  3072. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  3073. deallocallcpuregisters(list);
  3074. cgpara2.done;
  3075. cgpara1.done;
  3076. end;
  3077. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  3078. var
  3079. href : treference;
  3080. incrfunc : string;
  3081. cgpara1,cgpara2 : TCGPara;
  3082. begin
  3083. cgpara1.init;
  3084. cgpara2.init;
  3085. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3086. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3087. if is_interfacecom_or_dispinterface(t) then
  3088. incrfunc:='FPC_INTF_INCR_REF'
  3089. else if is_ansistring(t) then
  3090. incrfunc:='FPC_ANSISTR_INCR_REF'
  3091. else if is_widestring(t) then
  3092. incrfunc:='FPC_WIDESTR_INCR_REF'
  3093. else if is_unicodestring(t) then
  3094. incrfunc:='FPC_UNICODESTR_INCR_REF'
  3095. else if is_dynamic_array(t) then
  3096. incrfunc:='FPC_DYNARRAY_INCR_REF'
  3097. else
  3098. incrfunc:='';
  3099. { call the special incr function or the generic addref }
  3100. if incrfunc<>'' then
  3101. begin
  3102. { widestrings aren't ref. counted on all platforms so we need the address
  3103. to create a real copy }
  3104. if is_widestring(t) then
  3105. a_loadaddr_ref_cgpara(list,ref,cgpara1)
  3106. else
  3107. { these functions get the pointer by value }
  3108. a_load_ref_cgpara(list,OS_ADDR,ref,cgpara1);
  3109. paramanager.freecgpara(list,cgpara1);
  3110. allocallcpuregisters(list);
  3111. a_call_name(list,incrfunc,false);
  3112. deallocallcpuregisters(list);
  3113. end
  3114. else
  3115. begin
  3116. if is_open_array(t) then
  3117. InternalError(201103054);
  3118. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3119. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3120. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3121. paramanager.freecgpara(list,cgpara1);
  3122. paramanager.freecgpara(list,cgpara2);
  3123. allocallcpuregisters(list);
  3124. a_call_name(list,'FPC_ADDREF',false);
  3125. deallocallcpuregisters(list);
  3126. end;
  3127. cgpara2.done;
  3128. cgpara1.done;
  3129. end;
  3130. procedure tcg.g_array_rtti_helper(list: TAsmList; t: tdef; const ref: treference; const highloc: tlocation; const name: string);
  3131. var
  3132. cgpara1,cgpara2,cgpara3: TCGPara;
  3133. href: TReference;
  3134. hreg, lenreg: TRegister;
  3135. begin
  3136. cgpara1.init;
  3137. cgpara2.init;
  3138. cgpara3.init;
  3139. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3140. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3141. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3142. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3143. if highloc.loc=LOC_CONSTANT then
  3144. a_load_const_cgpara(list,OS_INT,highloc.value+1,cgpara3)
  3145. else
  3146. begin
  3147. if highloc.loc in [LOC_REGISTER,LOC_CREGISTER] then
  3148. hreg:=highloc.register
  3149. else
  3150. begin
  3151. hreg:=getintregister(list,OS_INT);
  3152. a_load_loc_reg(list,OS_INT,highloc,hreg);
  3153. end;
  3154. { increment, converts high(x) to length(x) }
  3155. lenreg:=getintregister(list,OS_INT);
  3156. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,hreg,lenreg);
  3157. a_load_reg_cgpara(list,OS_INT,lenreg,cgpara3);
  3158. end;
  3159. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3160. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3161. paramanager.freecgpara(list,cgpara1);
  3162. paramanager.freecgpara(list,cgpara2);
  3163. paramanager.freecgpara(list,cgpara3);
  3164. allocallcpuregisters(list);
  3165. a_call_name(list,name,false);
  3166. deallocallcpuregisters(list);
  3167. cgpara3.done;
  3168. cgpara2.done;
  3169. cgpara1.done;
  3170. end;
  3171. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  3172. var
  3173. href : treference;
  3174. cgpara1,cgpara2 : TCGPara;
  3175. begin
  3176. cgpara1.init;
  3177. cgpara2.init;
  3178. if is_ansistring(t) or
  3179. is_widestring(t) or
  3180. is_unicodestring(t) or
  3181. is_interfacecom_or_dispinterface(t) or
  3182. is_dynamic_array(t) then
  3183. a_load_const_ref(list,OS_ADDR,0,ref)
  3184. else if t.typ=variantdef then
  3185. begin
  3186. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3187. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3188. paramanager.freecgpara(list,cgpara1);
  3189. allocallcpuregisters(list);
  3190. a_call_name(list,'FPC_VARIANT_INIT',false);
  3191. deallocallcpuregisters(list);
  3192. end
  3193. else
  3194. begin
  3195. if is_open_array(t) then
  3196. InternalError(201103052);
  3197. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3198. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3199. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3200. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3201. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3202. paramanager.freecgpara(list,cgpara1);
  3203. paramanager.freecgpara(list,cgpara2);
  3204. allocallcpuregisters(list);
  3205. a_call_name(list,'FPC_INITIALIZE',false);
  3206. deallocallcpuregisters(list);
  3207. end;
  3208. cgpara1.done;
  3209. cgpara2.done;
  3210. end;
  3211. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  3212. var
  3213. href : treference;
  3214. cgpara1,cgpara2 : TCGPara;
  3215. decrfunc : string;
  3216. begin
  3217. if is_interfacecom_or_dispinterface(t) then
  3218. decrfunc:='FPC_INTF_DECR_REF'
  3219. else if is_ansistring(t) then
  3220. decrfunc:='FPC_ANSISTR_DECR_REF'
  3221. else if is_widestring(t) then
  3222. decrfunc:='FPC_WIDESTR_DECR_REF'
  3223. else if is_unicodestring(t) then
  3224. decrfunc:='FPC_UNICODESTR_DECR_REF'
  3225. else if t.typ=variantdef then
  3226. decrfunc:='FPC_VARIANT_CLEAR'
  3227. else
  3228. begin
  3229. cgpara1.init;
  3230. cgpara2.init;
  3231. if is_open_array(t) then
  3232. InternalError(201103051);
  3233. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3234. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3235. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3236. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3237. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3238. paramanager.freecgpara(list,cgpara1);
  3239. paramanager.freecgpara(list,cgpara2);
  3240. if is_dynamic_array(t) then
  3241. g_call(list,'FPC_DYNARRAY_CLEAR')
  3242. else
  3243. g_call(list,'FPC_FINALIZE');
  3244. cgpara1.done;
  3245. cgpara2.done;
  3246. exit;
  3247. end;
  3248. cgpara1.init;
  3249. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3250. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3251. paramanager.freecgpara(list,cgpara1);
  3252. g_call(list,decrfunc);
  3253. cgpara1.done;
  3254. end;
  3255. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  3256. { generate range checking code for the value at location p. The type }
  3257. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  3258. { is the original type used at that location. When both defs are equal }
  3259. { the check is also insert (needed for succ,pref,inc,dec) }
  3260. const
  3261. aintmax=high(aint);
  3262. var
  3263. neglabel : tasmlabel;
  3264. hreg : tregister;
  3265. lto,hto,
  3266. lfrom,hfrom : TConstExprInt;
  3267. fromsize, tosize: cardinal;
  3268. from_signed, to_signed: boolean;
  3269. begin
  3270. { range checking on and range checkable value? }
  3271. if not(cs_check_range in current_settings.localswitches) or
  3272. not(fromdef.typ in [orddef,enumdef]) or
  3273. { C-style booleans can't really fail range checks, }
  3274. { all values are always valid }
  3275. is_cbool(todef) then
  3276. exit;
  3277. {$ifndef cpu64bitalu}
  3278. { handle 64bit rangechecks separate for 32bit processors }
  3279. if is_64bit(fromdef) or is_64bit(todef) then
  3280. begin
  3281. cg64.g_rangecheck64(list,l,fromdef,todef);
  3282. exit;
  3283. end;
  3284. {$endif cpu64bitalu}
  3285. { only check when assigning to scalar, subranges are different, }
  3286. { when todef=fromdef then the check is always generated }
  3287. getrange(fromdef,lfrom,hfrom);
  3288. getrange(todef,lto,hto);
  3289. from_signed := is_signed(fromdef);
  3290. to_signed := is_signed(todef);
  3291. { check the rangedef of the array, not the array itself }
  3292. { (only change now, since getrange needs the arraydef) }
  3293. if (todef.typ = arraydef) then
  3294. todef := tarraydef(todef).rangedef;
  3295. { no range check if from and to are equal and are both longint/dword }
  3296. { (if we have a 32bit processor) or int64/qword, since such }
  3297. { operations can at most cause overflows (JM) }
  3298. { Note that these checks are mostly processor independent, they only }
  3299. { have to be changed once we introduce 64bit subrange types }
  3300. {$ifdef cpu64bitalu}
  3301. if (fromdef = todef) and
  3302. (fromdef.typ=orddef) and
  3303. (((((torddef(fromdef).ordtype = s64bit) and
  3304. (lfrom = low(int64)) and
  3305. (hfrom = high(int64))) or
  3306. ((torddef(fromdef).ordtype = u64bit) and
  3307. (lfrom = low(qword)) and
  3308. (hfrom = high(qword))) or
  3309. ((torddef(fromdef).ordtype = scurrency) and
  3310. (lfrom = low(int64)) and
  3311. (hfrom = high(int64)))))) then
  3312. exit;
  3313. {$else cpu64bitalu}
  3314. if (fromdef = todef) and
  3315. (fromdef.typ=orddef) and
  3316. (((((torddef(fromdef).ordtype = s32bit) and
  3317. (lfrom = int64(low(longint))) and
  3318. (hfrom = int64(high(longint)))) or
  3319. ((torddef(fromdef).ordtype = u32bit) and
  3320. (lfrom = low(cardinal)) and
  3321. (hfrom = high(cardinal)))))) then
  3322. exit;
  3323. {$endif cpu64bitalu}
  3324. { optimize some range checks away in safe cases }
  3325. fromsize := fromdef.size;
  3326. tosize := todef.size;
  3327. if ((from_signed = to_signed) or
  3328. (not from_signed)) and
  3329. (lto<=lfrom) and (hto>=hfrom) and
  3330. (fromsize <= tosize) then
  3331. begin
  3332. { if fromsize < tosize, and both have the same signed-ness or }
  3333. { fromdef is unsigned, then all bit patterns from fromdef are }
  3334. { valid for todef as well }
  3335. if (fromsize < tosize) then
  3336. exit;
  3337. if (fromsize = tosize) and
  3338. (from_signed = to_signed) then
  3339. { only optimize away if all bit patterns which fit in fromsize }
  3340. { are valid for the todef }
  3341. begin
  3342. {$push}
  3343. {$Q-}
  3344. {$R-}
  3345. if to_signed then
  3346. begin
  3347. { calculation of the low/high ranges must not overflow 64 bit
  3348. otherwise we end up comparing with zero for 64 bit data types on
  3349. 64 bit processors }
  3350. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  3351. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  3352. exit
  3353. end
  3354. else
  3355. begin
  3356. { calculation of the low/high ranges must not overflow 64 bit
  3357. otherwise we end up having all zeros for 64 bit data types on
  3358. 64 bit processors }
  3359. if (lto = 0) and
  3360. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  3361. exit
  3362. end;
  3363. {$pop}
  3364. end
  3365. end;
  3366. { generate the rangecheck code for the def where we are going to }
  3367. { store the result }
  3368. { use the trick that }
  3369. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  3370. { To be able to do that, we have to make sure however that either }
  3371. { fromdef and todef are both signed or unsigned, or that we leave }
  3372. { the parts < 0 and > maxlongint out }
  3373. if from_signed xor to_signed then
  3374. begin
  3375. if from_signed then
  3376. { from is signed, to is unsigned }
  3377. begin
  3378. { if high(from) < 0 -> always range error }
  3379. if (hfrom < 0) or
  3380. { if low(to) > maxlongint also range error }
  3381. (lto > aintmax) then
  3382. begin
  3383. a_call_name(list,'FPC_RANGEERROR',false);
  3384. exit
  3385. end;
  3386. { from is signed and to is unsigned -> when looking at to }
  3387. { as an signed value, it must be < maxaint (otherwise }
  3388. { it will become negative, which is invalid since "to" is unsigned) }
  3389. if hto > aintmax then
  3390. hto := aintmax;
  3391. end
  3392. else
  3393. { from is unsigned, to is signed }
  3394. begin
  3395. if (lfrom > aintmax) or
  3396. (hto < 0) then
  3397. begin
  3398. a_call_name(list,'FPC_RANGEERROR',false);
  3399. exit
  3400. end;
  3401. { from is unsigned and to is signed -> when looking at to }
  3402. { as an unsigned value, it must be >= 0 (since negative }
  3403. { values are the same as values > maxlongint) }
  3404. if lto < 0 then
  3405. lto := 0;
  3406. end;
  3407. end;
  3408. hreg:=getintregister(list,OS_INT);
  3409. a_load_loc_reg(list,OS_INT,l,hreg);
  3410. a_op_const_reg(list,OP_SUB,OS_INT,tcgint(int64(lto)),hreg);
  3411. current_asmdata.getjumplabel(neglabel);
  3412. {
  3413. if from_signed then
  3414. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3415. else
  3416. }
  3417. {$ifdef cpu64bitalu}
  3418. if qword(hto-lto)>qword(aintmax) then
  3419. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3420. else
  3421. {$endif cpu64bitalu}
  3422. a_cmp_const_reg_label(list,OS_INT,OC_BE,tcgint(int64(hto-lto)),hreg,neglabel);
  3423. a_call_name(list,'FPC_RANGEERROR',false);
  3424. a_label(list,neglabel);
  3425. end;
  3426. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3427. begin
  3428. g_overflowCheck(list,loc,def);
  3429. end;
  3430. {$ifdef cpuflags}
  3431. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3432. var
  3433. tmpreg : tregister;
  3434. begin
  3435. tmpreg:=getintregister(list,size);
  3436. g_flags2reg(list,size,f,tmpreg);
  3437. a_load_reg_ref(list,size,size,tmpreg,ref);
  3438. end;
  3439. {$endif cpuflags}
  3440. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3441. var
  3442. OKLabel : tasmlabel;
  3443. cgpara1 : TCGPara;
  3444. begin
  3445. if (cs_check_object in current_settings.localswitches) or
  3446. (cs_check_range in current_settings.localswitches) then
  3447. begin
  3448. current_asmdata.getjumplabel(oklabel);
  3449. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3450. cgpara1.init;
  3451. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3452. a_load_const_cgpara(list,OS_INT,tcgint(210),cgpara1);
  3453. paramanager.freecgpara(list,cgpara1);
  3454. a_call_name(list,'FPC_HANDLEERROR',false);
  3455. a_label(list,oklabel);
  3456. cgpara1.done;
  3457. end;
  3458. end;
  3459. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3460. var
  3461. hrefvmt : treference;
  3462. cgpara1,cgpara2 : TCGPara;
  3463. begin
  3464. cgpara1.init;
  3465. cgpara2.init;
  3466. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3467. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3468. if (cs_check_object in current_settings.localswitches) then
  3469. begin
  3470. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  3471. a_loadaddr_ref_cgpara(list,hrefvmt,cgpara2);
  3472. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  3473. paramanager.freecgpara(list,cgpara1);
  3474. paramanager.freecgpara(list,cgpara2);
  3475. allocallcpuregisters(list);
  3476. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  3477. deallocallcpuregisters(list);
  3478. end
  3479. else
  3480. if (cs_check_range in current_settings.localswitches) then
  3481. begin
  3482. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  3483. paramanager.freecgpara(list,cgpara1);
  3484. allocallcpuregisters(list);
  3485. a_call_name(list,'FPC_CHECK_OBJECT',false);
  3486. deallocallcpuregisters(list);
  3487. end;
  3488. cgpara1.done;
  3489. cgpara2.done;
  3490. end;
  3491. {*****************************************************************************
  3492. Entry/Exit Code Functions
  3493. *****************************************************************************}
  3494. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);
  3495. var
  3496. sizereg,sourcereg,lenreg : tregister;
  3497. cgpara1,cgpara2,cgpara3 : TCGPara;
  3498. begin
  3499. { because some abis don't support dynamic stack allocation properly
  3500. open array value parameters are copied onto the heap
  3501. }
  3502. { calculate necessary memory }
  3503. { read/write operations on one register make the life of the register allocator hard }
  3504. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3505. begin
  3506. lenreg:=getintregister(list,OS_INT);
  3507. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3508. end
  3509. else
  3510. lenreg:=lenloc.register;
  3511. sizereg:=getintregister(list,OS_INT);
  3512. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3513. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3514. { load source }
  3515. sourcereg:=getaddressregister(list);
  3516. a_loadaddr_ref_reg(list,ref,sourcereg);
  3517. { do getmem call }
  3518. cgpara1.init;
  3519. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3520. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara1);
  3521. paramanager.freecgpara(list,cgpara1);
  3522. allocallcpuregisters(list);
  3523. a_call_name(list,'FPC_GETMEM',false);
  3524. deallocallcpuregisters(list);
  3525. cgpara1.done;
  3526. { return the new address }
  3527. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3528. { do move call }
  3529. cgpara1.init;
  3530. cgpara2.init;
  3531. cgpara3.init;
  3532. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3533. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3534. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3535. { load size }
  3536. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara3);
  3537. { load destination }
  3538. a_load_reg_cgpara(list,OS_ADDR,destreg,cgpara2);
  3539. { load source }
  3540. a_load_reg_cgpara(list,OS_ADDR,sourcereg,cgpara1);
  3541. paramanager.freecgpara(list,cgpara3);
  3542. paramanager.freecgpara(list,cgpara2);
  3543. paramanager.freecgpara(list,cgpara1);
  3544. allocallcpuregisters(list);
  3545. a_call_name(list,'FPC_MOVE',false);
  3546. deallocallcpuregisters(list);
  3547. cgpara3.done;
  3548. cgpara2.done;
  3549. cgpara1.done;
  3550. end;
  3551. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3552. var
  3553. cgpara1 : TCGPara;
  3554. begin
  3555. { do move call }
  3556. cgpara1.init;
  3557. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3558. { load source }
  3559. a_load_loc_cgpara(list,l,cgpara1);
  3560. paramanager.freecgpara(list,cgpara1);
  3561. allocallcpuregisters(list);
  3562. a_call_name(list,'FPC_FREEMEM',false);
  3563. deallocallcpuregisters(list);
  3564. cgpara1.done;
  3565. end;
  3566. procedure tcg.g_save_registers(list:TAsmList);
  3567. var
  3568. href : treference;
  3569. size : longint;
  3570. r : integer;
  3571. begin
  3572. { calculate temp. size }
  3573. size:=0;
  3574. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3575. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3576. inc(size,sizeof(aint));
  3577. { mm registers }
  3578. if uses_registers(R_MMREGISTER) then
  3579. begin
  3580. { Make sure we reserve enough space to do the alignment based on the offset
  3581. later on. We can't use the size for this, because the alignment of the start
  3582. of the temp is smaller than needed for an OS_VECTOR }
  3583. inc(size,tcgsize2size[OS_VECTOR]);
  3584. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3585. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3586. inc(size,tcgsize2size[OS_VECTOR]);
  3587. end;
  3588. if size>0 then
  3589. begin
  3590. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  3591. include(current_procinfo.flags,pi_has_saved_regs);
  3592. { Copy registers to temp }
  3593. href:=current_procinfo.save_regs_ref;
  3594. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3595. begin
  3596. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3597. begin
  3598. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3599. inc(href.offset,sizeof(aint));
  3600. end;
  3601. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3602. end;
  3603. if uses_registers(R_MMREGISTER) then
  3604. begin
  3605. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3606. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3607. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3608. begin
  3609. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3610. begin
  3611. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3612. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3613. end;
  3614. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3615. end;
  3616. end;
  3617. end;
  3618. end;
  3619. procedure tcg.g_restore_registers(list:TAsmList);
  3620. var
  3621. href : treference;
  3622. r : integer;
  3623. hreg : tregister;
  3624. begin
  3625. if not(pi_has_saved_regs in current_procinfo.flags) then
  3626. exit;
  3627. { Copy registers from temp }
  3628. href:=current_procinfo.save_regs_ref;
  3629. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3630. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3631. begin
  3632. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3633. { Allocate register so the optimizer does not remove the load }
  3634. a_reg_alloc(list,hreg);
  3635. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3636. inc(href.offset,sizeof(aint));
  3637. end;
  3638. if uses_registers(R_MMREGISTER) then
  3639. begin
  3640. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3641. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3642. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3643. begin
  3644. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3645. begin
  3646. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3647. { Allocate register so the optimizer does not remove the load }
  3648. a_reg_alloc(list,hreg);
  3649. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3650. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3651. end;
  3652. end;
  3653. end;
  3654. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3655. end;
  3656. procedure tcg.g_profilecode(list : TAsmList);
  3657. begin
  3658. end;
  3659. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3660. begin
  3661. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3662. end;
  3663. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: tcgint);
  3664. begin
  3665. a_load_const_ref(list, OS_INT, a, href);
  3666. end;
  3667. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3668. begin
  3669. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  3670. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3671. end;
  3672. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);
  3673. var
  3674. hsym : tsym;
  3675. href : treference;
  3676. paraloc : Pcgparalocation;
  3677. begin
  3678. { calculate the parameter info for the procdef }
  3679. procdef.init_paraloc_info(callerside);
  3680. hsym:=tsym(procdef.parast.Find('self'));
  3681. if not(assigned(hsym) and
  3682. (hsym.typ=paravarsym)) then
  3683. internalerror(200305251);
  3684. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3685. while paraloc<>nil do
  3686. with paraloc^ do
  3687. begin
  3688. case loc of
  3689. LOC_REGISTER:
  3690. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3691. LOC_REFERENCE:
  3692. begin
  3693. { offset in the wrapper needs to be adjusted for the stored
  3694. return address }
  3695. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  3696. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3697. end
  3698. else
  3699. internalerror(200309189);
  3700. end;
  3701. paraloc:=next;
  3702. end;
  3703. end;
  3704. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3705. begin
  3706. a_jmp_name(list,externalname);
  3707. end;
  3708. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3709. begin
  3710. a_call_name(list,s,false);
  3711. end;
  3712. procedure tcg.a_call_ref(list : TAsmList;ref: treference);
  3713. var
  3714. tempreg : TRegister;
  3715. begin
  3716. tempreg := getintregister(list, OS_ADDR);
  3717. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,tempreg);
  3718. a_call_reg(list,tempreg);
  3719. end;
  3720. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; const flags: tindsymflags): tregister;
  3721. var
  3722. l: tasmsymbol;
  3723. ref: treference;
  3724. nlsymname: string;
  3725. begin
  3726. result := NR_NO;
  3727. case target_info.system of
  3728. system_powerpc_darwin,
  3729. system_i386_darwin,
  3730. system_i386_iphonesim,
  3731. system_powerpc64_darwin,
  3732. system_arm_darwin:
  3733. begin
  3734. nlsymname:='L'+symname+'$non_lazy_ptr';
  3735. l:=current_asmdata.getasmsymbol(nlsymname);
  3736. if not(assigned(l)) then
  3737. begin
  3738. new_section(current_asmdata.asmlists[al_picdata],sec_data_nonlazy,'',sizeof(pint));
  3739. l:=current_asmdata.DefineAsmSymbol(nlsymname,AB_LOCAL,AT_DATA);
  3740. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3741. if not(is_weak in flags) then
  3742. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.RefAsmSymbol(symname).Name))
  3743. else
  3744. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.WeakRefAsmSymbol(symname).Name));
  3745. {$ifdef cpu64bitaddr}
  3746. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3747. {$else cpu64bitaddr}
  3748. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3749. {$endif cpu64bitaddr}
  3750. end;
  3751. result := getaddressregister(list);
  3752. reference_reset_symbol(ref,l,0,sizeof(pint));
  3753. { a_load_ref_reg will turn this into a pic-load if needed }
  3754. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3755. end;
  3756. end;
  3757. end;
  3758. procedure tcg.g_maybe_got_init(list: TAsmList);
  3759. begin
  3760. end;
  3761. procedure tcg.g_call(list: TAsmList;const s: string);
  3762. begin
  3763. allocallcpuregisters(list);
  3764. a_call_name(list,s,false);
  3765. deallocallcpuregisters(list);
  3766. end;
  3767. procedure tcg.g_local_unwind(list: TAsmList; l: TAsmLabel);
  3768. begin
  3769. a_jmp_always(list,l);
  3770. end;
  3771. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  3772. begin
  3773. internalerror(200807231);
  3774. end;
  3775. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  3776. begin
  3777. internalerror(200807232);
  3778. end;
  3779. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  3780. begin
  3781. internalerror(200807233);
  3782. end;
  3783. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  3784. begin
  3785. internalerror(200807234);
  3786. end;
  3787. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  3788. begin
  3789. Result:=TRegister(0);
  3790. internalerror(200807238);
  3791. end;
  3792. {*****************************************************************************
  3793. TCG64
  3794. *****************************************************************************}
  3795. {$ifndef cpu64bitalu}
  3796. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3797. begin
  3798. a_load64_reg_reg(list,regsrc,regdst);
  3799. a_op64_const_reg(list,op,size,value,regdst);
  3800. end;
  3801. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3802. var
  3803. tmpreg64 : tregister64;
  3804. begin
  3805. { when src1=dst then we need to first create a temp to prevent
  3806. overwriting src1 with src2 }
  3807. if (regsrc1.reghi=regdst.reghi) or
  3808. (regsrc1.reglo=regdst.reghi) or
  3809. (regsrc1.reghi=regdst.reglo) or
  3810. (regsrc1.reglo=regdst.reglo) then
  3811. begin
  3812. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3813. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3814. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3815. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3816. a_load64_reg_reg(list,tmpreg64,regdst);
  3817. end
  3818. else
  3819. begin
  3820. a_load64_reg_reg(list,regsrc2,regdst);
  3821. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3822. end;
  3823. end;
  3824. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3825. var
  3826. tmpreg64 : tregister64;
  3827. begin
  3828. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3829. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3830. a_load64_subsetref_reg(list,sref,tmpreg64);
  3831. a_op64_const_reg(list,op,size,a,tmpreg64);
  3832. a_load64_reg_subsetref(list,tmpreg64,sref);
  3833. end;
  3834. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3835. var
  3836. tmpreg64 : tregister64;
  3837. begin
  3838. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3839. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3840. a_load64_subsetref_reg(list,sref,tmpreg64);
  3841. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3842. a_load64_reg_subsetref(list,tmpreg64,sref);
  3843. end;
  3844. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3845. var
  3846. tmpreg64 : tregister64;
  3847. begin
  3848. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3849. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3850. a_load64_subsetref_reg(list,sref,tmpreg64);
  3851. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3852. a_load64_reg_subsetref(list,tmpreg64,sref);
  3853. end;
  3854. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3855. var
  3856. tmpreg64 : tregister64;
  3857. begin
  3858. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3859. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3860. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3861. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3862. end;
  3863. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3864. begin
  3865. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3866. ovloc.loc:=LOC_VOID;
  3867. end;
  3868. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3869. begin
  3870. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3871. ovloc.loc:=LOC_VOID;
  3872. end;
  3873. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3874. begin
  3875. case l.loc of
  3876. LOC_REFERENCE, LOC_CREFERENCE:
  3877. a_load64_ref_subsetref(list,l.reference,sref);
  3878. LOC_REGISTER,LOC_CREGISTER:
  3879. a_load64_reg_subsetref(list,l.register64,sref);
  3880. LOC_CONSTANT :
  3881. a_load64_const_subsetref(list,l.value64,sref);
  3882. LOC_SUBSETREF,LOC_CSUBSETREF:
  3883. a_load64_subsetref_subsetref(list,l.sref,sref);
  3884. else
  3885. internalerror(2006082210);
  3886. end;
  3887. end;
  3888. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3889. begin
  3890. case l.loc of
  3891. LOC_REFERENCE, LOC_CREFERENCE:
  3892. a_load64_subsetref_ref(list,sref,l.reference);
  3893. LOC_REGISTER,LOC_CREGISTER:
  3894. a_load64_subsetref_reg(list,sref,l.register64);
  3895. LOC_SUBSETREF,LOC_CSUBSETREF:
  3896. a_load64_subsetref_subsetref(list,sref,l.sref);
  3897. else
  3898. internalerror(2006082211);
  3899. end;
  3900. end;
  3901. {$endif cpu64bitalu}
  3902. function asmsym2indsymflags(sym: TAsmSymbol): tindsymflags;
  3903. begin
  3904. result:=[];
  3905. if sym.typ<>AT_FUNCTION then
  3906. include(result,is_data);
  3907. if sym.bind=AB_WEAK_EXTERNAL then
  3908. include(result,is_weak);
  3909. end;
  3910. procedure destroy_codegen;
  3911. begin
  3912. cg.free;
  3913. cg:=nil;
  3914. {$ifndef cpu64bitalu}
  3915. cg64.free;
  3916. cg64:=nil;
  3917. {$endif cpu64bitalu}
  3918. end;
  3919. end.