sergei 5456960d54 * MIPS: Fixed code generation for PIC calls to local functions. Uncovered by r32803, before that the buggy branch was never taken because all functions were global. hace 10 años
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aasmcpu.pas 4e2fb9d28b * MIPS: fixed O_MOVE_SOURCE and O_MOVE_DEST constants (they were swapped, amazing that it ever worked with such a mistake). hace 11 años
aoptcpu.pas 35ff024f03 * mips: Fixed internal error 2014061703 when optimization are enabled. hace 10 años
aoptcpub.pas 93e0dd9c2f * Patch from Fuxin Zhang: other mips and mipsel CPUs changes hace 13 años
aoptcpud.pas 0c8546f94c * more MIPS code of David Zhang integrated hace 16 años
cgcpu.pas 5456960d54 * MIPS: Fixed code generation for PIC calls to local functions. Uncovered by r32803, before that the buggy branch was never taken because all functions were global. hace 10 años
cpubase.pas c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
cpuelf.pas 919cc8377a + added class type property CObjSymbol to TExeOutput as well hace 10 años
cpugas.pas 11a9ff4a43 * Removed unused vars for mipsel compiler. hace 10 años
cpuinfo.pas 3cb9be73bc Moved tcontrollerdatatype out into cpuinfo. hace 10 años
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: hace 11 años
cpupara.pas fa3b0ca312 * support marking defs created via the getreusable*() class methods as hace 10 años
cpupi.pas 96dd464bf2 * Moved fixup_jmps to target-specific classes for powerpc,powerpc64 and MIPS, cleaned out remaining $ifdef's. A slight functionality change is that fixup_jmps is now called before adding the procedure end symbol, not after, but that should not matter. hace 11 años
cputarg.pas b2b26f84cf * partially merged the mips-embedded branch of Michael Ring: hace 11 años
hlcgcpu.pas b745dcc64c * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because hace 11 años
itcpugas.pas 11a9ff4a43 * Removed unused vars for mipsel compiler. hace 10 años
mipsreg.dat e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. hace 11 años
ncpuadd.pas 11a9ff4a43 * Removed unused vars for mipsel compiler. hace 10 años
ncpucall.pas 87684e1cf1 * MIPS: clean up hace 11 años
ncpucnv.pas 0fc1fd6ac1 * replaced current_procinfo.currtrue/falselabel with storing the true/false hace 10 años
ncpuinln.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed hace 11 años
ncpuld.pas 4b820a1ca5 - Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels. hace 12 años
ncpumat.pas 7949bebb8d * synchronised with r28168 of trunk hace 11 años
ncpuset.pas 11a9ff4a43 * Removed unused vars for mipsel compiler. hace 10 años
opcode.inc 4e7c908b0d + MIPS: added movn and movz instructions. hace 11 años
racpugas.pas e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. hace 11 años
rgcpu.pas 67b8aceaee * synchronized with privatetrunk till r30095 hace 10 años
rmipscon.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. hace 11 años
rmipsdwf.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
rmipsgas.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
rmipsgri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
rmipsgss.inc f58fcdf401 + basic mips stuff hace 21 años
rmipsnor.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
rmipsnum.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
rmipsrni.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
rmipssri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
rmipssta.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
rmipsstd.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). hace 11 años
rmipssup.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. hace 11 años
strinst.inc 4e7c908b0d + MIPS: added movn and movz instructions. hace 11 años
symcpu.pas 7dd1d6aa77 o fixes handling of iso i/o parameters/program parameters: hace 10 años