nickysn 439ab331e9 * factored out some of the duplicated (between x86 targets) parts of process_ea() to a common function 9 anni fa
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aasmcpu.pas 439ab331e9 * factored out some of the duplicated (between x86 targets) parts of process_ea() to a common function 9 anni fa
agx86att.pas 1abf9df1b0 Solaris assembler does not accept %st instead of %st(0), at least for some instructions 9 anni fa
agx86int.pas 094a3c4350 * fixes masm code generation for rep mov* 9 anni fa
agx86nsm.pas 995ca4fb12 + implemented the 'SEG @DATA' inline assembler directive for i8086 9 anni fa
aoptx86.pas c40240990e * popt386 uses now also all routines of aoptx86 10 anni fa
cga.pas d88d644925 + support for FMA intrinsic: if there is no hardware support, the compiler throws an error. 11 anni fa
cgx86.pas 1b965e6766 * x86: Don't save/restore integer registers that are volatile per calling convention of current procedure. It implies that nothing will be saved for procedures with OLDFPCCALL, FAR16 and PASCAL and calling conventions. OLDFPCCALL restores behavior that was in effect before r25224. 9 anni fa
cpubase.pas 9d4c8f68d4 * fixed first_fpu_immreg definition 10 anni fa
hlcgx86.pas 67b8aceaee * synchronized with privatetrunk till r30095 10 anni fa
itcpugas.pas 926dd1b41e * command line compilation of i8086 fixed 12 anni fa
itx86int.pas 0e41df598e * merge i8086 branch by Nikolay Nikolov 12 anni fa
ni86mem.pas 4a79481c51 * isolated segment-related functionality of tabsolutevarsym into i386/i8086- 11 anni fa
nx86add.pas da696057ab * converted register_maybe_adjust_setbase() to the high level code generator 9 anni fa
nx86cal.pas 8046826e4e + also allow x86 call ref for references that contain only non-imaginary registers (no infinite spilling problems there either) 9 anni fa
nx86cnv.pas 0fc1fd6ac1 * replaced current_procinfo.currtrue/falselabel with storing the true/false 10 anni fa
nx86con.pas 45f60bc4b5 * small changes (copyright, typo, readability) 12 anni fa
nx86inl.pas da696057ab * converted register_maybe_adjust_setbase() to the high level code generator 9 anni fa
nx86ld.pas 06fc6ac491 * fixed threadvar support on linux/i386 and android/i386 after r31639 10 anni fa
nx86mat.pas 374148b966 * fixed compilation of 8086 compiler. 10 anni fa
nx86mem.pas d6de2c03cb * generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe 10 anni fa
nx86set.pas da696057ab * converted register_maybe_adjust_setbase() to the high level code generator 9 anni fa
rax86.pas 21c9712ea2 * allow 32-bit operand sizes in the i8086 version of Tx86Operand.SetSize, so 9 anni fa
rax86att.pas 42d251da1c - x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability. 10 anni fa
rax86int.pas f69f6336e9 * Replaced hacks with resetting 'c' to zero and decreasing inputpointer by boolean parameter to skipcomment and skipoldtpcomment. This parameter specifies whether first character of comment should be read. 9 anni fa
rgx86.pas 7949bebb8d * synchronised with r28168 of trunk 11 anni fa
symi86.pas 4f7b4a2735 * changed {$ifdef x86} code in defcmp into virtual methods 9 anni fa
symx86.pas 33d711794e * adaptation for symx86 to r32340 9 anni fa
x86ins.dat 80b3e3020a * the SEGFS and SEGGS prefixes are 386+ 9 anni fa
x86reg.dat 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 anni fa