cgobj.pas 138 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times : longint;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_extend_backwards(b: boolean);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. This must be overriden for each CPU target.
  102. @param(size size of the operand in the register)
  103. @param(r register source of the operand)
  104. @param(cgpara where the parameter will be stored)
  105. }
  106. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  107. {# Pass a parameter, which is a constant, to a routine.
  108. A generic version is provided. This routine should
  109. be overriden for optimization purposes if the cpu
  110. permits directly sending this type of parameter.
  111. @param(size size of the operand in constant)
  112. @param(a value of constant to send)
  113. @param(cgpara where the parameter will be stored)
  114. }
  115. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  116. {# Pass the value of a parameter, which is located in memory, to a routine.
  117. A generic version is provided. This routine should
  118. be overriden for optimization purposes if the cpu
  119. permits directly sending this type of parameter.
  120. @param(size size of the operand in constant)
  121. @param(r Memory reference of value to send)
  122. @param(cgpara where the parameter will be stored)
  123. }
  124. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  125. {# Pass the value of a parameter, which can be located either in a register or memory location,
  126. to a routine.
  127. A generic version is provided.
  128. @param(l location of the operand to send)
  129. @param(nr parameter number (starting from one) of routine (from left to right))
  130. @param(cgpara where the parameter will be stored)
  131. }
  132. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  133. {# Pass the address of a reference to a routine. This routine
  134. will calculate the address of the reference, and pass this
  135. calculated address as a parameter.
  136. A generic version is provided. This routine should
  137. be overriden for optimization purposes if the cpu
  138. permits directly sending this type of parameter.
  139. @param(r reference to get address from)
  140. @param(nr parameter number (starting from one) of routine (from left to right))
  141. }
  142. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  143. { Remarks:
  144. * If a method specifies a size you have only to take care
  145. of that number of bits, i.e. load_const_reg with OP_8 must
  146. only load the lower 8 bit of the specified register
  147. the rest of the register can be undefined
  148. if necessary the compiler will call a method
  149. to zero or sign extend the register
  150. * The a_load_XX_XX with OP_64 needn't to be
  151. implemented for 32 bit
  152. processors, the code generator takes care of that
  153. * the addr size is for work with the natural pointer
  154. size
  155. * the procedures without fpu/mm are only for integer usage
  156. * normally the first location is the source and the
  157. second the destination
  158. }
  159. {# Emits instruction to call the method specified by symbol name.
  160. This routine must be overriden for each new target cpu.
  161. There is no a_call_ref because loading the reference will use
  162. a temp register on most cpu's resulting in conflicts with the
  163. registers used for the parameters (PFV)
  164. }
  165. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  166. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  167. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  168. { same as a_call_name, might be overriden on certain architectures to emit
  169. static calls without usage of a got trampoline }
  170. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  171. { move instructions }
  172. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  173. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  174. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  175. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  176. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  177. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  178. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  179. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  180. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  181. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  182. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  183. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  184. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  185. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  186. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  187. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  188. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  189. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  190. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  191. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  192. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  193. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  194. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  195. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  196. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  197. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  198. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  199. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  200. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  201. { fpu move instructions }
  202. procedure a_loadfpu_reg_reg(list: TAsmList; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  203. procedure a_loadfpu_ref_reg(list: TAsmList; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  204. procedure a_loadfpu_reg_ref(list: TAsmList; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  205. procedure a_loadfpu_loc_reg(list: TAsmList; const loc: tlocation; const reg: tregister);
  206. procedure a_loadfpu_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation);
  207. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  208. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  209. { vector register move instructions }
  210. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  211. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  212. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  213. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  214. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  215. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  216. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  217. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  218. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  219. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  220. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  221. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  222. { basic arithmetic operations }
  223. { note: for operators which require only one argument (not, neg), use }
  224. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  225. { that in this case the *second* operand is used as both source and }
  226. { destination (JM) }
  227. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  228. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  229. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  230. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  231. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  232. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  233. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  234. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  235. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  236. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  237. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  238. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  239. { trinary operations for processors that support them, 'emulated' }
  240. { on others. None with "ref" arguments since I don't think there }
  241. { are any processors that support it (JM) }
  242. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  243. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  244. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  245. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  246. { comparison operations }
  247. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  248. l : tasmlabel);virtual; abstract;
  249. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  250. l : tasmlabel); virtual;
  251. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  252. l : tasmlabel);
  253. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  254. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  255. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  256. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  257. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  258. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  259. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  260. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  261. l : tasmlabel);
  262. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  263. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  264. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  265. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  266. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  267. }
  268. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  269. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  270. {
  271. This routine tries to optimize the op_const_reg/ref opcode, and should be
  272. called at the start of a_op_const_reg/ref. It returns the actual opcode
  273. to emit, and the constant value to emit. This function can opcode OP_NONE to
  274. remove the opcode and OP_MOVE to replace it with a simple load
  275. @param(op The opcode to emit, returns the opcode which must be emitted)
  276. @param(a The constant which should be emitted, returns the constant which must
  277. be emitted)
  278. }
  279. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  280. {#
  281. This routine is used in exception management nodes. It should
  282. save the exception reason currently in the FUNCTION_RETURN_REG. The
  283. save should be done either to a temp (pointed to by href).
  284. or on the stack (pushing the value on the stack).
  285. The size of the value to save is OS_S32. The default version
  286. saves the exception reason to a temp. memory area.
  287. }
  288. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  289. {#
  290. This routine is used in exception management nodes. It should
  291. save the exception reason constant. The
  292. save should be done either to a temp (pointed to by href).
  293. or on the stack (pushing the value on the stack).
  294. The size of the value to save is OS_S32. The default version
  295. saves the exception reason to a temp. memory area.
  296. }
  297. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  298. {#
  299. This routine is used in exception management nodes. It should
  300. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  301. should either be in the temp. area (pointed to by href , href should
  302. *NOT* be freed) or on the stack (the value should be popped).
  303. The size of the value to save is OS_S32. The default version
  304. saves the exception reason to a temp. memory area.
  305. }
  306. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  307. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  308. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  309. {# This should emit the opcode to copy len bytes from the source
  310. to destination.
  311. It must be overriden for each new target processor.
  312. @param(source Source reference of copy)
  313. @param(dest Destination reference of copy)
  314. }
  315. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  316. {# This should emit the opcode to copy len bytes from the an unaligned source
  317. to destination.
  318. It must be overriden for each new target processor.
  319. @param(source Source reference of copy)
  320. @param(dest Destination reference of copy)
  321. }
  322. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  323. {# This should emit the opcode to a shortrstring from the source
  324. to destination.
  325. @param(source Source reference of copy)
  326. @param(dest Destination reference of copy)
  327. }
  328. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  329. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  330. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  331. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  332. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  333. {# Generates range checking code. It is to note
  334. that this routine does not need to be overriden,
  335. as it takes care of everything.
  336. @param(p Node which contains the value to check)
  337. @param(todef Type definition of node to range check)
  338. }
  339. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  340. {# Generates overflow checking code for a node }
  341. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  342. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  343. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  344. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  345. {# Emits instructions when compilation is done in profile
  346. mode (this is set as a command line option). The default
  347. behavior does nothing, should be overriden as required.
  348. }
  349. procedure g_profilecode(list : TAsmList);virtual;
  350. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  351. @param(size Number of bytes to allocate)
  352. }
  353. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  354. {# Emits instruction for allocating the locals in entry
  355. code of a routine. This is one of the first
  356. routine called in @var(genentrycode).
  357. @param(localsize Number of bytes to allocate as locals)
  358. }
  359. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  360. {# Emits instructions for returning from a subroutine.
  361. Should also restore the framepointer and stack.
  362. @param(parasize Number of bytes of parameters to deallocate from stack)
  363. }
  364. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  365. {# This routine is called when generating the code for the entry point
  366. of a routine. It should save all registers which are not used in this
  367. routine, and which should be declared as saved in the std_saved_registers
  368. set.
  369. This routine is mainly used when linking to code which is generated
  370. by ABI-compliant compilers (like GCC), to make sure that the reserved
  371. registers of that ABI are not clobbered.
  372. @param(usedinproc Registers which are used in the code of this routine)
  373. }
  374. procedure g_save_standard_registers(list:TAsmList);virtual;
  375. {# This routine is called when generating the code for the exit point
  376. of a routine. It should restore all registers which were previously
  377. saved in @var(g_save_standard_registers).
  378. @param(usedinproc Registers which are used in the code of this routine)
  379. }
  380. procedure g_restore_standard_registers(list:TAsmList);virtual;
  381. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  382. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  383. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  384. protected
  385. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  386. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  387. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  388. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  389. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  390. end;
  391. {$ifndef cpu64bit}
  392. {# @abstract(Abstract code generator for 64 Bit operations)
  393. This class implements an abstract code generator class
  394. for 64 Bit operations.
  395. }
  396. tcg64 = class
  397. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  398. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  399. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  400. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  401. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  402. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  403. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  404. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  405. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  406. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  407. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  408. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  409. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  410. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  411. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  412. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  413. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  414. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  415. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  416. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  417. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  418. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  419. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  420. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  421. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  422. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  423. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  424. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  425. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  426. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  427. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  428. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  429. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  430. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  431. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  432. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  433. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  434. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  435. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  436. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  437. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  438. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  439. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  440. {
  441. This routine tries to optimize the const_reg opcode, and should be
  442. called at the start of a_op64_const_reg. It returns the actual opcode
  443. to emit, and the constant value to emit. If this routine returns
  444. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  445. @param(op The opcode to emit, returns the opcode which must be emitted)
  446. @param(a The constant which should be emitted, returns the constant which must
  447. be emitted)
  448. @param(reg The register to emit the opcode with, returns the register with
  449. which the opcode will be emitted)
  450. }
  451. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  452. { override to catch 64bit rangechecks }
  453. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  454. end;
  455. {$endif cpu64bit}
  456. var
  457. {# Main code generator class }
  458. cg : tcg;
  459. {$ifndef cpu64bit}
  460. {# Code generator class for all operations working with 64-Bit operands }
  461. cg64 : tcg64;
  462. {$endif cpu64bit}
  463. implementation
  464. uses
  465. globals,options,systems,
  466. verbose,defutil,paramgr,symsym,
  467. tgobj,cutils,procinfo,
  468. ncgrtti;
  469. {*****************************************************************************
  470. basic functionallity
  471. ******************************************************************************}
  472. constructor tcg.create;
  473. begin
  474. end;
  475. {*****************************************************************************
  476. register allocation
  477. ******************************************************************************}
  478. procedure tcg.init_register_allocators;
  479. begin
  480. fillchar(rg,sizeof(rg),0);
  481. add_reg_instruction_hook:=@add_reg_instruction;
  482. end;
  483. procedure tcg.done_register_allocators;
  484. begin
  485. { Safety }
  486. fillchar(rg,sizeof(rg),0);
  487. add_reg_instruction_hook:=nil;
  488. end;
  489. {$ifdef flowgraph}
  490. procedure Tcg.init_flowgraph;
  491. begin
  492. aktflownode:=0;
  493. end;
  494. procedure Tcg.done_flowgraph;
  495. begin
  496. end;
  497. {$endif}
  498. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  499. begin
  500. if not assigned(rg[R_INTREGISTER]) then
  501. internalerror(200312122);
  502. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  503. end;
  504. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  505. begin
  506. if not assigned(rg[R_FPUREGISTER]) then
  507. internalerror(200312123);
  508. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  509. end;
  510. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  511. begin
  512. if not assigned(rg[R_MMREGISTER]) then
  513. internalerror(2003121214);
  514. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  515. end;
  516. function tcg.getaddressregister(list:TAsmList):Tregister;
  517. begin
  518. if assigned(rg[R_ADDRESSREGISTER]) then
  519. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  520. else
  521. begin
  522. if not assigned(rg[R_INTREGISTER]) then
  523. internalerror(200312121);
  524. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  525. end;
  526. end;
  527. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  528. var
  529. subreg:Tsubregister;
  530. begin
  531. subreg:=cgsize2subreg(size);
  532. result:=reg;
  533. setsubreg(result,subreg);
  534. { notify RA }
  535. if result<>reg then
  536. list.concat(tai_regalloc.resize(result));
  537. end;
  538. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  539. begin
  540. if not assigned(rg[getregtype(r)]) then
  541. internalerror(200312125);
  542. rg[getregtype(r)].getcpuregister(list,r);
  543. end;
  544. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  545. begin
  546. if not assigned(rg[getregtype(r)]) then
  547. internalerror(200312126);
  548. rg[getregtype(r)].ungetcpuregister(list,r);
  549. end;
  550. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  551. begin
  552. if assigned(rg[rt]) then
  553. rg[rt].alloccpuregisters(list,r)
  554. else
  555. internalerror(200310092);
  556. end;
  557. procedure tcg.allocallcpuregisters(list:TAsmList);
  558. begin
  559. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  560. {$ifndef i386}
  561. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  562. {$ifdef cpumm}
  563. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  564. {$endif cpumm}
  565. {$endif i386}
  566. end;
  567. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  568. begin
  569. if assigned(rg[rt]) then
  570. rg[rt].dealloccpuregisters(list,r)
  571. else
  572. internalerror(200310093);
  573. end;
  574. procedure tcg.deallocallcpuregisters(list:TAsmList);
  575. begin
  576. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  577. {$ifndef i386}
  578. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  579. {$ifdef cpumm}
  580. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  581. {$endif cpumm}
  582. {$endif i386}
  583. end;
  584. function tcg.uses_registers(rt:Tregistertype):boolean;
  585. begin
  586. if assigned(rg[rt]) then
  587. result:=rg[rt].uses_registers
  588. else
  589. result:=false;
  590. end;
  591. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  592. var
  593. rt : tregistertype;
  594. begin
  595. rt:=getregtype(r);
  596. { Only add it when a register allocator is configured.
  597. No IE can be generated, because the VMT is written
  598. without a valid rg[] }
  599. if assigned(rg[rt]) then
  600. rg[rt].add_reg_instruction(instr,r);
  601. end;
  602. procedure tcg.add_move_instruction(instr:Taicpu);
  603. var
  604. rt : tregistertype;
  605. begin
  606. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  607. if assigned(rg[rt]) then
  608. rg[rt].add_move_instruction(instr)
  609. else
  610. internalerror(200310095);
  611. end;
  612. procedure tcg.set_regalloc_extend_backwards(b: boolean);
  613. var
  614. rt : tregistertype;
  615. begin
  616. for rt:=low(rg) to high(rg) do
  617. begin
  618. if assigned(rg[rt]) then
  619. rg[rt].extend_live_range_backwards := b;;
  620. end;
  621. end;
  622. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  623. var
  624. rt : tregistertype;
  625. begin
  626. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  627. begin
  628. if assigned(rg[rt]) then
  629. rg[rt].do_register_allocation(list,headertai);
  630. end;
  631. { running the other register allocator passes could require addition int/addr. registers
  632. when spilling so run int/addr register allocation at the end }
  633. if assigned(rg[R_INTREGISTER]) then
  634. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  635. if assigned(rg[R_ADDRESSREGISTER]) then
  636. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  637. end;
  638. procedure tcg.translate_register(var reg : tregister);
  639. begin
  640. rg[getregtype(reg)].translate_register(reg);
  641. end;
  642. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  643. begin
  644. list.concat(tai_regalloc.alloc(r,nil));
  645. end;
  646. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  647. begin
  648. list.concat(tai_regalloc.dealloc(r,nil));
  649. end;
  650. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  651. var
  652. instr : tai;
  653. begin
  654. instr:=tai_regalloc.sync(r);
  655. list.concat(instr);
  656. add_reg_instruction(instr,r);
  657. end;
  658. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  659. begin
  660. list.concat(tai_label.create(l));
  661. end;
  662. {*****************************************************************************
  663. for better code generation these methods should be overridden
  664. ******************************************************************************}
  665. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  666. var
  667. ref : treference;
  668. begin
  669. cgpara.check_simple_location;
  670. case cgpara.location^.loc of
  671. LOC_REGISTER,LOC_CREGISTER:
  672. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  673. LOC_REFERENCE,LOC_CREFERENCE:
  674. begin
  675. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  676. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  677. end
  678. else
  679. internalerror(2002071004);
  680. end;
  681. end;
  682. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  683. var
  684. ref : treference;
  685. begin
  686. cgpara.check_simple_location;
  687. case cgpara.location^.loc of
  688. LOC_REGISTER,LOC_CREGISTER:
  689. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  690. LOC_REFERENCE,LOC_CREFERENCE:
  691. begin
  692. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  693. a_load_const_ref(list,cgpara.location^.size,a,ref);
  694. end
  695. else
  696. internalerror(2002071004);
  697. end;
  698. end;
  699. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  700. var
  701. ref : treference;
  702. begin
  703. cgpara.check_simple_location;
  704. case cgpara.location^.loc of
  705. LOC_REGISTER,LOC_CREGISTER:
  706. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  707. LOC_REFERENCE,LOC_CREFERENCE:
  708. begin
  709. reference_reset(ref);
  710. ref.base:=cgpara.location^.reference.index;
  711. ref.offset:=cgpara.location^.reference.offset;
  712. if (size <> OS_NO) and
  713. (tcgsize2size[size] < sizeof(aint)) then
  714. begin
  715. if (cgpara.size = OS_NO) or
  716. assigned(cgpara.location^.next) then
  717. internalerror(2006052401);
  718. a_load_ref_ref(list,size,cgpara.size,r,ref);
  719. end
  720. else
  721. { use concatcopy, because the parameter can be larger than }
  722. { what the OS_* constants can handle }
  723. g_concatcopy(list,r,ref,cgpara.intsize);
  724. end
  725. else
  726. internalerror(2002071004);
  727. end;
  728. end;
  729. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  730. begin
  731. case l.loc of
  732. LOC_REGISTER,
  733. LOC_CREGISTER :
  734. a_param_reg(list,l.size,l.register,cgpara);
  735. LOC_CONSTANT :
  736. a_param_const(list,l.size,l.value,cgpara);
  737. LOC_CREFERENCE,
  738. LOC_REFERENCE :
  739. a_param_ref(list,l.size,l.reference,cgpara);
  740. else
  741. internalerror(2002032211);
  742. end;
  743. end;
  744. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  745. var
  746. hr : tregister;
  747. begin
  748. cgpara.check_simple_location;
  749. hr:=getaddressregister(list);
  750. a_loadaddr_ref_reg(list,r,hr);
  751. a_param_reg(list,OS_ADDR,hr,cgpara);
  752. end;
  753. {****************************************************************************
  754. some generic implementations
  755. ****************************************************************************}
  756. {$ifopt r+}
  757. {$define rangeon}
  758. {$endif}
  759. {$ifopt q+}
  760. {$define overflowon}
  761. {$endif}
  762. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  763. var
  764. bitmask: aint;
  765. tmpreg: tregister;
  766. stopbit: byte;
  767. begin
  768. tmpreg:=getintregister(list,sreg.subsetregsize);
  769. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  770. stopbit := sreg.startbit + sreg.bitlen;
  771. // on x86(64), 1 shl 32(64) = 1 instead of 0
  772. if (stopbit - sreg.startbit <> AIntBits) then
  773. bitmask := (aint(1) shl (stopbit - sreg.startbit)) - 1
  774. else
  775. bitmask := -1;
  776. a_op_const_reg(list,OP_AND,sreg.subsetregsize,bitmask,tmpreg);
  777. tmpreg := makeregsize(list,tmpreg,subsetsize);
  778. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  779. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  780. end;
  781. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  782. begin
  783. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  784. end;
  785. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  786. var
  787. bitmask: aint;
  788. tmpreg: tregister;
  789. stopbit: byte;
  790. begin
  791. stopbit := sreg.startbit + sreg.bitlen;
  792. // on x86(64), 1 shl 32(64) = 1 instead of 0
  793. if (stopbit <> AIntBits) then
  794. bitmask := not(((aint(1) shl stopbit)-1) xor ((aint(1) shl sreg.startbit)-1))
  795. else
  796. bitmask := not(-1 xor ((aint(1) shl sreg.startbit)-1));
  797. tmpreg:=getintregister(list,sreg.subsetregsize);
  798. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  799. if (slopt <> SL_SETZERO) then
  800. begin
  801. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  802. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  803. a_op_const_reg(list,OP_AND,sreg.subsetregsize,not(bitmask),tmpreg);
  804. end;
  805. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  806. a_op_const_reg(list,OP_AND,sreg.subsetregsize,bitmask,sreg.subsetreg);
  807. if (slopt <> SL_SETZERO) then
  808. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  809. end;
  810. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  811. var
  812. tmpreg: tregister;
  813. bitmask: aint;
  814. stopbit: byte;
  815. begin
  816. if (fromsreg.bitlen >= tosreg.bitlen) then
  817. begin
  818. tmpreg := getintregister(list,tosreg.subsetregsize);
  819. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  820. if (fromsreg.startbit <= tosreg.startbit) then
  821. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  822. else
  823. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  824. stopbit := tosreg.startbit + tosreg.bitlen;
  825. // on x86(64), 1 shl 32(64) = 1 instead of 0
  826. if (stopbit <> AIntBits) then
  827. bitmask := not(((aint(1) shl stopbit)-1) xor ((aint(1) shl tosreg.startbit)-1))
  828. else
  829. bitmask := (aint(1) shl tosreg.startbit) - 1;
  830. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,bitmask,tosreg.subsetreg);
  831. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,not(bitmask),tmpreg);
  832. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  833. end
  834. else
  835. begin
  836. tmpreg := getintregister(list,tosubsetsize);
  837. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  838. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  839. end;
  840. end;
  841. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  842. var
  843. tmpreg: tregister;
  844. begin
  845. tmpreg := getintregister(list,tosize);
  846. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  847. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  848. end;
  849. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  850. var
  851. tmpreg: tregister;
  852. begin
  853. tmpreg := getintregister(list,subsetsize);
  854. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  855. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  856. end;
  857. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  858. var
  859. bitmask: aint;
  860. stopbit: byte;
  861. begin
  862. stopbit := sreg.startbit + sreg.bitlen;
  863. // on x86(64), 1 shl 32(64) = 1 instead of 0
  864. if (stopbit <> AIntBits) then
  865. bitmask := not(((aint(1) shl stopbit)-1) xor ((aint(1) shl sreg.startbit)-1))
  866. else
  867. bitmask := (aint(1) shl sreg.startbit) - 1;
  868. if (((a shl sreg.startbit) and not bitmask) <> bitmask) then
  869. a_op_const_reg(list,OP_AND,sreg.subsetregsize,bitmask,sreg.subsetreg);
  870. a_op_const_reg(list,OP_OR,sreg.subsetregsize,(a shl sreg.startbit) and not(bitmask),sreg.subsetreg);
  871. end;
  872. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  873. begin
  874. case loc.loc of
  875. LOC_REFERENCE,LOC_CREFERENCE:
  876. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  877. LOC_REGISTER,LOC_CREGISTER:
  878. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  879. LOC_CONSTANT:
  880. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  881. LOC_SUBSETREG,LOC_CSUBSETREG:
  882. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  883. LOC_SUBSETREF,LOC_CSUBSETREF:
  884. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  885. else
  886. internalerror(200608053);
  887. end;
  888. end;
  889. (*
  890. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  891. in memory. They are like a regular reference, but contain an extra bit
  892. offset (either constant -startbit- or variable -bitindexreg, always OS_INT)
  893. and a bit length (always constant).
  894. Bit packed values are stored differently in memory depending on whether we
  895. are on a big or a little endian system (compatible with at least GPC). The
  896. size of the basic working unit is always the smallest power-of-2 byte size
  897. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  898. bytes, 17..32 bits -> 4 bytes etc).
  899. On a big endian, 5-bit: values are stored like this:
  900. 11111222 22333334 44445555 56666677 77788888
  901. The leftmost bit of each 5-bit value corresponds to the most significant
  902. bit.
  903. On little endian, it goes like this:
  904. 22211111 43333322 55554444 77666665 88888777
  905. In this case, per byte the left-most bit is more significant than those on
  906. the right, but the bits in the next byte are all more significant than
  907. those in the previous byte (e.g., the 222 in the first byte are the low
  908. three bits of that value, while the 22 in the second byte are the upper
  909. three bits.
  910. Big endian, 9 bit values:
  911. 11111111 12222222 22333333 33344444 ...
  912. Little endian, 9 bit values:
  913. 11111111 22222221 33333322 44444333 ...
  914. This is memory representation and the 16 bit values are byteswapped.
  915. Similarly as in the previous case, the 2222222 string contains the lower
  916. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  917. registers (two 16 bit registers in the current implementation, although a
  918. single 32 bit register would be possible too, in particular if 32 bit
  919. alignment can be guaranteed), this becomes:
  920. 22222221 11111111 44444333 33333322 ...
  921. (l)ow u l l u l u
  922. The startbit/bitindex in a subsetreference always refers to
  923. a) on big endian: the most significant bit of the value
  924. (bits counted from left to right, both memory an registers)
  925. b) on little endia: the least significant bit when the value
  926. is loaded in a register (bit counted from right to left)
  927. Although a) results in more complex code for big endian systems, it's
  928. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  929. Apple's universal interfaces which depend on these layout differences).
  930. Note: when changing the loadsize calculated in get_subsetref_load_info,
  931. make sure the appropriate alignment is guaranteed, at least in case of
  932. {$defined cpurequiresproperalignment}.
  933. *)
  934. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  935. var
  936. intloadsize: aint;
  937. begin
  938. intloadsize := packedbitsloadsize(sref.bitlen);
  939. {$ifdef cpurequiresproperalignment}
  940. { may need to be split into several smaller loads/stores }
  941. if intloadsize <> sref.ref.alignment then
  942. internalerror(2006082011);
  943. {$endif cpurequiresproperalignment}
  944. if (intloadsize = 0) then
  945. internalerror(2006081310);
  946. if (intloadsize > sizeof(aint)) then
  947. intloadsize := sizeof(aint);
  948. loadsize := int_cgsize(intloadsize);
  949. if (loadsize = OS_NO) then
  950. internalerror(2006081311);
  951. if (sref.bitlen > sizeof(aint)*8) then
  952. internalerror(2006081312);
  953. extra_load :=
  954. (intloadsize <> 1) and
  955. ((sref.bitindexreg <> NR_NO) or
  956. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  957. end;
  958. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  959. var
  960. restbits: byte;
  961. begin
  962. if (target_info.endian = endian_big) then
  963. begin
  964. { valuereg contains the upper bits, extra_value_reg the lower }
  965. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  966. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  967. { mask other bits }
  968. if (sref.bitlen <> AIntBits) then
  969. a_op_const_reg(list,OP_AND,OS_INT,(aint(1) shl sref.bitlen)-1,valuereg);
  970. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  971. end
  972. else
  973. begin
  974. { valuereg contains the lower bits, extra_value_reg the upper }
  975. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  976. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  977. { mask other bits }
  978. if (sref.bitlen <> AIntBits) then
  979. a_op_const_reg(list,OP_AND,OS_INT,(aint(1) shl sref.bitlen)-1,extra_value_reg);
  980. end;
  981. { merge }
  982. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  983. end;
  984. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  985. var
  986. tmpreg: tregister;
  987. begin
  988. tmpreg := getintregister(list,OS_INT);
  989. if (target_info.endian = endian_big) then
  990. begin
  991. { since this is a dynamic index, it's possible that the value }
  992. { is entirely in valuereg. }
  993. { get the data in valuereg in the right place }
  994. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  995. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  996. if (loadbitsize <> AIntBits) then
  997. { mask left over bits }
  998. a_op_const_reg(list,OP_AND,OS_INT,(aint(1) shl sref.bitlen)-1,valuereg);
  999. tmpreg := getintregister(list,OS_INT);
  1000. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1001. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1002. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1003. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1004. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1005. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1006. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1007. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1008. { => extra_value_reg is now 0 }
  1009. { merge }
  1010. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1011. { no need to mask, necessary masking happened earlier on }
  1012. end
  1013. else
  1014. begin
  1015. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1016. { Y-x = -(Y-x) }
  1017. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1018. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1019. { tmpreg is in the range 1..<cpu_bitsize> -> will zero extra_value_reg }
  1020. { if all bits are in valuereg }
  1021. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1022. {$ifdef x86}
  1023. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1024. if (loadbitsize = AIntBits) then
  1025. begin
  1026. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1027. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
  1028. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1029. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1030. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1031. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1032. end;
  1033. {$endif x86}
  1034. { merge }
  1035. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1036. { mask other bits }
  1037. a_op_const_reg(list,OP_AND,OS_INT,(aint(1) shl sref.bitlen)-1,valuereg);
  1038. end;
  1039. end;
  1040. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1041. var
  1042. tmpref: treference;
  1043. valuereg,extra_value_reg: tregister;
  1044. tosreg: tsubsetregister;
  1045. loadsize: tcgsize;
  1046. loadbitsize: byte;
  1047. extra_load: boolean;
  1048. begin
  1049. get_subsetref_load_info(sref,loadsize,extra_load);
  1050. loadbitsize := tcgsize2size[loadsize]*8;
  1051. { load the (first part) of the bit sequence }
  1052. valuereg := cg.getintregister(list,OS_INT);
  1053. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1054. if not extra_load then
  1055. begin
  1056. { everything is guaranteed to be in a single register of loadsize }
  1057. if (sref.bitindexreg = NR_NO) then
  1058. begin
  1059. { use subsetreg routine, it may have been overridden with an optimized version }
  1060. tosreg.subsetreg := valuereg;
  1061. tosreg.subsetregsize := OS_INT;
  1062. { subsetregs always count bits from right to left }
  1063. if (target_info.endian = endian_big) then
  1064. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1065. else
  1066. tosreg.startbit := sref.startbit;
  1067. tosreg.bitlen := sref.bitlen;
  1068. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1069. exit;
  1070. end
  1071. else
  1072. begin
  1073. if (sref.startbit <> 0) then
  1074. internalerror(2006081510);
  1075. if (target_info.endian = endian_big) then
  1076. begin
  1077. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1078. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1079. end
  1080. else
  1081. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1082. { mask other bits }
  1083. a_op_const_reg(list,OP_AND,OS_INT,(aint(1) shl sref.bitlen)-1,valuereg);
  1084. end
  1085. end
  1086. else
  1087. begin
  1088. { load next value as well }
  1089. extra_value_reg := getintregister(list,OS_INT);
  1090. tmpref := sref.ref;
  1091. inc(tmpref.offset,loadbitsize div 8);
  1092. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1093. if (sref.bitindexreg = NR_NO) then
  1094. { can be overridden to optimize }
  1095. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1096. else
  1097. begin
  1098. if (sref.startbit <> 0) then
  1099. internalerror(2006080610);
  1100. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg);
  1101. end;
  1102. end;
  1103. { store in destination }
  1104. { (types with a negative lower bound are always a base type (8, 16, 32, 64 bits) }
  1105. if ((sref.bitlen mod 8) = 0) then
  1106. begin
  1107. { since we know all necessary bits are already masked, avoid unnecessary }
  1108. { zero-extensions }
  1109. valuereg := makeregsize(list,valuereg,tosize);
  1110. a_load_reg_reg(list,tcgsize2unsigned[tosize],tosize,valuereg,destreg)
  1111. end
  1112. else
  1113. begin
  1114. { avoid unnecessary sign extension and zeroing }
  1115. valuereg := makeregsize(list,valuereg,OS_INT);
  1116. destreg := makeregsize(list,destreg,OS_INT);
  1117. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1118. destreg := makeregsize(list,destreg,tosize);
  1119. end
  1120. end;
  1121. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1122. begin
  1123. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1124. end;
  1125. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1126. var
  1127. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1128. tosreg, fromsreg: tsubsetregister;
  1129. tmpref: treference;
  1130. loadsize: tcgsize;
  1131. loadbitsize: byte;
  1132. extra_load: boolean;
  1133. begin
  1134. { the register must be able to contain the requested value }
  1135. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1136. internalerror(2006081613);
  1137. get_subsetref_load_info(sref,loadsize,extra_load);
  1138. loadbitsize := tcgsize2size[loadsize]*8;
  1139. { load the (first part) of the bit sequence }
  1140. valuereg := cg.getintregister(list,OS_INT);
  1141. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1142. { constant offset of bit sequence? }
  1143. if not extra_load then
  1144. begin
  1145. if (sref.bitindexreg = NR_NO) then
  1146. begin
  1147. { use subsetreg routine, it may have been overridden with an optimized version }
  1148. tosreg.subsetreg := valuereg;
  1149. tosreg.subsetregsize := OS_INT;
  1150. { subsetregs always count bits from right to left }
  1151. if (target_info.endian = endian_big) then
  1152. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1153. else
  1154. tosreg.startbit := sref.startbit;
  1155. tosreg.bitlen := sref.bitlen;
  1156. case slopt of
  1157. SL_SETZERO:
  1158. a_load_const_subsetreg(list,subsetsize,0,tosreg);
  1159. SL_SETMAX:
  1160. if (sref.bitlen = AIntBits) then
  1161. a_load_const_subsetreg(list,subsetsize,-1,tosreg)
  1162. else
  1163. a_load_const_subsetreg(list,subsetsize,(aint(1) shl sref.bitlen) - 1,tosreg);
  1164. else
  1165. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1166. end;
  1167. end
  1168. else
  1169. begin
  1170. if (sref.startbit <> 0) then
  1171. internalerror(2006081710);
  1172. { should be handled by normal code and will give wrong result }
  1173. { on x86 for the '1 shl bitlen' below }
  1174. if (sref.bitlen = AIntBits) then
  1175. internalerror(2006081711);
  1176. { calculated correct shiftcount for big endian }
  1177. tmpindexreg := getintregister(list,OS_INT);
  1178. a_load_reg_reg(list,OS_INT,OS_INT,sref.bitindexreg,tmpindexreg);
  1179. if (target_info.endian = endian_big) then
  1180. begin
  1181. a_op_const_reg(list,OP_SUB,OS_INT,loadbitsize-sref.bitlen,tmpindexreg);
  1182. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1183. end;
  1184. { zero the bits we have to insert }
  1185. if not(slopt in [SL_SETMAX,SL_REGNOSRCMASK]) then
  1186. begin
  1187. maskreg := getintregister(list,OS_INT);
  1188. a_load_const_reg(list,OS_INT,(aint(1) shl sref.bitlen)-1,maskreg);
  1189. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1190. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1191. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1192. end;
  1193. { insert the value }
  1194. if (slopt <> SL_SETZERO) then
  1195. begin
  1196. tmpreg := getintregister(list,OS_INT);
  1197. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg);
  1198. a_op_const_reg(list,OP_AND,OS_INT,(aint(1) shl sref.bitlen)-1,tmpreg);
  1199. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg);
  1200. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1201. end;
  1202. end;
  1203. { store back to memory }
  1204. valuereg := makeregsize(list,valuereg,loadsize);
  1205. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1206. exit;
  1207. end
  1208. else
  1209. begin
  1210. { load next value }
  1211. extra_value_reg := getintregister(list,OS_INT);
  1212. tmpref := sref.ref;
  1213. inc(tmpref.offset,loadbitsize div 8);
  1214. { should maybe be taken out too, can be done more efficiently }
  1215. { on e.g. i386 with shld/shrd }
  1216. if (sref.bitindexreg = NR_NO) then
  1217. begin
  1218. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1219. fromsreg.subsetreg := fromreg;
  1220. fromsreg.subsetregsize := fromsize;
  1221. tosreg.subsetreg := valuereg;
  1222. tosreg.subsetregsize := OS_INT;
  1223. { transfer first part }
  1224. fromsreg.bitlen := loadbitsize-sref.startbit;
  1225. tosreg.bitlen := fromsreg.bitlen;
  1226. if (target_info.endian = endian_big) then
  1227. begin
  1228. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1229. { upper bits of the value ... }
  1230. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1231. { ... to bit 0 }
  1232. tosreg.startbit := 0
  1233. end
  1234. else
  1235. begin
  1236. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1237. { lower bits of the value ... }
  1238. fromsreg.startbit := 0;
  1239. { ... to startbit }
  1240. tosreg.startbit := sref.startbit;
  1241. end;
  1242. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1243. valuereg := makeregsize(list,valuereg,loadsize);
  1244. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1245. { transfer second part }
  1246. if (target_info.endian = endian_big) then
  1247. begin
  1248. { extra_value_reg must contain the lower bits of the value at bits }
  1249. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1250. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1251. { - bitlen - startbit }
  1252. fromsreg.startbit := 0;
  1253. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1254. end
  1255. else
  1256. begin
  1257. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1258. fromsreg.startbit := fromsreg.bitlen;
  1259. tosreg.startbit := 0;
  1260. end;
  1261. tosreg.subsetreg := extra_value_reg;
  1262. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1263. tosreg.bitlen := fromsreg.bitlen;
  1264. a_load_subsetreg_subsetreg(list,fromsize,subsetsize,fromsreg,tosreg);
  1265. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1266. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1267. exit;
  1268. end
  1269. else
  1270. begin
  1271. if (sref.startbit <> 0) then
  1272. internalerror(2006081812);
  1273. { should be handled by normal code and will give wrong result }
  1274. { on x86 for the '1 shl bitlen' below }
  1275. if (sref.bitlen = AIntBits) then
  1276. internalerror(2006081713);
  1277. { generate mask to zero the bits we have to insert }
  1278. if not (slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1279. begin
  1280. maskreg := getintregister(list,OS_INT);
  1281. if (target_info.endian = endian_big) then
  1282. begin
  1283. a_load_const_reg(list,OS_INT,((aint(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1284. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1285. end
  1286. else
  1287. begin
  1288. a_load_const_reg(list,OS_INT,(aint(1) shl sref.bitlen)-1,maskreg);
  1289. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1290. end;
  1291. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1292. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1293. end;
  1294. { insert the value }
  1295. if (slopt <> SL_SETZERO) then
  1296. begin
  1297. tmpreg := getintregister(list,OS_INT);
  1298. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg);
  1299. if (target_info.endian = endian_big) then
  1300. begin
  1301. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1302. if (loadbitsize <> AIntBits) then
  1303. { mask left over bits }
  1304. a_op_const_reg(list,OP_AND,OS_INT,((aint(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),tmpreg);
  1305. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1306. end
  1307. else
  1308. begin
  1309. a_op_const_reg(list,OP_AND,OS_INT,(aint(1) shl sref.bitlen)-1,tmpreg);
  1310. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1311. end;
  1312. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1313. end;
  1314. valuereg := makeregsize(list,valuereg,loadsize);
  1315. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1316. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1317. tmpindexreg := getintregister(list,OS_INT);
  1318. { load current array value }
  1319. tmpreg := getintregister(list,OS_INT);
  1320. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg);
  1321. { generate mask to zero the bits we have to insert }
  1322. if not (slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1323. begin
  1324. maskreg := getintregister(list,OS_INT);
  1325. if (target_info.endian = endian_big) then
  1326. begin
  1327. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1328. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1329. a_load_const_reg(list,OS_INT,(aint(1) shl sref.bitlen)-1,maskreg);
  1330. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1331. end
  1332. else
  1333. begin
  1334. { Y-x = -(Y-x) }
  1335. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1336. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1337. a_load_const_reg(list,OS_INT,(aint(1) shl sref.bitlen)-1,maskreg);
  1338. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1339. {$ifdef x86}
  1340. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1341. if (loadbitsize = AIntBits) then
  1342. begin
  1343. valuereg := getintregister(list,OS_INT);
  1344. { if (tmpreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
  1345. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
  1346. { if (tmpreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
  1347. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1348. { if (tmpreg = cpu_bit_size) then tmpreg := maskreg := 0 }
  1349. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1350. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1351. end;
  1352. {$endif x86}
  1353. end;
  1354. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1355. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1356. end;
  1357. if (slopt <> SL_SETZERO) then
  1358. begin
  1359. if (target_info.endian = endian_big) then
  1360. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1361. else
  1362. begin
  1363. a_op_const_reg(list,OP_AND,OS_INT,(aint(1) shl sref.bitlen)-1,tmpreg);
  1364. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1365. end;
  1366. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1367. end;
  1368. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1369. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1370. end;
  1371. end;
  1372. end;
  1373. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1374. var
  1375. tmpreg: tregister;
  1376. begin
  1377. tmpreg := getintregister(list,tosubsetsize);
  1378. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1379. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1380. end;
  1381. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1382. var
  1383. tmpreg: tregister;
  1384. begin
  1385. tmpreg := getintregister(list,tosize);
  1386. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1387. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1388. end;
  1389. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1390. var
  1391. tmpreg: tregister;
  1392. begin
  1393. tmpreg := getintregister(list,subsetsize);
  1394. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1395. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1396. end;
  1397. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1398. var
  1399. tmpreg: tregister;
  1400. slopt: tsubsetloadopt;
  1401. begin
  1402. slopt := SL_REGNOSRCMASK;
  1403. if (
  1404. (a = (aint(1) shl sref.bitlen) -1) or
  1405. { broken x86 "x shl regbitsize = x" }
  1406. ((sref.bitlen = AIntBits) and
  1407. (a = -1))
  1408. ) then
  1409. slopt := SL_SETMAX
  1410. else if (a = 0) then
  1411. slopt := SL_SETZERO;
  1412. tmpreg := getintregister(list,subsetsize);
  1413. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1414. a_load_const_reg(list,subsetsize,a,tmpreg);
  1415. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1416. end;
  1417. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1418. begin
  1419. case loc.loc of
  1420. LOC_REFERENCE,LOC_CREFERENCE:
  1421. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1422. LOC_REGISTER,LOC_CREGISTER:
  1423. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1424. LOC_SUBSETREG,LOC_CSUBSETREG:
  1425. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1426. LOC_SUBSETREF,LOC_CSUBSETREF:
  1427. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1428. else
  1429. internalerror(200608054);
  1430. end;
  1431. end;
  1432. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1433. var
  1434. tmpreg: tregister;
  1435. begin
  1436. tmpreg := getintregister(list,tosubsetsize);
  1437. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1438. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1439. end;
  1440. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1441. var
  1442. tmpreg: tregister;
  1443. begin
  1444. tmpreg := getintregister(list,tosubsetsize);
  1445. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1446. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1447. end;
  1448. {$ifdef rangeon}
  1449. {$r+}
  1450. {$undef rangeon}
  1451. {$endif}
  1452. {$ifdef overflowon}
  1453. {$q+}
  1454. {$undef overflowon}
  1455. {$endif}
  1456. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1457. var
  1458. tmpreg: tregister;
  1459. begin
  1460. { verify if we have the same reference }
  1461. if references_equal(sref,dref) then
  1462. exit;
  1463. tmpreg:=getintregister(list,tosize);
  1464. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1465. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1466. end;
  1467. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1468. var
  1469. tmpreg: tregister;
  1470. begin
  1471. tmpreg:=getintregister(list,size);
  1472. a_load_const_reg(list,size,a,tmpreg);
  1473. a_load_reg_ref(list,size,size,tmpreg,ref);
  1474. end;
  1475. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1476. begin
  1477. case loc.loc of
  1478. LOC_REFERENCE,LOC_CREFERENCE:
  1479. a_load_const_ref(list,loc.size,a,loc.reference);
  1480. LOC_REGISTER,LOC_CREGISTER:
  1481. a_load_const_reg(list,loc.size,a,loc.register);
  1482. LOC_SUBSETREG,LOC_CSUBSETREG:
  1483. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1484. LOC_SUBSETREF,LOC_CSUBSETREF:
  1485. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1486. else
  1487. internalerror(200203272);
  1488. end;
  1489. end;
  1490. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1491. begin
  1492. case loc.loc of
  1493. LOC_REFERENCE,LOC_CREFERENCE:
  1494. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1495. LOC_REGISTER,LOC_CREGISTER:
  1496. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1497. LOC_SUBSETREG,LOC_CSUBSETREG:
  1498. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1499. LOC_SUBSETREF,LOC_CSUBSETREF:
  1500. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1501. else
  1502. internalerror(200203271);
  1503. end;
  1504. end;
  1505. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  1506. begin
  1507. case loc.loc of
  1508. LOC_REFERENCE,LOC_CREFERENCE:
  1509. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1510. LOC_REGISTER,LOC_CREGISTER:
  1511. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  1512. LOC_CONSTANT:
  1513. a_load_const_reg(list,tosize,loc.value,reg);
  1514. LOC_SUBSETREG,LOC_CSUBSETREG:
  1515. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  1516. LOC_SUBSETREF,LOC_CSUBSETREF:
  1517. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  1518. else
  1519. internalerror(200109092);
  1520. end;
  1521. end;
  1522. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  1523. begin
  1524. case loc.loc of
  1525. LOC_REFERENCE,LOC_CREFERENCE:
  1526. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  1527. LOC_REGISTER,LOC_CREGISTER:
  1528. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  1529. LOC_CONSTANT:
  1530. a_load_const_ref(list,tosize,loc.value,ref);
  1531. LOC_SUBSETREG,LOC_CSUBSETREG:
  1532. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  1533. LOC_SUBSETREF,LOC_CSUBSETREF:
  1534. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  1535. else
  1536. internalerror(200109302);
  1537. end;
  1538. end;
  1539. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  1540. begin
  1541. case loc.loc of
  1542. LOC_REFERENCE,LOC_CREFERENCE:
  1543. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  1544. LOC_REGISTER,LOC_CREGISTER:
  1545. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  1546. LOC_CONSTANT:
  1547. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  1548. LOC_SUBSETREG,LOC_CSUBSETREG:
  1549. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  1550. LOC_SUBSETREF,LOC_CSUBSETREF:
  1551. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  1552. else
  1553. internalerror(2006052310);
  1554. end;
  1555. end;
  1556. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  1557. begin
  1558. case loc.loc of
  1559. LOC_REFERENCE,LOC_CREFERENCE:
  1560. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  1561. LOC_REGISTER,LOC_CREGISTER:
  1562. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  1563. LOC_SUBSETREG,LOC_CSUBSETREG:
  1564. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  1565. LOC_SUBSETREF,LOC_CSUBSETREF:
  1566. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  1567. else
  1568. internalerror(2006051510);
  1569. end;
  1570. end;
  1571. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  1572. var
  1573. powerval : longint;
  1574. begin
  1575. case op of
  1576. OP_OR :
  1577. begin
  1578. { or with zero returns same result }
  1579. if a = 0 then
  1580. op:=OP_NONE
  1581. else
  1582. { or with max returns max }
  1583. if a = -1 then
  1584. op:=OP_MOVE;
  1585. end;
  1586. OP_AND :
  1587. begin
  1588. { and with max returns same result }
  1589. if (a = -1) then
  1590. op:=OP_NONE
  1591. else
  1592. { and with 0 returns 0 }
  1593. if a=0 then
  1594. op:=OP_MOVE;
  1595. end;
  1596. OP_DIV :
  1597. begin
  1598. { division by 1 returns result }
  1599. if a = 1 then
  1600. op:=OP_NONE
  1601. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1602. begin
  1603. a := powerval;
  1604. op:= OP_SHR;
  1605. end;
  1606. end;
  1607. OP_IDIV:
  1608. begin
  1609. if a = 1 then
  1610. op:=OP_NONE;
  1611. end;
  1612. OP_MUL,OP_IMUL:
  1613. begin
  1614. if a = 1 then
  1615. op:=OP_NONE
  1616. else
  1617. if a=0 then
  1618. op:=OP_MOVE
  1619. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1620. begin
  1621. a := powerval;
  1622. op:= OP_SHL;
  1623. end;
  1624. end;
  1625. OP_ADD,OP_SUB:
  1626. begin
  1627. if a = 0 then
  1628. op:=OP_NONE;
  1629. end;
  1630. OP_SAR,OP_SHL,OP_SHR:
  1631. begin
  1632. if a = 0 then
  1633. op:=OP_NONE;
  1634. end;
  1635. end;
  1636. end;
  1637. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; const loc: tlocation; const reg: tregister);
  1638. begin
  1639. case loc.loc of
  1640. LOC_REFERENCE, LOC_CREFERENCE:
  1641. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  1642. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1643. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  1644. else
  1645. internalerror(200203301);
  1646. end;
  1647. end;
  1648. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation);
  1649. begin
  1650. case loc.loc of
  1651. LOC_REFERENCE, LOC_CREFERENCE:
  1652. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  1653. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1654. a_loadfpu_reg_reg(list,size,reg,loc.register);
  1655. else
  1656. internalerror(48991);
  1657. end;
  1658. end;
  1659. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  1660. var
  1661. ref : treference;
  1662. begin
  1663. case cgpara.location^.loc of
  1664. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1665. begin
  1666. cgpara.check_simple_location;
  1667. a_loadfpu_reg_reg(list,size,r,cgpara.location^.register);
  1668. end;
  1669. LOC_REFERENCE,LOC_CREFERENCE:
  1670. begin
  1671. cgpara.check_simple_location;
  1672. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1673. a_loadfpu_reg_ref(list,size,r,ref);
  1674. end;
  1675. LOC_REGISTER,LOC_CREGISTER:
  1676. begin
  1677. { paramfpu_ref does the check_simpe_location check here if necessary }
  1678. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  1679. a_loadfpu_reg_ref(list,size,r,ref);
  1680. a_paramfpu_ref(list,size,ref,cgpara);
  1681. tg.Ungettemp(list,ref);
  1682. end;
  1683. else
  1684. internalerror(2002071004);
  1685. end;
  1686. end;
  1687. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  1688. var
  1689. href : treference;
  1690. begin
  1691. cgpara.check_simple_location;
  1692. case cgpara.location^.loc of
  1693. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1694. a_loadfpu_ref_reg(list,size,ref,cgpara.location^.register);
  1695. LOC_REFERENCE,LOC_CREFERENCE:
  1696. begin
  1697. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1698. { concatcopy should choose the best way to copy the data }
  1699. g_concatcopy(list,ref,href,tcgsize2size[size]);
  1700. end;
  1701. else
  1702. internalerror(200402201);
  1703. end;
  1704. end;
  1705. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  1706. var
  1707. tmpreg : tregister;
  1708. begin
  1709. tmpreg:=getintregister(list,size);
  1710. a_load_ref_reg(list,size,size,ref,tmpreg);
  1711. a_op_const_reg(list,op,size,a,tmpreg);
  1712. a_load_reg_ref(list,size,size,tmpreg,ref);
  1713. end;
  1714. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  1715. var
  1716. tmpreg: tregister;
  1717. begin
  1718. tmpreg := cg.getintregister(list, size);
  1719. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  1720. a_op_const_reg(list,op,size,a,tmpreg);
  1721. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  1722. end;
  1723. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  1724. var
  1725. tmpreg: tregister;
  1726. begin
  1727. tmpreg := cg.getintregister(list, size);
  1728. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  1729. a_op_const_reg(list,op,size,a,tmpreg);
  1730. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  1731. end;
  1732. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  1733. begin
  1734. case loc.loc of
  1735. LOC_REGISTER, LOC_CREGISTER:
  1736. a_op_const_reg(list,op,loc.size,a,loc.register);
  1737. LOC_REFERENCE, LOC_CREFERENCE:
  1738. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1739. LOC_SUBSETREG, LOC_CSUBSETREG:
  1740. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  1741. LOC_SUBSETREF, LOC_CSUBSETREF:
  1742. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  1743. else
  1744. internalerror(200109061);
  1745. end;
  1746. end;
  1747. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1748. var
  1749. tmpreg : tregister;
  1750. begin
  1751. tmpreg:=getintregister(list,size);
  1752. a_load_ref_reg(list,size,size,ref,tmpreg);
  1753. a_op_reg_reg(list,op,size,reg,tmpreg);
  1754. a_load_reg_ref(list,size,size,tmpreg,ref);
  1755. end;
  1756. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1757. var
  1758. tmpreg: tregister;
  1759. begin
  1760. case op of
  1761. OP_NOT,OP_NEG:
  1762. { handle it as "load ref,reg; op reg" }
  1763. begin
  1764. a_load_ref_reg(list,size,size,ref,reg);
  1765. a_op_reg_reg(list,op,size,reg,reg);
  1766. end;
  1767. else
  1768. begin
  1769. tmpreg:=getintregister(list,size);
  1770. a_load_ref_reg(list,size,size,ref,tmpreg);
  1771. a_op_reg_reg(list,op,size,tmpreg,reg);
  1772. end;
  1773. end;
  1774. end;
  1775. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  1776. var
  1777. tmpreg: tregister;
  1778. begin
  1779. tmpreg := cg.getintregister(list, opsize);
  1780. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  1781. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1782. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  1783. end;
  1784. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  1785. var
  1786. tmpreg: tregister;
  1787. begin
  1788. tmpreg := cg.getintregister(list, opsize);
  1789. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  1790. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1791. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  1792. end;
  1793. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  1794. begin
  1795. case loc.loc of
  1796. LOC_REGISTER, LOC_CREGISTER:
  1797. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1798. LOC_REFERENCE, LOC_CREFERENCE:
  1799. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1800. LOC_SUBSETREG, LOC_CSUBSETREG:
  1801. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  1802. LOC_SUBSETREF, LOC_CSUBSETREF:
  1803. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  1804. else
  1805. internalerror(200109061);
  1806. end;
  1807. end;
  1808. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1809. var
  1810. tmpreg: tregister;
  1811. begin
  1812. case loc.loc of
  1813. LOC_REGISTER,LOC_CREGISTER:
  1814. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1815. LOC_REFERENCE,LOC_CREFERENCE:
  1816. begin
  1817. tmpreg:=getintregister(list,loc.size);
  1818. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1819. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1820. end;
  1821. LOC_SUBSETREG, LOC_CSUBSETREG:
  1822. begin
  1823. tmpreg:=getintregister(list,loc.size);
  1824. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1825. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  1826. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1827. end;
  1828. LOC_SUBSETREF, LOC_CSUBSETREF:
  1829. begin
  1830. tmpreg:=getintregister(list,loc.size);
  1831. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  1832. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  1833. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  1834. end;
  1835. else
  1836. internalerror(200109061);
  1837. end;
  1838. end;
  1839. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  1840. a:aint;src,dst:Tregister);
  1841. begin
  1842. a_load_reg_reg(list,size,size,src,dst);
  1843. a_op_const_reg(list,op,size,a,dst);
  1844. end;
  1845. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  1846. size: tcgsize; src1, src2, dst: tregister);
  1847. var
  1848. tmpreg: tregister;
  1849. begin
  1850. if (dst<>src1) then
  1851. begin
  1852. a_load_reg_reg(list,size,size,src2,dst);
  1853. a_op_reg_reg(list,op,size,src1,dst);
  1854. end
  1855. else
  1856. begin
  1857. tmpreg:=getintregister(list,size);
  1858. a_load_reg_reg(list,size,size,src2,tmpreg);
  1859. a_op_reg_reg(list,op,size,src1,tmpreg);
  1860. a_load_reg_reg(list,size,size,tmpreg,dst);
  1861. end;
  1862. end;
  1863. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1864. begin
  1865. a_op_const_reg_reg(list,op,size,a,src,dst);
  1866. ovloc.loc:=LOC_VOID;
  1867. end;
  1868. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1869. begin
  1870. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  1871. ovloc.loc:=LOC_VOID;
  1872. end;
  1873. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  1874. l : tasmlabel);
  1875. var
  1876. tmpreg: tregister;
  1877. begin
  1878. tmpreg:=getintregister(list,size);
  1879. a_load_ref_reg(list,size,size,ref,tmpreg);
  1880. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1881. end;
  1882. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  1883. l : tasmlabel);
  1884. var
  1885. tmpreg : tregister;
  1886. begin
  1887. case loc.loc of
  1888. LOC_REGISTER,LOC_CREGISTER:
  1889. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1890. LOC_REFERENCE,LOC_CREFERENCE:
  1891. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1892. LOC_SUBSETREG, LOC_CSUBSETREG:
  1893. begin
  1894. tmpreg:=getintregister(list,size);
  1895. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  1896. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1897. end;
  1898. LOC_SUBSETREF, LOC_CSUBSETREF:
  1899. begin
  1900. tmpreg:=getintregister(list,size);
  1901. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  1902. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1903. end;
  1904. else
  1905. internalerror(200109061);
  1906. end;
  1907. end;
  1908. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1909. var
  1910. tmpreg: tregister;
  1911. begin
  1912. tmpreg:=getintregister(list,size);
  1913. a_load_ref_reg(list,size,size,ref,tmpreg);
  1914. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1915. end;
  1916. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1917. var
  1918. tmpreg: tregister;
  1919. begin
  1920. tmpreg:=getintregister(list,size);
  1921. a_load_ref_reg(list,size,size,ref,tmpreg);
  1922. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1923. end;
  1924. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  1925. begin
  1926. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  1927. end;
  1928. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1929. begin
  1930. case loc.loc of
  1931. LOC_REGISTER,
  1932. LOC_CREGISTER:
  1933. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1934. LOC_REFERENCE,
  1935. LOC_CREFERENCE :
  1936. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1937. LOC_CONSTANT:
  1938. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1939. LOC_SUBSETREG,
  1940. LOC_CSUBSETREG:
  1941. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  1942. LOC_SUBSETREF,
  1943. LOC_CSUBSETREF:
  1944. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  1945. else
  1946. internalerror(200203231);
  1947. end;
  1948. end;
  1949. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  1950. var
  1951. tmpreg: tregister;
  1952. begin
  1953. tmpreg:=getintregister(list, cmpsize);
  1954. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  1955. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  1956. end;
  1957. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  1958. var
  1959. tmpreg: tregister;
  1960. begin
  1961. tmpreg:=getintregister(list, cmpsize);
  1962. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  1963. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  1964. end;
  1965. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1966. l : tasmlabel);
  1967. var
  1968. tmpreg: tregister;
  1969. begin
  1970. case loc.loc of
  1971. LOC_REGISTER,LOC_CREGISTER:
  1972. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1973. LOC_REFERENCE,LOC_CREFERENCE:
  1974. begin
  1975. tmpreg:=getintregister(list,size);
  1976. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1977. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1978. end;
  1979. LOC_SUBSETREG, LOC_CSUBSETREG:
  1980. begin
  1981. tmpreg:=getintregister(list, size);
  1982. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1983. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  1984. end;
  1985. LOC_SUBSETREF, LOC_CSUBSETREF:
  1986. begin
  1987. tmpreg:=getintregister(list, size);
  1988. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1989. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  1990. end;
  1991. else
  1992. internalerror(200109061);
  1993. end;
  1994. end;
  1995. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1996. begin
  1997. case loc.loc of
  1998. LOC_MMREGISTER,LOC_CMMREGISTER:
  1999. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2000. LOC_REFERENCE,LOC_CREFERENCE:
  2001. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2002. else
  2003. internalerror(200310121);
  2004. end;
  2005. end;
  2006. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2007. begin
  2008. case loc.loc of
  2009. LOC_MMREGISTER,LOC_CMMREGISTER:
  2010. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2011. LOC_REFERENCE,LOC_CREFERENCE:
  2012. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2013. else
  2014. internalerror(200310122);
  2015. end;
  2016. end;
  2017. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2018. var
  2019. href : treference;
  2020. begin
  2021. cgpara.check_simple_location;
  2022. case cgpara.location^.loc of
  2023. LOC_MMREGISTER,LOC_CMMREGISTER:
  2024. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2025. LOC_REFERENCE,LOC_CREFERENCE:
  2026. begin
  2027. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2028. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2029. end
  2030. else
  2031. internalerror(200310123);
  2032. end;
  2033. end;
  2034. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2035. var
  2036. hr : tregister;
  2037. hs : tmmshuffle;
  2038. begin
  2039. cgpara.check_simple_location;
  2040. hr:=getmmregister(list,cgpara.location^.size);
  2041. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2042. if realshuffle(shuffle) then
  2043. begin
  2044. hs:=shuffle^;
  2045. removeshuffles(hs);
  2046. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2047. end
  2048. else
  2049. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2050. end;
  2051. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2052. begin
  2053. case loc.loc of
  2054. LOC_MMREGISTER,LOC_CMMREGISTER:
  2055. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2056. LOC_REFERENCE,LOC_CREFERENCE:
  2057. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2058. else
  2059. internalerror(200310123);
  2060. end;
  2061. end;
  2062. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2063. var
  2064. hr : tregister;
  2065. hs : tmmshuffle;
  2066. begin
  2067. hr:=getmmregister(list,size);
  2068. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2069. if realshuffle(shuffle) then
  2070. begin
  2071. hs:=shuffle^;
  2072. removeshuffles(hs);
  2073. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2074. end
  2075. else
  2076. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2077. end;
  2078. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2079. var
  2080. hr : tregister;
  2081. hs : tmmshuffle;
  2082. begin
  2083. hr:=getmmregister(list,size);
  2084. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2085. if realshuffle(shuffle) then
  2086. begin
  2087. hs:=shuffle^;
  2088. removeshuffles(hs);
  2089. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2090. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2091. end
  2092. else
  2093. begin
  2094. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2095. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2096. end;
  2097. end;
  2098. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2099. begin
  2100. case loc.loc of
  2101. LOC_CMMREGISTER,LOC_MMREGISTER:
  2102. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2103. LOC_CREFERENCE,LOC_REFERENCE:
  2104. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2105. else
  2106. internalerror(200312232);
  2107. end;
  2108. end;
  2109. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2110. begin
  2111. g_concatcopy(list,source,dest,len);
  2112. end;
  2113. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2114. var
  2115. cgpara1,cgpara2,cgpara3 : TCGPara;
  2116. begin
  2117. cgpara1.init;
  2118. cgpara2.init;
  2119. cgpara3.init;
  2120. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2121. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2122. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2123. paramanager.allocparaloc(list,cgpara3);
  2124. a_paramaddr_ref(list,dest,cgpara3);
  2125. paramanager.allocparaloc(list,cgpara2);
  2126. a_paramaddr_ref(list,source,cgpara2);
  2127. paramanager.allocparaloc(list,cgpara1);
  2128. a_param_const(list,OS_INT,len,cgpara1);
  2129. paramanager.freeparaloc(list,cgpara3);
  2130. paramanager.freeparaloc(list,cgpara2);
  2131. paramanager.freeparaloc(list,cgpara1);
  2132. allocallcpuregisters(list);
  2133. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  2134. deallocallcpuregisters(list);
  2135. cgpara3.done;
  2136. cgpara2.done;
  2137. cgpara1.done;
  2138. end;
  2139. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2140. var
  2141. href : treference;
  2142. incrfunc : string;
  2143. cgpara1,cgpara2 : TCGPara;
  2144. begin
  2145. cgpara1.init;
  2146. cgpara2.init;
  2147. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2148. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2149. if is_interfacecom(t) then
  2150. incrfunc:='FPC_INTF_INCR_REF'
  2151. else if is_ansistring(t) then
  2152. incrfunc:='FPC_ANSISTR_INCR_REF'
  2153. else if is_widestring(t) then
  2154. incrfunc:='FPC_WIDESTR_INCR_REF'
  2155. else if is_dynamic_array(t) then
  2156. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2157. else
  2158. incrfunc:='';
  2159. { call the special incr function or the generic addref }
  2160. if incrfunc<>'' then
  2161. begin
  2162. paramanager.allocparaloc(list,cgpara1);
  2163. { widestrings aren't ref. counted on all platforms so we need the address
  2164. to create a real copy }
  2165. if is_widestring(t) then
  2166. a_paramaddr_ref(list,ref,cgpara1)
  2167. else
  2168. { these functions get the pointer by value }
  2169. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2170. paramanager.freeparaloc(list,cgpara1);
  2171. allocallcpuregisters(list);
  2172. a_call_name(list,incrfunc);
  2173. deallocallcpuregisters(list);
  2174. end
  2175. else
  2176. begin
  2177. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2178. paramanager.allocparaloc(list,cgpara2);
  2179. a_paramaddr_ref(list,href,cgpara2);
  2180. paramanager.allocparaloc(list,cgpara1);
  2181. a_paramaddr_ref(list,ref,cgpara1);
  2182. paramanager.freeparaloc(list,cgpara1);
  2183. paramanager.freeparaloc(list,cgpara2);
  2184. allocallcpuregisters(list);
  2185. a_call_name(list,'FPC_ADDREF');
  2186. deallocallcpuregisters(list);
  2187. end;
  2188. cgpara2.done;
  2189. cgpara1.done;
  2190. end;
  2191. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2192. var
  2193. href : treference;
  2194. decrfunc : string;
  2195. needrtti : boolean;
  2196. cgpara1,cgpara2 : TCGPara;
  2197. tempreg1,tempreg2 : TRegister;
  2198. begin
  2199. cgpara1.init;
  2200. cgpara2.init;
  2201. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2202. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2203. needrtti:=false;
  2204. if is_interfacecom(t) then
  2205. decrfunc:='FPC_INTF_DECR_REF'
  2206. else if is_ansistring(t) then
  2207. decrfunc:='FPC_ANSISTR_DECR_REF'
  2208. else if is_widestring(t) then
  2209. decrfunc:='FPC_WIDESTR_DECR_REF'
  2210. else if is_dynamic_array(t) then
  2211. begin
  2212. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2213. needrtti:=true;
  2214. end
  2215. else
  2216. decrfunc:='';
  2217. { call the special decr function or the generic decref }
  2218. if decrfunc<>'' then
  2219. begin
  2220. if needrtti then
  2221. begin
  2222. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2223. tempreg2:=getaddressregister(list);
  2224. a_loadaddr_ref_reg(list,href,tempreg2);
  2225. end;
  2226. tempreg1:=getaddressregister(list);
  2227. a_loadaddr_ref_reg(list,ref,tempreg1);
  2228. if needrtti then
  2229. begin
  2230. paramanager.allocparaloc(list,cgpara2);
  2231. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2232. paramanager.freeparaloc(list,cgpara2);
  2233. end;
  2234. paramanager.allocparaloc(list,cgpara1);
  2235. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2236. paramanager.freeparaloc(list,cgpara1);
  2237. allocallcpuregisters(list);
  2238. a_call_name(list,decrfunc);
  2239. deallocallcpuregisters(list);
  2240. end
  2241. else
  2242. begin
  2243. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2244. paramanager.allocparaloc(list,cgpara2);
  2245. a_paramaddr_ref(list,href,cgpara2);
  2246. paramanager.allocparaloc(list,cgpara1);
  2247. a_paramaddr_ref(list,ref,cgpara1);
  2248. paramanager.freeparaloc(list,cgpara1);
  2249. paramanager.freeparaloc(list,cgpara2);
  2250. allocallcpuregisters(list);
  2251. a_call_name(list,'FPC_DECREF');
  2252. deallocallcpuregisters(list);
  2253. end;
  2254. cgpara2.done;
  2255. cgpara1.done;
  2256. end;
  2257. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2258. var
  2259. href : treference;
  2260. cgpara1,cgpara2 : TCGPara;
  2261. begin
  2262. cgpara1.init;
  2263. cgpara2.init;
  2264. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2265. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2266. if is_ansistring(t) or
  2267. is_widestring(t) or
  2268. is_interfacecom(t) or
  2269. is_dynamic_array(t) then
  2270. a_load_const_ref(list,OS_ADDR,0,ref)
  2271. else
  2272. begin
  2273. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2274. paramanager.allocparaloc(list,cgpara2);
  2275. a_paramaddr_ref(list,href,cgpara2);
  2276. paramanager.allocparaloc(list,cgpara1);
  2277. a_paramaddr_ref(list,ref,cgpara1);
  2278. paramanager.freeparaloc(list,cgpara1);
  2279. paramanager.freeparaloc(list,cgpara2);
  2280. allocallcpuregisters(list);
  2281. a_call_name(list,'FPC_INITIALIZE');
  2282. deallocallcpuregisters(list);
  2283. end;
  2284. cgpara1.done;
  2285. cgpara2.done;
  2286. end;
  2287. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2288. var
  2289. href : treference;
  2290. cgpara1,cgpara2 : TCGPara;
  2291. begin
  2292. cgpara1.init;
  2293. cgpara2.init;
  2294. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2295. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2296. if is_ansistring(t) or
  2297. is_widestring(t) or
  2298. is_interfacecom(t) then
  2299. begin
  2300. g_decrrefcount(list,t,ref);
  2301. a_load_const_ref(list,OS_ADDR,0,ref);
  2302. end
  2303. else
  2304. begin
  2305. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2306. paramanager.allocparaloc(list,cgpara2);
  2307. a_paramaddr_ref(list,href,cgpara2);
  2308. paramanager.allocparaloc(list,cgpara1);
  2309. a_paramaddr_ref(list,ref,cgpara1);
  2310. paramanager.freeparaloc(list,cgpara1);
  2311. paramanager.freeparaloc(list,cgpara2);
  2312. allocallcpuregisters(list);
  2313. a_call_name(list,'FPC_FINALIZE');
  2314. deallocallcpuregisters(list);
  2315. end;
  2316. cgpara1.done;
  2317. cgpara2.done;
  2318. end;
  2319. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2320. { generate range checking code for the value at location p. The type }
  2321. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2322. { is the original type used at that location. When both defs are equal }
  2323. { the check is also insert (needed for succ,pref,inc,dec) }
  2324. const
  2325. aintmax=high(aint);
  2326. var
  2327. neglabel : tasmlabel;
  2328. hreg : tregister;
  2329. lto,hto,
  2330. lfrom,hfrom : TConstExprInt;
  2331. fromsize, tosize: cardinal;
  2332. from_signed, to_signed: boolean;
  2333. begin
  2334. { range checking on and range checkable value? }
  2335. if not(cs_check_range in current_settings.localswitches) or
  2336. not(fromdef.typ in [orddef,enumdef]) then
  2337. exit;
  2338. {$ifndef cpu64bit}
  2339. { handle 64bit rangechecks separate for 32bit processors }
  2340. if is_64bit(fromdef) or is_64bit(todef) then
  2341. begin
  2342. cg64.g_rangecheck64(list,l,fromdef,todef);
  2343. exit;
  2344. end;
  2345. {$endif cpu64bit}
  2346. { only check when assigning to scalar, subranges are different, }
  2347. { when todef=fromdef then the check is always generated }
  2348. getrange(fromdef,lfrom,hfrom);
  2349. getrange(todef,lto,hto);
  2350. from_signed := is_signed(fromdef);
  2351. to_signed := is_signed(todef);
  2352. { check the rangedef of the array, not the array itself }
  2353. { (only change now, since getrange needs the arraydef) }
  2354. if (todef.typ = arraydef) then
  2355. todef := tarraydef(todef).rangedef;
  2356. { no range check if from and to are equal and are both longint/dword }
  2357. { no range check if from and to are equal and are both longint/dword }
  2358. { (if we have a 32bit processor) or int64/qword, since such }
  2359. { operations can at most cause overflows (JM) }
  2360. { Note that these checks are mostly processor independent, they only }
  2361. { have to be changed once we introduce 64bit subrange types }
  2362. {$ifdef cpu64bit}
  2363. if (fromdef = todef) and
  2364. (fromdef.typ=orddef) and
  2365. (((((torddef(fromdef).ordtype = s64bit) and
  2366. (lfrom = low(int64)) and
  2367. (hfrom = high(int64))) or
  2368. ((torddef(fromdef).ordtype = u64bit) and
  2369. (lfrom = low(qword)) and
  2370. (hfrom = high(qword))) or
  2371. ((torddef(fromdef).ordtype = scurrency) and
  2372. (lfrom = low(int64)) and
  2373. (hfrom = high(int64)))))) then
  2374. exit;
  2375. {$else cpu64bit}
  2376. if (fromdef = todef) and
  2377. (fromdef.typ=orddef) and
  2378. (((((torddef(fromdef).ordtype = s32bit) and
  2379. (lfrom = low(longint)) and
  2380. (hfrom = high(longint))) or
  2381. ((torddef(fromdef).ordtype = u32bit) and
  2382. (lfrom = low(cardinal)) and
  2383. (hfrom = high(cardinal)))))) then
  2384. exit;
  2385. {$endif cpu64bit}
  2386. { optimize some range checks away in safe cases }
  2387. fromsize := fromdef.size;
  2388. tosize := todef.size;
  2389. if ((from_signed = to_signed) or
  2390. (not from_signed)) and
  2391. (lto<=lfrom) and (hto>=hfrom) and
  2392. (fromsize <= tosize) then
  2393. begin
  2394. { if fromsize < tosize, and both have the same signed-ness or }
  2395. { fromdef is unsigned, then all bit patterns from fromdef are }
  2396. { valid for todef as well }
  2397. if (fromsize < tosize) then
  2398. exit;
  2399. if (fromsize = tosize) and
  2400. (from_signed = to_signed) then
  2401. { only optimize away if all bit patterns which fit in fromsize }
  2402. { are valid for the todef }
  2403. begin
  2404. {$ifopt Q+}
  2405. {$define overflowon}
  2406. {$Q-}
  2407. {$endif}
  2408. if to_signed then
  2409. begin
  2410. { calculation of the low/high ranges must not overflow 64 bit
  2411. otherwise we end up comparing with zero for 64 bit data types on
  2412. 64 bit processors }
  2413. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2414. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2415. exit
  2416. end
  2417. else
  2418. begin
  2419. { calculation of the low/high ranges must not overflow 64 bit
  2420. otherwise we end up having all zeros for 64 bit data types on
  2421. 64 bit processors }
  2422. if (lto = 0) and
  2423. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2424. exit
  2425. end;
  2426. {$ifdef overflowon}
  2427. {$Q+}
  2428. {$undef overflowon}
  2429. {$endif}
  2430. end
  2431. end;
  2432. { generate the rangecheck code for the def where we are going to }
  2433. { store the result }
  2434. { use the trick that }
  2435. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2436. { To be able to do that, we have to make sure however that either }
  2437. { fromdef and todef are both signed or unsigned, or that we leave }
  2438. { the parts < 0 and > maxlongint out }
  2439. if from_signed xor to_signed then
  2440. begin
  2441. if from_signed then
  2442. { from is signed, to is unsigned }
  2443. begin
  2444. { if high(from) < 0 -> always range error }
  2445. if (hfrom < 0) or
  2446. { if low(to) > maxlongint also range error }
  2447. (lto > aintmax) then
  2448. begin
  2449. a_call_name(list,'FPC_RANGEERROR');
  2450. exit
  2451. end;
  2452. { from is signed and to is unsigned -> when looking at to }
  2453. { as an signed value, it must be < maxaint (otherwise }
  2454. { it will become negative, which is invalid since "to" is unsigned) }
  2455. if hto > aintmax then
  2456. hto := aintmax;
  2457. end
  2458. else
  2459. { from is unsigned, to is signed }
  2460. begin
  2461. if (lfrom > aintmax) or
  2462. (hto < 0) then
  2463. begin
  2464. a_call_name(list,'FPC_RANGEERROR');
  2465. exit
  2466. end;
  2467. { from is unsigned and to is signed -> when looking at to }
  2468. { as an unsigned value, it must be >= 0 (since negative }
  2469. { values are the same as values > maxlongint) }
  2470. if lto < 0 then
  2471. lto := 0;
  2472. end;
  2473. end;
  2474. hreg:=getintregister(list,OS_INT);
  2475. a_load_loc_reg(list,OS_INT,l,hreg);
  2476. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  2477. current_asmdata.getjumplabel(neglabel);
  2478. {
  2479. if from_signed then
  2480. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  2481. else
  2482. }
  2483. {$ifdef cpu64bit}
  2484. if qword(hto-lto)>qword(aintmax) then
  2485. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  2486. else
  2487. {$endif cpu64bit}
  2488. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  2489. a_call_name(list,'FPC_RANGEERROR');
  2490. a_label(list,neglabel);
  2491. end;
  2492. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  2493. begin
  2494. g_overflowCheck(list,loc,def);
  2495. end;
  2496. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  2497. var
  2498. tmpreg : tregister;
  2499. begin
  2500. tmpreg:=getintregister(list,size);
  2501. g_flags2reg(list,size,f,tmpreg);
  2502. a_load_reg_ref(list,size,size,tmpreg,ref);
  2503. end;
  2504. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  2505. var
  2506. OKLabel : tasmlabel;
  2507. cgpara1 : TCGPara;
  2508. begin
  2509. if (cs_check_object in current_settings.localswitches) or
  2510. (cs_check_range in current_settings.localswitches) then
  2511. begin
  2512. current_asmdata.getjumplabel(oklabel);
  2513. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  2514. cgpara1.init;
  2515. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2516. paramanager.allocparaloc(list,cgpara1);
  2517. a_param_const(list,OS_INT,210,cgpara1);
  2518. paramanager.freeparaloc(list,cgpara1);
  2519. a_call_name(list,'FPC_HANDLEERROR');
  2520. a_label(list,oklabel);
  2521. cgpara1.done;
  2522. end;
  2523. end;
  2524. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  2525. var
  2526. hrefvmt : treference;
  2527. cgpara1,cgpara2 : TCGPara;
  2528. begin
  2529. cgpara1.init;
  2530. cgpara2.init;
  2531. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2532. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2533. if (cs_check_object in current_settings.localswitches) then
  2534. begin
  2535. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  2536. paramanager.allocparaloc(list,cgpara2);
  2537. a_paramaddr_ref(list,hrefvmt,cgpara2);
  2538. paramanager.allocparaloc(list,cgpara1);
  2539. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2540. paramanager.freeparaloc(list,cgpara1);
  2541. paramanager.freeparaloc(list,cgpara2);
  2542. allocallcpuregisters(list);
  2543. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  2544. deallocallcpuregisters(list);
  2545. end
  2546. else
  2547. if (cs_check_range in current_settings.localswitches) then
  2548. begin
  2549. paramanager.allocparaloc(list,cgpara1);
  2550. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2551. paramanager.freeparaloc(list,cgpara1);
  2552. allocallcpuregisters(list);
  2553. a_call_name(list,'FPC_CHECK_OBJECT');
  2554. deallocallcpuregisters(list);
  2555. end;
  2556. cgpara1.done;
  2557. cgpara2.done;
  2558. end;
  2559. {*****************************************************************************
  2560. Entry/Exit Code Functions
  2561. *****************************************************************************}
  2562. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  2563. var
  2564. sizereg,sourcereg,lenreg : tregister;
  2565. cgpara1,cgpara2,cgpara3 : TCGPara;
  2566. begin
  2567. { because some abis don't support dynamic stack allocation properly
  2568. open array value parameters are copied onto the heap
  2569. }
  2570. { calculate necessary memory }
  2571. { read/write operations on one register make the life of the register allocator hard }
  2572. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  2573. begin
  2574. lenreg:=getintregister(list,OS_INT);
  2575. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  2576. end
  2577. else
  2578. lenreg:=lenloc.register;
  2579. sizereg:=getintregister(list,OS_INT);
  2580. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  2581. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  2582. { load source }
  2583. sourcereg:=getaddressregister(list);
  2584. a_loadaddr_ref_reg(list,ref,sourcereg);
  2585. { do getmem call }
  2586. cgpara1.init;
  2587. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2588. paramanager.allocparaloc(list,cgpara1);
  2589. a_param_reg(list,OS_INT,sizereg,cgpara1);
  2590. paramanager.freeparaloc(list,cgpara1);
  2591. allocallcpuregisters(list);
  2592. a_call_name(list,'FPC_GETMEM');
  2593. deallocallcpuregisters(list);
  2594. cgpara1.done;
  2595. { return the new address }
  2596. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  2597. { do move call }
  2598. cgpara1.init;
  2599. cgpara2.init;
  2600. cgpara3.init;
  2601. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2602. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2603. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2604. { load size }
  2605. paramanager.allocparaloc(list,cgpara3);
  2606. a_param_reg(list,OS_INT,sizereg,cgpara3);
  2607. { load destination }
  2608. paramanager.allocparaloc(list,cgpara2);
  2609. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  2610. { load source }
  2611. paramanager.allocparaloc(list,cgpara1);
  2612. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  2613. paramanager.freeparaloc(list,cgpara3);
  2614. paramanager.freeparaloc(list,cgpara2);
  2615. paramanager.freeparaloc(list,cgpara1);
  2616. allocallcpuregisters(list);
  2617. a_call_name(list,'FPC_MOVE');
  2618. deallocallcpuregisters(list);
  2619. cgpara3.done;
  2620. cgpara2.done;
  2621. cgpara1.done;
  2622. end;
  2623. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  2624. var
  2625. cgpara1 : TCGPara;
  2626. begin
  2627. { do move call }
  2628. cgpara1.init;
  2629. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2630. { load source }
  2631. paramanager.allocparaloc(list,cgpara1);
  2632. a_param_loc(list,l,cgpara1);
  2633. paramanager.freeparaloc(list,cgpara1);
  2634. allocallcpuregisters(list);
  2635. a_call_name(list,'FPC_FREEMEM');
  2636. deallocallcpuregisters(list);
  2637. cgpara1.done;
  2638. end;
  2639. procedure tcg.g_save_standard_registers(list:TAsmList);
  2640. var
  2641. href : treference;
  2642. size : longint;
  2643. r : integer;
  2644. begin
  2645. { Get temp }
  2646. size:=0;
  2647. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2648. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2649. inc(size,sizeof(aint));
  2650. if size>0 then
  2651. begin
  2652. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  2653. { Copy registers to temp }
  2654. href:=current_procinfo.save_regs_ref;
  2655. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2656. begin
  2657. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2658. begin
  2659. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  2660. inc(href.offset,sizeof(aint));
  2661. end;
  2662. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  2663. end;
  2664. end;
  2665. end;
  2666. procedure tcg.g_restore_standard_registers(list:TAsmList);
  2667. var
  2668. href : treference;
  2669. r : integer;
  2670. hreg : tregister;
  2671. begin
  2672. { Copy registers from temp }
  2673. href:=current_procinfo.save_regs_ref;
  2674. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2675. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2676. begin
  2677. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  2678. { Allocate register so the optimizer does not remove the load }
  2679. a_reg_alloc(list,hreg);
  2680. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  2681. inc(href.offset,sizeof(aint));
  2682. end;
  2683. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  2684. end;
  2685. procedure tcg.g_profilecode(list : TAsmList);
  2686. begin
  2687. end;
  2688. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  2689. begin
  2690. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  2691. end;
  2692. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  2693. begin
  2694. a_load_const_ref(list, OS_INT, a, href);
  2695. end;
  2696. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  2697. begin
  2698. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  2699. end;
  2700. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  2701. var
  2702. hsym : tsym;
  2703. href : treference;
  2704. paraloc : tcgparalocation;
  2705. begin
  2706. { calculate the parameter info for the procdef }
  2707. if not procdef.has_paraloc_info then
  2708. begin
  2709. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  2710. procdef.has_paraloc_info:=true;
  2711. end;
  2712. hsym:=tsym(procdef.parast.Find('self'));
  2713. if not(assigned(hsym) and
  2714. (hsym.typ=paravarsym)) then
  2715. internalerror(200305251);
  2716. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  2717. case paraloc.loc of
  2718. LOC_REGISTER:
  2719. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  2720. LOC_REFERENCE:
  2721. begin
  2722. { offset in the wrapper needs to be adjusted for the stored
  2723. return address }
  2724. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  2725. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  2726. end
  2727. else
  2728. internalerror(200309189);
  2729. end;
  2730. end;
  2731. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  2732. begin
  2733. a_call_name(list,s);
  2734. end;
  2735. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  2736. var
  2737. l: tasmsymbol;
  2738. ref: treference;
  2739. begin
  2740. result := NR_NO;
  2741. case target_info.system of
  2742. system_powerpc_darwin,
  2743. system_i386_darwin:
  2744. begin
  2745. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  2746. if not(assigned(l)) then
  2747. begin
  2748. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_COMMON,AT_DATA);
  2749. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  2750. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  2751. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  2752. end;
  2753. result := cg.getaddressregister(list);
  2754. reference_reset_symbol(ref,l,0);
  2755. { ref.base:=current_procinfo.got;
  2756. ref.relsymbol:=current_procinfo.CurrGOTLabel;}
  2757. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  2758. end;
  2759. end;
  2760. end;
  2761. {*****************************************************************************
  2762. TCG64
  2763. *****************************************************************************}
  2764. {$ifndef cpu64bit}
  2765. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  2766. begin
  2767. a_load64_reg_reg(list,regsrc,regdst);
  2768. a_op64_const_reg(list,op,size,value,regdst);
  2769. end;
  2770. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  2771. var
  2772. tmpreg64 : tregister64;
  2773. begin
  2774. { when src1=dst then we need to first create a temp to prevent
  2775. overwriting src1 with src2 }
  2776. if (regsrc1.reghi=regdst.reghi) or
  2777. (regsrc1.reglo=regdst.reghi) or
  2778. (regsrc1.reghi=regdst.reglo) or
  2779. (regsrc1.reglo=regdst.reglo) then
  2780. begin
  2781. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2782. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2783. a_load64_reg_reg(list,regsrc2,tmpreg64);
  2784. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  2785. a_load64_reg_reg(list,tmpreg64,regdst);
  2786. end
  2787. else
  2788. begin
  2789. a_load64_reg_reg(list,regsrc2,regdst);
  2790. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  2791. end;
  2792. end;
  2793. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  2794. var
  2795. tmpreg64 : tregister64;
  2796. begin
  2797. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2798. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2799. a_load64_subsetref_reg(list,sref,tmpreg64);
  2800. a_op64_const_reg(list,op,size,a,tmpreg64);
  2801. a_load64_reg_subsetref(list,tmpreg64,sref);
  2802. end;
  2803. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  2804. var
  2805. tmpreg64 : tregister64;
  2806. begin
  2807. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2808. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2809. a_load64_subsetref_reg(list,sref,tmpreg64);
  2810. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  2811. a_load64_reg_subsetref(list,tmpreg64,sref);
  2812. end;
  2813. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  2814. var
  2815. tmpreg64 : tregister64;
  2816. begin
  2817. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2818. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2819. a_load64_subsetref_reg(list,sref,tmpreg64);
  2820. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  2821. a_load64_reg_subsetref(list,tmpreg64,sref);
  2822. end;
  2823. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  2824. var
  2825. tmpreg64 : tregister64;
  2826. begin
  2827. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2828. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2829. a_load64_subsetref_reg(list,ssref,tmpreg64);
  2830. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  2831. end;
  2832. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2833. begin
  2834. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  2835. ovloc.loc:=LOC_VOID;
  2836. end;
  2837. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2838. begin
  2839. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  2840. ovloc.loc:=LOC_VOID;
  2841. end;
  2842. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  2843. begin
  2844. case l.loc of
  2845. LOC_REFERENCE, LOC_CREFERENCE:
  2846. a_load64_ref_subsetref(list,l.reference,sref);
  2847. LOC_REGISTER,LOC_CREGISTER:
  2848. a_load64_reg_subsetref(list,l.register64,sref);
  2849. LOC_CONSTANT :
  2850. a_load64_const_subsetref(list,l.value64,sref);
  2851. LOC_SUBSETREF,LOC_CSUBSETREF:
  2852. a_load64_subsetref_subsetref(list,l.sref,sref);
  2853. else
  2854. internalerror(2006082210);
  2855. end;
  2856. end;
  2857. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  2858. begin
  2859. case l.loc of
  2860. LOC_REFERENCE, LOC_CREFERENCE:
  2861. a_load64_subsetref_ref(list,sref,l.reference);
  2862. LOC_REGISTER,LOC_CREGISTER:
  2863. a_load64_subsetref_reg(list,sref,l.register64);
  2864. LOC_SUBSETREF,LOC_CSUBSETREF:
  2865. a_load64_subsetref_subsetref(list,sref,l.sref);
  2866. else
  2867. internalerror(2006082211);
  2868. end;
  2869. end;
  2870. {$endif cpu64bit}
  2871. initialization
  2872. ;
  2873. finalization
  2874. cg.free;
  2875. {$ifndef cpu64bit}
  2876. cg64.free;
  2877. {$endif cpu64bit}
  2878. end.