ncgadd.pas 31 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834
  1. {
  2. Copyright (c) 2000-2002 by the FPC development team
  3. Code generation for add nodes (generic version)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgadd;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,cpubase;
  22. type
  23. tcgaddnode = class(taddnode)
  24. { function pass_1: tnode; override;}
  25. procedure pass_generate_code;override;
  26. protected
  27. { call secondpass for both left and right }
  28. procedure pass_left_right;
  29. { set the register of the result location }
  30. procedure set_result_location_reg;
  31. { load left and right nodes into registers }
  32. procedure force_reg_left_right(allow_swap,allow_constant:boolean);
  33. procedure second_opfloat;
  34. procedure second_opboolean;
  35. procedure second_opsmallset;
  36. procedure second_op64bit;
  37. procedure second_opordinal;
  38. procedure second_addstring;virtual;
  39. procedure second_addfloat;virtual;abstract;
  40. procedure second_addboolean;virtual;
  41. procedure second_addsmallset;virtual;
  42. {$ifdef x86}
  43. {$ifdef SUPPORT_MMX}
  44. procedure second_opmmxset;virtual;abstract;
  45. procedure second_opmmx;virtual;abstract;
  46. {$endif SUPPORT_MMX}
  47. {$endif x86}
  48. procedure second_opvector;virtual;abstract;
  49. procedure second_add64bit;virtual;
  50. procedure second_addordinal;virtual;
  51. procedure second_cmpfloat;virtual;abstract;
  52. procedure second_cmpboolean;virtual;
  53. procedure second_cmpsmallset;virtual;abstract;
  54. procedure second_cmp64bit;virtual;abstract;
  55. procedure second_cmpordinal;virtual;abstract;
  56. end;
  57. implementation
  58. uses
  59. globtype,systems,
  60. cutils,verbose,globals,
  61. symconst,symdef,paramgr,
  62. aasmbase,aasmtai,aasmdata,defutil,
  63. cgbase,procinfo,pass_2,
  64. ncon,nset,ncgutil,cgobj,cgutils
  65. ;
  66. {*****************************************************************************
  67. Helpers
  68. *****************************************************************************}
  69. procedure tcgaddnode.pass_left_right;
  70. var
  71. tmpreg : tregister;
  72. isjump,
  73. pushedfpu : boolean;
  74. otl,ofl : tasmlabel;
  75. begin
  76. { calculate the operator which is more difficult }
  77. firstcomplex(self);
  78. { in case of constant put it to the left }
  79. if (left.nodetype=ordconstn) then
  80. swapleftright;
  81. isjump:=(left.expectloc=LOC_JUMP);
  82. if isjump then
  83. begin
  84. otl:=current_procinfo.CurrTrueLabel;
  85. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  86. ofl:=current_procinfo.CurrFalseLabel;
  87. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  88. end;
  89. secondpass(left);
  90. if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
  91. location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(resultdef),false);
  92. if isjump then
  93. begin
  94. current_procinfo.CurrTrueLabel:=otl;
  95. current_procinfo.CurrFalseLabel:=ofl;
  96. end;
  97. { are too few registers free? }
  98. if left.location.loc=LOC_FPUREGISTER then
  99. pushedfpu:=maybe_pushfpu(current_asmdata.CurrAsmList,right.registersfpu,left.location)
  100. else
  101. pushedfpu:=false;
  102. isjump:=(right.expectloc=LOC_JUMP);
  103. if isjump then
  104. begin
  105. otl:=current_procinfo.CurrTrueLabel;
  106. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  107. ofl:=current_procinfo.CurrFalseLabel;
  108. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  109. end;
  110. secondpass(right);
  111. if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
  112. location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(resultdef),false);
  113. if isjump then
  114. begin
  115. current_procinfo.CurrTrueLabel:=otl;
  116. current_procinfo.CurrFalseLabel:=ofl;
  117. end;
  118. if pushedfpu then
  119. begin
  120. tmpreg := cg.getfpuregister(current_asmdata.CurrAsmList,left.location.size);
  121. cg.a_loadfpu_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg);
  122. location_reset(left.location,LOC_FPUREGISTER,left.location.size);
  123. left.location.register := tmpreg;
  124. {$ifdef x86}
  125. { left operand is now on top of the stack, instead of the right one! }
  126. toggleflag(nf_swapped);
  127. {$endif x86}
  128. end;
  129. end;
  130. procedure tcgaddnode.set_result_location_reg;
  131. begin
  132. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  133. {$ifdef x86}
  134. if left.location.loc=LOC_REGISTER then
  135. begin
  136. if TCGSize2Size[left.location.size]<>TCGSize2Size[location.size] then
  137. internalerror(200307041);
  138. {$ifndef cpu64bit}
  139. if location.size in [OS_64,OS_S64] then
  140. begin
  141. location.register64.reglo := left.location.register64.reglo;
  142. location.register64.reghi := left.location.register64.reghi;
  143. end
  144. else
  145. {$endif}
  146. location.register := left.location.register;
  147. end
  148. else
  149. if right.location.loc=LOC_REGISTER then
  150. begin
  151. if TCGSize2Size[right.location.size]<>TCGSize2Size[location.size] then
  152. internalerror(200307042);
  153. {$ifndef cpu64bit}
  154. if location.size in [OS_64,OS_S64] then
  155. begin
  156. location.register64.reglo := right.location.register64.reglo;
  157. location.register64.reghi := right.location.register64.reghi;
  158. end
  159. else
  160. {$endif}
  161. location.register := right.location.register;
  162. end
  163. else
  164. {$endif}
  165. begin
  166. {$ifndef cpu64bit}
  167. if location.size in [OS_64,OS_S64] then
  168. begin
  169. location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  170. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  171. end
  172. else
  173. {$endif}
  174. location.register := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  175. end;
  176. end;
  177. procedure tcgaddnode.force_reg_left_right(allow_swap,allow_constant:boolean);
  178. begin
  179. if (left.location.loc<>LOC_REGISTER) and
  180. not(
  181. allow_constant and
  182. (left.location.loc in [LOC_CONSTANT,LOC_CREGISTER])
  183. ) then
  184. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
  185. if (right.location.loc<>LOC_REGISTER) and
  186. not(
  187. allow_constant and
  188. (right.location.loc in [LOC_CONSTANT,LOC_CREGISTER]) and
  189. (left.location.loc<>LOC_CONSTANT)
  190. ) then
  191. location_force_reg(current_asmdata.CurrAsmList,right.location,right.location.size,false);
  192. { Left is always a register, right can be register or constant }
  193. if left.location.loc=LOC_CONSTANT then
  194. begin
  195. { when it is not allowed to swap we have a constant on
  196. left, that will give problems }
  197. if not allow_swap then
  198. internalerror(200307043);
  199. swapleftright;
  200. end;
  201. end;
  202. {*****************************************************************************
  203. Smallsets
  204. *****************************************************************************}
  205. procedure tcgaddnode.second_opsmallset;
  206. begin
  207. { when a setdef is passed, it has to be a smallset }
  208. if is_varset(left.resultdef) or
  209. is_varset(right.resultdef) then
  210. internalerror(200203302);
  211. if nodetype in [equaln,unequaln,gtn,gten,lten,ltn] then
  212. second_cmpsmallset
  213. else
  214. second_addsmallset;
  215. end;
  216. procedure tcgaddnode.second_addsmallset;
  217. var
  218. tmpreg : tregister;
  219. mask,
  220. setbase : aint;
  221. cgop : TOpCg;
  222. opdone : boolean;
  223. begin
  224. opdone := false;
  225. pass_left_right;
  226. force_reg_left_right(true,true);
  227. { setelementn is a special case, it must be on right.
  228. We need an extra check if left is a register because the
  229. default case can skip the register loading when the
  230. setelementn is in a register (PFV) }
  231. if (nf_swapped in flags) and
  232. (left.nodetype=setelementn) then
  233. swapleftright;
  234. if (right.nodetype=setelementn) and
  235. (left.location.loc<>LOC_REGISTER) then
  236. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
  237. set_result_location_reg;
  238. if (left.resultdef.typ=setdef) then
  239. setbase:=tsetdef(left.resultdef).setbase
  240. else
  241. setbase:=tsetdef(right.resultdef).setbase;
  242. case nodetype of
  243. addn :
  244. begin
  245. { are we adding set elements ? }
  246. if right.nodetype=setelementn then
  247. begin
  248. { no range support for smallsets! }
  249. if assigned(tsetelementnode(right).right) then
  250. internalerror(43244);
  251. if (right.location.loc = LOC_CONSTANT) then
  252. begin
  253. if (target_info.endian=endian_big) then
  254. mask:=aint((aword(1) shl (resultdef.size*8-1)) shr aword(right.location.value-setbase))
  255. else
  256. mask:=aint(1 shl (right.location.value-setbase));
  257. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
  258. mask,left.location.register,location.register);
  259. end
  260. else
  261. begin
  262. if (target_info.endian=endian_big) then
  263. begin
  264. mask:=aint((aword(1) shl (resultdef.size*8-1)));
  265. cgop:=OP_SHR
  266. end
  267. else
  268. begin
  269. mask:=1;
  270. cgop:=OP_SHL
  271. end;
  272. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  273. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,mask,tmpreg);
  274. location_force_reg(current_asmdata.CurrAsmList,right.location,location.size,true);
  275. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
  276. cg.a_op_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  277. right.location.register,tmpreg);
  278. if left.location.loc <> LOC_CONSTANT then
  279. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,tmpreg,
  280. left.location.register,location.register)
  281. else
  282. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
  283. left.location.value,tmpreg,location.register);
  284. end;
  285. opdone := true;
  286. end
  287. else
  288. cgop := OP_OR;
  289. end;
  290. symdifn :
  291. cgop:=OP_XOR;
  292. muln :
  293. cgop:=OP_AND;
  294. subn :
  295. begin
  296. cgop:=OP_AND;
  297. if (not(nf_swapped in flags)) then
  298. if (right.location.loc=LOC_CONSTANT) then
  299. right.location.value := not(right.location.value)
  300. else
  301. opdone := true
  302. else if (left.location.loc=LOC_CONSTANT) then
  303. left.location.value := not(left.location.value)
  304. else
  305. begin
  306. swapleftright;
  307. opdone := true;
  308. end;
  309. if opdone then
  310. begin
  311. if left.location.loc = LOC_CONSTANT then
  312. begin
  313. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  314. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,
  315. left.location.value,tmpreg);
  316. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,location.size,right.location.register,right.location.register);
  317. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,location.size,right.location.register,tmpreg);
  318. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,location.size,tmpreg,location.register);
  319. end
  320. else
  321. begin
  322. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,right.location.size,right.location.register,right.location.register);
  323. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,left.location.size,right.location.register,left.location.register);
  324. cg.a_load_reg_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,location.register);
  325. end;
  326. end;
  327. end;
  328. else
  329. internalerror(2002072701);
  330. end;
  331. if not opdone then
  332. begin
  333. // these are all commutative operations
  334. if (left.location.loc = LOC_CONSTANT) then
  335. swapleftright;
  336. if (right.location.loc = LOC_CONSTANT) then
  337. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  338. right.location.value,left.location.register,
  339. location.register)
  340. else
  341. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  342. right.location.register,left.location.register,
  343. location.register);
  344. end;
  345. end;
  346. {*****************************************************************************
  347. Boolean
  348. *****************************************************************************}
  349. procedure tcgaddnode.second_opboolean;
  350. begin
  351. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  352. second_cmpboolean
  353. else
  354. second_addboolean;
  355. end;
  356. procedure tcgaddnode.second_addboolean;
  357. var
  358. cgop : TOpCg;
  359. otl,ofl : tasmlabel;
  360. oldflowcontrol : tflowcontrol;
  361. begin
  362. { And,Or will only evaluate from left to right only the
  363. needed nodes unless full boolean evaluation is enabled }
  364. if (nodetype in [orn,andn]) and
  365. (not(cs_full_boolean_eval in current_settings.localswitches) or
  366. (nf_short_bool in flags)) then
  367. begin
  368. location_reset(location,LOC_JUMP,OS_NO);
  369. case nodetype of
  370. andn :
  371. begin
  372. otl:=current_procinfo.CurrTrueLabel;
  373. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  374. secondpass(left);
  375. maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
  376. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  377. current_procinfo.CurrTrueLabel:=otl;
  378. end;
  379. orn :
  380. begin
  381. ofl:=current_procinfo.CurrFalseLabel;
  382. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  383. secondpass(left);
  384. maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
  385. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  386. current_procinfo.CurrFalseLabel:=ofl;
  387. end;
  388. else
  389. internalerror(200307044);
  390. end;
  391. { these jumps mean we're now in a flow control construct }
  392. oldflowcontrol:=flowcontrol;
  393. include(flowcontrol,fc_inflowcontrol);
  394. secondpass(right);
  395. maketojumpbool(current_asmdata.CurrAsmList,right,lr_load_regvars);
  396. flowcontrol:=oldflowcontrol+(flowcontrol-[fc_inflowcontrol]);
  397. end
  398. else
  399. begin
  400. pass_left_right;
  401. force_reg_left_right(false,true);
  402. set_result_location_reg;
  403. case nodetype of
  404. xorn :
  405. cgop:=OP_XOR;
  406. orn :
  407. cgop:=OP_OR;
  408. andn :
  409. cgop:=OP_AND;
  410. else
  411. internalerror(200203247);
  412. end;
  413. if right.location.loc <> LOC_CONSTANT then
  414. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  415. left.location.register,right.location.register,
  416. location.register)
  417. else
  418. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  419. right.location.value,left.location.register,
  420. location.register);
  421. end;
  422. end;
  423. {*****************************************************************************
  424. 64-bit
  425. *****************************************************************************}
  426. procedure tcgaddnode.second_op64bit;
  427. begin
  428. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  429. second_cmp64bit
  430. else
  431. second_add64bit;
  432. end;
  433. procedure tcgaddnode.second_add64bit;
  434. var
  435. op : TOpCG;
  436. checkoverflow : boolean;
  437. ovloc : tlocation;
  438. begin
  439. ovloc.loc:=LOC_VOID;
  440. pass_left_right;
  441. force_reg_left_right(false,true);
  442. set_result_location_reg;
  443. { assume no overflow checking is required }
  444. checkoverflow := false;
  445. case nodetype of
  446. addn :
  447. begin
  448. op:=OP_ADD;
  449. checkoverflow:=true;
  450. end;
  451. subn :
  452. begin
  453. op:=OP_SUB;
  454. checkoverflow:=true;
  455. end;
  456. xorn:
  457. op:=OP_XOR;
  458. orn:
  459. op:=OP_OR;
  460. andn:
  461. op:=OP_AND;
  462. muln:
  463. begin
  464. { should be handled in pass_1 (JM) }
  465. internalerror(200109051);
  466. end;
  467. else
  468. internalerror(2002072705);
  469. end;
  470. checkoverflow:=
  471. checkoverflow and
  472. (left.resultdef.typ<>pointerdef) and
  473. (right.resultdef.typ<>pointerdef);
  474. {$ifdef cpu64bit}
  475. case nodetype of
  476. xorn,orn,andn,addn:
  477. begin
  478. if (right.location.loc = LOC_CONSTANT) then
  479. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.value,
  480. left.location.register,location.register)
  481. else
  482. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.register,
  483. left.location.register,location.register);
  484. end;
  485. subn:
  486. begin
  487. if (nf_swapped in flags) then
  488. swapleftright;
  489. if left.location.loc <> LOC_CONSTANT then
  490. begin
  491. if right.location.loc <> LOC_CONSTANT then
  492. // reg64 - reg64
  493. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  494. right.location.register,left.location.register,location.register,
  495. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  496. else
  497. // reg64 - const64
  498. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  499. right.location.value,left.location.register,location.register,
  500. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  501. end
  502. else
  503. begin
  504. // const64 - reg64
  505. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
  506. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  507. right.location.register,left.location.register,location.register,
  508. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  509. end;
  510. end;
  511. else
  512. internalerror(2002072803);
  513. end;
  514. {$else cpu64bit}
  515. case nodetype of
  516. xorn,orn,andn,addn:
  517. begin
  518. if (right.location.loc = LOC_CONSTANT) then
  519. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.value64,
  520. left.location.register64,location.register64,
  521. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  522. else
  523. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.register64,
  524. left.location.register64,location.register64,
  525. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  526. end;
  527. subn:
  528. begin
  529. if (nf_swapped in flags) then
  530. swapleftright;
  531. if left.location.loc <> LOC_CONSTANT then
  532. begin
  533. if right.location.loc <> LOC_CONSTANT then
  534. // reg64 - reg64
  535. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  536. right.location.register64,left.location.register64,
  537. location.register64,
  538. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  539. else
  540. // reg64 - const64
  541. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  542. right.location.value64,left.location.register64,
  543. location.register64,
  544. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  545. end
  546. else
  547. begin
  548. // const64 - reg64
  549. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
  550. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  551. right.location.register64,left.location.register64,
  552. location.register64,
  553. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  554. end;
  555. end;
  556. else
  557. internalerror(2002072803);
  558. end;
  559. {$endif cpu64bit}
  560. { emit overflow check if enabled }
  561. if checkoverflow then
  562. cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  563. end;
  564. {*****************************************************************************
  565. Strings
  566. *****************************************************************************}
  567. procedure tcgaddnode.second_addstring;
  568. begin
  569. { this should already be handled in pass1 }
  570. internalerror(2002072402);
  571. end;
  572. {*****************************************************************************
  573. Floats
  574. *****************************************************************************}
  575. procedure tcgaddnode.second_opfloat;
  576. begin
  577. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  578. second_cmpfloat
  579. else
  580. second_addfloat;
  581. end;
  582. {*****************************************************************************
  583. Ordinals
  584. *****************************************************************************}
  585. procedure tcgaddnode.second_opordinal;
  586. begin
  587. if (nodetype in [ltn,lten,gtn,gten,equaln,unequaln]) then
  588. second_cmpordinal
  589. else
  590. second_addordinal;
  591. end;
  592. procedure tcgaddnode.second_addordinal;
  593. var
  594. unsigned,
  595. checkoverflow : boolean;
  596. cgop : topcg;
  597. tmpreg : tregister;
  598. ovloc : tlocation;
  599. begin
  600. ovloc.loc:=LOC_VOID;
  601. pass_left_right;
  602. force_reg_left_right(false,true);
  603. set_result_location_reg;
  604. { determine if the comparison will be unsigned }
  605. unsigned:=not(is_signed(left.resultdef)) or
  606. not(is_signed(right.resultdef));
  607. { assume no overflow checking is require }
  608. checkoverflow := false;
  609. case nodetype of
  610. addn:
  611. begin
  612. cgop:=OP_ADD;
  613. checkoverflow:=true;
  614. end;
  615. xorn :
  616. begin
  617. cgop:=OP_XOR;
  618. end;
  619. orn :
  620. begin
  621. cgop:=OP_OR;
  622. end;
  623. andn:
  624. begin
  625. cgop:=OP_AND;
  626. end;
  627. muln:
  628. begin
  629. checkoverflow:=true;
  630. if unsigned then
  631. cgop:=OP_MUL
  632. else
  633. cgop:=OP_IMUL;
  634. end;
  635. subn :
  636. begin
  637. checkoverflow:=true;
  638. cgop:=OP_SUB;
  639. end;
  640. end;
  641. checkoverflow:=
  642. checkoverflow and
  643. (left.resultdef.typ<>pointerdef) and
  644. (right.resultdef.typ<>pointerdef);
  645. if nodetype<>subn then
  646. begin
  647. if (right.location.loc<>LOC_CONSTANT) then
  648. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
  649. left.location.register,right.location.register,
  650. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  651. else
  652. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
  653. right.location.value,left.location.register,
  654. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  655. end
  656. else { subtract is a special case since its not commutative }
  657. begin
  658. if (nf_swapped in flags) then
  659. swapleftright;
  660. if left.location.loc<>LOC_CONSTANT then
  661. begin
  662. if right.location.loc<>LOC_CONSTANT then
  663. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  664. right.location.register,left.location.register,
  665. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  666. else
  667. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  668. right.location.value,left.location.register,
  669. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  670. end
  671. else
  672. begin
  673. tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  674. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,
  675. left.location.value,tmpreg);
  676. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  677. right.location.register,tmpreg,location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  678. end;
  679. end;
  680. { emit overflow check if required }
  681. if checkoverflow then
  682. cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  683. end;
  684. procedure tcgaddnode.second_cmpboolean;
  685. begin
  686. second_cmpordinal;
  687. end;
  688. {*****************************************************************************
  689. pass_generate_code;
  690. *****************************************************************************}
  691. procedure tcgaddnode.pass_generate_code;
  692. begin
  693. case left.resultdef.typ of
  694. orddef :
  695. begin
  696. { handling boolean expressions }
  697. if is_boolean(left.resultdef) and
  698. is_boolean(right.resultdef) then
  699. second_opboolean
  700. { 64bit operations }
  701. else if is_64bit(left.resultdef) then
  702. second_op64bit
  703. else
  704. second_opordinal;
  705. end;
  706. stringdef :
  707. begin
  708. second_addstring;
  709. end;
  710. setdef :
  711. begin
  712. {Normalsets are already handled in pass1 if mmx
  713. should not be used.}
  714. if is_varset(tsetdef(left.resultdef)) then
  715. begin
  716. {$ifdef SUPPORT_MMX}
  717. {$ifdef i386}
  718. if cs_mmx in current_settings.localswitches then
  719. second_opmmxset
  720. else
  721. {$endif}
  722. {$endif SUPPORT_MMX}
  723. internalerror(200109041);
  724. end
  725. else
  726. second_opsmallset;
  727. end;
  728. arraydef :
  729. begin
  730. { support dynarr=nil }
  731. if is_dynamic_array(left.resultdef) then
  732. second_opordinal
  733. else
  734. if (cs_support_vectors in current_settings.globalswitches) and
  735. is_vector(left.resultdef) then
  736. second_opvector
  737. {$ifdef SUPPORT_MMX}
  738. else
  739. if is_mmx_able_array(left.resultdef) then
  740. second_opmmx
  741. {$endif SUPPORT_MMX}
  742. else
  743. internalerror(200306016);
  744. end;
  745. floatdef :
  746. second_opfloat;
  747. else
  748. second_opordinal;
  749. end;
  750. end;
  751. begin
  752. caddnode:=tcgaddnode;
  753. end.