aoptcpu.pas 29 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses
  22. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai, aasmcpu;
  23. Type
  24. TAsmOpSet = set of TAsmOp;
  25. TCpuAsmOptimizer = class(TAsmOptimizer)
  26. function RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean; override;
  27. function GetNextInstructionUsingReg(Current: tai;
  28. var Next: tai; reg: TRegister): Boolean;
  29. function RegUsedAfterInstruction(reg: Tregister; p: tai;
  30. var AllUsedRegs: TAllUsedRegs): Boolean;
  31. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  32. function TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  33. function TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  34. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  35. procedure PeepHoleOptPass2; override;
  36. End;
  37. Implementation
  38. uses
  39. globals,aasmbase,cpuinfo,verbose;
  40. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  41. begin
  42. result :=
  43. (instr.typ = ait_instruction) and
  44. (taicpu(instr).opcode = op);
  45. end;
  46. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  47. begin
  48. result:=(oper.typ=top_reg) and (oper.reg=reg);
  49. end;
  50. function IsSameReg(this,next: taicpu): boolean;
  51. begin
  52. result:=(next.oper[0]^.typ=top_reg) and
  53. (next.oper[1]^.typ=top_reg) and
  54. (next.oper[0]^.reg=next.oper[1]^.reg) and
  55. (next.oper[0]^.reg=this.oper[0]^.reg);
  56. end;
  57. function regLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  58. var
  59. p: taicpu;
  60. begin
  61. p:=taicpu(hp);
  62. result:=false;
  63. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  64. exit;
  65. case p.opcode of
  66. { These instructions do not write into a register at all }
  67. A_NOP,
  68. A_C_EQ_D,A_C_EQ_S,A_C_LE_D,A_C_LE_S,A_C_LT_D,A_C_LT_S,
  69. A_BA,A_BC,
  70. A_SB,A_SH,A_SW,A_SWL,A_SWR,A_SWC1,A_SDC1:
  71. exit;
  72. end;
  73. result:=(p.ops>0) and (p.oper[0]^.typ=top_reg) and
  74. (p.oper[0]^.reg=reg);
  75. end;
  76. function CanBeCMOV(p: tai; condreg: tregister): boolean;
  77. begin
  78. result:=assigned(p) and (p.typ=ait_instruction) and
  79. ((taicpu(p).opcode in [A_MOV_D,A_MOV_S]) or
  80. (
  81. { register with condition must not be overwritten }
  82. (taicpu(p).opcode=A_MOVE) and
  83. (taicpu(p).oper[0]^.reg<>condreg)
  84. ));
  85. end;
  86. procedure ChangeToCMOV(p: taicpu; cond: tasmcond; reg: tregister);
  87. begin
  88. case cond of
  89. C_COP1TRUE:
  90. case p.opcode of
  91. A_MOV_D: p.opcode:=A_MOVT_D;
  92. A_MOV_S: p.opcode:=A_MOVT_S;
  93. A_MOVE: p.opcode:=A_MOVT;
  94. else
  95. InternalError(2014061701);
  96. end;
  97. C_COP1FALSE:
  98. case p.opcode of
  99. A_MOV_D: p.opcode:=A_MOVF_D;
  100. A_MOV_S: p.opcode:=A_MOVF_S;
  101. A_MOVE: p.opcode:=A_MOVF;
  102. else
  103. InternalError(2014061702);
  104. end;
  105. C_EQ:
  106. case p.opcode of
  107. A_MOV_D: p.opcode:=A_MOVZ_D;
  108. A_MOV_S: p.opcode:=A_MOVZ_S;
  109. A_MOVE: p.opcode:=A_MOVZ;
  110. else
  111. InternalError(2014061703);
  112. end;
  113. C_NE:
  114. case p.opcode of
  115. A_MOV_D: p.opcode:=A_MOVN_D;
  116. A_MOV_S: p.opcode:=A_MOVN_S;
  117. A_MOVE: p.opcode:=A_MOVN;
  118. else
  119. InternalError(2014061704);
  120. end;
  121. else
  122. InternalError(2014061705);
  123. end;
  124. p.ops:=3;
  125. p.loadreg(2,reg);
  126. end;
  127. function instructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  128. var
  129. p: taicpu;
  130. i: longint;
  131. begin
  132. result:=false;
  133. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  134. exit;
  135. p:=taicpu(hp);
  136. i:=1;
  137. while(i<p.ops) do
  138. begin
  139. case p.oper[I]^.typ of
  140. top_reg:
  141. result:=(p.oper[I]^.reg=reg) and (I<2);
  142. top_ref:
  143. result:=
  144. (p.oper[I]^.ref^.base=reg) or
  145. (p.oper[I]^.ref^.index=reg);
  146. end;
  147. if result then exit; {Bailout if we found something}
  148. Inc(I);
  149. end;
  150. end;
  151. function TCpuAsmOptimizer.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
  152. var
  153. i : Longint;
  154. begin
  155. result:=false;
  156. for i:=0 to taicpu(p1).ops-1 do
  157. if (taicpu(p1).oper[i]^.typ=top_reg) and (taicpu(p1).oper[i]^.reg=Reg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
  158. begin
  159. result:=true;
  160. exit;
  161. end;
  162. end;
  163. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  164. var Next: tai; reg: TRegister): Boolean;
  165. begin
  166. Next:=Current;
  167. repeat
  168. Result:=GetNextInstruction(Next,Next);
  169. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  170. (is_calljmp(taicpu(Next).opcode));
  171. if Result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  172. begin
  173. result:=false;
  174. next:=nil;
  175. end;
  176. end;
  177. function TCpuAsmOptimizer.RegUsedAfterInstruction(reg: Tregister; p: tai;
  178. var AllUsedRegs: TAllUsedRegs): Boolean;
  179. begin
  180. AllUsedRegs[getregtype(reg)].Update(tai(p.Next),true);
  181. RegUsedAfterInstruction :=
  182. AllUsedRegs[getregtype(reg)].IsUsed(reg) and
  183. not(regLoadedWithNewValue(reg,p)) and
  184. (
  185. not(GetNextInstruction(p,p)) or
  186. instructionLoadsFromReg(reg,p) or
  187. not(regLoadedWithNewValue(reg,p))
  188. );
  189. end;
  190. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  191. var
  192. next,hp1: tai;
  193. alloc,dealloc: tai_regalloc;
  194. begin
  195. { Fold
  196. op $reg1,...
  197. opcode $reg2,$reg1
  198. dealloc $reg1
  199. into
  200. op $reg2,...
  201. opcode may be A_MOVE, A_MOV_s, A_MOV_d, etc.
  202. }
  203. result:=false;
  204. if (taicpu(p).ops>1) and
  205. GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  206. MatchInstruction(next,opcode) and
  207. MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
  208. { the destination register of mov cannot be used between p and next }
  209. (not RegUsedBetween(taicpu(next).oper[0]^.reg,p,next)) then
  210. begin
  211. dealloc:=FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.Next));
  212. if assigned(dealloc) then
  213. begin
  214. { taicpu(p).oper[0]^.reg is not used anymore, try to find its allocation
  215. and remove it if possible }
  216. GetLastInstruction(p,hp1);
  217. asml.Remove(dealloc);
  218. alloc:=FindRegAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  219. if assigned(alloc) then
  220. begin
  221. asml.Remove(alloc);
  222. alloc.free;
  223. dealloc.free;
  224. end
  225. else
  226. asml.InsertAfter(dealloc,p);
  227. { try to move the allocation of the target register }
  228. GetLastInstruction(next,hp1);
  229. alloc:=FindRegAlloc(taicpu(next).oper[0]^.reg,tai(hp1.Next));
  230. if assigned(alloc) then
  231. begin
  232. asml.Remove(alloc);
  233. asml.InsertBefore(alloc,p);
  234. { adjust used regs }
  235. IncludeRegInUsedRegs(taicpu(next).oper[0]^.reg,UsedRegs);
  236. end;
  237. { finally get rid of the mov }
  238. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  239. asml.remove(next);
  240. next.free;
  241. end;
  242. end;
  243. end;
  244. function TCpuAsmOptimizer.TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  245. begin
  246. result:=(next.opcode in storeops) and
  247. MatchOperand(next.oper[0]^,taicpu(p).oper[0]^.reg) and
  248. { Ry cannot be modified between move and store }
  249. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  250. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  251. if result then
  252. begin
  253. next.loadreg(0,taicpu(p).oper[1]^.reg);
  254. asml.remove(p);
  255. p.free;
  256. p:=next;
  257. end;
  258. end;
  259. function TCpuAsmOptimizer.TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  260. begin
  261. result:=(next.oper[1]^.typ=top_ref) and
  262. (next.oper[1]^.ref^.base=taicpu(p).oper[0]^.reg) and
  263. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  264. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  265. if result then
  266. begin
  267. next.oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  268. asml.remove(p);
  269. p.free;
  270. p:=next;
  271. end;
  272. end;
  273. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  274. var
  275. next,next2: tai;
  276. TmpUsedRegs: TAllUsedRegs;
  277. begin
  278. result:=false;
  279. case p.typ of
  280. ait_instruction:
  281. begin
  282. case taicpu(p).opcode of
  283. A_SEH:
  284. begin
  285. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  286. MatchInstruction(next,A_SH) and
  287. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) and
  288. (not RegUsedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  289. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  290. begin
  291. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  292. asml.remove(p);
  293. p.free;
  294. p:=next;
  295. end
  296. else
  297. TryRemoveMov(p,A_MOVE);
  298. end;
  299. A_SEB:
  300. { TODO: can be handled similar to A_SEH, but it's almost never encountered }
  301. TryRemoveMov(p,A_MOVE);
  302. A_SLL:
  303. begin
  304. { if this is a sign extension... }
  305. if (taicpu(p).oper[2]^.typ=top_const) and
  306. GetNextInstruction(p,next) and
  307. MatchInstruction(next,A_SRA) and
  308. IsSameReg(taicpu(p),taicpu(next)) and
  309. (taicpu(next).oper[2]^.typ=top_const) and
  310. (taicpu(next).oper[2]^.val=taicpu(p).oper[2]^.val) and
  311. (taicpu(next).oper[2]^.val=16) and
  312. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  313. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[0]^.reg) and
  314. MatchInstruction(next2,A_SH) and
  315. (taicpu(next2).oper[0]^.typ=top_reg) and
  316. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  317. { the initial register may not be reused }
  318. (not RegUsedBetween(taicpu(p).oper[1]^.reg,next,next2)) then
  319. begin
  320. if Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next2.next))) then
  321. begin
  322. taicpu(next2).loadreg(0,taicpu(p).oper[1]^.reg);
  323. asml.remove(p);
  324. asml.remove(next);
  325. p.free;
  326. next.free;
  327. p:=next2;
  328. end;
  329. end
  330. else
  331. TryRemoveMov(p,A_MOVE);
  332. end;
  333. A_SRL:
  334. begin
  335. { TODO: also kill sign-extensions that follow, both SLL+SRA and SEB/SEH versions }
  336. { Remove 'andi' in sequences
  337. srl Rx,Ry,16
  338. andi Rx,Rx,65535
  339. srl Rx,Ry,24
  340. andi Rx,Rx,255
  341. since 'srl' clears all relevant upper bits }
  342. if (taicpu(p).oper[2]^.typ=top_const) and
  343. GetNextInstruction(p,next) and
  344. MatchInstruction(next,A_ANDI) and
  345. IsSameReg(taicpu(p),taicpu(next)) and
  346. (taicpu(next).oper[2]^.typ=top_const) and
  347. ((
  348. (taicpu(p).oper[2]^.val>=16) and
  349. (taicpu(next).oper[2]^.val=65535)
  350. ) or (
  351. (taicpu(p).oper[2]^.val>=24) and
  352. (taicpu(next).oper[2]^.val=255)
  353. )) then
  354. begin
  355. asml.remove(next);
  356. next.free;
  357. end
  358. else
  359. TryRemoveMov(p,A_MOVE);
  360. end;
  361. A_ANDI:
  362. begin
  363. { Remove sign extension after 'andi' if bit 7/15 of const operand is clear }
  364. if (taicpu(p).oper[2]^.typ=top_const) and
  365. GetNextInstruction(p,next) and
  366. MatchInstruction(next,A_SLL) and
  367. GetNextInstruction(next,next2) and
  368. MatchInstruction(next2,A_SRA) and
  369. IsSameReg(taicpu(p),taicpu(next)) and
  370. IsSameReg(taicpu(p),taicpu(next2)) and
  371. (taicpu(next).oper[2]^.typ=top_const) and
  372. (taicpu(next2).oper[2]^.typ=top_const) and
  373. (taicpu(next).oper[2]^.val=taicpu(next2).oper[2]^.val) and
  374. ((
  375. (taicpu(p).oper[2]^.val<=$7fff) and
  376. (taicpu(next).oper[2]^.val=16)
  377. ) or (
  378. (taicpu(p).oper[2]^.val<=$7f) and
  379. (taicpu(next).oper[2]^.val=24)
  380. )) then
  381. begin
  382. asml.remove(next);
  383. asml.remove(next2);
  384. next.free;
  385. next2.free;
  386. end
  387. { Remove zero extension if register is used only for byte/word memory store }
  388. else if (taicpu(p).oper[2]^.typ=top_const) and
  389. GetNextInstruction(p,next) and
  390. ((taicpu(p).oper[2]^.val=255) and MatchInstruction(next,A_SB)) or
  391. ((taicpu(p).oper[2]^.val=65535) and MatchInstruction(next,A_SH)) and
  392. (taicpu(next).oper[0]^.typ=top_reg) and
  393. (taicpu(next).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  394. begin
  395. CopyUsedRegs(TmpUsedRegs);
  396. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  397. if not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg,next,TmpUsedRegs) then
  398. begin
  399. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  400. asml.remove(p);
  401. p.free;
  402. p:=next;
  403. end;
  404. ReleaseUsedRegs(TmpUsedRegs);
  405. end
  406. else
  407. TryRemoveMov(p,A_MOVE);
  408. end;
  409. A_MOV_S:
  410. begin
  411. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  412. (next.typ=ait_instruction) then
  413. begin
  414. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SWC1]) then
  415. { optimization successful };
  416. end;
  417. end;
  418. A_MOV_D:
  419. begin
  420. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  421. (next.typ=ait_instruction) then
  422. begin
  423. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SDC1]) then
  424. { optimization successful };
  425. end;
  426. end;
  427. A_MOVE:
  428. begin
  429. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  430. (next.typ=ait_instruction) and
  431. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  432. begin
  433. { MOVE Rx,Ry; store Rx,(ref); dealloc Rx ==> store Ry,(ref) }
  434. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SB,A_SH,A_SW]) then
  435. { optimization successful }
  436. else if TryRemoveMovToRefIndex(p,taicpu(next)) then
  437. { successful as well }
  438. { MOVE Rx,Ry; opcode Rx,Rx,any ==> opcode Rx,Ry,any
  439. MOVE Rx,Ry; opcode Rx,Rz,Rx ==> opcode Rx,Rz,Ry }
  440. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU]) and
  441. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  442. begin
  443. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  444. begin
  445. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  446. asml.remove(p);
  447. p.free;
  448. p:=next;
  449. end
  450. { TODO: if Ry=NR_R0, this effectively changes instruction into MOVE,
  451. providing further optimization possibilities }
  452. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
  453. begin
  454. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  455. asml.remove(p);
  456. p.free;
  457. p:=next;
  458. end;
  459. end
  460. { MOVE Rx,Ry; opcode Rz,Rx,any; dealloc Rx ==> opcode Rz,Ry,any }
  461. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU]) and
  462. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  463. begin
  464. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  465. begin
  466. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  467. asml.remove(p);
  468. p.free;
  469. p:=next;
  470. end
  471. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
  472. begin
  473. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  474. asml.remove(p);
  475. p.free;
  476. p:=next;
  477. end;
  478. end
  479. { MULT[U] must be handled separately due to different operand numbers }
  480. else if (taicpu(next).opcode in [A_MULT,A_MULTU]) and
  481. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  482. begin
  483. if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  484. begin
  485. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  486. asml.remove(p);
  487. p.free;
  488. p:=next;
  489. end
  490. else if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  491. begin
  492. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  493. asml.remove(p);
  494. p.free;
  495. p:=next;
  496. end;
  497. end;
  498. { TODO: MOVE Rx,Ry; Bcc Rx,Rz,label; dealloc Rx ==> Bcc Ry,Rz,label }
  499. end;
  500. end;
  501. A_LB,A_LBU,A_LH,A_LHU,A_LW,
  502. A_ADD,A_ADDU,
  503. A_ADDI,A_ADDIU,
  504. A_SUB,A_SUBU,
  505. A_SRA,A_SRAV,
  506. A_SRLV,
  507. A_SLLV,
  508. A_AND,A_OR,A_XOR,A_ORI,A_XORI:
  509. TryRemoveMov(p,A_MOVE);
  510. A_LWC1,
  511. A_ADD_s, A_SUB_s, A_MUL_s, A_DIV_s,
  512. A_ABS_s, A_NEG_s, A_SQRT_s,
  513. A_CVT_s_w, A_CVT_s_l, A_CVT_s_d:
  514. TryRemoveMov(p,A_MOV_s);
  515. A_LDC1,
  516. A_ADD_d, A_SUB_d, A_MUL_d, A_DIV_d,
  517. A_ABS_d, A_NEG_d, A_SQRT_d,
  518. A_CVT_d_w, A_CVT_d_l, A_CVT_d_s:
  519. TryRemoveMov(p,A_MOV_d);
  520. end;
  521. end;
  522. end;
  523. end;
  524. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  525. var
  526. p: tai;
  527. l: longint;
  528. hp1,hp2,hp3: tai;
  529. condition: tasmcond;
  530. condreg: tregister;
  531. begin
  532. { Currently, everything below is mips4+ }
  533. if (current_settings.cputype<cpu_mips4) then
  534. exit;
  535. p:=BlockStart;
  536. ClearUsedRegs;
  537. while (p<>BlockEnd) Do
  538. begin
  539. UpdateUsedRegs(tai(p.next));
  540. case p.typ of
  541. ait_instruction:
  542. begin
  543. case taicpu(p).opcode of
  544. A_BC:
  545. begin
  546. condreg:=NR_NO;
  547. if (taicpu(p).condition in [C_COP1TRUE,C_COP1FALSE]) then
  548. { TODO: must be taken from "p" if/when codegen makes use of multiple %fcc }
  549. condreg:=NR_FCC0
  550. else if (taicpu(p).condition in [C_EQ,C_NE]) then
  551. begin
  552. if (taicpu(p).oper[0]^.reg=NR_R0) then
  553. condreg:=taicpu(p).oper[1]^.reg
  554. else if (taicpu(p).oper[1]^.reg=NR_R0) then
  555. condreg:=taicpu(p).oper[0]^.reg
  556. end;
  557. if (condreg<>NR_NO) then
  558. begin
  559. { check for
  560. bCC xxx
  561. <several movs>
  562. xxx:
  563. }
  564. l:=0;
  565. GetNextInstruction(p, hp1);
  566. while CanBeCMOV(hp1,condreg) do // CanBeCMOV returns False for nil or labels
  567. begin
  568. inc(l);
  569. GetNextInstruction(hp1,hp1);
  570. end;
  571. if assigned(hp1) then
  572. begin
  573. if FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  574. begin
  575. if (l<=4) and (l>0) then
  576. begin
  577. condition:=inverse_cond(taicpu(p).condition);
  578. hp2:=p;
  579. GetNextInstruction(p,hp1);
  580. p:=hp1;
  581. repeat
  582. ChangeToCMOV(taicpu(hp1),condition,condreg);
  583. GetNextInstruction(hp1,hp1);
  584. until not CanBeCMOV(hp1,condreg);
  585. { wait with removing else GetNextInstruction could
  586. ignore the label if it was the only usage in the
  587. jump moved away }
  588. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  589. RemoveDelaySlot(hp2);
  590. asml.remove(hp2);
  591. hp2.free;
  592. continue;
  593. end;
  594. end
  595. else
  596. begin
  597. { check further for
  598. bCC xxx
  599. <several movs 1>
  600. b yyy
  601. xxx:
  602. <several movs 2>
  603. yyy:
  604. }
  605. { hp2 points to jmp yyy }
  606. hp2:=hp1;
  607. { skip hp1 to xxx }
  608. GetNextInstruction(hp1, hp1);
  609. if assigned(hp2) and
  610. assigned(hp1) and
  611. (l<=3) and
  612. (hp2.typ=ait_instruction) and
  613. (taicpu(hp2).opcode=A_BA) and
  614. { real label and jump, no further references to the
  615. label are allowed }
  616. (tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol).getrefs<=2) and
  617. FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  618. begin
  619. l:=0;
  620. { skip hp1 to <several moves 2> }
  621. GetNextInstruction(hp1, hp1);
  622. while CanBeCMOV(hp1,condreg) do
  623. begin
  624. inc(l);
  625. GetNextInstruction(hp1, hp1);
  626. end;
  627. { hp1 points to yyy: }
  628. if assigned(hp1) and
  629. FindLabel(tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol),hp1) then
  630. begin
  631. condition:=inverse_cond(taicpu(p).condition);
  632. GetNextInstruction(p,hp1);
  633. hp3:=p;
  634. p:=hp1;
  635. repeat
  636. ChangeToCMOV(taicpu(hp1),condition,condreg);
  637. GetNextInstruction(hp1,hp1);
  638. until not CanBeCMOV(hp1,condreg);
  639. { hp2 is still at b yyy }
  640. GetNextInstruction(hp2,hp1);
  641. { hp2 is now at xxx: }
  642. condition:=inverse_cond(condition);
  643. GetNextInstruction(hp1,hp1);
  644. { hp1 is now at <several movs 2> }
  645. repeat
  646. ChangeToCMOV(taicpu(hp1),condition,condreg);
  647. GetNextInstruction(hp1,hp1);
  648. until not CanBeCMOV(hp1,condreg);
  649. { remove bCC }
  650. tasmlabel(taicpu(hp3).oper[taicpu(hp3).ops-1]^.ref^.symbol).decrefs;
  651. RemoveDelaySlot(hp3);
  652. asml.remove(hp3);
  653. hp3.free;
  654. { remove jmp }
  655. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  656. RemoveDelaySlot(hp2);
  657. asml.remove(hp2);
  658. hp2.free;
  659. continue;
  660. end;
  661. end;
  662. end;
  663. end;
  664. end;
  665. end;
  666. end;
  667. end;
  668. end;
  669. UpdateUsedRegs(p);
  670. p:=tai(p.next);
  671. end;
  672. end;
  673. begin
  674. casmoptimizer:=TCpuAsmOptimizer;
  675. end.