ngppcadd.pas 19 KB

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  1. {
  2. Copyright (c) 2000-2006 by Florian Klaempfl and Jonas Maebe
  3. Code generation for add nodes on the PowerPC (32 and 64 bit generic)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ngppcadd;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,ncgadd,cpubase;
  22. type
  23. tgenppcaddnode = class(tcgaddnode)
  24. function pass_1: tnode; override;
  25. protected
  26. procedure pass_left_and_right;
  27. procedure load_left_right(cmpop, load_constants: boolean);
  28. function getresflags : tresflags;
  29. procedure emit_compare(unsigned: boolean); virtual; abstract;
  30. procedure second_addfloat;override;
  31. procedure second_addboolean;override;
  32. procedure second_addsmallset;override;
  33. end;
  34. implementation
  35. {*****************************************************************************
  36. Pass 1
  37. *****************************************************************************}
  38. uses
  39. globtype,systems,
  40. cutils,verbose,globals,
  41. symconst,symdef,paramgr,
  42. aasmbase,aasmtai,aasmdata,aasmcpu,defutil,htypechk,
  43. cgbase,cpuinfo,pass_1,pass_2,regvars,
  44. cpupara,cgcpu,cgutils,procinfo,
  45. ncon,nset,
  46. ncgutil,tgobj,rgobj,rgcpu,cgobj,hlcgobj;
  47. {*****************************************************************************
  48. Pass 1
  49. *****************************************************************************}
  50. function tgenppcaddnode.pass_1: tnode;
  51. begin
  52. typecheckpass(left);
  53. if (nodetype in [equaln,unequaln]) and
  54. (left.resultdef.typ = orddef) and
  55. is_64bit(left.resultdef) then
  56. begin
  57. result := nil;
  58. firstpass(left);
  59. firstpass(right);
  60. expectloc := LOC_FLAGS;
  61. exit;
  62. end;
  63. result := inherited pass_1;
  64. end;
  65. {*****************************************************************************
  66. Helpers
  67. *****************************************************************************}
  68. procedure tgenppcaddnode.pass_left_and_right;
  69. begin
  70. { calculate the operator which is more difficult }
  71. firstcomplex(self);
  72. { in case of constant put it to the left }
  73. if (left.nodetype=ordconstn) then
  74. swapleftright;
  75. secondpass(left);
  76. secondpass(right);
  77. end;
  78. procedure tgenppcaddnode.load_left_right(cmpop, load_constants: boolean);
  79. procedure load_node(var n: tnode);
  80. begin
  81. case n.location.loc of
  82. LOC_REGISTER,
  83. LOC_CREGISTER:
  84. ;
  85. LOC_CONSTANT:
  86. begin
  87. if load_constants then
  88. hlcg.location_force_reg(current_asmdata.CurrAsmList,n.location,n.resultdef,n.resultdef,false);
  89. end;
  90. else
  91. hlcg.location_force_reg(current_asmdata.CurrAsmList,n.location,n.resultdef,n.resultdef,false);
  92. end;
  93. end;
  94. begin
  95. load_node(left);
  96. load_node(right);
  97. if not(cmpop) then
  98. begin
  99. location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  100. {$ifndef cpu64bitalu}
  101. if is_64bit(resultdef) then
  102. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  103. {$endif not cpu64bitalu}
  104. end;
  105. end;
  106. function tgenppcaddnode.getresflags : tresflags;
  107. begin
  108. if (left.resultdef.typ <> floatdef) then
  109. result.cr := RS_CR0
  110. else
  111. result.cr := RS_CR1;
  112. case nodetype of
  113. equaln : result.flag:=F_EQ;
  114. unequaln : result.flag:=F_NE;
  115. else
  116. if nf_swapped in flags then
  117. case nodetype of
  118. ltn : result.flag:=F_GT;
  119. lten : result.flag:=F_GE;
  120. gtn : result.flag:=F_LT;
  121. gten : result.flag:=F_LE;
  122. end
  123. else
  124. case nodetype of
  125. ltn : result.flag:=F_LT;
  126. lten : result.flag:=F_LE;
  127. gtn : result.flag:=F_GT;
  128. gten : result.flag:=F_GE;
  129. end;
  130. end
  131. end;
  132. {*****************************************************************************
  133. AddBoolean
  134. *****************************************************************************}
  135. procedure tgenppcaddnode.second_addboolean;
  136. var
  137. cgop : TOpCg;
  138. cgsize : TCgSize;
  139. cmpop,
  140. isjump : boolean;
  141. otl,ofl : tasmlabel;
  142. begin
  143. { calculate the operator which is more difficult }
  144. firstcomplex(self);
  145. otl:=nil;
  146. ofl:=nil;
  147. cmpop:=false;
  148. if (torddef(left.resultdef).ordtype in [pasbool8,bool8bit]) or
  149. (torddef(right.resultdef).ordtype in [pasbool8,bool8bit]) then
  150. cgsize:=OS_8
  151. else if (torddef(left.resultdef).ordtype in [pasbool16,bool16bit]) or
  152. (torddef(right.resultdef).ordtype in [pasbool16,bool16bit]) then
  153. cgsize:=OS_16
  154. else if (torddef(left.resultdef).ordtype in [pasbool32,bool32bit]) or
  155. (torddef(right.resultdef).ordtype in [pasbool32,bool32bit]) then
  156. cgsize:=OS_32
  157. else
  158. cgsize:=OS_64;
  159. if {$ifndef cpu64bitalu}(cgsize<>OS_64) and{$endif}
  160. (((cs_full_boolean_eval in current_settings.localswitches) and
  161. not(nf_short_bool in flags)) or
  162. (nodetype in [unequaln,ltn,lten,gtn,gten,equaln,xorn])) then
  163. begin
  164. if left.nodetype in [ordconstn,realconstn] then
  165. swapleftright;
  166. isjump:=(left.expectloc=LOC_JUMP);
  167. if isjump then
  168. begin
  169. otl:=current_procinfo.CurrTrueLabel;
  170. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  171. ofl:=current_procinfo.CurrFalseLabel;
  172. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  173. end;
  174. secondpass(left);
  175. if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
  176. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(cgsize),false);
  177. if isjump then
  178. begin
  179. current_procinfo.CurrTrueLabel:=otl;
  180. current_procinfo.CurrFalseLabel:=ofl;
  181. end
  182. else if left.location.loc=LOC_JUMP then
  183. internalerror(2003122901);
  184. isjump:=(right.expectloc=LOC_JUMP);
  185. if isjump then
  186. begin
  187. otl:=current_procinfo.CurrTrueLabel;
  188. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  189. ofl:=current_procinfo.CurrFalseLabel;
  190. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  191. end;
  192. secondpass(right);
  193. if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
  194. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,cgsize_orddef(cgsize),false);
  195. if isjump then
  196. begin
  197. current_procinfo.CurrTrueLabel:=otl;
  198. current_procinfo.CurrFalseLabel:=ofl;
  199. end
  200. else if right.location.loc=LOC_JUMP then
  201. internalerror(200312292);
  202. cmpop := nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
  203. { set result location }
  204. if not cmpop then
  205. location_reset(location,LOC_REGISTER,def_cgsize(resultdef))
  206. else
  207. location_reset(location,LOC_FLAGS,OS_NO);
  208. load_left_right(cmpop,false);
  209. if (left.location.loc = LOC_CONSTANT) then
  210. swapleftright;
  211. { compare the }
  212. case nodetype of
  213. ltn,lten,gtn,gten,
  214. equaln,unequaln :
  215. begin
  216. if (right.location.loc <> LOC_CONSTANT) then
  217. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMPLW,
  218. left.location.register,right.location.register))
  219. else
  220. current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMPLWI,
  221. left.location.register,longint(right.location.value)));
  222. location.resflags := getresflags;
  223. end;
  224. else
  225. begin
  226. case nodetype of
  227. xorn :
  228. cgop:=OP_XOR;
  229. orn :
  230. cgop:=OP_OR;
  231. andn :
  232. cgop:=OP_AND;
  233. else
  234. internalerror(200203247);
  235. end;
  236. if right.location.loc <> LOC_CONSTANT then
  237. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  238. left.location.register,right.location.register,
  239. location.register)
  240. else
  241. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  242. right.location.value,left.location.register,
  243. location.register);
  244. end;
  245. end;
  246. end
  247. else
  248. inherited second_addboolean;
  249. end;
  250. {*****************************************************************************
  251. AddFloat
  252. *****************************************************************************}
  253. procedure tgenppcaddnode.second_addfloat;
  254. var
  255. op : TAsmOp;
  256. cmpop,
  257. singleprec : boolean;
  258. begin
  259. pass_left_and_right;
  260. cmpop:=false;
  261. singleprec:=tfloatdef(left.resultdef).floattype=s32real;
  262. case nodetype of
  263. addn :
  264. if singleprec then
  265. op:=A_FADDS
  266. else
  267. op:=A_FADD;
  268. muln :
  269. if singleprec then
  270. op:=A_FMULS
  271. else
  272. op:=A_FMUL;
  273. subn :
  274. if singleprec then
  275. op:=A_FSUBS
  276. else
  277. op:=A_FSUB;
  278. slashn :
  279. if singleprec then
  280. op:=A_FDIVS
  281. else
  282. op:=A_FDIV;
  283. ltn,lten,gtn,gten,
  284. equaln,unequaln :
  285. begin
  286. op:=A_FCMPO;
  287. cmpop:=true;
  288. end;
  289. else
  290. internalerror(200403182);
  291. end;
  292. // get the operands in the correct order, there are no special cases
  293. // here, everything is register-based
  294. if nf_swapped in flags then
  295. swapleftright;
  296. // put both operands in a register
  297. hlcg.location_force_fpureg(current_asmdata.CurrAsmList,right.location,right.resultdef,true);
  298. hlcg.location_force_fpureg(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  299. // initialize de result
  300. if not cmpop then
  301. begin
  302. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  303. location.register := cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  304. end
  305. else
  306. begin
  307. location_reset(location,LOC_FLAGS,OS_NO);
  308. location.resflags := getresflags;
  309. end;
  310. // emit the actual operation
  311. if not cmpop then
  312. begin
  313. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,
  314. location.register,left.location.register,
  315. right.location.register))
  316. end
  317. else
  318. begin
  319. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,
  320. newreg(R_SPECIALREGISTER,location.resflags.cr,R_SUBNONE),left.location.register,right.location.register))
  321. end;
  322. end;
  323. {*****************************************************************************
  324. AddSmallSet
  325. *****************************************************************************}
  326. procedure tgenppcaddnode.second_addsmallset;
  327. var
  328. cgop : TOpCg;
  329. setbase: aint;
  330. tmpreg : tregister;
  331. opdone,
  332. cmpop : boolean;
  333. begin
  334. cgop:=OP_None;
  335. pass_left_and_right;
  336. { when a setdef is passed, it has to be a smallset }
  337. if (not(nf_swapped in flags) and
  338. not is_smallset(left.resultdef) or
  339. (not is_smallset(right.resultdef) and
  340. (right.nodetype<>setelementn))) or
  341. ((nf_swapped in flags) and
  342. not is_smallset(right.resultdef) or
  343. (not is_smallset(left.resultdef) and
  344. (left.nodetype<>setelementn))) then
  345. internalerror(200203359);
  346. opdone := false;
  347. cmpop:=nodetype in [equaln,unequaln,lten,gten];
  348. { set result location }
  349. if not cmpop then
  350. location_reset(location,LOC_REGISTER,def_cgsize(resultdef))
  351. else
  352. location_reset(location,LOC_FLAGS,OS_NO);
  353. load_left_right(cmpop,false);
  354. if not(cmpop) then
  355. location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  356. if (left.resultdef.typ=setdef) then
  357. setbase:=tsetdef(left.resultdef).setbase
  358. else
  359. setbase:=tsetdef(right.resultdef).setbase;
  360. case nodetype of
  361. addn :
  362. begin
  363. if (nf_swapped in flags) and (left.nodetype=setelementn) then
  364. swapleftright;
  365. { are we adding set elements ? }
  366. if right.nodetype=setelementn then
  367. begin
  368. { no range support for smallsets! }
  369. if assigned(tsetelementnode(right).right) then
  370. internalerror(43244);
  371. if (right.location.loc = LOC_CONSTANT) then
  372. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,
  373. aint((aword(1) shl (resultdef.size*8-1)) shr aword(right.location.value-setbase)),
  374. left.location.register,location.register)
  375. else
  376. begin
  377. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  378. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,aint((aword(1) shl (resultdef.size*8-1))),tmpreg);
  379. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
  380. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_INT,
  381. right.location.register,tmpreg);
  382. if left.location.loc <> LOC_CONSTANT then
  383. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,tmpreg,
  384. left.location.register,location.register)
  385. else
  386. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,
  387. left.location.value,tmpreg,location.register);
  388. end;
  389. opdone := true;
  390. end
  391. else
  392. cgop := OP_OR;
  393. end;
  394. symdifn :
  395. cgop:=OP_XOR;
  396. muln :
  397. cgop:=OP_AND;
  398. subn :
  399. begin
  400. cgop:=OP_AND;
  401. if (not(nf_swapped in flags)) then
  402. if (right.location.loc=LOC_CONSTANT) then
  403. right.location.value := not(right.location.value)
  404. else
  405. opdone := true
  406. else if (left.location.loc=LOC_CONSTANT) then
  407. left.location.value := not(left.location.value)
  408. else
  409. begin
  410. swapleftright;
  411. opdone := true;
  412. end;
  413. if opdone then
  414. begin
  415. if left.location.loc = LOC_CONSTANT then
  416. begin
  417. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  418. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
  419. left.location.value,tmpreg);
  420. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC,
  421. location.register,tmpreg,right.location.register));
  422. end
  423. else
  424. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC,
  425. location.register,left.location.register,
  426. right.location.register));
  427. end;
  428. end;
  429. equaln,
  430. unequaln :
  431. begin
  432. emit_compare(true);
  433. opdone := true;
  434. end;
  435. lten,gten:
  436. begin
  437. If (not(nf_swapped in flags) and
  438. (nodetype = lten)) or
  439. ((nf_swapped in flags) and
  440. (nodetype = gten)) then
  441. swapleftright;
  442. // now we have to check whether left >= right
  443. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  444. if left.location.loc = LOC_CONSTANT then
  445. begin
  446. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,
  447. not(left.location.value),right.location.register,tmpreg);
  448. current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMPWI,tmpreg,0));
  449. // the two instructions above should be folded together by
  450. // the peepholeoptimizer
  451. end
  452. else
  453. begin
  454. if right.location.loc = LOC_CONSTANT then
  455. begin
  456. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
  457. right.location.value,tmpreg);
  458. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
  459. tmpreg,left.location.register));
  460. end
  461. else
  462. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
  463. right.location.register,left.location.register));
  464. end;
  465. location.resflags.cr := RS_CR0;
  466. location.resflags.flag := F_EQ;
  467. opdone := true;
  468. end;
  469. else
  470. internalerror(2002072701);
  471. end;
  472. if not opdone then
  473. begin
  474. // these are all commutative operations
  475. if (left.location.loc = LOC_CONSTANT) then
  476. swapleftright;
  477. if (right.location.loc = LOC_CONSTANT) then
  478. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  479. right.location.value,left.location.register,
  480. location.register)
  481. else
  482. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  483. right.location.register,left.location.register,
  484. location.register);
  485. end;
  486. end;
  487. end.