cgobj.pas 141 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times : longint;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_extend_backwards(b: boolean);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. This must be overriden for each CPU target.
  102. @param(size size of the operand in the register)
  103. @param(r register source of the operand)
  104. @param(cgpara where the parameter will be stored)
  105. }
  106. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  107. {# Pass a parameter, which is a constant, to a routine.
  108. A generic version is provided. This routine should
  109. be overriden for optimization purposes if the cpu
  110. permits directly sending this type of parameter.
  111. @param(size size of the operand in constant)
  112. @param(a value of constant to send)
  113. @param(cgpara where the parameter will be stored)
  114. }
  115. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  116. {# Pass the value of a parameter, which is located in memory, to a routine.
  117. A generic version is provided. This routine should
  118. be overriden for optimization purposes if the cpu
  119. permits directly sending this type of parameter.
  120. @param(size size of the operand in constant)
  121. @param(r Memory reference of value to send)
  122. @param(cgpara where the parameter will be stored)
  123. }
  124. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  125. {# Pass the value of a parameter, which can be located either in a register or memory location,
  126. to a routine.
  127. A generic version is provided.
  128. @param(l location of the operand to send)
  129. @param(nr parameter number (starting from one) of routine (from left to right))
  130. @param(cgpara where the parameter will be stored)
  131. }
  132. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  133. {# Pass the address of a reference to a routine. This routine
  134. will calculate the address of the reference, and pass this
  135. calculated address as a parameter.
  136. A generic version is provided. This routine should
  137. be overriden for optimization purposes if the cpu
  138. permits directly sending this type of parameter.
  139. @param(r reference to get address from)
  140. @param(nr parameter number (starting from one) of routine (from left to right))
  141. }
  142. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  143. { Remarks:
  144. * If a method specifies a size you have only to take care
  145. of that number of bits, i.e. load_const_reg with OP_8 must
  146. only load the lower 8 bit of the specified register
  147. the rest of the register can be undefined
  148. if necessary the compiler will call a method
  149. to zero or sign extend the register
  150. * The a_load_XX_XX with OP_64 needn't to be
  151. implemented for 32 bit
  152. processors, the code generator takes care of that
  153. * the addr size is for work with the natural pointer
  154. size
  155. * the procedures without fpu/mm are only for integer usage
  156. * normally the first location is the source and the
  157. second the destination
  158. }
  159. {# Emits instruction to call the method specified by symbol name.
  160. This routine must be overriden for each new target cpu.
  161. There is no a_call_ref because loading the reference will use
  162. a temp register on most cpu's resulting in conflicts with the
  163. registers used for the parameters (PFV)
  164. }
  165. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  166. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  167. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  168. { same as a_call_name, might be overriden on certain architectures to emit
  169. static calls without usage of a got trampoline }
  170. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  171. { move instructions }
  172. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  173. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  174. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  175. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  176. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  177. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  178. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  179. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  180. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  181. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  182. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  183. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  184. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  185. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  186. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  187. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  188. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  189. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  190. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  191. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  192. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  193. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  194. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  195. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  196. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  197. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  198. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  199. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  200. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  201. { fpu move instructions }
  202. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  203. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  204. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  205. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  206. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  207. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  208. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  209. { vector register move instructions }
  210. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  211. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  212. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  213. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  214. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  215. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  216. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  217. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  218. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  219. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  220. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  221. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  222. { basic arithmetic operations }
  223. { note: for operators which require only one argument (not, neg), use }
  224. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  225. { that in this case the *second* operand is used as both source and }
  226. { destination (JM) }
  227. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  228. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  229. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  230. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  231. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  232. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  233. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  234. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  235. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  236. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  237. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  238. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  239. { trinary operations for processors that support them, 'emulated' }
  240. { on others. None with "ref" arguments since I don't think there }
  241. { are any processors that support it (JM) }
  242. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  243. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  244. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  245. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  246. { comparison operations }
  247. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  248. l : tasmlabel);virtual; abstract;
  249. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  250. l : tasmlabel); virtual;
  251. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  252. l : tasmlabel);
  253. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  254. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  255. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  256. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  257. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  258. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  259. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  260. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  261. l : tasmlabel);
  262. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  263. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  264. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  265. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  266. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  267. }
  268. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  269. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  270. {
  271. This routine tries to optimize the op_const_reg/ref opcode, and should be
  272. called at the start of a_op_const_reg/ref. It returns the actual opcode
  273. to emit, and the constant value to emit. This function can opcode OP_NONE to
  274. remove the opcode and OP_MOVE to replace it with a simple load
  275. @param(op The opcode to emit, returns the opcode which must be emitted)
  276. @param(a The constant which should be emitted, returns the constant which must
  277. be emitted)
  278. }
  279. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  280. {#
  281. This routine is used in exception management nodes. It should
  282. save the exception reason currently in the FUNCTION_RETURN_REG. The
  283. save should be done either to a temp (pointed to by href).
  284. or on the stack (pushing the value on the stack).
  285. The size of the value to save is OS_S32. The default version
  286. saves the exception reason to a temp. memory area.
  287. }
  288. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  289. {#
  290. This routine is used in exception management nodes. It should
  291. save the exception reason constant. The
  292. save should be done either to a temp (pointed to by href).
  293. or on the stack (pushing the value on the stack).
  294. The size of the value to save is OS_S32. The default version
  295. saves the exception reason to a temp. memory area.
  296. }
  297. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  298. {#
  299. This routine is used in exception management nodes. It should
  300. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  301. should either be in the temp. area (pointed to by href , href should
  302. *NOT* be freed) or on the stack (the value should be popped).
  303. The size of the value to save is OS_S32. The default version
  304. saves the exception reason to a temp. memory area.
  305. }
  306. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  307. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  308. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  309. {# This should emit the opcode to copy len bytes from the source
  310. to destination.
  311. It must be overriden for each new target processor.
  312. @param(source Source reference of copy)
  313. @param(dest Destination reference of copy)
  314. }
  315. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  316. {# This should emit the opcode to copy len bytes from the an unaligned source
  317. to destination.
  318. It must be overriden for each new target processor.
  319. @param(source Source reference of copy)
  320. @param(dest Destination reference of copy)
  321. }
  322. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  323. {# This should emit the opcode to a shortrstring from the source
  324. to destination.
  325. @param(source Source reference of copy)
  326. @param(dest Destination reference of copy)
  327. }
  328. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  329. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  330. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  331. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  332. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  333. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  334. {# Generates range checking code. It is to note
  335. that this routine does not need to be overriden,
  336. as it takes care of everything.
  337. @param(p Node which contains the value to check)
  338. @param(todef Type definition of node to range check)
  339. }
  340. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  341. {# Generates overflow checking code for a node }
  342. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  343. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  344. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  345. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  346. {# Emits instructions when compilation is done in profile
  347. mode (this is set as a command line option). The default
  348. behavior does nothing, should be overriden as required.
  349. }
  350. procedure g_profilecode(list : TAsmList);virtual;
  351. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  352. @param(size Number of bytes to allocate)
  353. }
  354. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  355. {# Emits instruction for allocating the locals in entry
  356. code of a routine. This is one of the first
  357. routine called in @var(genentrycode).
  358. @param(localsize Number of bytes to allocate as locals)
  359. }
  360. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  361. {# Emits instructions for returning from a subroutine.
  362. Should also restore the framepointer and stack.
  363. @param(parasize Number of bytes of parameters to deallocate from stack)
  364. }
  365. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  366. {# This routine is called when generating the code for the entry point
  367. of a routine. It should save all registers which are not used in this
  368. routine, and which should be declared as saved in the std_saved_registers
  369. set.
  370. This routine is mainly used when linking to code which is generated
  371. by ABI-compliant compilers (like GCC), to make sure that the reserved
  372. registers of that ABI are not clobbered.
  373. @param(usedinproc Registers which are used in the code of this routine)
  374. }
  375. procedure g_save_standard_registers(list:TAsmList);virtual;
  376. {# This routine is called when generating the code for the exit point
  377. of a routine. It should restore all registers which were previously
  378. saved in @var(g_save_standard_registers).
  379. @param(usedinproc Registers which are used in the code of this routine)
  380. }
  381. procedure g_restore_standard_registers(list:TAsmList);virtual;
  382. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  383. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  384. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  385. protected
  386. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  387. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  388. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  389. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  390. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  391. end;
  392. {$ifndef cpu64bit}
  393. {# @abstract(Abstract code generator for 64 Bit operations)
  394. This class implements an abstract code generator class
  395. for 64 Bit operations.
  396. }
  397. tcg64 = class
  398. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  399. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  400. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  401. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  402. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  403. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  404. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  405. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  406. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  407. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  408. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  409. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  410. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  411. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  412. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  413. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  414. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  415. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  416. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  417. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  418. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  419. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  420. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  421. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  422. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  423. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  424. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  425. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  426. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  427. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  428. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  429. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  430. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  431. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  432. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  433. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  434. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  435. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  436. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  437. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  438. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  439. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  440. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  441. {
  442. This routine tries to optimize the const_reg opcode, and should be
  443. called at the start of a_op64_const_reg. It returns the actual opcode
  444. to emit, and the constant value to emit. If this routine returns
  445. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  446. @param(op The opcode to emit, returns the opcode which must be emitted)
  447. @param(a The constant which should be emitted, returns the constant which must
  448. be emitted)
  449. @param(reg The register to emit the opcode with, returns the register with
  450. which the opcode will be emitted)
  451. }
  452. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  453. { override to catch 64bit rangechecks }
  454. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  455. end;
  456. {$endif cpu64bit}
  457. var
  458. {# Main code generator class }
  459. cg : tcg;
  460. {$ifndef cpu64bit}
  461. {# Code generator class for all operations working with 64-Bit operands }
  462. cg64 : tcg64;
  463. {$endif cpu64bit}
  464. implementation
  465. uses
  466. globals,options,systems,
  467. verbose,defutil,paramgr,symsym,
  468. tgobj,cutils,procinfo,
  469. ncgrtti;
  470. {*****************************************************************************
  471. basic functionallity
  472. ******************************************************************************}
  473. constructor tcg.create;
  474. begin
  475. end;
  476. {*****************************************************************************
  477. register allocation
  478. ******************************************************************************}
  479. procedure tcg.init_register_allocators;
  480. begin
  481. fillchar(rg,sizeof(rg),0);
  482. add_reg_instruction_hook:=@add_reg_instruction;
  483. end;
  484. procedure tcg.done_register_allocators;
  485. begin
  486. { Safety }
  487. fillchar(rg,sizeof(rg),0);
  488. add_reg_instruction_hook:=nil;
  489. end;
  490. {$ifdef flowgraph}
  491. procedure Tcg.init_flowgraph;
  492. begin
  493. aktflownode:=0;
  494. end;
  495. procedure Tcg.done_flowgraph;
  496. begin
  497. end;
  498. {$endif}
  499. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  500. begin
  501. if not assigned(rg[R_INTREGISTER]) then
  502. internalerror(200312122);
  503. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  504. end;
  505. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  506. begin
  507. if not assigned(rg[R_FPUREGISTER]) then
  508. internalerror(200312123);
  509. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  510. end;
  511. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  512. begin
  513. if not assigned(rg[R_MMREGISTER]) then
  514. internalerror(2003121214);
  515. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  516. end;
  517. function tcg.getaddressregister(list:TAsmList):Tregister;
  518. begin
  519. if assigned(rg[R_ADDRESSREGISTER]) then
  520. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  521. else
  522. begin
  523. if not assigned(rg[R_INTREGISTER]) then
  524. internalerror(200312121);
  525. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  526. end;
  527. end;
  528. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  529. var
  530. subreg:Tsubregister;
  531. begin
  532. subreg:=cgsize2subreg(size);
  533. result:=reg;
  534. setsubreg(result,subreg);
  535. { notify RA }
  536. if result<>reg then
  537. list.concat(tai_regalloc.resize(result));
  538. end;
  539. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  540. begin
  541. if not assigned(rg[getregtype(r)]) then
  542. internalerror(200312125);
  543. rg[getregtype(r)].getcpuregister(list,r);
  544. end;
  545. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  546. begin
  547. if not assigned(rg[getregtype(r)]) then
  548. internalerror(200312126);
  549. rg[getregtype(r)].ungetcpuregister(list,r);
  550. end;
  551. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  552. begin
  553. if assigned(rg[rt]) then
  554. rg[rt].alloccpuregisters(list,r)
  555. else
  556. internalerror(200310092);
  557. end;
  558. procedure tcg.allocallcpuregisters(list:TAsmList);
  559. begin
  560. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  561. {$ifndef i386}
  562. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  563. {$ifdef cpumm}
  564. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  565. {$endif cpumm}
  566. {$endif i386}
  567. end;
  568. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  569. begin
  570. if assigned(rg[rt]) then
  571. rg[rt].dealloccpuregisters(list,r)
  572. else
  573. internalerror(200310093);
  574. end;
  575. procedure tcg.deallocallcpuregisters(list:TAsmList);
  576. begin
  577. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  578. {$ifndef i386}
  579. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  580. {$ifdef cpumm}
  581. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  582. {$endif cpumm}
  583. {$endif i386}
  584. end;
  585. function tcg.uses_registers(rt:Tregistertype):boolean;
  586. begin
  587. if assigned(rg[rt]) then
  588. result:=rg[rt].uses_registers
  589. else
  590. result:=false;
  591. end;
  592. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  593. var
  594. rt : tregistertype;
  595. begin
  596. rt:=getregtype(r);
  597. { Only add it when a register allocator is configured.
  598. No IE can be generated, because the VMT is written
  599. without a valid rg[] }
  600. if assigned(rg[rt]) then
  601. rg[rt].add_reg_instruction(instr,r);
  602. end;
  603. procedure tcg.add_move_instruction(instr:Taicpu);
  604. var
  605. rt : tregistertype;
  606. begin
  607. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  608. if assigned(rg[rt]) then
  609. rg[rt].add_move_instruction(instr)
  610. else
  611. internalerror(200310095);
  612. end;
  613. procedure tcg.set_regalloc_extend_backwards(b: boolean);
  614. var
  615. rt : tregistertype;
  616. begin
  617. for rt:=low(rg) to high(rg) do
  618. begin
  619. if assigned(rg[rt]) then
  620. rg[rt].extend_live_range_backwards := b;;
  621. end;
  622. end;
  623. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  624. var
  625. rt : tregistertype;
  626. begin
  627. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  628. begin
  629. if assigned(rg[rt]) then
  630. rg[rt].do_register_allocation(list,headertai);
  631. end;
  632. { running the other register allocator passes could require addition int/addr. registers
  633. when spilling so run int/addr register allocation at the end }
  634. if assigned(rg[R_INTREGISTER]) then
  635. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  636. if assigned(rg[R_ADDRESSREGISTER]) then
  637. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  638. end;
  639. procedure tcg.translate_register(var reg : tregister);
  640. begin
  641. rg[getregtype(reg)].translate_register(reg);
  642. end;
  643. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  644. begin
  645. list.concat(tai_regalloc.alloc(r,nil));
  646. end;
  647. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  648. begin
  649. list.concat(tai_regalloc.dealloc(r,nil));
  650. end;
  651. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  652. var
  653. instr : tai;
  654. begin
  655. instr:=tai_regalloc.sync(r);
  656. list.concat(instr);
  657. add_reg_instruction(instr,r);
  658. end;
  659. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  660. begin
  661. list.concat(tai_label.create(l));
  662. end;
  663. {*****************************************************************************
  664. for better code generation these methods should be overridden
  665. ******************************************************************************}
  666. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  667. var
  668. ref : treference;
  669. begin
  670. cgpara.check_simple_location;
  671. case cgpara.location^.loc of
  672. LOC_REGISTER,LOC_CREGISTER:
  673. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  674. LOC_REFERENCE,LOC_CREFERENCE:
  675. begin
  676. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  677. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  678. end
  679. else
  680. internalerror(2002071004);
  681. end;
  682. end;
  683. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  684. var
  685. ref : treference;
  686. begin
  687. cgpara.check_simple_location;
  688. case cgpara.location^.loc of
  689. LOC_REGISTER,LOC_CREGISTER:
  690. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  691. LOC_REFERENCE,LOC_CREFERENCE:
  692. begin
  693. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  694. a_load_const_ref(list,cgpara.location^.size,a,ref);
  695. end
  696. else
  697. internalerror(2002071004);
  698. end;
  699. end;
  700. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  701. var
  702. ref : treference;
  703. begin
  704. cgpara.check_simple_location;
  705. case cgpara.location^.loc of
  706. LOC_REGISTER,LOC_CREGISTER:
  707. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  708. LOC_REFERENCE,LOC_CREFERENCE:
  709. begin
  710. reference_reset(ref);
  711. ref.base:=cgpara.location^.reference.index;
  712. ref.offset:=cgpara.location^.reference.offset;
  713. if (size <> OS_NO) and
  714. (tcgsize2size[size] < sizeof(aint)) then
  715. begin
  716. if (cgpara.size = OS_NO) or
  717. assigned(cgpara.location^.next) then
  718. internalerror(2006052401);
  719. a_load_ref_ref(list,size,cgpara.size,r,ref);
  720. end
  721. else
  722. { use concatcopy, because the parameter can be larger than }
  723. { what the OS_* constants can handle }
  724. g_concatcopy(list,r,ref,cgpara.intsize);
  725. end
  726. else
  727. internalerror(2002071004);
  728. end;
  729. end;
  730. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  731. begin
  732. case l.loc of
  733. LOC_REGISTER,
  734. LOC_CREGISTER :
  735. a_param_reg(list,l.size,l.register,cgpara);
  736. LOC_CONSTANT :
  737. a_param_const(list,l.size,l.value,cgpara);
  738. LOC_CREFERENCE,
  739. LOC_REFERENCE :
  740. a_param_ref(list,l.size,l.reference,cgpara);
  741. else
  742. internalerror(2002032211);
  743. end;
  744. end;
  745. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  746. var
  747. hr : tregister;
  748. begin
  749. cgpara.check_simple_location;
  750. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  751. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  752. else
  753. begin
  754. hr:=getaddressregister(list);
  755. a_loadaddr_ref_reg(list,r,hr);
  756. a_param_reg(list,OS_ADDR,hr,cgpara);
  757. end;
  758. end;
  759. {****************************************************************************
  760. some generic implementations
  761. ****************************************************************************}
  762. {$ifopt r+}
  763. {$define rangeon}
  764. {$endif}
  765. {$ifopt q+}
  766. {$define overflowon}
  767. {$endif}
  768. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  769. var
  770. bitmask: aword;
  771. tmpreg: tregister;
  772. stopbit: byte;
  773. begin
  774. tmpreg:=getintregister(list,sreg.subsetregsize);
  775. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  776. stopbit := sreg.startbit + sreg.bitlen;
  777. // on x86(64), 1 shl 32(64) = 1 instead of 0
  778. // use aword to prevent overflow with 1 shl 31
  779. if (stopbit - sreg.startbit <> AIntBits) then
  780. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  781. else
  782. bitmask := high(aword);
  783. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  784. tmpreg := makeregsize(list,tmpreg,subsetsize);
  785. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  786. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  787. end;
  788. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  789. begin
  790. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  791. end;
  792. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  793. var
  794. bitmask: aword;
  795. tmpreg: tregister;
  796. stopbit: byte;
  797. begin
  798. stopbit := sreg.startbit + sreg.bitlen;
  799. // on x86(64), 1 shl 32(64) = 1 instead of 0
  800. if (stopbit <> AIntBits) then
  801. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  802. else
  803. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  804. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  805. begin
  806. tmpreg:=getintregister(list,sreg.subsetregsize);
  807. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  808. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  809. if (slopt <> SL_REGNOSRCMASK) then
  810. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  811. end;
  812. if (slopt <> SL_SETMAX) then
  813. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  814. case slopt of
  815. SL_SETZERO : ;
  816. SL_SETMAX :
  817. if (sreg.bitlen <> AIntBits) then
  818. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  819. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  820. sreg.subsetreg)
  821. else
  822. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  823. else
  824. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  825. end;
  826. end;
  827. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  828. var
  829. tmpreg: tregister;
  830. bitmask: aword;
  831. stopbit: byte;
  832. begin
  833. if (fromsreg.bitlen >= tosreg.bitlen) then
  834. begin
  835. tmpreg := getintregister(list,tosreg.subsetregsize);
  836. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  837. if (fromsreg.startbit <= tosreg.startbit) then
  838. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  839. else
  840. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  841. stopbit := tosreg.startbit + tosreg.bitlen;
  842. // on x86(64), 1 shl 32(64) = 1 instead of 0
  843. if (stopbit <> AIntBits) then
  844. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  845. else
  846. bitmask := (aword(1) shl tosreg.startbit) - 1;
  847. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  848. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  849. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  850. end
  851. else
  852. begin
  853. tmpreg := getintregister(list,tosubsetsize);
  854. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  855. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  856. end;
  857. end;
  858. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  859. var
  860. tmpreg: tregister;
  861. begin
  862. tmpreg := getintregister(list,tosize);
  863. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  864. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  865. end;
  866. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  867. var
  868. tmpreg: tregister;
  869. begin
  870. tmpreg := getintregister(list,subsetsize);
  871. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  872. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  873. end;
  874. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  875. var
  876. bitmask: aword;
  877. stopbit: byte;
  878. begin
  879. stopbit := sreg.startbit + sreg.bitlen;
  880. // on x86(64), 1 shl 32(64) = 1 instead of 0
  881. if (stopbit <> AIntBits) then
  882. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  883. else
  884. bitmask := (aword(1) shl sreg.startbit) - 1;
  885. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  886. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  887. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  888. end;
  889. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  890. begin
  891. case loc.loc of
  892. LOC_REFERENCE,LOC_CREFERENCE:
  893. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  894. LOC_REGISTER,LOC_CREGISTER:
  895. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  896. LOC_CONSTANT:
  897. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  898. LOC_SUBSETREG,LOC_CSUBSETREG:
  899. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  900. LOC_SUBSETREF,LOC_CSUBSETREF:
  901. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  902. else
  903. internalerror(200608053);
  904. end;
  905. end;
  906. (*
  907. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  908. in memory. They are like a regular reference, but contain an extra bit
  909. offset (either constant -startbit- or variable -bitindexreg, always OS_INT)
  910. and a bit length (always constant).
  911. Bit packed values are stored differently in memory depending on whether we
  912. are on a big or a little endian system (compatible with at least GPC). The
  913. size of the basic working unit is always the smallest power-of-2 byte size
  914. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  915. bytes, 17..32 bits -> 4 bytes etc).
  916. On a big endian, 5-bit: values are stored like this:
  917. 11111222 22333334 44445555 56666677 77788888
  918. The leftmost bit of each 5-bit value corresponds to the most significant
  919. bit.
  920. On little endian, it goes like this:
  921. 22211111 43333322 55554444 77666665 88888777
  922. In this case, per byte the left-most bit is more significant than those on
  923. the right, but the bits in the next byte are all more significant than
  924. those in the previous byte (e.g., the 222 in the first byte are the low
  925. three bits of that value, while the 22 in the second byte are the upper
  926. three bits.
  927. Big endian, 9 bit values:
  928. 11111111 12222222 22333333 33344444 ...
  929. Little endian, 9 bit values:
  930. 11111111 22222221 33333322 44444333 ...
  931. This is memory representation and the 16 bit values are byteswapped.
  932. Similarly as in the previous case, the 2222222 string contains the lower
  933. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  934. registers (two 16 bit registers in the current implementation, although a
  935. single 32 bit register would be possible too, in particular if 32 bit
  936. alignment can be guaranteed), this becomes:
  937. 22222221 11111111 44444333 33333322 ...
  938. (l)ow u l l u l u
  939. The startbit/bitindex in a subsetreference always refers to
  940. a) on big endian: the most significant bit of the value
  941. (bits counted from left to right, both memory an registers)
  942. b) on little endian: the least significant bit when the value
  943. is loaded in a register (bit counted from right to left)
  944. Although a) results in more complex code for big endian systems, it's
  945. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  946. Apple's universal interfaces which depend on these layout differences).
  947. Note: when changing the loadsize calculated in get_subsetref_load_info,
  948. make sure the appropriate alignment is guaranteed, at least in case of
  949. {$defined cpurequiresproperalignment}.
  950. *)
  951. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  952. var
  953. intloadsize: aint;
  954. begin
  955. intloadsize := packedbitsloadsize(sref.bitlen);
  956. {$if defined(cpurequiresproperalignment) and not defined(arm)}
  957. { may need to be split into several smaller loads/stores }
  958. if intloadsize <> sref.ref.alignment then
  959. internalerror(2006082011);
  960. {$endif cpurequiresproperalignment}
  961. if (intloadsize = 0) then
  962. internalerror(2006081310);
  963. if (intloadsize > sizeof(aint)) then
  964. intloadsize := sizeof(aint);
  965. loadsize := int_cgsize(intloadsize);
  966. if (loadsize = OS_NO) then
  967. internalerror(2006081311);
  968. if (sref.bitlen > sizeof(aint)*8) then
  969. internalerror(2006081312);
  970. extra_load :=
  971. (intloadsize <> 1) and
  972. ((sref.bitindexreg <> NR_NO) or
  973. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  974. end;
  975. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  976. var
  977. restbits: byte;
  978. begin
  979. if (target_info.endian = endian_big) then
  980. begin
  981. { valuereg contains the upper bits, extra_value_reg the lower }
  982. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  983. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  984. { mask other bits }
  985. if (sref.bitlen <> AIntBits) then
  986. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  987. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  988. end
  989. else
  990. begin
  991. { valuereg contains the lower bits, extra_value_reg the upper }
  992. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  993. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  994. { mask other bits }
  995. if (sref.bitlen <> AIntBits) then
  996. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  997. end;
  998. { merge }
  999. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1000. end;
  1001. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1002. var
  1003. tmpreg: tregister;
  1004. begin
  1005. tmpreg := getintregister(list,OS_INT);
  1006. if (target_info.endian = endian_big) then
  1007. begin
  1008. { since this is a dynamic index, it's possible that the value }
  1009. { is entirely in valuereg. }
  1010. { get the data in valuereg in the right place }
  1011. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1012. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1013. if (loadbitsize <> AIntBits) then
  1014. { mask left over bits }
  1015. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1016. tmpreg := getintregister(list,OS_INT);
  1017. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1018. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1019. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1020. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1021. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1022. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1023. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1024. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1025. { => extra_value_reg is now 0 }
  1026. { merge }
  1027. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1028. { no need to mask, necessary masking happened earlier on }
  1029. end
  1030. else
  1031. begin
  1032. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1033. { Y-x = -(Y-x) }
  1034. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1035. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1036. { tmpreg is in the range 1..<cpu_bitsize> -> will zero extra_value_reg }
  1037. { if all bits are in valuereg }
  1038. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1039. {$ifdef x86}
  1040. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1041. if (loadbitsize = AIntBits) then
  1042. begin
  1043. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1044. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
  1045. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1046. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1047. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1048. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1049. end;
  1050. {$endif x86}
  1051. { merge }
  1052. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1053. { mask other bits }
  1054. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1055. end;
  1056. end;
  1057. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1058. var
  1059. tmpref: treference;
  1060. valuereg,extra_value_reg: tregister;
  1061. tosreg: tsubsetregister;
  1062. loadsize: tcgsize;
  1063. loadbitsize: byte;
  1064. extra_load: boolean;
  1065. begin
  1066. get_subsetref_load_info(sref,loadsize,extra_load);
  1067. loadbitsize := tcgsize2size[loadsize]*8;
  1068. { load the (first part) of the bit sequence }
  1069. valuereg := cg.getintregister(list,OS_INT);
  1070. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1071. if not extra_load then
  1072. begin
  1073. { everything is guaranteed to be in a single register of loadsize }
  1074. if (sref.bitindexreg = NR_NO) then
  1075. begin
  1076. { use subsetreg routine, it may have been overridden with an optimized version }
  1077. tosreg.subsetreg := valuereg;
  1078. tosreg.subsetregsize := OS_INT;
  1079. { subsetregs always count bits from right to left }
  1080. if (target_info.endian = endian_big) then
  1081. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1082. else
  1083. tosreg.startbit := sref.startbit;
  1084. tosreg.bitlen := sref.bitlen;
  1085. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1086. exit;
  1087. end
  1088. else
  1089. begin
  1090. if (sref.startbit <> 0) then
  1091. internalerror(2006081510);
  1092. if (target_info.endian = endian_big) then
  1093. begin
  1094. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1095. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1096. end
  1097. else
  1098. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1099. { mask other bits }
  1100. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1101. end
  1102. end
  1103. else
  1104. begin
  1105. { load next value as well }
  1106. extra_value_reg := getintregister(list,OS_INT);
  1107. tmpref := sref.ref;
  1108. inc(tmpref.offset,loadbitsize div 8);
  1109. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1110. if (sref.bitindexreg = NR_NO) then
  1111. { can be overridden to optimize }
  1112. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1113. else
  1114. begin
  1115. if (sref.startbit <> 0) then
  1116. internalerror(2006080610);
  1117. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg);
  1118. end;
  1119. end;
  1120. { store in destination }
  1121. { (types with a negative lower bound are always a base type (8, 16, 32, 64 bits) }
  1122. if ((sref.bitlen mod 8) = 0) then
  1123. begin
  1124. { since we know all necessary bits are already masked, avoid unnecessary }
  1125. { zero-extensions }
  1126. valuereg := makeregsize(list,valuereg,tosize);
  1127. a_load_reg_reg(list,tcgsize2unsigned[tosize],tosize,valuereg,destreg)
  1128. end
  1129. else
  1130. begin
  1131. { avoid unnecessary sign extension and zeroing }
  1132. valuereg := makeregsize(list,valuereg,OS_INT);
  1133. destreg := makeregsize(list,destreg,OS_INT);
  1134. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1135. destreg := makeregsize(list,destreg,tosize);
  1136. end
  1137. end;
  1138. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1139. begin
  1140. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1141. end;
  1142. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1143. var
  1144. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1145. tosreg, fromsreg: tsubsetregister;
  1146. tmpref: treference;
  1147. loadsize: tcgsize;
  1148. loadbitsize: byte;
  1149. extra_load: boolean;
  1150. begin
  1151. { the register must be able to contain the requested value }
  1152. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1153. internalerror(2006081613);
  1154. get_subsetref_load_info(sref,loadsize,extra_load);
  1155. loadbitsize := tcgsize2size[loadsize]*8;
  1156. { load the (first part) of the bit sequence }
  1157. valuereg := cg.getintregister(list,OS_INT);
  1158. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1159. { constant offset of bit sequence? }
  1160. if not extra_load then
  1161. begin
  1162. if (sref.bitindexreg = NR_NO) then
  1163. begin
  1164. { use subsetreg routine, it may have been overridden with an optimized version }
  1165. tosreg.subsetreg := valuereg;
  1166. tosreg.subsetregsize := OS_INT;
  1167. { subsetregs always count bits from right to left }
  1168. if (target_info.endian = endian_big) then
  1169. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1170. else
  1171. tosreg.startbit := sref.startbit;
  1172. tosreg.bitlen := sref.bitlen;
  1173. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1174. end
  1175. else
  1176. begin
  1177. if (sref.startbit <> 0) then
  1178. internalerror(2006081710);
  1179. { should be handled by normal code and will give wrong result }
  1180. { on x86 for the '1 shl bitlen' below }
  1181. if (sref.bitlen = AIntBits) then
  1182. internalerror(2006081711);
  1183. { calculated correct shiftcount for big endian }
  1184. tmpindexreg := getintregister(list,OS_INT);
  1185. a_load_reg_reg(list,OS_INT,OS_INT,sref.bitindexreg,tmpindexreg);
  1186. if (target_info.endian = endian_big) then
  1187. begin
  1188. a_op_const_reg(list,OP_SUB,OS_INT,loadbitsize-sref.bitlen,tmpindexreg);
  1189. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1190. end;
  1191. { zero the bits we have to insert }
  1192. if (slopt <> SL_SETMAX) then
  1193. begin
  1194. maskreg := getintregister(list,OS_INT);
  1195. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1196. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1197. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1198. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1199. end;
  1200. { insert the value }
  1201. if (slopt <> SL_SETZERO) then
  1202. begin
  1203. tmpreg := getintregister(list,OS_INT);
  1204. if (slopt <> SL_SETMAX) then
  1205. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1206. else if (sref.bitlen <> AIntBits) then
  1207. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1208. else
  1209. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1210. if (slopt <> SL_REGNOSRCMASK) then
  1211. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1212. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg);
  1213. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1214. end;
  1215. end;
  1216. { store back to memory }
  1217. valuereg := makeregsize(list,valuereg,loadsize);
  1218. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1219. exit;
  1220. end
  1221. else
  1222. begin
  1223. { load next value }
  1224. extra_value_reg := getintregister(list,OS_INT);
  1225. tmpref := sref.ref;
  1226. inc(tmpref.offset,loadbitsize div 8);
  1227. { should maybe be taken out too, can be done more efficiently }
  1228. { on e.g. i386 with shld/shrd }
  1229. if (sref.bitindexreg = NR_NO) then
  1230. begin
  1231. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1232. fromsreg.subsetreg := fromreg;
  1233. fromsreg.subsetregsize := fromsize;
  1234. tosreg.subsetreg := valuereg;
  1235. tosreg.subsetregsize := OS_INT;
  1236. { transfer first part }
  1237. fromsreg.bitlen := loadbitsize-sref.startbit;
  1238. tosreg.bitlen := fromsreg.bitlen;
  1239. if (target_info.endian = endian_big) then
  1240. begin
  1241. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1242. { upper bits of the value ... }
  1243. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1244. { ... to bit 0 }
  1245. tosreg.startbit := 0
  1246. end
  1247. else
  1248. begin
  1249. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1250. { lower bits of the value ... }
  1251. fromsreg.startbit := 0;
  1252. { ... to startbit }
  1253. tosreg.startbit := sref.startbit;
  1254. end;
  1255. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1256. valuereg := makeregsize(list,valuereg,loadsize);
  1257. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1258. { transfer second part }
  1259. if (target_info.endian = endian_big) then
  1260. begin
  1261. { extra_value_reg must contain the lower bits of the value at bits }
  1262. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1263. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1264. { - bitlen - startbit }
  1265. fromsreg.startbit := 0;
  1266. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1267. end
  1268. else
  1269. begin
  1270. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1271. fromsreg.startbit := fromsreg.bitlen;
  1272. tosreg.startbit := 0;
  1273. end;
  1274. tosreg.subsetreg := extra_value_reg;
  1275. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1276. tosreg.bitlen := fromsreg.bitlen;
  1277. a_load_subsetreg_subsetreg(list,fromsize,subsetsize,fromsreg,tosreg);
  1278. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1279. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1280. exit;
  1281. end
  1282. else
  1283. begin
  1284. if (sref.startbit <> 0) then
  1285. internalerror(2006081812);
  1286. { should be handled by normal code and will give wrong result }
  1287. { on x86 for the '1 shl bitlen' below }
  1288. if (sref.bitlen = AIntBits) then
  1289. internalerror(2006081713);
  1290. { generate mask to zero the bits we have to insert }
  1291. if (slopt <> SL_SETMAX) then
  1292. begin
  1293. maskreg := getintregister(list,OS_INT);
  1294. if (target_info.endian = endian_big) then
  1295. begin
  1296. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1297. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1298. end
  1299. else
  1300. begin
  1301. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1302. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1303. end;
  1304. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1305. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1306. end;
  1307. { insert the value }
  1308. if (slopt <> SL_SETZERO) then
  1309. begin
  1310. tmpreg := getintregister(list,OS_INT);
  1311. if (slopt <> SL_SETMAX) then
  1312. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1313. else if (sref.bitlen <> AIntBits) then
  1314. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1315. else
  1316. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1317. if (target_info.endian = endian_big) then
  1318. begin
  1319. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1320. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) and
  1321. (loadbitsize <> AIntBits) then
  1322. { mask left over bits }
  1323. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1324. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1325. end
  1326. else
  1327. begin
  1328. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) and
  1329. (loadbitsize <> AIntBits) then
  1330. { mask left over bits }
  1331. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1332. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1333. end;
  1334. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1335. end;
  1336. valuereg := makeregsize(list,valuereg,loadsize);
  1337. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1338. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1339. tmpindexreg := getintregister(list,OS_INT);
  1340. { load current array value }
  1341. if (slopt <> SL_SETZERO) then
  1342. begin
  1343. tmpreg := getintregister(list,OS_INT);
  1344. if (slopt <> SL_SETMAX) then
  1345. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1346. else if (sref.bitlen <> AIntBits) then
  1347. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1348. else
  1349. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1350. end;
  1351. { generate mask to zero the bits we have to insert }
  1352. if (slopt <> SL_SETMAX) then
  1353. begin
  1354. maskreg := getintregister(list,OS_INT);
  1355. if (target_info.endian = endian_big) then
  1356. begin
  1357. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1358. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1359. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1360. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1361. end
  1362. else
  1363. begin
  1364. { Y-x = -(Y-x) }
  1365. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1366. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1367. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1368. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1369. {$ifdef x86}
  1370. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1371. if (loadbitsize = AIntBits) then
  1372. begin
  1373. valuereg := getintregister(list,OS_INT);
  1374. { if (tmpindexreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
  1375. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
  1376. { if (tmpindexreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
  1377. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1378. { if (tmpindexreg = cpu_bit_size) then tmpreg := maskreg := 0 }
  1379. if (slopt <> SL_SETZERO) then
  1380. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1381. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1382. end;
  1383. {$endif x86}
  1384. end;
  1385. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1386. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1387. end;
  1388. if (slopt <> SL_SETZERO) then
  1389. begin
  1390. if (target_info.endian = endian_big) then
  1391. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1392. else
  1393. begin
  1394. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1395. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1396. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1397. end;
  1398. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1399. end;
  1400. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1401. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1402. end;
  1403. end;
  1404. end;
  1405. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1406. var
  1407. tmpreg: tregister;
  1408. begin
  1409. tmpreg := getintregister(list,tosubsetsize);
  1410. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1411. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1412. end;
  1413. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1414. var
  1415. tmpreg: tregister;
  1416. begin
  1417. tmpreg := getintregister(list,tosize);
  1418. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1419. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1420. end;
  1421. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1422. var
  1423. tmpreg: tregister;
  1424. begin
  1425. tmpreg := getintregister(list,subsetsize);
  1426. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1427. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1428. end;
  1429. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1430. var
  1431. tmpreg: tregister;
  1432. slopt: tsubsetloadopt;
  1433. begin
  1434. slopt := SL_REGNOSRCMASK;
  1435. if (
  1436. { broken x86 "x shl regbitsize = x" }
  1437. ((sref.bitlen <> AIntBits) and
  1438. (aword(a) = (aword(1) shl sref.bitlen) -1)) or
  1439. ((sref.bitlen = AIntBits) and
  1440. (a = -1))
  1441. ) then
  1442. slopt := SL_SETMAX
  1443. else if (a = 0) then
  1444. slopt := SL_SETZERO;
  1445. tmpreg := getintregister(list,subsetsize);
  1446. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1447. a_load_const_reg(list,subsetsize,a,tmpreg);
  1448. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1449. end;
  1450. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1451. begin
  1452. case loc.loc of
  1453. LOC_REFERENCE,LOC_CREFERENCE:
  1454. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1455. LOC_REGISTER,LOC_CREGISTER:
  1456. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1457. LOC_SUBSETREG,LOC_CSUBSETREG:
  1458. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1459. LOC_SUBSETREF,LOC_CSUBSETREF:
  1460. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1461. else
  1462. internalerror(200608054);
  1463. end;
  1464. end;
  1465. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1466. var
  1467. tmpreg: tregister;
  1468. begin
  1469. tmpreg := getintregister(list,tosubsetsize);
  1470. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1471. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1472. end;
  1473. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1474. var
  1475. tmpreg: tregister;
  1476. begin
  1477. tmpreg := getintregister(list,tosubsetsize);
  1478. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1479. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1480. end;
  1481. {$ifdef rangeon}
  1482. {$r+}
  1483. {$undef rangeon}
  1484. {$endif}
  1485. {$ifdef overflowon}
  1486. {$q+}
  1487. {$undef overflowon}
  1488. {$endif}
  1489. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1490. var
  1491. tmpreg: tregister;
  1492. begin
  1493. { verify if we have the same reference }
  1494. if references_equal(sref,dref) then
  1495. exit;
  1496. tmpreg:=getintregister(list,tosize);
  1497. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1498. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1499. end;
  1500. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1501. var
  1502. tmpreg: tregister;
  1503. begin
  1504. tmpreg:=getintregister(list,size);
  1505. a_load_const_reg(list,size,a,tmpreg);
  1506. a_load_reg_ref(list,size,size,tmpreg,ref);
  1507. end;
  1508. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1509. begin
  1510. case loc.loc of
  1511. LOC_REFERENCE,LOC_CREFERENCE:
  1512. a_load_const_ref(list,loc.size,a,loc.reference);
  1513. LOC_REGISTER,LOC_CREGISTER:
  1514. a_load_const_reg(list,loc.size,a,loc.register);
  1515. LOC_SUBSETREG,LOC_CSUBSETREG:
  1516. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1517. LOC_SUBSETREF,LOC_CSUBSETREF:
  1518. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1519. else
  1520. internalerror(200203272);
  1521. end;
  1522. end;
  1523. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1524. begin
  1525. case loc.loc of
  1526. LOC_REFERENCE,LOC_CREFERENCE:
  1527. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1528. LOC_REGISTER,LOC_CREGISTER:
  1529. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1530. LOC_SUBSETREG,LOC_CSUBSETREG:
  1531. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1532. LOC_SUBSETREF,LOC_CSUBSETREF:
  1533. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1534. else
  1535. internalerror(200203271);
  1536. end;
  1537. end;
  1538. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  1539. begin
  1540. case loc.loc of
  1541. LOC_REFERENCE,LOC_CREFERENCE:
  1542. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1543. LOC_REGISTER,LOC_CREGISTER:
  1544. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  1545. LOC_CONSTANT:
  1546. a_load_const_reg(list,tosize,loc.value,reg);
  1547. LOC_SUBSETREG,LOC_CSUBSETREG:
  1548. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  1549. LOC_SUBSETREF,LOC_CSUBSETREF:
  1550. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  1551. else
  1552. internalerror(200109092);
  1553. end;
  1554. end;
  1555. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  1556. begin
  1557. case loc.loc of
  1558. LOC_REFERENCE,LOC_CREFERENCE:
  1559. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  1560. LOC_REGISTER,LOC_CREGISTER:
  1561. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  1562. LOC_CONSTANT:
  1563. a_load_const_ref(list,tosize,loc.value,ref);
  1564. LOC_SUBSETREG,LOC_CSUBSETREG:
  1565. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  1566. LOC_SUBSETREF,LOC_CSUBSETREF:
  1567. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  1568. else
  1569. internalerror(200109302);
  1570. end;
  1571. end;
  1572. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  1573. begin
  1574. case loc.loc of
  1575. LOC_REFERENCE,LOC_CREFERENCE:
  1576. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  1577. LOC_REGISTER,LOC_CREGISTER:
  1578. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  1579. LOC_CONSTANT:
  1580. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  1581. LOC_SUBSETREG,LOC_CSUBSETREG:
  1582. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  1583. LOC_SUBSETREF,LOC_CSUBSETREF:
  1584. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  1585. else
  1586. internalerror(2006052310);
  1587. end;
  1588. end;
  1589. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  1590. begin
  1591. case loc.loc of
  1592. LOC_REFERENCE,LOC_CREFERENCE:
  1593. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  1594. LOC_REGISTER,LOC_CREGISTER:
  1595. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  1596. LOC_SUBSETREG,LOC_CSUBSETREG:
  1597. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  1598. LOC_SUBSETREF,LOC_CSUBSETREF:
  1599. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  1600. else
  1601. internalerror(2006051510);
  1602. end;
  1603. end;
  1604. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  1605. var
  1606. powerval : longint;
  1607. begin
  1608. case op of
  1609. OP_OR :
  1610. begin
  1611. { or with zero returns same result }
  1612. if a = 0 then
  1613. op:=OP_NONE
  1614. else
  1615. { or with max returns max }
  1616. if a = -1 then
  1617. op:=OP_MOVE;
  1618. end;
  1619. OP_AND :
  1620. begin
  1621. { and with max returns same result }
  1622. if (a = -1) then
  1623. op:=OP_NONE
  1624. else
  1625. { and with 0 returns 0 }
  1626. if a=0 then
  1627. op:=OP_MOVE;
  1628. end;
  1629. OP_DIV :
  1630. begin
  1631. { division by 1 returns result }
  1632. if a = 1 then
  1633. op:=OP_NONE
  1634. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1635. begin
  1636. a := powerval;
  1637. op:= OP_SHR;
  1638. end;
  1639. end;
  1640. OP_IDIV:
  1641. begin
  1642. if a = 1 then
  1643. op:=OP_NONE;
  1644. end;
  1645. OP_MUL,OP_IMUL:
  1646. begin
  1647. if a = 1 then
  1648. op:=OP_NONE
  1649. else
  1650. if a=0 then
  1651. op:=OP_MOVE
  1652. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1653. begin
  1654. a := powerval;
  1655. op:= OP_SHL;
  1656. end;
  1657. end;
  1658. OP_ADD,OP_SUB:
  1659. begin
  1660. if a = 0 then
  1661. op:=OP_NONE;
  1662. end;
  1663. OP_SAR,OP_SHL,OP_SHR:
  1664. begin
  1665. if a = 0 then
  1666. op:=OP_NONE;
  1667. end;
  1668. end;
  1669. end;
  1670. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  1671. begin
  1672. case loc.loc of
  1673. LOC_REFERENCE, LOC_CREFERENCE:
  1674. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1675. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1676. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  1677. else
  1678. internalerror(200203301);
  1679. end;
  1680. end;
  1681. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  1682. begin
  1683. case loc.loc of
  1684. LOC_REFERENCE, LOC_CREFERENCE:
  1685. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1686. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1687. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1688. else
  1689. internalerror(48991);
  1690. end;
  1691. end;
  1692. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  1693. var
  1694. ref : treference;
  1695. begin
  1696. case cgpara.location^.loc of
  1697. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1698. begin
  1699. cgpara.check_simple_location;
  1700. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  1701. end;
  1702. LOC_REFERENCE,LOC_CREFERENCE:
  1703. begin
  1704. cgpara.check_simple_location;
  1705. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1706. a_loadfpu_reg_ref(list,size,size,r,ref);
  1707. end;
  1708. LOC_REGISTER,LOC_CREGISTER:
  1709. begin
  1710. { paramfpu_ref does the check_simpe_location check here if necessary }
  1711. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  1712. a_loadfpu_reg_ref(list,size,size,r,ref);
  1713. a_paramfpu_ref(list,size,ref,cgpara);
  1714. tg.Ungettemp(list,ref);
  1715. end;
  1716. else
  1717. internalerror(2002071004);
  1718. end;
  1719. end;
  1720. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  1721. var
  1722. href : treference;
  1723. begin
  1724. cgpara.check_simple_location;
  1725. case cgpara.location^.loc of
  1726. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1727. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  1728. LOC_REFERENCE,LOC_CREFERENCE:
  1729. begin
  1730. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1731. { concatcopy should choose the best way to copy the data }
  1732. g_concatcopy(list,ref,href,tcgsize2size[size]);
  1733. end;
  1734. else
  1735. internalerror(200402201);
  1736. end;
  1737. end;
  1738. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  1739. var
  1740. tmpreg : tregister;
  1741. begin
  1742. tmpreg:=getintregister(list,size);
  1743. a_load_ref_reg(list,size,size,ref,tmpreg);
  1744. a_op_const_reg(list,op,size,a,tmpreg);
  1745. a_load_reg_ref(list,size,size,tmpreg,ref);
  1746. end;
  1747. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  1748. var
  1749. tmpreg: tregister;
  1750. begin
  1751. tmpreg := cg.getintregister(list, size);
  1752. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  1753. a_op_const_reg(list,op,size,a,tmpreg);
  1754. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  1755. end;
  1756. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  1757. var
  1758. tmpreg: tregister;
  1759. begin
  1760. tmpreg := cg.getintregister(list, size);
  1761. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  1762. a_op_const_reg(list,op,size,a,tmpreg);
  1763. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  1764. end;
  1765. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  1766. begin
  1767. case loc.loc of
  1768. LOC_REGISTER, LOC_CREGISTER:
  1769. a_op_const_reg(list,op,loc.size,a,loc.register);
  1770. LOC_REFERENCE, LOC_CREFERENCE:
  1771. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1772. LOC_SUBSETREG, LOC_CSUBSETREG:
  1773. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  1774. LOC_SUBSETREF, LOC_CSUBSETREF:
  1775. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  1776. else
  1777. internalerror(200109061);
  1778. end;
  1779. end;
  1780. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1781. var
  1782. tmpreg : tregister;
  1783. begin
  1784. tmpreg:=getintregister(list,size);
  1785. a_load_ref_reg(list,size,size,ref,tmpreg);
  1786. a_op_reg_reg(list,op,size,reg,tmpreg);
  1787. a_load_reg_ref(list,size,size,tmpreg,ref);
  1788. end;
  1789. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1790. var
  1791. tmpreg: tregister;
  1792. begin
  1793. case op of
  1794. OP_NOT,OP_NEG:
  1795. { handle it as "load ref,reg; op reg" }
  1796. begin
  1797. a_load_ref_reg(list,size,size,ref,reg);
  1798. a_op_reg_reg(list,op,size,reg,reg);
  1799. end;
  1800. else
  1801. begin
  1802. tmpreg:=getintregister(list,size);
  1803. a_load_ref_reg(list,size,size,ref,tmpreg);
  1804. a_op_reg_reg(list,op,size,tmpreg,reg);
  1805. end;
  1806. end;
  1807. end;
  1808. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  1809. var
  1810. tmpreg: tregister;
  1811. begin
  1812. tmpreg := cg.getintregister(list, opsize);
  1813. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  1814. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1815. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  1816. end;
  1817. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  1818. var
  1819. tmpreg: tregister;
  1820. begin
  1821. tmpreg := cg.getintregister(list, opsize);
  1822. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  1823. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1824. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  1825. end;
  1826. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  1827. begin
  1828. case loc.loc of
  1829. LOC_REGISTER, LOC_CREGISTER:
  1830. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1831. LOC_REFERENCE, LOC_CREFERENCE:
  1832. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1833. LOC_SUBSETREG, LOC_CSUBSETREG:
  1834. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  1835. LOC_SUBSETREF, LOC_CSUBSETREF:
  1836. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  1837. else
  1838. internalerror(200109061);
  1839. end;
  1840. end;
  1841. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1842. var
  1843. tmpreg: tregister;
  1844. begin
  1845. case loc.loc of
  1846. LOC_REGISTER,LOC_CREGISTER:
  1847. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1848. LOC_REFERENCE,LOC_CREFERENCE:
  1849. begin
  1850. tmpreg:=getintregister(list,loc.size);
  1851. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1852. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1853. end;
  1854. LOC_SUBSETREG, LOC_CSUBSETREG:
  1855. begin
  1856. tmpreg:=getintregister(list,loc.size);
  1857. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1858. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  1859. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1860. end;
  1861. LOC_SUBSETREF, LOC_CSUBSETREF:
  1862. begin
  1863. tmpreg:=getintregister(list,loc.size);
  1864. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  1865. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  1866. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  1867. end;
  1868. else
  1869. internalerror(200109061);
  1870. end;
  1871. end;
  1872. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  1873. a:aint;src,dst:Tregister);
  1874. begin
  1875. a_load_reg_reg(list,size,size,src,dst);
  1876. a_op_const_reg(list,op,size,a,dst);
  1877. end;
  1878. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  1879. size: tcgsize; src1, src2, dst: tregister);
  1880. var
  1881. tmpreg: tregister;
  1882. begin
  1883. if (dst<>src1) then
  1884. begin
  1885. a_load_reg_reg(list,size,size,src2,dst);
  1886. a_op_reg_reg(list,op,size,src1,dst);
  1887. end
  1888. else
  1889. begin
  1890. tmpreg:=getintregister(list,size);
  1891. a_load_reg_reg(list,size,size,src2,tmpreg);
  1892. a_op_reg_reg(list,op,size,src1,tmpreg);
  1893. a_load_reg_reg(list,size,size,tmpreg,dst);
  1894. end;
  1895. end;
  1896. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1897. begin
  1898. a_op_const_reg_reg(list,op,size,a,src,dst);
  1899. ovloc.loc:=LOC_VOID;
  1900. end;
  1901. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1902. begin
  1903. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  1904. ovloc.loc:=LOC_VOID;
  1905. end;
  1906. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  1907. l : tasmlabel);
  1908. var
  1909. tmpreg: tregister;
  1910. begin
  1911. tmpreg:=getintregister(list,size);
  1912. a_load_ref_reg(list,size,size,ref,tmpreg);
  1913. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1914. end;
  1915. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  1916. l : tasmlabel);
  1917. var
  1918. tmpreg : tregister;
  1919. begin
  1920. case loc.loc of
  1921. LOC_REGISTER,LOC_CREGISTER:
  1922. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1923. LOC_REFERENCE,LOC_CREFERENCE:
  1924. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1925. LOC_SUBSETREG, LOC_CSUBSETREG:
  1926. begin
  1927. tmpreg:=getintregister(list,size);
  1928. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  1929. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1930. end;
  1931. LOC_SUBSETREF, LOC_CSUBSETREF:
  1932. begin
  1933. tmpreg:=getintregister(list,size);
  1934. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  1935. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1936. end;
  1937. else
  1938. internalerror(200109061);
  1939. end;
  1940. end;
  1941. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1942. var
  1943. tmpreg: tregister;
  1944. begin
  1945. tmpreg:=getintregister(list,size);
  1946. a_load_ref_reg(list,size,size,ref,tmpreg);
  1947. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1948. end;
  1949. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1950. var
  1951. tmpreg: tregister;
  1952. begin
  1953. tmpreg:=getintregister(list,size);
  1954. a_load_ref_reg(list,size,size,ref,tmpreg);
  1955. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1956. end;
  1957. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  1958. begin
  1959. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  1960. end;
  1961. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1962. begin
  1963. case loc.loc of
  1964. LOC_REGISTER,
  1965. LOC_CREGISTER:
  1966. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1967. LOC_REFERENCE,
  1968. LOC_CREFERENCE :
  1969. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1970. LOC_CONSTANT:
  1971. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1972. LOC_SUBSETREG,
  1973. LOC_CSUBSETREG:
  1974. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  1975. LOC_SUBSETREF,
  1976. LOC_CSUBSETREF:
  1977. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  1978. else
  1979. internalerror(200203231);
  1980. end;
  1981. end;
  1982. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  1983. var
  1984. tmpreg: tregister;
  1985. begin
  1986. tmpreg:=getintregister(list, cmpsize);
  1987. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  1988. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  1989. end;
  1990. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  1991. var
  1992. tmpreg: tregister;
  1993. begin
  1994. tmpreg:=getintregister(list, cmpsize);
  1995. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  1996. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  1997. end;
  1998. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1999. l : tasmlabel);
  2000. var
  2001. tmpreg: tregister;
  2002. begin
  2003. case loc.loc of
  2004. LOC_REGISTER,LOC_CREGISTER:
  2005. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2006. LOC_REFERENCE,LOC_CREFERENCE:
  2007. begin
  2008. tmpreg:=getintregister(list,size);
  2009. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2010. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2011. end;
  2012. LOC_SUBSETREG, LOC_CSUBSETREG:
  2013. begin
  2014. tmpreg:=getintregister(list, size);
  2015. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2016. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2017. end;
  2018. LOC_SUBSETREF, LOC_CSUBSETREF:
  2019. begin
  2020. tmpreg:=getintregister(list, size);
  2021. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2022. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2023. end;
  2024. else
  2025. internalerror(200109061);
  2026. end;
  2027. end;
  2028. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2029. begin
  2030. case loc.loc of
  2031. LOC_MMREGISTER,LOC_CMMREGISTER:
  2032. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2033. LOC_REFERENCE,LOC_CREFERENCE:
  2034. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2035. else
  2036. internalerror(200310121);
  2037. end;
  2038. end;
  2039. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2040. begin
  2041. case loc.loc of
  2042. LOC_MMREGISTER,LOC_CMMREGISTER:
  2043. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2044. LOC_REFERENCE,LOC_CREFERENCE:
  2045. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2046. else
  2047. internalerror(200310122);
  2048. end;
  2049. end;
  2050. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2051. var
  2052. href : treference;
  2053. begin
  2054. cgpara.check_simple_location;
  2055. case cgpara.location^.loc of
  2056. LOC_MMREGISTER,LOC_CMMREGISTER:
  2057. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2058. LOC_REFERENCE,LOC_CREFERENCE:
  2059. begin
  2060. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2061. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2062. end
  2063. else
  2064. internalerror(200310123);
  2065. end;
  2066. end;
  2067. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2068. var
  2069. hr : tregister;
  2070. hs : tmmshuffle;
  2071. begin
  2072. cgpara.check_simple_location;
  2073. hr:=getmmregister(list,cgpara.location^.size);
  2074. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2075. if realshuffle(shuffle) then
  2076. begin
  2077. hs:=shuffle^;
  2078. removeshuffles(hs);
  2079. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2080. end
  2081. else
  2082. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2083. end;
  2084. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2085. begin
  2086. case loc.loc of
  2087. LOC_MMREGISTER,LOC_CMMREGISTER:
  2088. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2089. LOC_REFERENCE,LOC_CREFERENCE:
  2090. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2091. else
  2092. internalerror(200310123);
  2093. end;
  2094. end;
  2095. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2096. var
  2097. hr : tregister;
  2098. hs : tmmshuffle;
  2099. begin
  2100. hr:=getmmregister(list,size);
  2101. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2102. if realshuffle(shuffle) then
  2103. begin
  2104. hs:=shuffle^;
  2105. removeshuffles(hs);
  2106. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2107. end
  2108. else
  2109. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2110. end;
  2111. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2112. var
  2113. hr : tregister;
  2114. hs : tmmshuffle;
  2115. begin
  2116. hr:=getmmregister(list,size);
  2117. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2118. if realshuffle(shuffle) then
  2119. begin
  2120. hs:=shuffle^;
  2121. removeshuffles(hs);
  2122. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2123. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2124. end
  2125. else
  2126. begin
  2127. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2128. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2129. end;
  2130. end;
  2131. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2132. begin
  2133. case loc.loc of
  2134. LOC_CMMREGISTER,LOC_MMREGISTER:
  2135. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2136. LOC_CREFERENCE,LOC_REFERENCE:
  2137. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2138. else
  2139. internalerror(200312232);
  2140. end;
  2141. end;
  2142. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2143. begin
  2144. g_concatcopy(list,source,dest,len);
  2145. end;
  2146. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2147. var
  2148. cgpara1,cgpara2,cgpara3 : TCGPara;
  2149. begin
  2150. cgpara1.init;
  2151. cgpara2.init;
  2152. cgpara3.init;
  2153. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2154. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2155. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2156. paramanager.allocparaloc(list,cgpara3);
  2157. a_paramaddr_ref(list,dest,cgpara3);
  2158. paramanager.allocparaloc(list,cgpara2);
  2159. a_paramaddr_ref(list,source,cgpara2);
  2160. paramanager.allocparaloc(list,cgpara1);
  2161. a_param_const(list,OS_INT,len,cgpara1);
  2162. paramanager.freeparaloc(list,cgpara3);
  2163. paramanager.freeparaloc(list,cgpara2);
  2164. paramanager.freeparaloc(list,cgpara1);
  2165. allocallcpuregisters(list);
  2166. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  2167. deallocallcpuregisters(list);
  2168. cgpara3.done;
  2169. cgpara2.done;
  2170. cgpara1.done;
  2171. end;
  2172. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2173. var
  2174. cgpara1,cgpara2 : TCGPara;
  2175. begin
  2176. cgpara1.init;
  2177. cgpara2.init;
  2178. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2179. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2180. paramanager.allocparaloc(list,cgpara2);
  2181. a_paramaddr_ref(list,dest,cgpara2);
  2182. paramanager.allocparaloc(list,cgpara1);
  2183. a_paramaddr_ref(list,source,cgpara1);
  2184. paramanager.freeparaloc(list,cgpara2);
  2185. paramanager.freeparaloc(list,cgpara1);
  2186. allocallcpuregisters(list);
  2187. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE');
  2188. deallocallcpuregisters(list);
  2189. cgpara2.done;
  2190. cgpara1.done;
  2191. end;
  2192. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2193. var
  2194. href : treference;
  2195. incrfunc : string;
  2196. cgpara1,cgpara2 : TCGPara;
  2197. begin
  2198. cgpara1.init;
  2199. cgpara2.init;
  2200. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2201. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2202. if is_interfacecom(t) then
  2203. incrfunc:='FPC_INTF_INCR_REF'
  2204. else if is_ansistring(t) then
  2205. incrfunc:='FPC_ANSISTR_INCR_REF'
  2206. else if is_widestring(t) then
  2207. incrfunc:='FPC_WIDESTR_INCR_REF'
  2208. else if is_dynamic_array(t) then
  2209. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2210. else
  2211. incrfunc:='';
  2212. { call the special incr function or the generic addref }
  2213. if incrfunc<>'' then
  2214. begin
  2215. paramanager.allocparaloc(list,cgpara1);
  2216. { widestrings aren't ref. counted on all platforms so we need the address
  2217. to create a real copy }
  2218. if is_widestring(t) then
  2219. a_paramaddr_ref(list,ref,cgpara1)
  2220. else
  2221. { these functions get the pointer by value }
  2222. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2223. paramanager.freeparaloc(list,cgpara1);
  2224. allocallcpuregisters(list);
  2225. a_call_name(list,incrfunc);
  2226. deallocallcpuregisters(list);
  2227. end
  2228. else
  2229. begin
  2230. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2231. paramanager.allocparaloc(list,cgpara2);
  2232. a_paramaddr_ref(list,href,cgpara2);
  2233. paramanager.allocparaloc(list,cgpara1);
  2234. a_paramaddr_ref(list,ref,cgpara1);
  2235. paramanager.freeparaloc(list,cgpara1);
  2236. paramanager.freeparaloc(list,cgpara2);
  2237. allocallcpuregisters(list);
  2238. a_call_name(list,'FPC_ADDREF');
  2239. deallocallcpuregisters(list);
  2240. end;
  2241. cgpara2.done;
  2242. cgpara1.done;
  2243. end;
  2244. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2245. var
  2246. href : treference;
  2247. decrfunc : string;
  2248. needrtti : boolean;
  2249. cgpara1,cgpara2 : TCGPara;
  2250. tempreg1,tempreg2 : TRegister;
  2251. begin
  2252. cgpara1.init;
  2253. cgpara2.init;
  2254. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2255. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2256. needrtti:=false;
  2257. if is_interfacecom(t) then
  2258. decrfunc:='FPC_INTF_DECR_REF'
  2259. else if is_ansistring(t) then
  2260. decrfunc:='FPC_ANSISTR_DECR_REF'
  2261. else if is_widestring(t) then
  2262. decrfunc:='FPC_WIDESTR_DECR_REF'
  2263. else if is_dynamic_array(t) then
  2264. begin
  2265. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2266. needrtti:=true;
  2267. end
  2268. else
  2269. decrfunc:='';
  2270. { call the special decr function or the generic decref }
  2271. if decrfunc<>'' then
  2272. begin
  2273. if needrtti then
  2274. begin
  2275. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2276. tempreg2:=getaddressregister(list);
  2277. a_loadaddr_ref_reg(list,href,tempreg2);
  2278. end;
  2279. tempreg1:=getaddressregister(list);
  2280. a_loadaddr_ref_reg(list,ref,tempreg1);
  2281. if needrtti then
  2282. begin
  2283. paramanager.allocparaloc(list,cgpara2);
  2284. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2285. paramanager.freeparaloc(list,cgpara2);
  2286. end;
  2287. paramanager.allocparaloc(list,cgpara1);
  2288. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2289. paramanager.freeparaloc(list,cgpara1);
  2290. allocallcpuregisters(list);
  2291. a_call_name(list,decrfunc);
  2292. deallocallcpuregisters(list);
  2293. end
  2294. else
  2295. begin
  2296. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2297. paramanager.allocparaloc(list,cgpara2);
  2298. a_paramaddr_ref(list,href,cgpara2);
  2299. paramanager.allocparaloc(list,cgpara1);
  2300. a_paramaddr_ref(list,ref,cgpara1);
  2301. paramanager.freeparaloc(list,cgpara1);
  2302. paramanager.freeparaloc(list,cgpara2);
  2303. allocallcpuregisters(list);
  2304. a_call_name(list,'FPC_DECREF');
  2305. deallocallcpuregisters(list);
  2306. end;
  2307. cgpara2.done;
  2308. cgpara1.done;
  2309. end;
  2310. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2311. var
  2312. href : treference;
  2313. cgpara1,cgpara2 : TCGPara;
  2314. begin
  2315. cgpara1.init;
  2316. cgpara2.init;
  2317. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2318. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2319. if is_ansistring(t) or
  2320. is_widestring(t) or
  2321. is_interfacecom(t) or
  2322. is_dynamic_array(t) then
  2323. a_load_const_ref(list,OS_ADDR,0,ref)
  2324. else
  2325. begin
  2326. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2327. paramanager.allocparaloc(list,cgpara2);
  2328. a_paramaddr_ref(list,href,cgpara2);
  2329. paramanager.allocparaloc(list,cgpara1);
  2330. a_paramaddr_ref(list,ref,cgpara1);
  2331. paramanager.freeparaloc(list,cgpara1);
  2332. paramanager.freeparaloc(list,cgpara2);
  2333. allocallcpuregisters(list);
  2334. a_call_name(list,'FPC_INITIALIZE');
  2335. deallocallcpuregisters(list);
  2336. end;
  2337. cgpara1.done;
  2338. cgpara2.done;
  2339. end;
  2340. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2341. var
  2342. href : treference;
  2343. cgpara1,cgpara2 : TCGPara;
  2344. begin
  2345. cgpara1.init;
  2346. cgpara2.init;
  2347. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2348. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2349. if is_ansistring(t) or
  2350. is_widestring(t) or
  2351. is_interfacecom(t) then
  2352. begin
  2353. g_decrrefcount(list,t,ref);
  2354. a_load_const_ref(list,OS_ADDR,0,ref);
  2355. end
  2356. else
  2357. begin
  2358. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2359. paramanager.allocparaloc(list,cgpara2);
  2360. a_paramaddr_ref(list,href,cgpara2);
  2361. paramanager.allocparaloc(list,cgpara1);
  2362. a_paramaddr_ref(list,ref,cgpara1);
  2363. paramanager.freeparaloc(list,cgpara1);
  2364. paramanager.freeparaloc(list,cgpara2);
  2365. allocallcpuregisters(list);
  2366. a_call_name(list,'FPC_FINALIZE');
  2367. deallocallcpuregisters(list);
  2368. end;
  2369. cgpara1.done;
  2370. cgpara2.done;
  2371. end;
  2372. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2373. { generate range checking code for the value at location p. The type }
  2374. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2375. { is the original type used at that location. When both defs are equal }
  2376. { the check is also insert (needed for succ,pref,inc,dec) }
  2377. const
  2378. aintmax=high(aint);
  2379. var
  2380. neglabel : tasmlabel;
  2381. hreg : tregister;
  2382. lto,hto,
  2383. lfrom,hfrom : TConstExprInt;
  2384. fromsize, tosize: cardinal;
  2385. from_signed, to_signed: boolean;
  2386. begin
  2387. { range checking on and range checkable value? }
  2388. if not(cs_check_range in current_settings.localswitches) or
  2389. not(fromdef.typ in [orddef,enumdef]) then
  2390. exit;
  2391. {$ifndef cpu64bit}
  2392. { handle 64bit rangechecks separate for 32bit processors }
  2393. if is_64bit(fromdef) or is_64bit(todef) then
  2394. begin
  2395. cg64.g_rangecheck64(list,l,fromdef,todef);
  2396. exit;
  2397. end;
  2398. {$endif cpu64bit}
  2399. { only check when assigning to scalar, subranges are different, }
  2400. { when todef=fromdef then the check is always generated }
  2401. getrange(fromdef,lfrom,hfrom);
  2402. getrange(todef,lto,hto);
  2403. from_signed := is_signed(fromdef);
  2404. to_signed := is_signed(todef);
  2405. { check the rangedef of the array, not the array itself }
  2406. { (only change now, since getrange needs the arraydef) }
  2407. if (todef.typ = arraydef) then
  2408. todef := tarraydef(todef).rangedef;
  2409. { no range check if from and to are equal and are both longint/dword }
  2410. { no range check if from and to are equal and are both longint/dword }
  2411. { (if we have a 32bit processor) or int64/qword, since such }
  2412. { operations can at most cause overflows (JM) }
  2413. { Note that these checks are mostly processor independent, they only }
  2414. { have to be changed once we introduce 64bit subrange types }
  2415. {$ifdef cpu64bit}
  2416. if (fromdef = todef) and
  2417. (fromdef.typ=orddef) and
  2418. (((((torddef(fromdef).ordtype = s64bit) and
  2419. (lfrom = low(int64)) and
  2420. (hfrom = high(int64))) or
  2421. ((torddef(fromdef).ordtype = u64bit) and
  2422. (lfrom = low(qword)) and
  2423. (hfrom = high(qword))) or
  2424. ((torddef(fromdef).ordtype = scurrency) and
  2425. (lfrom = low(int64)) and
  2426. (hfrom = high(int64)))))) then
  2427. exit;
  2428. {$else cpu64bit}
  2429. if (fromdef = todef) and
  2430. (fromdef.typ=orddef) and
  2431. (((((torddef(fromdef).ordtype = s32bit) and
  2432. (lfrom = low(longint)) and
  2433. (hfrom = high(longint))) or
  2434. ((torddef(fromdef).ordtype = u32bit) and
  2435. (lfrom = low(cardinal)) and
  2436. (hfrom = high(cardinal)))))) then
  2437. exit;
  2438. {$endif cpu64bit}
  2439. { optimize some range checks away in safe cases }
  2440. fromsize := fromdef.size;
  2441. tosize := todef.size;
  2442. if ((from_signed = to_signed) or
  2443. (not from_signed)) and
  2444. (lto<=lfrom) and (hto>=hfrom) and
  2445. (fromsize <= tosize) then
  2446. begin
  2447. { if fromsize < tosize, and both have the same signed-ness or }
  2448. { fromdef is unsigned, then all bit patterns from fromdef are }
  2449. { valid for todef as well }
  2450. if (fromsize < tosize) then
  2451. exit;
  2452. if (fromsize = tosize) and
  2453. (from_signed = to_signed) then
  2454. { only optimize away if all bit patterns which fit in fromsize }
  2455. { are valid for the todef }
  2456. begin
  2457. {$ifopt Q+}
  2458. {$define overflowon}
  2459. {$Q-}
  2460. {$endif}
  2461. if to_signed then
  2462. begin
  2463. { calculation of the low/high ranges must not overflow 64 bit
  2464. otherwise we end up comparing with zero for 64 bit data types on
  2465. 64 bit processors }
  2466. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2467. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2468. exit
  2469. end
  2470. else
  2471. begin
  2472. { calculation of the low/high ranges must not overflow 64 bit
  2473. otherwise we end up having all zeros for 64 bit data types on
  2474. 64 bit processors }
  2475. if (lto = 0) and
  2476. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2477. exit
  2478. end;
  2479. {$ifdef overflowon}
  2480. {$Q+}
  2481. {$undef overflowon}
  2482. {$endif}
  2483. end
  2484. end;
  2485. { generate the rangecheck code for the def where we are going to }
  2486. { store the result }
  2487. { use the trick that }
  2488. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2489. { To be able to do that, we have to make sure however that either }
  2490. { fromdef and todef are both signed or unsigned, or that we leave }
  2491. { the parts < 0 and > maxlongint out }
  2492. if from_signed xor to_signed then
  2493. begin
  2494. if from_signed then
  2495. { from is signed, to is unsigned }
  2496. begin
  2497. { if high(from) < 0 -> always range error }
  2498. if (hfrom < 0) or
  2499. { if low(to) > maxlongint also range error }
  2500. (lto > aintmax) then
  2501. begin
  2502. a_call_name(list,'FPC_RANGEERROR');
  2503. exit
  2504. end;
  2505. { from is signed and to is unsigned -> when looking at to }
  2506. { as an signed value, it must be < maxaint (otherwise }
  2507. { it will become negative, which is invalid since "to" is unsigned) }
  2508. if hto > aintmax then
  2509. hto := aintmax;
  2510. end
  2511. else
  2512. { from is unsigned, to is signed }
  2513. begin
  2514. if (lfrom > aintmax) or
  2515. (hto < 0) then
  2516. begin
  2517. a_call_name(list,'FPC_RANGEERROR');
  2518. exit
  2519. end;
  2520. { from is unsigned and to is signed -> when looking at to }
  2521. { as an unsigned value, it must be >= 0 (since negative }
  2522. { values are the same as values > maxlongint) }
  2523. if lto < 0 then
  2524. lto := 0;
  2525. end;
  2526. end;
  2527. hreg:=getintregister(list,OS_INT);
  2528. a_load_loc_reg(list,OS_INT,l,hreg);
  2529. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  2530. current_asmdata.getjumplabel(neglabel);
  2531. {
  2532. if from_signed then
  2533. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  2534. else
  2535. }
  2536. {$ifdef cpu64bit}
  2537. if qword(hto-lto)>qword(aintmax) then
  2538. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  2539. else
  2540. {$endif cpu64bit}
  2541. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  2542. a_call_name(list,'FPC_RANGEERROR');
  2543. a_label(list,neglabel);
  2544. end;
  2545. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  2546. begin
  2547. g_overflowCheck(list,loc,def);
  2548. end;
  2549. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  2550. var
  2551. tmpreg : tregister;
  2552. begin
  2553. tmpreg:=getintregister(list,size);
  2554. g_flags2reg(list,size,f,tmpreg);
  2555. a_load_reg_ref(list,size,size,tmpreg,ref);
  2556. end;
  2557. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  2558. var
  2559. OKLabel : tasmlabel;
  2560. cgpara1 : TCGPara;
  2561. begin
  2562. if (cs_check_object in current_settings.localswitches) or
  2563. (cs_check_range in current_settings.localswitches) then
  2564. begin
  2565. current_asmdata.getjumplabel(oklabel);
  2566. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  2567. cgpara1.init;
  2568. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2569. paramanager.allocparaloc(list,cgpara1);
  2570. a_param_const(list,OS_INT,210,cgpara1);
  2571. paramanager.freeparaloc(list,cgpara1);
  2572. a_call_name(list,'FPC_HANDLEERROR');
  2573. a_label(list,oklabel);
  2574. cgpara1.done;
  2575. end;
  2576. end;
  2577. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  2578. var
  2579. hrefvmt : treference;
  2580. cgpara1,cgpara2 : TCGPara;
  2581. begin
  2582. cgpara1.init;
  2583. cgpara2.init;
  2584. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2585. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2586. if (cs_check_object in current_settings.localswitches) then
  2587. begin
  2588. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  2589. paramanager.allocparaloc(list,cgpara2);
  2590. a_paramaddr_ref(list,hrefvmt,cgpara2);
  2591. paramanager.allocparaloc(list,cgpara1);
  2592. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2593. paramanager.freeparaloc(list,cgpara1);
  2594. paramanager.freeparaloc(list,cgpara2);
  2595. allocallcpuregisters(list);
  2596. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  2597. deallocallcpuregisters(list);
  2598. end
  2599. else
  2600. if (cs_check_range in current_settings.localswitches) then
  2601. begin
  2602. paramanager.allocparaloc(list,cgpara1);
  2603. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2604. paramanager.freeparaloc(list,cgpara1);
  2605. allocallcpuregisters(list);
  2606. a_call_name(list,'FPC_CHECK_OBJECT');
  2607. deallocallcpuregisters(list);
  2608. end;
  2609. cgpara1.done;
  2610. cgpara2.done;
  2611. end;
  2612. {*****************************************************************************
  2613. Entry/Exit Code Functions
  2614. *****************************************************************************}
  2615. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  2616. var
  2617. sizereg,sourcereg,lenreg : tregister;
  2618. cgpara1,cgpara2,cgpara3 : TCGPara;
  2619. begin
  2620. { because some abis don't support dynamic stack allocation properly
  2621. open array value parameters are copied onto the heap
  2622. }
  2623. { calculate necessary memory }
  2624. { read/write operations on one register make the life of the register allocator hard }
  2625. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  2626. begin
  2627. lenreg:=getintregister(list,OS_INT);
  2628. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  2629. end
  2630. else
  2631. lenreg:=lenloc.register;
  2632. sizereg:=getintregister(list,OS_INT);
  2633. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  2634. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  2635. { load source }
  2636. sourcereg:=getaddressregister(list);
  2637. a_loadaddr_ref_reg(list,ref,sourcereg);
  2638. { do getmem call }
  2639. cgpara1.init;
  2640. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2641. paramanager.allocparaloc(list,cgpara1);
  2642. a_param_reg(list,OS_INT,sizereg,cgpara1);
  2643. paramanager.freeparaloc(list,cgpara1);
  2644. allocallcpuregisters(list);
  2645. a_call_name(list,'FPC_GETMEM');
  2646. deallocallcpuregisters(list);
  2647. cgpara1.done;
  2648. { return the new address }
  2649. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  2650. { do move call }
  2651. cgpara1.init;
  2652. cgpara2.init;
  2653. cgpara3.init;
  2654. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2655. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2656. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2657. { load size }
  2658. paramanager.allocparaloc(list,cgpara3);
  2659. a_param_reg(list,OS_INT,sizereg,cgpara3);
  2660. { load destination }
  2661. paramanager.allocparaloc(list,cgpara2);
  2662. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  2663. { load source }
  2664. paramanager.allocparaloc(list,cgpara1);
  2665. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  2666. paramanager.freeparaloc(list,cgpara3);
  2667. paramanager.freeparaloc(list,cgpara2);
  2668. paramanager.freeparaloc(list,cgpara1);
  2669. allocallcpuregisters(list);
  2670. a_call_name(list,'FPC_MOVE');
  2671. deallocallcpuregisters(list);
  2672. cgpara3.done;
  2673. cgpara2.done;
  2674. cgpara1.done;
  2675. end;
  2676. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  2677. var
  2678. cgpara1 : TCGPara;
  2679. begin
  2680. { do move call }
  2681. cgpara1.init;
  2682. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2683. { load source }
  2684. paramanager.allocparaloc(list,cgpara1);
  2685. a_param_loc(list,l,cgpara1);
  2686. paramanager.freeparaloc(list,cgpara1);
  2687. allocallcpuregisters(list);
  2688. a_call_name(list,'FPC_FREEMEM');
  2689. deallocallcpuregisters(list);
  2690. cgpara1.done;
  2691. end;
  2692. procedure tcg.g_save_standard_registers(list:TAsmList);
  2693. var
  2694. href : treference;
  2695. size : longint;
  2696. r : integer;
  2697. begin
  2698. { Get temp }
  2699. size:=0;
  2700. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2701. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2702. inc(size,sizeof(aint));
  2703. if size>0 then
  2704. begin
  2705. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  2706. { Copy registers to temp }
  2707. href:=current_procinfo.save_regs_ref;
  2708. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2709. begin
  2710. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2711. begin
  2712. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  2713. inc(href.offset,sizeof(aint));
  2714. end;
  2715. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  2716. end;
  2717. end;
  2718. end;
  2719. procedure tcg.g_restore_standard_registers(list:TAsmList);
  2720. var
  2721. href : treference;
  2722. r : integer;
  2723. hreg : tregister;
  2724. begin
  2725. { Copy registers from temp }
  2726. href:=current_procinfo.save_regs_ref;
  2727. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2728. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2729. begin
  2730. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  2731. { Allocate register so the optimizer does not remove the load }
  2732. a_reg_alloc(list,hreg);
  2733. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  2734. inc(href.offset,sizeof(aint));
  2735. end;
  2736. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  2737. end;
  2738. procedure tcg.g_profilecode(list : TAsmList);
  2739. begin
  2740. end;
  2741. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  2742. begin
  2743. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  2744. end;
  2745. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  2746. begin
  2747. a_load_const_ref(list, OS_INT, a, href);
  2748. end;
  2749. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  2750. begin
  2751. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  2752. end;
  2753. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  2754. var
  2755. hsym : tsym;
  2756. href : treference;
  2757. paraloc : tcgparalocation;
  2758. begin
  2759. { calculate the parameter info for the procdef }
  2760. if not procdef.has_paraloc_info then
  2761. begin
  2762. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  2763. procdef.has_paraloc_info:=true;
  2764. end;
  2765. hsym:=tsym(procdef.parast.Find('self'));
  2766. if not(assigned(hsym) and
  2767. (hsym.typ=paravarsym)) then
  2768. internalerror(200305251);
  2769. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  2770. case paraloc.loc of
  2771. LOC_REGISTER:
  2772. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  2773. LOC_REFERENCE:
  2774. begin
  2775. { offset in the wrapper needs to be adjusted for the stored
  2776. return address }
  2777. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  2778. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  2779. end
  2780. else
  2781. internalerror(200309189);
  2782. end;
  2783. end;
  2784. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  2785. begin
  2786. a_call_name(list,s);
  2787. end;
  2788. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  2789. var
  2790. l: tasmsymbol;
  2791. ref: treference;
  2792. begin
  2793. result := NR_NO;
  2794. case target_info.system of
  2795. system_powerpc_darwin,
  2796. system_i386_darwin:
  2797. begin
  2798. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  2799. if not(assigned(l)) then
  2800. begin
  2801. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_COMMON,AT_DATA);
  2802. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  2803. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  2804. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  2805. end;
  2806. result := cg.getaddressregister(list);
  2807. reference_reset_symbol(ref,l,0);
  2808. { ref.base:=current_procinfo.got;
  2809. ref.relsymbol:=current_procinfo.CurrGOTLabel;}
  2810. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  2811. end;
  2812. end;
  2813. end;
  2814. {*****************************************************************************
  2815. TCG64
  2816. *****************************************************************************}
  2817. {$ifndef cpu64bit}
  2818. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  2819. begin
  2820. a_load64_reg_reg(list,regsrc,regdst);
  2821. a_op64_const_reg(list,op,size,value,regdst);
  2822. end;
  2823. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  2824. var
  2825. tmpreg64 : tregister64;
  2826. begin
  2827. { when src1=dst then we need to first create a temp to prevent
  2828. overwriting src1 with src2 }
  2829. if (regsrc1.reghi=regdst.reghi) or
  2830. (regsrc1.reglo=regdst.reghi) or
  2831. (regsrc1.reghi=regdst.reglo) or
  2832. (regsrc1.reglo=regdst.reglo) then
  2833. begin
  2834. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2835. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2836. a_load64_reg_reg(list,regsrc2,tmpreg64);
  2837. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  2838. a_load64_reg_reg(list,tmpreg64,regdst);
  2839. end
  2840. else
  2841. begin
  2842. a_load64_reg_reg(list,regsrc2,regdst);
  2843. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  2844. end;
  2845. end;
  2846. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  2847. var
  2848. tmpreg64 : tregister64;
  2849. begin
  2850. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2851. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2852. a_load64_subsetref_reg(list,sref,tmpreg64);
  2853. a_op64_const_reg(list,op,size,a,tmpreg64);
  2854. a_load64_reg_subsetref(list,tmpreg64,sref);
  2855. end;
  2856. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  2857. var
  2858. tmpreg64 : tregister64;
  2859. begin
  2860. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2861. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2862. a_load64_subsetref_reg(list,sref,tmpreg64);
  2863. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  2864. a_load64_reg_subsetref(list,tmpreg64,sref);
  2865. end;
  2866. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  2867. var
  2868. tmpreg64 : tregister64;
  2869. begin
  2870. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2871. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2872. a_load64_subsetref_reg(list,sref,tmpreg64);
  2873. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  2874. a_load64_reg_subsetref(list,tmpreg64,sref);
  2875. end;
  2876. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  2877. var
  2878. tmpreg64 : tregister64;
  2879. begin
  2880. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2881. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2882. a_load64_subsetref_reg(list,ssref,tmpreg64);
  2883. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  2884. end;
  2885. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2886. begin
  2887. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  2888. ovloc.loc:=LOC_VOID;
  2889. end;
  2890. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2891. begin
  2892. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  2893. ovloc.loc:=LOC_VOID;
  2894. end;
  2895. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  2896. begin
  2897. case l.loc of
  2898. LOC_REFERENCE, LOC_CREFERENCE:
  2899. a_load64_ref_subsetref(list,l.reference,sref);
  2900. LOC_REGISTER,LOC_CREGISTER:
  2901. a_load64_reg_subsetref(list,l.register64,sref);
  2902. LOC_CONSTANT :
  2903. a_load64_const_subsetref(list,l.value64,sref);
  2904. LOC_SUBSETREF,LOC_CSUBSETREF:
  2905. a_load64_subsetref_subsetref(list,l.sref,sref);
  2906. else
  2907. internalerror(2006082210);
  2908. end;
  2909. end;
  2910. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  2911. begin
  2912. case l.loc of
  2913. LOC_REFERENCE, LOC_CREFERENCE:
  2914. a_load64_subsetref_ref(list,sref,l.reference);
  2915. LOC_REGISTER,LOC_CREGISTER:
  2916. a_load64_subsetref_reg(list,sref,l.register64);
  2917. LOC_SUBSETREF,LOC_CSUBSETREF:
  2918. a_load64_subsetref_subsetref(list,sref,l.sref);
  2919. else
  2920. internalerror(2006082211);
  2921. end;
  2922. end;
  2923. {$endif cpu64bit}
  2924. initialization
  2925. ;
  2926. finalization
  2927. cg.free;
  2928. {$ifndef cpu64bit}
  2929. cg64.free;
  2930. {$endif cpu64bit}
  2931. end.