rax86.pas 22 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
  4. Handles the common x86 assembler reader routines
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {
  19. Contains the common x86 (i386 and x86-64) assembler reader routines.
  20. }
  21. unit rax86;
  22. {$i fpcdefs.inc}
  23. interface
  24. uses
  25. aasmbase,aasmtai,aasmcpu,
  26. cpubase,rautils,cclasses;
  27. { Parser helpers }
  28. function is_prefix(t:tasmop):boolean;
  29. function is_override(t:tasmop):boolean;
  30. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  31. Function CheckOverride(overrideop,op:tasmop): Boolean;
  32. Procedure FWaitWarning;
  33. type
  34. T386Operand=class(TOperand)
  35. Procedure SetCorrectSize(opcode:tasmop);override;
  36. end;
  37. T386Instruction=class(TInstruction)
  38. OpOrder : TOperandOrder;
  39. { Operand sizes }
  40. procedure AddReferenceSizes;
  41. procedure SetInstructionOpsize;
  42. procedure CheckOperandSizes;
  43. procedure CheckNonCommutativeOpcodes;
  44. procedure SwapOperands;
  45. { opcode adding }
  46. procedure ConcatInstruction(p : taasmoutput);override;
  47. end;
  48. tstr2opentry = class(Tnamedindexitem)
  49. op: TAsmOp;
  50. end;
  51. const
  52. AsmPrefixes = 6;
  53. AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
  54. A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
  55. );
  56. AsmOverrides = 6;
  57. AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
  58. A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
  59. );
  60. CondAsmOps=3;
  61. CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
  62. A_CMOVcc, A_Jcc, A_SETcc
  63. );
  64. CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
  65. 'CMOV','J','SET'
  66. );
  67. implementation
  68. uses
  69. globtype,globals,systems,verbose,
  70. cpuinfo,
  71. itx86att;
  72. {$define ATTOP}
  73. {$define INTELOP}
  74. {$ifdef NORA386INT}
  75. {$ifdef NOAG386NSM}
  76. {$ifdef NOAG386INT}
  77. {$undef INTELOP}
  78. {$endif}
  79. {$endif}
  80. {$endif}
  81. {$ifdef NORA386ATT}
  82. {$ifdef NOAG386ATT}
  83. {$undef ATTOP}
  84. {$endif}
  85. {$endif}
  86. {*****************************************************************************
  87. Parser Helpers
  88. *****************************************************************************}
  89. function is_prefix(t:tasmop):boolean;
  90. var
  91. i : longint;
  92. Begin
  93. is_prefix:=false;
  94. for i:=1 to AsmPrefixes do
  95. if t=AsmPrefix[i-1] then
  96. begin
  97. is_prefix:=true;
  98. exit;
  99. end;
  100. end;
  101. function is_override(t:tasmop):boolean;
  102. var
  103. i : longint;
  104. Begin
  105. is_override:=false;
  106. for i:=1 to AsmOverrides do
  107. if t=AsmOverride[i-1] then
  108. begin
  109. is_override:=true;
  110. exit;
  111. end;
  112. end;
  113. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  114. { Checks if the prefix is valid with the following opcode }
  115. { return false if not, otherwise true }
  116. Begin
  117. CheckPrefix := TRUE;
  118. (* Case prefix of
  119. A_REP,A_REPNE,A_REPE:
  120. Case opcode Of
  121. A_SCASB,A_SCASW,A_SCASD,
  122. A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
  123. Else
  124. Begin
  125. CheckPrefix := FALSE;
  126. exit;
  127. end;
  128. end; { case }
  129. A_LOCK:
  130. Case opcode Of
  131. A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
  132. A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
  133. Else
  134. Begin
  135. CheckPrefix := FALSE;
  136. Exit;
  137. end;
  138. end; { case }
  139. A_NONE: exit; { no prefix here }
  140. else
  141. CheckPrefix := FALSE;
  142. end; { end case } *)
  143. end;
  144. Function CheckOverride(overrideop,op:tasmop): Boolean;
  145. { Check if the override is valid, and if so then }
  146. { update the instr variable accordingly. }
  147. Begin
  148. CheckOverride := true;
  149. { Case instr.getinstruction of
  150. A_MOVS,A_XLAT,A_CMPS:
  151. Begin
  152. CheckOverride := TRUE;
  153. Message(assem_e_segment_override_not_supported);
  154. end
  155. end }
  156. end;
  157. Procedure FWaitWarning;
  158. begin
  159. if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in aktmoduleswitches) then
  160. Message(asmr_w_fwait_emu_prob);
  161. end;
  162. {*****************************************************************************
  163. T386Operand
  164. *****************************************************************************}
  165. Procedure T386Operand.SetCorrectSize(opcode:tasmop);
  166. begin
  167. if gas_needsuffix[opcode]=attsufFPU then
  168. begin
  169. case size of
  170. S_L : size:=S_FS;
  171. S_IQ : size:=S_FL;
  172. end;
  173. end
  174. else if gas_needsuffix[opcode]=attsufFPUint then
  175. begin
  176. case size of
  177. S_W : size:=S_IS;
  178. S_L : size:=S_IL;
  179. end;
  180. end;
  181. end;
  182. {*****************************************************************************
  183. T386Instruction
  184. *****************************************************************************}
  185. procedure T386Instruction.SwapOperands;
  186. begin
  187. Inherited SwapOperands;
  188. { mark the correct order }
  189. if OpOrder=op_intel then
  190. OpOrder:=op_att
  191. else
  192. OpOrder:=op_intel;
  193. end;
  194. procedure T386Instruction.AddReferenceSizes;
  195. { this will add the sizes for references like [esi] which do not
  196. have the size set yet, it will take only the size if the other
  197. operand is a register }
  198. var
  199. operand2,i : longint;
  200. s : tasmsymbol;
  201. so : longint;
  202. begin
  203. for i:=1to ops do
  204. begin
  205. operands[i].SetCorrectSize(opcode);
  206. if (operands[i].size=S_NO) then
  207. begin
  208. case operands[i].Opr.Typ of
  209. OPR_REFERENCE :
  210. begin
  211. if i=2 then
  212. operand2:=1
  213. else
  214. operand2:=2;
  215. if operand2<ops then
  216. begin
  217. { Only allow register as operand to take the size from }
  218. if operands[operand2].opr.typ=OPR_REGISTER then
  219. begin
  220. if ((opcode<>A_MOVD) and
  221. (opcode<>A_CVTSI2SS)) then
  222. operands[i].size:=operands[operand2].size;
  223. end
  224. else
  225. begin
  226. { if no register then take the opsize (which is available with ATT),
  227. if not availble then give an error }
  228. if opsize<>S_NO then
  229. operands[i].size:=opsize
  230. else
  231. begin
  232. Message(asmr_e_unable_to_determine_reference_size);
  233. { recovery }
  234. operands[i].size:=S_L;
  235. end;
  236. end;
  237. end
  238. else
  239. begin
  240. if opsize<>S_NO then
  241. operands[i].size:=opsize
  242. end;
  243. end;
  244. OPR_SYMBOL :
  245. begin
  246. { Fix lea which need a reference }
  247. if opcode=A_LEA then
  248. begin
  249. s:=operands[i].opr.symbol;
  250. so:=operands[i].opr.symofs;
  251. operands[i].opr.typ:=OPR_REFERENCE;
  252. Fillchar(operands[i].opr.ref,sizeof(treference),0);
  253. operands[i].opr.ref.symbol:=s;
  254. operands[i].opr.ref.offset:=so;
  255. end;
  256. operands[i].size:=S_L;
  257. end;
  258. end;
  259. end;
  260. end;
  261. end;
  262. procedure T386Instruction.SetInstructionOpsize;
  263. begin
  264. if opsize<>S_NO then
  265. exit;
  266. if (OpOrder=op_intel) then
  267. SwapOperands;
  268. case ops of
  269. 0 : ;
  270. 1 :
  271. { "push es" must be stored as a long PM }
  272. if ((opcode=A_PUSH) or
  273. (opcode=A_POP)) and
  274. (operands[1].opr.typ=OPR_REGISTER) and
  275. ((operands[1].opr.reg.enum in [firstsreg..lastsreg]) or
  276. ((operands[1].opr.reg.enum=R_INTREGISTER) and
  277. (operands[1].opr.reg.number>=nfirstsreg) and
  278. (operands[1].opr.reg.number<=nlastsreg))) then
  279. opsize:=S_L
  280. else
  281. opsize:=operands[1].size;
  282. 2 :
  283. begin
  284. case opcode of
  285. A_MOVZX,A_MOVSX :
  286. begin
  287. case operands[1].size of
  288. S_W :
  289. case operands[2].size of
  290. S_L :
  291. opsize:=S_WL;
  292. end;
  293. S_B :
  294. case operands[2].size of
  295. S_W :
  296. opsize:=S_BW;
  297. S_L :
  298. opsize:=S_BL;
  299. end;
  300. end;
  301. end;
  302. A_MOVD : { movd is a move from a mmx register to a
  303. 32 bit register or memory, so no opsize is correct here PM }
  304. exit;
  305. A_OUT :
  306. opsize:=operands[1].size;
  307. else
  308. opsize:=operands[2].size;
  309. end;
  310. end;
  311. 3 :
  312. opsize:=operands[3].size;
  313. end;
  314. end;
  315. procedure T386Instruction.CheckOperandSizes;
  316. var
  317. sizeerr : boolean;
  318. i : longint;
  319. begin
  320. { Check only the most common opcodes here, the others are done in
  321. the assembler pass }
  322. case opcode of
  323. A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
  324. A_CMP,A_MOV,
  325. A_ADD,A_SUB,A_ADC,A_SBB,
  326. A_AND,A_OR,A_TEST,A_XOR: ;
  327. else
  328. exit;
  329. end;
  330. { Handle the BW,BL,WL separatly }
  331. sizeerr:=false;
  332. { special push/pop selector case }
  333. if ((opcode=A_PUSH) or
  334. (opcode=A_POP)) and
  335. (operands[1].opr.typ=OPR_REGISTER) then
  336. begin
  337. if (operands[1].opr.reg.enum in [firstsreg..lastsreg]) or
  338. ((operands[1].opr.reg.enum=R_INTREGISTER) and
  339. (operands[1].opr.reg.number>=nfirstsreg) and
  340. (operands[1].opr.reg.number<=nlastsreg)) then
  341. exit;
  342. end;
  343. if opsize in [S_BW,S_BL,S_WL] then
  344. begin
  345. if ops<>2 then
  346. sizeerr:=true
  347. else
  348. begin
  349. case opsize of
  350. S_BW :
  351. sizeerr:=(operands[1].size<>S_B) or (operands[2].size<>S_W);
  352. S_BL :
  353. sizeerr:=(operands[1].size<>S_B) or (operands[2].size<>S_L);
  354. S_WL :
  355. sizeerr:=(operands[1].size<>S_W) or (operands[2].size<>S_L);
  356. end;
  357. end;
  358. end
  359. else
  360. begin
  361. for i:=1 to ops do
  362. begin
  363. if (operands[i].opr.typ<>OPR_CONSTANT) and
  364. (operands[i].size in [S_B,S_W,S_L]) and
  365. (operands[i].size<>opsize) then
  366. sizeerr:=true;
  367. end;
  368. end;
  369. if sizeerr then
  370. begin
  371. { if range checks are on then generate an error }
  372. if (cs_compilesystem in aktmoduleswitches) or
  373. not (cs_check_range in aktlocalswitches) then
  374. Message(asmr_w_size_suffix_and_dest_dont_match)
  375. else
  376. Message(asmr_e_size_suffix_and_dest_dont_match);
  377. end;
  378. end;
  379. { This check must be done with the operand in ATT order
  380. i.e.after swapping in the intel reader
  381. but before swapping in the NASM and TASM writers PM }
  382. procedure T386Instruction.CheckNonCommutativeOpcodes;
  383. begin
  384. if (OpOrder=op_intel) then
  385. SwapOperands;
  386. if ((ops=2) and
  387. (operands[1].opr.typ=OPR_REGISTER) and
  388. (operands[2].opr.typ=OPR_REGISTER) and
  389. { if the first is ST and the second is also a register
  390. it is necessarily ST1 .. ST7 }
  391. (operands[1].opr.reg.enum in [R_ST..R_ST0])) or
  392. (ops=0) then
  393. if opcode=A_FSUBR then
  394. opcode:=A_FSUB
  395. else if opcode=A_FSUB then
  396. opcode:=A_FSUBR
  397. else if opcode=A_FDIVR then
  398. opcode:=A_FDIV
  399. else if opcode=A_FDIV then
  400. opcode:=A_FDIVR
  401. else if opcode=A_FSUBRP then
  402. opcode:=A_FSUBP
  403. else if opcode=A_FSUBP then
  404. opcode:=A_FSUBRP
  405. else if opcode=A_FDIVRP then
  406. opcode:=A_FDIVP
  407. else if opcode=A_FDIVP then
  408. opcode:=A_FDIVRP;
  409. if ((ops=1) and
  410. (operands[1].opr.typ=OPR_REGISTER) and
  411. (operands[1].opr.reg.enum in [R_ST1..R_ST7])) then
  412. if opcode=A_FSUBRP then
  413. opcode:=A_FSUBP
  414. else if opcode=A_FSUBP then
  415. opcode:=A_FSUBRP
  416. else if opcode=A_FDIVRP then
  417. opcode:=A_FDIVP
  418. else if opcode=A_FDIVP then
  419. opcode:=A_FDIVRP;
  420. end;
  421. {*****************************************************************************
  422. opcode Adding
  423. *****************************************************************************}
  424. procedure T386Instruction.ConcatInstruction(p : taasmoutput);
  425. var
  426. siz : topsize;
  427. i,asize : longint;
  428. ai : taicpu;
  429. begin
  430. if (OpOrder=op_intel) then
  431. SwapOperands;
  432. { Get Opsize }
  433. if (opsize<>S_NO) or (Ops=0) then
  434. siz:=opsize
  435. else
  436. begin
  437. if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
  438. siz:=operands[1].size
  439. else
  440. siz:=operands[Ops].size;
  441. { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
  442. if (ops=2) and (operands[1].size<>S_NO) and
  443. (operands[2].size<>S_NO) and (operands[1].size<>operands[2].size) then
  444. siz:=S_NO;
  445. end;
  446. if ((opcode=A_MOVD)or
  447. (opcode=A_CVTSI2SS)) and
  448. ((operands[1].size=S_NO) or
  449. (operands[2].size=S_NO)) then
  450. siz:=S_NO;
  451. { NASM does not support FADD without args
  452. as alias of FADDP
  453. and GNU AS interprets FADD without operand differently
  454. for version 2.9.1 and 2.9.5 !! }
  455. if (ops=0) and
  456. ((opcode=A_FADD) or
  457. (opcode=A_FMUL) or
  458. (opcode=A_FSUB) or
  459. (opcode=A_FSUBR) or
  460. (opcode=A_FDIV) or
  461. (opcode=A_FDIVR)) then
  462. begin
  463. if opcode=A_FADD then
  464. opcode:=A_FADDP
  465. else if opcode=A_FMUL then
  466. opcode:=A_FMULP
  467. else if opcode=A_FSUB then
  468. opcode:=A_FSUBP
  469. else if opcode=A_FSUBR then
  470. opcode:=A_FSUBRP
  471. else if opcode=A_FDIV then
  472. opcode:=A_FDIVP
  473. else if opcode=A_FDIVR then
  474. opcode:=A_FDIVRP;
  475. {$ifdef ATTOP}
  476. message1(asmr_w_fadd_to_faddp,gas_op2str[opcode]);
  477. {$else}
  478. {$ifdef INTELOP}
  479. message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
  480. {$else}
  481. message1(asmr_w_fadd_to_faddp,'fXX');
  482. {$endif INTELOP}
  483. {$endif ATTOP}
  484. end;
  485. { GNU AS interprets FDIV without operand differently
  486. for version 2.9.1 and 2.10
  487. we add explicit args to it !! }
  488. if (ops=0) and
  489. ((opcode=A_FSUBP) or
  490. (opcode=A_FSUBRP) or
  491. (opcode=A_FDIVP) or
  492. (opcode=A_FDIVRP) or
  493. (opcode=A_FSUB) or
  494. (opcode=A_FSUBR) or
  495. (opcode=A_FDIV) or
  496. (opcode=A_FDIVR)) then
  497. begin
  498. {$ifdef ATTOP}
  499. message1(asmr_w_adding_explicit_args_fXX,gas_op2str[opcode]);
  500. {$else}
  501. {$ifdef INTELOP}
  502. message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
  503. {$else}
  504. message1(asmr_w_adding_explicit_args_fXX,'fXX');
  505. {$endif INTELOP}
  506. {$endif ATTOP}
  507. ops:=2;
  508. operands[1].opr.typ:=OPR_REGISTER;
  509. operands[2].opr.typ:=OPR_REGISTER;
  510. operands[1].opr.reg.enum:=R_ST;
  511. operands[2].opr.reg.enum:=R_ST1;
  512. end;
  513. if (ops=1) and
  514. ((operands[1].opr.typ=OPR_REGISTER) and
  515. (operands[1].opr.reg.enum in [R_ST1..R_ST7])) and
  516. ((opcode=A_FSUBP) or
  517. (opcode=A_FSUBRP) or
  518. (opcode=A_FDIVP) or
  519. (opcode=A_FDIVRP) or
  520. (opcode=A_FADDP) or
  521. (opcode=A_FMULP)) then
  522. begin
  523. {$ifdef ATTOP}
  524. message1(asmr_w_adding_explicit_first_arg_fXX,gas_op2str[opcode]);
  525. {$else}
  526. {$ifdef INTELOP}
  527. message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
  528. {$else}
  529. message1(asmr_w_adding_explicit_first_arg_fXX,'fXX');
  530. {$endif INTELOP}
  531. {$endif ATTOP}
  532. ops:=2;
  533. operands[2].opr.typ:=OPR_REGISTER;
  534. operands[2].opr.reg:=operands[1].opr.reg;
  535. operands[1].opr.reg.enum:=R_ST;
  536. end;
  537. if (ops=1) and
  538. ((operands[1].opr.typ=OPR_REGISTER) and
  539. (operands[1].opr.reg.enum in [R_ST1..R_ST7])) and
  540. ((opcode=A_FSUB) or
  541. (opcode=A_FSUBR) or
  542. (opcode=A_FDIV) or
  543. (opcode=A_FDIVR) or
  544. (opcode=A_FADD) or
  545. (opcode=A_FMUL)) then
  546. begin
  547. {$ifdef ATTOP}
  548. message1(asmr_w_adding_explicit_second_arg_fXX,gas_op2str[opcode]);
  549. {$else}
  550. {$ifdef INTELOP}
  551. message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
  552. {$else}
  553. message1(asmr_w_adding_explicit_second_arg_fXX,'fXX');
  554. {$endif INTELOP}
  555. {$endif ATTOP}
  556. ops:=2;
  557. operands[2].opr.typ:=OPR_REGISTER;
  558. operands[2].opr.reg.enum:=R_ST;
  559. end;
  560. { I tried to convince Linus Torvalds to add
  561. code to support ENTER instruction
  562. (when raising a stack page fault)
  563. but he replied that ENTER is a bad instruction and
  564. Linux does not need to support it
  565. So I think its at least a good idea to add a warning
  566. if someone uses this in assembler code
  567. FPC itself does not use it at all PM }
  568. if (opcode=A_ENTER) and ((target_info.system=system_i386_linux) or
  569. (target_info.system=system_i386_FreeBSD)) then
  570. message(asmr_w_enter_not_supported_by_linux);
  571. ai:=taicpu.op_none(opcode,siz);
  572. ai.SetOperandOrder(OpOrder);
  573. ai.Ops:=Ops;
  574. for i:=1to Ops do
  575. begin
  576. case operands[i].opr.typ of
  577. OPR_CONSTANT :
  578. ai.loadconst(i-1,aword(operands[i].opr.val));
  579. OPR_REGISTER:
  580. ai.loadreg(i-1,operands[i].opr.reg);
  581. OPR_SYMBOL:
  582. ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
  583. OPR_REFERENCE:
  584. begin
  585. ai.loadref(i-1,operands[i].opr.ref);
  586. if operands[i].size<>S_NO then
  587. begin
  588. asize:=0;
  589. case operands[i].size of
  590. S_B :
  591. asize:=OT_BITS8;
  592. S_W, S_IS :
  593. asize:=OT_BITS16;
  594. S_L, S_IL, S_FS:
  595. asize:=OT_BITS32;
  596. S_Q, S_D, S_FL, S_FV :
  597. asize:=OT_BITS64;
  598. S_FX :
  599. asize:=OT_BITS80;
  600. end;
  601. if asize<>0 then
  602. ai.oper[i-1].ot:=(ai.oper[i-1].ot and not OT_SIZE_MASK) or asize;
  603. end;
  604. end;
  605. end;
  606. end;
  607. if (opcode=A_CALL) and (opsize=S_FAR) then
  608. opcode:=A_LCALL;
  609. if (opcode=A_JMP) and (opsize=S_FAR) then
  610. opcode:=A_LJMP;
  611. if (opcode=A_LCALL) or (opcode=A_LJMP) then
  612. opsize:=S_FAR;
  613. { Condition ? }
  614. if condition<>C_None then
  615. ai.SetCondition(condition);
  616. { Concat the opcode or give an error }
  617. if assigned(ai) then
  618. begin
  619. { Check the instruction if it's valid }
  620. {$ifndef NOAG386BIN}
  621. ai.CheckIfValid;
  622. {$endif NOAG386BIN}
  623. p.concat(ai);
  624. end
  625. else
  626. Message(asmr_e_invalid_opcode_and_operand);
  627. end;
  628. end.
  629. {
  630. $Log$
  631. Revision 1.2 2003-05-22 21:33:31 peter
  632. * removed some unit dependencies
  633. Revision 1.1 2003/04/30 15:45:35 florian
  634. * merged more x86-64/i386 code
  635. Revision 1.30 2003/04/25 12:04:31 florian
  636. * merged agx64att and ag386att to x86/agx86att
  637. Revision 1.29 2003/02/19 22:00:16 daniel
  638. * Code generator converted to new register notation
  639. - Horribily outdated todo.txt removed
  640. Revision 1.28 2003/02/03 22:47:14 daniel
  641. - Removed reg_2_opsize array
  642. Revision 1.27 2003/01/08 18:43:57 daniel
  643. * Tregister changed into a record
  644. Revision 1.26 2002/11/15 01:58:58 peter
  645. * merged changes from 1.0.7 up to 04-11
  646. - -V option for generating bug report tracing
  647. - more tracing for option parsing
  648. - errors for cdecl and high()
  649. - win32 import stabs
  650. - win32 records<=8 are returned in eax:edx (turned off by default)
  651. - heaptrc update
  652. - more info for temp management in .s file with EXTDEBUG
  653. Revision 1.25 2002/10/31 13:28:32 pierre
  654. * correct last wrong fix for tw2158
  655. Revision 1.24 2002/10/30 17:10:00 pierre
  656. * merge of fix for tw2158 bug
  657. Revision 1.23 2002/07/26 21:15:44 florian
  658. * rewrote the system handling
  659. Revision 1.22 2002/07/01 18:46:34 peter
  660. * internal linker
  661. * reorganized aasm layer
  662. Revision 1.21 2002/05/18 13:34:25 peter
  663. * readded missing revisions
  664. Revision 1.20 2002/05/16 19:46:52 carl
  665. + defines.inc -> fpcdefs.inc to avoid conflicts if compiling by hand
  666. + try to fix temp allocation (still in ifdef)
  667. + generic constructor calls
  668. + start of tassembler / tmodulebase class cleanup
  669. Revision 1.18 2002/05/12 16:53:18 peter
  670. * moved entry and exitcode to ncgutil and cgobj
  671. * foreach gets extra argument for passing local data to the
  672. iterator function
  673. * -CR checks also class typecasts at runtime by changing them
  674. into as
  675. * fixed compiler to cycle with the -CR option
  676. * fixed stabs with elf writer, finally the global variables can
  677. be watched
  678. * removed a lot of routines from cga unit and replaced them by
  679. calls to cgobj
  680. * u32bit-s32bit updates for and,or,xor nodes. When one element is
  681. u32bit then the other is typecasted also to u32bit without giving
  682. a rangecheck warning/error.
  683. * fixed pascal calling method with reversing also the high tree in
  684. the parast, detected by tcalcst3 test
  685. Revision 1.17 2002/04/15 19:12:09 carl
  686. + target_info.size_of_pointer -> pointer_size
  687. + some cleanup of unused types/variables
  688. * move several constants from cpubase to their specific units
  689. (where they are used)
  690. + att_Reg2str -> gas_reg2str
  691. + int_reg2str -> std_reg2str
  692. Revision 1.16 2002/04/04 19:06:13 peter
  693. * removed unused units
  694. * use tlocation.size in cg.a_*loc*() routines
  695. Revision 1.15 2002/04/02 17:11:39 peter
  696. * tlocation,treference update
  697. * LOC_CONSTANT added for better constant handling
  698. * secondadd splitted in multiple routines
  699. * location_force_reg added for loading a location to a register
  700. of a specified size
  701. * secondassignment parses now first the right and then the left node
  702. (this is compatible with Kylix). This saves a lot of push/pop especially
  703. with string operations
  704. * adapted some routines to use the new cg methods
  705. Revision 1.14 2002/01/24 18:25:53 peter
  706. * implicit result variable generation for assembler routines
  707. * removed m_tp modeswitch, use m_tp7 or not(m_fpc) instead
  708. }