ncgmem.pas 52 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgvecnode = class(tvecnode)
  45. function get_mul_size : asizeint;
  46. private
  47. procedure rangecheck_array;
  48. procedure rangecheck_string;
  49. protected
  50. function get_address_type: tdef;virtual;
  51. {# This routine is used to calculate the address of the reference.
  52. On entry reg contains the index in the array,
  53. and l contains the size of each element in the array.
  54. This routine should update location.reference correctly,
  55. so it points to the correct address.
  56. }
  57. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  58. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  59. procedure update_reference_offset(var ref: treference; index, mulsize: ASizeInt); virtual;
  60. procedure second_wideansistring;virtual;
  61. procedure second_dynamicarray;virtual;
  62. function valid_index_size(size: tcgsize): boolean;virtual;
  63. public
  64. procedure pass_generate_code;override;
  65. end;
  66. implementation
  67. uses
  68. systems,
  69. cutils,cclasses,verbose,globals,constexp,fmodule,
  70. symconst,symbase,symdef,symsym,symtable,defutil,paramgr,
  71. aasmbase,aasmdata,
  72. procinfo,pass_2,parabase,
  73. ncon,nadd,nutils,
  74. cgobj,hlcgobj,
  75. objcgutl;
  76. {*****************************************************************************
  77. TCGLOADVMTADDRNODE
  78. *****************************************************************************}
  79. procedure tcgloadvmtaddrnode.pass_generate_code;
  80. var
  81. href : treference;
  82. pool : THashSet;
  83. entry : PHashSetItem;
  84. vmtname : tsymstr;
  85. otherunit,
  86. indirect : boolean;
  87. begin
  88. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  89. if (left.nodetype=typen) then
  90. begin
  91. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  92. if not is_objcclass(left.resultdef) then
  93. begin
  94. { we are using a direct reference if any of the following is true:
  95. - the target does not support packages
  96. - the target does not use indirect references
  97. - the class is located inside the same unit }
  98. otherunit:=findunitsymtable(left.resultdef.owner).moduleid<>current_module.moduleid;
  99. indirect:=(tf_supports_packages in target_info.flags) and
  100. (target_info.system in systems_indirect_var_imports) and
  101. otherunit;
  102. vmtname:=tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname;
  103. reference_reset_symbol(href,
  104. current_asmdata.RefAsmSymbol(vmtname,AT_DATA,indirect),0,
  105. resultdef.alignment,[]);
  106. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,resultdef,href,location.register);
  107. if otherunit then
  108. current_module.add_extern_asmsym(vmtname,AB_EXTERNAL,AT_DATA);
  109. end
  110. else
  111. begin
  112. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  113. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  114. if (target_info.system in systems_objc_nfabi) then
  115. begin
  116. { find/add necessary classref/classname pool entries }
  117. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  118. end
  119. else
  120. begin
  121. { find/add necessary classref/classname pool entries }
  122. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  123. end;
  124. reference_reset_symbol(href,tasmlabel(entry^.Data),0,objc_idtype.alignment,[]);
  125. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,objc_idtype,objc_idtype,href,location.register);
  126. end;
  127. end
  128. else
  129. { should be handled in pass 1 }
  130. internalerror(2015052801);
  131. end;
  132. {*****************************************************************************
  133. TCGLOADPARENTFPNODE
  134. *****************************************************************************}
  135. procedure tcgloadparentfpnode.pass_generate_code;
  136. var
  137. currpi : tprocinfo;
  138. hsym : tparavarsym;
  139. href : treference;
  140. begin
  141. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  142. begin
  143. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  144. location.register:=current_procinfo.framepointer;
  145. end
  146. else
  147. begin
  148. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  149. currpi:=current_procinfo;
  150. { load framepointer of current proc }
  151. hsym:=tparavarsym(currpi.procdef.parentfpsym);
  152. if (currpi.procdef.owner.symtablelevel=parentpd.parast.symtablelevel) and (hsym.localloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  153. location.register:=hsym.localloc.register
  154. else
  155. begin
  156. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  157. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  158. { walk parents }
  159. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  160. begin
  161. currpi:=currpi.parent;
  162. if not assigned(currpi) then
  163. internalerror(200311201);
  164. hsym:=tparavarsym(currpi.procdef.parentfpsym);
  165. if hsym.localloc.loc<>LOC_REFERENCE then
  166. internalerror(200309283);
  167. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,ctempposinvalid,parentfpvoidpointertype.alignment,[]);
  168. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  169. end;
  170. end;
  171. end;
  172. end;
  173. {*****************************************************************************
  174. TCGADDRNODE
  175. *****************************************************************************}
  176. procedure tcgaddrnode.pass_generate_code;
  177. begin
  178. secondpass(left);
  179. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  180. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  181. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  182. { on x86_64-win64, array of chars can be returned in registers, however,
  183. when passing these arrays to other functions, the compiler wants to take
  184. the address of the array so when the addrnode has been created internally,
  185. we have to force the data into memory, see also tw14388.pp
  186. }
  187. if nf_internal in flags then
  188. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  189. else
  190. internalerror(2006111510);
  191. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  192. end;
  193. {*****************************************************************************
  194. TCGDEREFNODE
  195. *****************************************************************************}
  196. procedure tcgderefnode.pass_generate_code;
  197. var
  198. paraloc1 : tcgpara;
  199. pd : tprocdef;
  200. sym : tsym;
  201. st : tsymtable;
  202. hp : pnode;
  203. extraoffset : tcgint;
  204. begin
  205. sym:=nil;
  206. { assume natural alignment, except for packed records }
  207. if not(resultdef.typ in [recorddef,objectdef]) or
  208. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  209. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment,[])
  210. else
  211. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1,[]);
  212. { can we fold an add/sub node into the offset of the deref node? }
  213. extraoffset:=0;
  214. hp:=actualtargetnode(@left);
  215. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  216. begin
  217. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  218. replacenode(hp^,taddnode(hp^).left);
  219. end
  220. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  221. begin
  222. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  223. replacenode(hp^,taddnode(hp^).left);
  224. end
  225. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  226. begin
  227. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  228. replacenode(hp^,taddnode(hp^).right);
  229. end;
  230. secondpass(left);
  231. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  232. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  233. case left.location.loc of
  234. LOC_CREGISTER,
  235. LOC_REGISTER:
  236. begin
  237. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  238. {$ifdef cpu_uses_separate_address_registers}
  239. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  240. begin
  241. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  242. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  243. location.reference.base);
  244. end
  245. else
  246. {$endif}
  247. location.reference.base := left.location.register;
  248. end;
  249. LOC_CREFERENCE,
  250. LOC_REFERENCE:
  251. begin
  252. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  253. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  254. end;
  255. LOC_CONSTANT:
  256. begin
  257. location.reference.offset:=left.location.value;
  258. end;
  259. else
  260. internalerror(200507031);
  261. end;
  262. location.reference.offset:=location.reference.offset+extraoffset;
  263. if (cs_use_heaptrc in current_settings.globalswitches) and
  264. (cs_checkpointer in current_settings.localswitches) and
  265. not(cs_compilesystem in current_settings.moduleswitches) and
  266. tpointerdef(left.resultdef).compatible_with_pointerdef_size(tpointerdef(voidpointertype)) and
  267. not(nf_no_checkpointer in flags) and
  268. { can be NR_NO in case of LOC_CONSTANT }
  269. (location.reference.base<>NR_NO) then
  270. begin
  271. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  272. (sym.typ<>procsym) then
  273. internalerror(2012010601);
  274. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  275. paraloc1.init;
  276. paramanager.getcgtempparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  277. hlcg.a_loadaddr_ref_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference,paraloc1);
  278. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  279. paraloc1.done;
  280. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  281. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  282. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  283. include(current_settings.moduleswitches,cs_checkpointer_called);
  284. end;
  285. end;
  286. {*****************************************************************************
  287. TCGSUBSCRIPTNODE
  288. *****************************************************************************}
  289. function tcgsubscriptnode.handle_platform_subscript: boolean;
  290. begin
  291. result:=false;
  292. end;
  293. procedure tcgsubscriptnode.pass_generate_code;
  294. var
  295. asmsym: tasmsymbol;
  296. paraloc1 : tcgpara;
  297. tmpref: treference;
  298. sref: tsubsetreference;
  299. awordoffset,
  300. offsetcorrection : aint;
  301. pd : tprocdef;
  302. sym : tsym;
  303. st : tsymtable;
  304. hreg : TRegister;
  305. begin
  306. sym:=nil;
  307. secondpass(left);
  308. if codegenerror then
  309. exit;
  310. paraloc1.init;
  311. { several object types must be dereferenced implicitly }
  312. if is_implicit_pointer_object_type(left.resultdef) then
  313. begin
  314. if (not is_managed_type(left.resultdef)) or
  315. (target_info.system in systems_garbage_collected_managed_types) then
  316. begin
  317. { take care of the alignment of the fields }
  318. if not(left.resultdef is tabstractrecorddef) then
  319. Internalerror(2018021601);
  320. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),newalignment(tabstractrecordsymtable(tabstractrecorddef(left.resultdef).symtable).recordalignment,vs.fieldoffset),[]);
  321. case left.location.loc of
  322. LOC_CREGISTER,
  323. LOC_REGISTER:
  324. begin
  325. {$ifdef cpu_uses_separate_address_registers}
  326. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  327. begin
  328. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  329. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  330. left.location.register,location.reference.base);
  331. end
  332. else
  333. {$endif}
  334. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,location.reference.volatility);
  335. end;
  336. LOC_CREFERENCE,
  337. LOC_REFERENCE,
  338. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  339. LOC_SUBSETREG,
  340. LOC_CSUBSETREG,
  341. LOC_SUBSETREF,
  342. LOC_CSUBSETREF:
  343. begin
  344. hlcg.reference_reset_base(location.reference,left.resultdef,
  345. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,location.reference.volatility);
  346. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  347. end;
  348. LOC_CONSTANT:
  349. begin
  350. { can happen with @classtype(pointerconst).field }
  351. location.reference.offset:=left.location.value;
  352. end;
  353. else
  354. internalerror(2009092401);
  355. end;
  356. { implicit deferencing }
  357. if (cs_use_heaptrc in current_settings.globalswitches) and
  358. (cs_checkpointer in current_settings.localswitches) and
  359. not(cs_compilesystem in current_settings.moduleswitches) then
  360. begin
  361. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  362. (sym.typ<>procsym) then
  363. internalerror(2012010602);
  364. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  365. paramanager.getcgtempparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  366. hlcg.a_loadaddr_ref_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference,paraloc1);
  367. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  368. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  369. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  370. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  371. system.include(current_settings.moduleswitches,cs_checkpointer_called);
  372. end;
  373. end
  374. else
  375. { reference-counted implicit pointer object types don't have
  376. fields -> cannot be subscripted (calls are handled via call
  377. nodes) }
  378. internalerror(2011011901);
  379. end
  380. else
  381. begin
  382. location_copy(location,left.location);
  383. { some abi's require that functions return (some) records in }
  384. { registers }
  385. case location.loc of
  386. LOC_REFERENCE,
  387. LOC_CREFERENCE:
  388. ;
  389. LOC_CONSTANT,
  390. LOC_REGISTER,
  391. LOC_CREGISTER,
  392. { if a floating point value is casted into a record, it
  393. can happen that we get here an fpu or mm register }
  394. LOC_MMREGISTER,
  395. LOC_FPUREGISTER,
  396. LOC_CMMREGISTER,
  397. LOC_CFPUREGISTER:
  398. begin
  399. { in case the result is not something that can be put
  400. into an integer register (e.g.
  401. function_returning_record().non_regable_field, or
  402. a function returning a value > sizeof(intreg))
  403. -> force to memory
  404. }
  405. if not tstoreddef(left.resultdef).is_intregable or
  406. not tstoreddef(resultdef).is_intregable or
  407. { if the field spans multiple registers, we must force the record into
  408. memory as well }
  409. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  410. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  411. (location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER,
  412. { actually, we should be able to "subscript" a constant, but this would require some code
  413. which enables dumping and reading constants from a temporary memory buffer. This
  414. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  415. }
  416. LOC_CONSTANT]) then
  417. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  418. else
  419. begin
  420. if (location.loc in [LOC_MMREGISTER,LOC_CMMREGISTER]) then
  421. if (tcgsize2size[location.size]<=tcgsize2size[OS_INT]) then
  422. begin
  423. hreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  424. cg.a_loadmm_reg_intreg(current_asmdata.CurrAsmList,reg_cgsize(left.location.register),location.size,
  425. left.location.register,hreg,mms_movescalar);
  426. location_reset(left.location,LOC_REGISTER,int_cgsize(tcgsize2size[left.location.size]));
  427. left.location.register:=hreg;
  428. { copy again, we changed left.location }
  429. location_copy(location,left.location);
  430. end
  431. else
  432. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef);
  433. if (left.location.loc = LOC_REGISTER) then
  434. location.loc := LOC_SUBSETREG
  435. else
  436. location.loc := LOC_CSUBSETREG;
  437. location.size:=def_cgsize(resultdef);
  438. offsetcorrection:=0;
  439. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  440. begin
  441. if not is_packed_record_or_object(left.resultdef) then
  442. awordoffset:=sizeof(aword)
  443. else
  444. awordoffset:=sizeof(aword)*8;
  445. if (vs.fieldoffset>=awordoffset) xor (target_info.endian=endian_big) then
  446. location.sreg.subsetreg := left.location.registerhi
  447. else
  448. location.sreg.subsetreg := left.location.register;
  449. if vs.fieldoffset>=awordoffset then
  450. offsetcorrection := sizeof(aword)*8;
  451. location.sreg.subsetregsize := OS_INT;
  452. end
  453. else
  454. begin
  455. location.sreg.subsetreg := left.location.register;
  456. location.sreg.subsetregsize := left.location.size;
  457. end;
  458. if not is_packed_record_or_object(left.resultdef) then
  459. begin
  460. if (target_info.endian = ENDIAN_BIG) then
  461. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  462. else
  463. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  464. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  465. end
  466. else
  467. begin
  468. location.sreg.bitlen := resultdef.packedbitsize;
  469. if (target_info.endian = ENDIAN_BIG) then
  470. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  471. else
  472. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  473. end;
  474. end;
  475. end;
  476. LOC_SUBSETREG,
  477. LOC_CSUBSETREG:
  478. begin
  479. location.size:=def_cgsize(resultdef);
  480. if not is_packed_record_or_object(left.resultdef) then
  481. begin
  482. if (target_info.endian = ENDIAN_BIG) then
  483. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  484. else
  485. inc(location.sreg.startbit, vs.fieldoffset * 8);
  486. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  487. end
  488. else
  489. begin
  490. location.sreg.bitlen := resultdef.packedbitsize;
  491. if (target_info.endian = ENDIAN_BIG) then
  492. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  493. else
  494. inc(location.sreg.startbit, vs.fieldoffset);
  495. end;
  496. end;
  497. else
  498. internalerror(2006031901);
  499. end;
  500. end;
  501. if is_objc_class_or_protocol(left.resultdef) and
  502. (target_info.system in systems_objc_nfabi) then
  503. begin
  504. if (location.loc<>LOC_REFERENCE) or
  505. (location.reference.index<>NR_NO) then
  506. internalerror(2009092402);
  507. { the actual field offset is stored in memory (to solve the
  508. "fragile base class" problem: this way the layout of base
  509. classes can be changed without breaking programs compiled against
  510. earlier versions)
  511. }
  512. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname,AT_DATA);
  513. reference_reset_symbol(tmpref,asmsym,0,voidpointertype.alignment,[]);
  514. hlcg.g_ptrtypecast_ref(current_asmdata.CurrAsmList,left.resultdef,cpointerdef.getreusable(resultdef),location.reference);
  515. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  516. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  517. { always packrecords C -> natural alignment }
  518. location.reference.alignment:=vs.vardef.alignment;
  519. end
  520. else if handle_platform_subscript then
  521. begin
  522. { done }
  523. end
  524. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  525. begin
  526. if not is_packed_record_or_object(left.resultdef) then
  527. begin
  528. inc(location.reference.offset,vs.fieldoffset);
  529. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  530. end
  531. else if (vs.fieldoffset mod 8 = 0) and
  532. (resultdef.packedbitsize mod 8 = 0) and
  533. { is different in case of e.g. packenum 2 and an enum }
  534. { which fits in 8 bits }
  535. (resultdef.size*8 = resultdef.packedbitsize) then
  536. begin
  537. inc(location.reference.offset,vs.fieldoffset div 8);
  538. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  539. end
  540. else
  541. begin
  542. sref.ref:=location.reference;
  543. sref.ref.alignment:=1;
  544. sref.bitindexreg:=NR_NO;
  545. inc(sref.ref.offset,vs.fieldoffset div 8);
  546. sref.startbit:=vs.fieldoffset mod 8;
  547. sref.bitlen:=resultdef.packedbitsize;
  548. if (left.location.loc=LOC_REFERENCE) then
  549. location.loc:=LOC_SUBSETREF
  550. else
  551. location.loc:=LOC_CSUBSETREF;
  552. location.sref:=sref;
  553. end;
  554. { also update the size of the location }
  555. location.size:=def_cgsize(resultdef);
  556. end;
  557. paraloc1.done;
  558. end;
  559. {*****************************************************************************
  560. TCGVECNODE
  561. *****************************************************************************}
  562. function tcgvecnode.get_mul_size : asizeint;
  563. begin
  564. if nf_memindex in flags then
  565. get_mul_size:=1
  566. else
  567. begin
  568. if (left.resultdef.typ=arraydef) then
  569. if not is_packed_array(left.resultdef) then
  570. get_mul_size:=tarraydef(left.resultdef).elesize
  571. else
  572. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  573. else
  574. get_mul_size:=resultdef.size;
  575. end
  576. end;
  577. function tcgvecnode.get_address_type: tdef;
  578. begin
  579. result:=cpointerdef.getreusable(resultdef);
  580. end;
  581. { this routine must, like any other routine, not change the contents }
  582. { of base/index registers of references, as these may be regvars. }
  583. { The register allocator can coalesce one LOC_REGISTER being moved }
  584. { into another (as their live ranges won't overlap), but not a }
  585. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  586. { the live range of the LOC_CREGISTER will most likely overlap the }
  587. { the live range of the target LOC_(C)REGISTER) }
  588. { The passed register may be a LOC_CREGISTER as well. }
  589. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  590. var
  591. hreg: tregister;
  592. begin
  593. if l<>1 then
  594. begin
  595. hreg:=hlcg.getaddressregister(current_asmdata.CurrAsmList,get_address_type);
  596. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,get_address_type,l,maybe_const_reg,hreg);
  597. maybe_const_reg:=hreg;
  598. end;
  599. if location.reference.base=NR_NO then
  600. location.reference.base:=maybe_const_reg
  601. else if location.reference.index=NR_NO then
  602. location.reference.index:=maybe_const_reg
  603. else
  604. begin
  605. hreg:=hlcg.getaddressregister(current_asmdata.CurrAsmList,get_address_type);
  606. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,get_address_type,location.reference,hreg);
  607. reference_reset_base(location.reference,hreg,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
  608. { insert new index register }
  609. location.reference.index:=maybe_const_reg;
  610. end;
  611. { update alignment }
  612. if (location.reference.alignment=0) then
  613. internalerror(2009020704);
  614. location.reference.alignment:=newalignment(location.reference.alignment,l);
  615. end;
  616. { see remarks for tcgvecnode.update_reference_reg_mul above }
  617. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  618. var
  619. sref: tsubsetreference;
  620. offsetreg, hreg: tregister;
  621. alignpower: aint;
  622. temp : longint;
  623. begin
  624. { only orddefs are bitpacked. Even then we only need special code in }
  625. { case the bitpacked *byte size* is not a power of two, otherwise }
  626. { everything can be handled using the the regular array code. }
  627. if ((l mod 8) = 0) and
  628. (ispowerof2(l div 8,temp) or
  629. not is_ordinal(resultdef)
  630. {$ifndef cpu64bitalu}
  631. or is_64bitint(resultdef)
  632. {$endif not cpu64bitalu}
  633. ) then
  634. begin
  635. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  636. exit;
  637. end;
  638. if (l > 8*sizeof(aint)) then
  639. internalerror(200608051);
  640. sref.ref := location.reference;
  641. hreg := hlcg.getaddressregister(current_asmdata.CurrAsmList,get_address_type);
  642. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,get_address_type,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  643. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,get_address_type,l,hreg);
  644. { keep alignment for index }
  645. sref.ref.alignment := left.resultdef.alignment;
  646. if not ispowerof2(packedbitsloadsize(l),temp) then
  647. internalerror(2006081201);
  648. alignpower:=temp;
  649. offsetreg := hlcg.getaddressregister(current_asmdata.CurrAsmList,get_address_type);
  650. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,get_address_type,3+alignpower,hreg,offsetreg);
  651. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,get_address_type,alignpower,offsetreg);
  652. if (sref.ref.base = NR_NO) then
  653. sref.ref.base := offsetreg
  654. else if (sref.ref.index = NR_NO) then
  655. sref.ref.index := offsetreg
  656. else
  657. begin
  658. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,get_address_type,sref.ref.base,offsetreg);
  659. sref.ref.base := offsetreg;
  660. end;
  661. { the if expression below is a constant evaluated at compile time, so disable the unreachable code
  662. warning }
  663. {$push}
  664. {$warn 6018 off}
  665. { we can reuse hreg only if OS_INT and OS_ADDR have the same size/type }
  666. if OS_INT<>OS_ADDR then
  667. begin
  668. sref.bitindexreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  669. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_INT,hreg,sref.bitindexreg);
  670. end
  671. else
  672. sref.bitindexreg:=hreg;
  673. {$pop}
  674. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,ossinttype,(1 shl (3+alignpower))-1,sref.bitindexreg);
  675. sref.startbit := 0;
  676. sref.bitlen := resultdef.packedbitsize;
  677. if (left.location.loc = LOC_REFERENCE) then
  678. location.loc := LOC_SUBSETREF
  679. else
  680. location.loc := LOC_CSUBSETREF;
  681. location.sref := sref;
  682. end;
  683. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: ASizeInt);
  684. begin
  685. inc(ref.offset,index*mulsize);
  686. end;
  687. procedure tcgvecnode.second_wideansistring;
  688. begin
  689. end;
  690. procedure tcgvecnode.second_dynamicarray;
  691. begin
  692. end;
  693. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  694. begin
  695. result:=
  696. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  697. end;
  698. procedure tcgvecnode.rangecheck_array;
  699. var
  700. paraloc1,paraloc2 : tcgpara;
  701. pd : tprocdef;
  702. begin
  703. { omit range checking when this is an array access to a pointer which has been
  704. typecasted from an array }
  705. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  706. exit;
  707. paraloc1.init;
  708. paraloc2.init;
  709. if is_dynamic_array(left.resultdef) then
  710. begin
  711. pd:=search_system_proc('fpc_dynarray_rangecheck');
  712. paramanager.getcgtempparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  713. paramanager.getcgtempparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  714. if pd.is_pushleftright then
  715. begin
  716. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  717. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  718. end
  719. else
  720. begin
  721. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  722. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  723. end;
  724. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  725. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  726. hlcg.g_call_system_proc(current_asmdata.CurrAsmList,pd,[@paraloc1,@paraloc2],nil).resetiftemp;
  727. end;
  728. { for regular arrays, we don't have to do anything because the index has been
  729. type converted to the index type, which already inserted a range check if
  730. necessary }
  731. paraloc1.done;
  732. paraloc2.done;
  733. end;
  734. procedure tcgvecnode.rangecheck_string;
  735. var
  736. paraloc1,
  737. paraloc2: tcgpara;
  738. helpername: TIDString;
  739. pd: tprocdef;
  740. begin
  741. paraloc1.init;
  742. paraloc2.init;
  743. case tstringdef(left.resultdef).stringtype of
  744. { it's the same for ansi- and wide strings }
  745. st_unicodestring,
  746. st_widestring,
  747. st_ansistring:
  748. begin
  749. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  750. pd:=search_system_proc(helpername);
  751. paramanager.getcgtempparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  752. paramanager.getcgtempparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  753. if pd.is_pushleftright then
  754. begin
  755. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  756. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  757. end
  758. else
  759. begin
  760. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  761. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  762. end;
  763. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  764. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  765. hlcg.g_call_system_proc(current_asmdata.CurrAsmList,pd,[@paraloc1,@paraloc2],nil).resetiftemp;
  766. end;
  767. st_shortstring:
  768. begin
  769. {!!!!!!!!!!!!!!!!!}
  770. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  771. end;
  772. st_longstring:
  773. begin
  774. {!!!!!!!!!!!!!!!!!}
  775. end;
  776. end;
  777. paraloc1.done;
  778. paraloc2.done;
  779. end;
  780. procedure tcgvecnode.pass_generate_code;
  781. var
  782. offsetdec,
  783. extraoffset : ASizeInt;
  784. rightp : pnode;
  785. newsize : tcgsize;
  786. mulsize,
  787. bytemulsize : ASizeInt;
  788. alignpow : aint;
  789. paraloc1,
  790. paraloc2 : tcgpara;
  791. subsetref : tsubsetreference;
  792. temp : longint;
  793. hreg : tregister;
  794. indexdef : tdef;
  795. {$if defined(cpu8bitalu) or defined(cpu16bitalu)}
  796. i : Integer;
  797. {$endif}
  798. begin
  799. paraloc1.init;
  800. paraloc2.init;
  801. mulsize:=get_mul_size;
  802. if not is_packed_array(left.resultdef) then
  803. bytemulsize:=mulsize
  804. else
  805. bytemulsize:=mulsize div 8;
  806. newsize:=def_cgsize(resultdef);
  807. secondpass(left);
  808. if left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  809. location_reset_ref(location,left.location.loc,newsize,left.location.reference.alignment,left.location.reference.volatility)
  810. else
  811. location_reset_ref(location,LOC_REFERENCE,newsize,resultdef.alignment,[]);
  812. { an ansistring needs to be dereferenced }
  813. if is_ansistring(left.resultdef) or
  814. is_wide_or_unicode_string(left.resultdef) then
  815. begin
  816. if nf_callunique in flags then
  817. internalerror(200304236);
  818. {DM!!!!!}
  819. case left.location.loc of
  820. LOC_REGISTER,
  821. LOC_CREGISTER :
  822. begin
  823. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,[]);
  824. end;
  825. LOC_CREFERENCE,
  826. LOC_REFERENCE :
  827. begin
  828. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,[]);
  829. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  830. end;
  831. LOC_CONSTANT:
  832. begin
  833. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,ctempposinvalid,location.reference.alignment,[]);
  834. end;
  835. else
  836. internalerror(2002032218);
  837. end;
  838. if is_ansistring(left.resultdef) then
  839. offsetdec:=1
  840. else
  841. offsetdec:=2;
  842. location.reference.alignment:=offsetdec;
  843. location.reference.volatility:=[];
  844. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  845. if not(cs_zerobasedstrings in current_settings.localswitches) then
  846. update_reference_offset(location.reference,-1,offsetdec);
  847. end
  848. else if is_dynamic_array(left.resultdef) then
  849. begin
  850. case left.location.loc of
  851. LOC_REGISTER,
  852. LOC_CREGISTER :
  853. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,[]);
  854. LOC_REFERENCE,
  855. LOC_CREFERENCE :
  856. begin
  857. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,[]);
  858. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  859. left.location.reference,location.reference.base);
  860. end;
  861. else
  862. internalerror(2002032219);
  863. end;
  864. { a dynarray points to the start of a memory block, which
  865. we assume to be always aligned to a multiple of the
  866. pointer size
  867. }
  868. location.reference.alignment:=voidpointertype.size;
  869. location.reference.volatility:=[];
  870. end
  871. else
  872. begin
  873. { may happen in case of function results }
  874. case left.location.loc of
  875. LOC_CREGISTER,
  876. LOC_REGISTER:
  877. begin
  878. if not(is_constnode(right)) or (tarraydef(left.resultdef).elementdef.size<>alusinttype.size) then
  879. begin
  880. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  881. location_copy(location,left.location);
  882. end
  883. else
  884. { we use location here only to get the right offset }
  885. location_reset_ref(location,LOC_REFERENCE,OS_NO,1,[]);
  886. end;
  887. LOC_CSUBSETREG,
  888. LOC_CMMREGISTER,
  889. LOC_SUBSETREG,
  890. LOC_MMREGISTER:
  891. begin
  892. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  893. location_copy(location,left.location);
  894. end;
  895. LOC_INVALID:
  896. Internalerror(2019061101);
  897. else
  898. location_copy(location,left.location);
  899. end;
  900. end;
  901. { location must be memory }
  902. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  903. internalerror(200411013);
  904. { offset can only differ from 0 if arraydef }
  905. if (left.resultdef.typ=arraydef) and
  906. not(is_dynamic_array(left.resultdef)) and
  907. (not(is_packed_array(left.resultdef)) or
  908. ((mulsize mod 8 = 0) and
  909. ispowerof2(mulsize div 8,temp)) or
  910. { only orddefs are bitpacked }
  911. not is_ordinal(resultdef)
  912. {$ifndef cpu64bitalu}
  913. or is_64bitint(resultdef)
  914. {$endif not cpu64bitalu}
  915. ) then
  916. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  917. if right.nodetype=ordconstn then
  918. begin
  919. { offset can only differ from 0 if arraydef }
  920. if cs_check_range in current_settings.localswitches then
  921. begin
  922. secondpass(right);
  923. case left.resultdef.typ of
  924. arraydef :
  925. rangecheck_array;
  926. stringdef :
  927. rangecheck_string;
  928. else
  929. ;
  930. end;
  931. end;
  932. if not(is_packed_array(left.resultdef)) or
  933. ((mulsize mod 8 = 0) and
  934. (ispowerof2(mulsize div 8,temp) or
  935. { only orddefs are bitpacked }
  936. not is_ordinal(resultdef))) then
  937. begin
  938. extraoffset:=tordconstnode(right).value.svalue;
  939. update_reference_offset(location.reference,extraoffset,bytemulsize);
  940. { adjust alignment after this change }
  941. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  942. { actually an array in a register? }
  943. if (left.location.loc in [LOC_CREGISTER,LOC_REGISTER]) and
  944. is_normal_array(left.resultdef) then
  945. begin
  946. {$if defined(cpu64bitalu)}
  947. hreg:=left.location.register;
  948. {$else defined(cpu64bitalu)}
  949. if target_info.endian=endian_little then
  950. begin
  951. if location.reference.offset>3 then
  952. hreg:=left.location.register64.reghi
  953. else
  954. hreg:=left.location.register64.reglo;
  955. end
  956. else
  957. begin
  958. if location.reference.offset>3 then
  959. hreg:=left.location.register64.reglo
  960. else
  961. hreg:=left.location.register64.reghi;
  962. end;
  963. {$endif defined(cpu64bitalu)}
  964. {$if defined(cpu8bitalu) or defined(cpu16bitalu)}
  965. { we support only the case that one element fills at least one register }
  966. for i:=1 to location.reference.offset mod 4 do
  967. hreg:=cg.GetNextReg(hreg);
  968. {$endif defined(cpu8bitalu) or defined(cpu16bitalu)}
  969. location_reset(location,left.location.loc,def_cgsize(tarraydef(left.resultdef).elementdef));
  970. location.register:=hreg;
  971. end;
  972. end
  973. else
  974. begin
  975. subsetref.ref := location.reference;
  976. subsetref.ref.alignment := left.resultdef.alignment;
  977. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  978. internalerror(2006081212);
  979. alignpow:=temp;
  980. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  981. subsetref.bitindexreg := NR_NO;
  982. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  983. subsetref.bitlen := resultdef.packedbitsize;
  984. if (left.location.loc = LOC_REFERENCE) then
  985. location.loc := LOC_SUBSETREF
  986. else
  987. location.loc := LOC_CSUBSETREF;
  988. location.sref := subsetref;
  989. end;
  990. end
  991. else
  992. { not nodetype=ordconstn }
  993. begin
  994. if (cs_opt_level1 in current_settings.optimizerswitches) and
  995. { if we do range checking, we don't }
  996. { need that fancy code (it would be }
  997. { buggy) }
  998. not(cs_check_range in current_settings.localswitches) and
  999. (left.resultdef.typ=arraydef) and
  1000. not is_packed_array(left.resultdef) then
  1001. begin
  1002. extraoffset:=0;
  1003. rightp:=actualtargetnode(@right);
  1004. if rightp^.nodetype=addn then
  1005. begin
  1006. if taddnode(rightp^).right.nodetype=ordconstn then
  1007. begin
  1008. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  1009. replacenode(rightp^,taddnode(rightp^).left);
  1010. end
  1011. else if taddnode(rightp^).left.nodetype=ordconstn then
  1012. begin
  1013. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  1014. replacenode(rightp^,taddnode(rightp^).right);
  1015. end;
  1016. end
  1017. else if rightp^.nodetype=subn then
  1018. begin
  1019. if taddnode(rightp^).right.nodetype=ordconstn then
  1020. begin
  1021. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  1022. replacenode(rightp^,taddnode(rightp^).left);
  1023. end;
  1024. end;
  1025. update_reference_offset(location.reference,extraoffset,mulsize);
  1026. end;
  1027. { calculate from left to right }
  1028. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  1029. internalerror(200304237);
  1030. secondpass(right);
  1031. if (right.expectloc=LOC_JUMP)<>
  1032. (right.location.loc=LOC_JUMP) then
  1033. internalerror(2006010801);
  1034. { if mulsize = 1, we won't have to modify the index }
  1035. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  1036. not valid_index_size(right.location.size) then
  1037. begin
  1038. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,sizeuinttype,true);
  1039. indexdef:=sizeuinttype
  1040. end
  1041. else
  1042. indexdef:=right.resultdef;
  1043. { produce possible range check code: }
  1044. if cs_check_range in current_settings.localswitches then
  1045. begin
  1046. if left.resultdef.typ=arraydef then
  1047. rangecheck_array
  1048. else if (left.resultdef.typ=stringdef) then
  1049. rangecheck_string;
  1050. end;
  1051. { insert the register and the multiplication factor in the
  1052. reference }
  1053. if not is_packed_array(left.resultdef) then
  1054. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  1055. else
  1056. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  1057. end;
  1058. location.size:=newsize;
  1059. paraloc1.done;
  1060. paraloc2.done;
  1061. end;
  1062. begin
  1063. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1064. cloadparentfpnode:=tcgloadparentfpnode;
  1065. caddrnode:=tcgaddrnode;
  1066. cderefnode:=tcgderefnode;
  1067. csubscriptnode:=tcgsubscriptnode;
  1068. cvecnode:=tcgvecnode;
  1069. end.