cgbase.pas 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. { since we have only 16bit offsets, we need to be able to specify the high
  56. and lower 16 bits of the address of a symbol of up to 64 bit }
  57. trefaddr = (
  58. addr_no,
  59. addr_full,
  60. addr_pic,
  61. addr_pic_no_got
  62. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS)}
  63. ,
  64. addr_low, // bits 48-63
  65. addr_high, // bits 32-47
  66. {$IF defined(POWERPC64)}
  67. addr_higher, // bits 16-31
  68. addr_highest, // bits 00-15
  69. {$ENDIF}
  70. addr_higha // bits 16-31, adjusted
  71. {$IF defined(POWERPC64)}
  72. ,
  73. addr_highera, // bits 32-47, adjusted
  74. addr_highesta // bits 48-63, adjusted
  75. {$ENDIF}
  76. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS}
  77. {$IFDEF MIPS}
  78. ,
  79. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  80. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  81. addr_high_pic,
  82. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  83. addr_high_call
  84. {$ENDIF}
  85. {$IFDEF AVR}
  86. ,addr_lo8
  87. ,addr_hi8
  88. {$ENDIF}
  89. {$IFDEF i8086}
  90. ,addr_dgroup // the data segment group
  91. ,addr_far // used for emitting 'call/jmp far label' instructions
  92. ,addr_far_ref // used for emitting 'call far [reference]' instructions
  93. ,addr_seg // used for getting the segment of an object, e.g. 'mov ax, SEG symbol'
  94. {$ENDIF}
  95. );
  96. {# Generic opcodes, which must be supported by all processors
  97. }
  98. topcg =
  99. (
  100. OP_NONE,
  101. OP_MOVE, { replaced operation with direct load }
  102. OP_ADD, { simple addition }
  103. OP_AND, { simple logical and }
  104. OP_DIV, { simple unsigned division }
  105. OP_IDIV, { simple signed division }
  106. OP_IMUL, { simple signed multiply }
  107. OP_MUL, { simple unsigned multiply }
  108. OP_NEG, { simple negate }
  109. OP_NOT, { simple logical not }
  110. OP_OR, { simple logical or }
  111. OP_SAR, { arithmetic shift-right }
  112. OP_SHL, { logical shift left }
  113. OP_SHR, { logical shift right }
  114. OP_SUB, { simple subtraction }
  115. OP_XOR, { simple exclusive or }
  116. OP_ROL, { rotate left }
  117. OP_ROR { rotate right }
  118. );
  119. {# Generic flag values - used for jump locations }
  120. TOpCmp =
  121. (
  122. OC_NONE,
  123. OC_EQ, { equality comparison }
  124. OC_GT, { greater than (signed) }
  125. OC_LT, { less than (signed) }
  126. OC_GTE, { greater or equal than (signed) }
  127. OC_LTE, { less or equal than (signed) }
  128. OC_NE, { not equal }
  129. OC_BE, { less or equal than (unsigned) }
  130. OC_B, { less than (unsigned) }
  131. OC_AE, { greater or equal than (unsigned) }
  132. OC_A { greater than (unsigned) }
  133. );
  134. { indirect symbol flags }
  135. tindsymflag = (is_data,is_weak);
  136. tindsymflags = set of tindsymflag;
  137. { OS_NO is also used memory references with large data that can
  138. not be loaded in a register directly }
  139. TCgSize = (OS_NO,
  140. { integer registers }
  141. OS_8,OS_16,OS_32,OS_64,OS_128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  142. { single,double,extended,comp,float128 }
  143. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  144. { multi-media sizes: split in byte, word, dword, ... }
  145. { entities, then the signed counterparts }
  146. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,
  147. OS_MS8,OS_MS16,OS_MS32,OS_MS64,OS_MS128,OS_MS256 );
  148. { Register types }
  149. TRegisterType = (
  150. R_INVALIDREGISTER, { = 0 }
  151. R_INTREGISTER, { = 1 }
  152. R_FPUREGISTER, { = 2 }
  153. { used by Intel only }
  154. R_MMXREGISTER, { = 3 }
  155. R_MMREGISTER, { = 4 }
  156. R_SPECIALREGISTER, { = 5 }
  157. R_ADDRESSREGISTER { = 6 }
  158. );
  159. { Sub registers }
  160. TSubRegister = (
  161. R_SUBNONE, { = 0; no sub register possible }
  162. R_SUBL, { = 1; 8 bits, Like AL }
  163. R_SUBH, { = 2; 8 bits, Like AH }
  164. R_SUBW, { = 3; 16 bits, Like AX }
  165. R_SUBD, { = 4; 32 bits, Like EAX }
  166. R_SUBQ, { = 5; 64 bits, Like RAX }
  167. { For Sparc floats that use F0:F1 to store doubles }
  168. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  169. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  170. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  171. R_SUBMMS, { = 9; single scalar in multi media register }
  172. R_SUBMMD, { = 10; double scalar in multi media register }
  173. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  174. { For Intel X86 AVX-Register }
  175. R_SUBMMX, { = 12; 128 BITS }
  176. R_SUBMMY { = 13; 256 BITS }
  177. );
  178. TSubRegisterSet = set of TSubRegister;
  179. TSuperRegister = type word;
  180. {
  181. The new register coding:
  182. SuperRegister (bits 0..15)
  183. Subregister (bits 16..23)
  184. Register type (bits 24..31)
  185. TRegister is defined as an enum to make it incompatible
  186. with TSuperRegister to avoid mixing them
  187. }
  188. TRegister = (
  189. TRegisterLowEnum := Low(longint),
  190. TRegisterHighEnum := High(longint)
  191. );
  192. TRegisterRec=packed record
  193. {$ifdef FPC_BIG_ENDIAN}
  194. regtype : Tregistertype;
  195. subreg : Tsubregister;
  196. supreg : Tsuperregister;
  197. {$else FPC_BIG_ENDIAN}
  198. supreg : Tsuperregister;
  199. subreg : Tsubregister;
  200. regtype : Tregistertype;
  201. {$endif FPC_BIG_ENDIAN}
  202. end;
  203. { A type to store register locations for 64 Bit values. }
  204. {$ifdef cpu64bitalu}
  205. tregister64 = tregister;
  206. tregister128 = record
  207. reglo,reghi : tregister;
  208. end;
  209. {$else cpu64bitalu}
  210. tregister64 = record
  211. reglo,reghi : tregister;
  212. end;
  213. {$endif cpu64bitalu}
  214. Tregistermmxset = record
  215. reg0,reg1,reg2,reg3:Tregister
  216. end;
  217. { Set type definition for registers }
  218. tsuperregisterset = array[byte] of set of byte;
  219. pmmshuffle = ^tmmshuffle;
  220. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  221. passed to an mm operation is nil, it means that the whole location is moved }
  222. tmmshuffle = record
  223. { describes how many shuffles are actually described, if len=0 then
  224. moving the scalar with index 0 to the scalar with index 0 is meant }
  225. len : byte;
  226. { lower nibble of each entry of this array describes index of the source data index while
  227. the upper nibble describes the destination index }
  228. shuffles : array[1..1] of byte;
  229. end;
  230. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  231. Psuperregisterarray=^Tsuperregisterarray;
  232. Tsuperregisterworklist=object
  233. buflength,
  234. buflengthinc,
  235. length:word;
  236. buf:Psuperregisterarray;
  237. constructor init;
  238. constructor copyfrom(const x:Tsuperregisterworklist);
  239. destructor done;
  240. procedure clear;
  241. procedure add(s:tsuperregister);
  242. function addnodup(s:tsuperregister): boolean;
  243. function get:tsuperregister;
  244. function readidx(i:word):tsuperregister;
  245. procedure deleteidx(i:word);
  246. function delete(s:tsuperregister):boolean;
  247. end;
  248. psuperregisterworklist=^tsuperregisterworklist;
  249. const
  250. { alias for easier understanding }
  251. R_SSEREGISTER = R_MMREGISTER;
  252. { Invalid register number }
  253. RS_INVALID = high(tsuperregister);
  254. NR_INVALID = tregister($fffffffff);
  255. tcgsize2size : Array[tcgsize] of integer =
  256. { integer values }
  257. (0,1,2,4,8,16,1,2,4,8,16,
  258. { floating point values }
  259. 4,8,10,8,16,
  260. { multimedia values }
  261. 1,2,4,8,16,32,1,2,4,8,16,32);
  262. tfloat2tcgsize: array[tfloattype] of tcgsize =
  263. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  264. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  265. (s32real,s64real,s80real,s64comp);
  266. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  267. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  268. {$if defined(cpu64bitalu)}
  269. { operand size describing an unsigned value in a pair of int registers }
  270. OS_PAIR = OS_128;
  271. { operand size describing an signed value in a pair of int registers }
  272. OS_SPAIR = OS_S128;
  273. {$elseif defined(cpu32bitalu)}
  274. { operand size describing an unsigned value in a pair of int registers }
  275. OS_PAIR = OS_64;
  276. { operand size describing an signed value in a pair of int registers }
  277. OS_SPAIR = OS_S64;
  278. {$elseif defined(cpu16bitalu)}
  279. { operand size describing an unsigned value in a pair of int registers }
  280. OS_PAIR = OS_32;
  281. { operand size describing an signed value in a pair of int registers }
  282. OS_SPAIR = OS_S32;
  283. {$elseif defined(cpu8bitalu)}
  284. { operand size describing an unsigned value in a pair of int registers }
  285. OS_PAIR = OS_16;
  286. { operand size describing an signed value in a pair of int registers }
  287. OS_SPAIR = OS_S16;
  288. {$endif}
  289. { Table to convert tcgsize variables to the correspondending
  290. unsigned types }
  291. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  292. OS_8,OS_16,OS_32,OS_64,OS_128,OS_8,OS_16,OS_32,OS_64,OS_128,
  293. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  294. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  295. OS_M64,OS_M128,OS_M256);
  296. tcgloc2str : array[TCGLoc] of string[12] = (
  297. 'LOC_INVALID',
  298. 'LOC_VOID',
  299. 'LOC_CONST',
  300. 'LOC_JUMP',
  301. 'LOC_FLAGS',
  302. 'LOC_REG',
  303. 'LOC_CREG',
  304. 'LOC_FPUREG',
  305. 'LOC_CFPUREG',
  306. 'LOC_MMXREG',
  307. 'LOC_CMMXREG',
  308. 'LOC_MMREG',
  309. 'LOC_CMMREG',
  310. 'LOC_SSETREG',
  311. 'LOC_CSSETREG',
  312. 'LOC_SSETREF',
  313. 'LOC_CSSETREF',
  314. 'LOC_CREF',
  315. 'LOC_REF'
  316. );
  317. var
  318. mms_movescalar : pmmshuffle;
  319. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  320. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  321. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  322. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  323. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  324. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  325. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  326. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  327. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  328. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  329. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  330. function generic_regname(r:tregister):string;
  331. {# From a constant numeric value, return the abstract code generator
  332. size.
  333. }
  334. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  335. function int_float_cgsize(const a: tcgint): tcgsize;
  336. { return the inverse condition of opcmp }
  337. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  338. { return the opcmp needed when swapping the operands }
  339. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  340. { return whether op is commutative }
  341. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  342. { returns true, if shuffle describes a real shuffle operation and not only a move }
  343. function realshuffle(shuffle : pmmshuffle) : boolean;
  344. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  345. function shufflescalar(shuffle : pmmshuffle) : boolean;
  346. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  347. the source }
  348. procedure removeshuffles(var shuffle : tmmshuffle);
  349. implementation
  350. uses
  351. verbose;
  352. {******************************************************************************
  353. tsuperregisterworklist
  354. ******************************************************************************}
  355. constructor tsuperregisterworklist.init;
  356. begin
  357. length:=0;
  358. buflength:=0;
  359. buflengthinc:=16;
  360. buf:=nil;
  361. end;
  362. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  363. begin
  364. self:=x;
  365. if x.buf<>nil then
  366. begin
  367. getmem(buf,buflength*sizeof(Tsuperregister));
  368. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  369. end;
  370. end;
  371. destructor tsuperregisterworklist.done;
  372. begin
  373. if assigned(buf) then
  374. freemem(buf);
  375. end;
  376. procedure tsuperregisterworklist.add(s:tsuperregister);
  377. begin
  378. inc(length);
  379. { Need to increase buffer length? }
  380. if length>=buflength then
  381. begin
  382. inc(buflength,buflengthinc);
  383. buflengthinc:=buflengthinc*2;
  384. if buflengthinc>256 then
  385. buflengthinc:=256;
  386. reallocmem(buf,buflength*sizeof(Tsuperregister));
  387. end;
  388. buf^[length-1]:=s;
  389. end;
  390. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  391. begin
  392. addnodup := false;
  393. if indexword(buf^,length,s) = -1 then
  394. begin
  395. add(s);
  396. addnodup := true;
  397. end;
  398. end;
  399. procedure tsuperregisterworklist.clear;
  400. begin
  401. length:=0;
  402. end;
  403. procedure tsuperregisterworklist.deleteidx(i:word);
  404. begin
  405. if i>=length then
  406. internalerror(200310144);
  407. buf^[i]:=buf^[length-1];
  408. dec(length);
  409. end;
  410. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  411. begin
  412. if (i >= length) then
  413. internalerror(2005010601);
  414. result := buf^[i];
  415. end;
  416. function tsuperregisterworklist.get:tsuperregister;
  417. begin
  418. if length=0 then
  419. internalerror(200310142);
  420. get:=buf^[0];
  421. buf^[0]:=buf^[length-1];
  422. dec(length);
  423. end;
  424. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  425. var
  426. i:longint;
  427. begin
  428. delete:=false;
  429. { indexword in 1.0.x and 1.9.4 is broken }
  430. i:=indexword(buf^,length,s);
  431. if i<>-1 then
  432. begin
  433. deleteidx(i);
  434. delete := true;
  435. end;
  436. end;
  437. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  438. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  439. begin
  440. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  441. end;
  442. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  443. begin
  444. include(regs[s shr 8],(s and $ff));
  445. end;
  446. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  447. begin
  448. exclude(regs[s shr 8],(s and $ff));
  449. end;
  450. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  451. begin
  452. result:=(s and $ff) in regs[s shr 8];
  453. end;
  454. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  455. begin
  456. tregisterrec(result).regtype:=rt;
  457. tregisterrec(result).supreg:=sr;
  458. tregisterrec(result).subreg:=sb;
  459. end;
  460. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  461. begin
  462. result:=tregisterrec(r).subreg;
  463. end;
  464. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  465. begin
  466. result:=tregisterrec(r).supreg;
  467. end;
  468. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  469. begin
  470. result:=tregisterrec(r).regtype;
  471. end;
  472. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  473. begin
  474. tregisterrec(r).subreg:=sr;
  475. end;
  476. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  477. begin
  478. tregisterrec(r).supreg:=sr;
  479. end;
  480. function generic_regname(r:tregister):string;
  481. var
  482. nr : string[12];
  483. begin
  484. str(getsupreg(r),nr);
  485. case getregtype(r) of
  486. R_INTREGISTER:
  487. result:='ireg'+nr;
  488. R_FPUREGISTER:
  489. result:='freg'+nr;
  490. R_MMREGISTER:
  491. result:='mreg'+nr;
  492. R_MMXREGISTER:
  493. result:='xreg'+nr;
  494. R_ADDRESSREGISTER:
  495. result:='areg'+nr;
  496. R_SPECIALREGISTER:
  497. result:='sreg'+nr;
  498. else
  499. begin
  500. result:='INVALID';
  501. exit;
  502. end;
  503. end;
  504. case getsubreg(r) of
  505. R_SUBNONE:
  506. ;
  507. R_SUBL:
  508. result:=result+'l';
  509. R_SUBH:
  510. result:=result+'h';
  511. R_SUBW:
  512. result:=result+'w';
  513. R_SUBD:
  514. result:=result+'d';
  515. R_SUBQ:
  516. result:=result+'q';
  517. R_SUBFS:
  518. result:=result+'fs';
  519. R_SUBFD:
  520. result:=result+'fd';
  521. R_SUBMMD:
  522. result:=result+'md';
  523. R_SUBMMS:
  524. result:=result+'ms';
  525. R_SUBMMWHOLE:
  526. result:=result+'ma';
  527. R_SUBMMX:
  528. result:=result+'mx';
  529. R_SUBMMY:
  530. result:=result+'my';
  531. else
  532. internalerror(200308252);
  533. end;
  534. end;
  535. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  536. const
  537. size2cgsize : array[0..8] of tcgsize = (
  538. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  539. );
  540. begin
  541. {$ifdef cpu64bitalu}
  542. if a=16 then
  543. result:=OS_128
  544. else
  545. {$endif cpu64bitalu}
  546. if a>8 then
  547. result:=OS_NO
  548. else
  549. result:=size2cgsize[a];
  550. end;
  551. function int_float_cgsize(const a: tcgint): tcgsize;
  552. begin
  553. case a of
  554. 4 :
  555. result:=OS_F32;
  556. 8 :
  557. result:=OS_F64;
  558. 10 :
  559. result:=OS_F80;
  560. 16 :
  561. result:=OS_F128;
  562. else
  563. internalerror(200603211);
  564. end;
  565. end;
  566. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  567. const
  568. list: array[TOpCmp] of TOpCmp =
  569. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  570. OC_B,OC_BE);
  571. begin
  572. inverse_opcmp := list[opcmp];
  573. end;
  574. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  575. const
  576. list: array[TOpCmp] of TOpCmp =
  577. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  578. OC_BE,OC_B);
  579. begin
  580. swap_opcmp := list[opcmp];
  581. end;
  582. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  583. const
  584. list: array[topcg] of boolean =
  585. (true,false,true,true,false,false,true,true,false,false,
  586. true,false,false,false,false,true,false,false);
  587. begin
  588. commutativeop := list[op];
  589. end;
  590. function realshuffle(shuffle : pmmshuffle) : boolean;
  591. var
  592. i : longint;
  593. begin
  594. realshuffle:=true;
  595. if (shuffle=nil) or (shuffle^.len=0) then
  596. realshuffle:=false
  597. else
  598. begin
  599. for i:=1 to shuffle^.len do
  600. begin
  601. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
  602. exit;
  603. end;
  604. realshuffle:=false;
  605. end;
  606. end;
  607. function shufflescalar(shuffle : pmmshuffle) : boolean;
  608. begin
  609. result:=shuffle^.len=0;
  610. end;
  611. procedure removeshuffles(var shuffle : tmmshuffle);
  612. var
  613. i : longint;
  614. begin
  615. if shuffle.len=0 then
  616. exit;
  617. for i:=1 to shuffle.len do
  618. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  619. end;
  620. initialization
  621. new(mms_movescalar);
  622. mms_movescalar^.len:=0;
  623. finalization
  624. dispose(mms_movescalar);
  625. end.