cgobj.pas 163 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times : longint;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_extend_backwards(b: boolean);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. This must be overriden for each CPU target.
  102. @param(size size of the operand in the register)
  103. @param(r register source of the operand)
  104. @param(cgpara where the parameter will be stored)
  105. }
  106. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  107. {# Pass a parameter, which is a constant, to a routine.
  108. A generic version is provided. This routine should
  109. be overriden for optimization purposes if the cpu
  110. permits directly sending this type of parameter.
  111. @param(size size of the operand in constant)
  112. @param(a value of constant to send)
  113. @param(cgpara where the parameter will be stored)
  114. }
  115. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  116. {# Pass the value of a parameter, which is located in memory, to a routine.
  117. A generic version is provided. This routine should
  118. be overriden for optimization purposes if the cpu
  119. permits directly sending this type of parameter.
  120. @param(size size of the operand in constant)
  121. @param(r Memory reference of value to send)
  122. @param(cgpara where the parameter will be stored)
  123. }
  124. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  125. {# Pass the value of a parameter, which can be located either in a register or memory location,
  126. to a routine.
  127. A generic version is provided.
  128. @param(l location of the operand to send)
  129. @param(nr parameter number (starting from one) of routine (from left to right))
  130. @param(cgpara where the parameter will be stored)
  131. }
  132. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  133. {# Pass the address of a reference to a routine. This routine
  134. will calculate the address of the reference, and pass this
  135. calculated address as a parameter.
  136. A generic version is provided. This routine should
  137. be overriden for optimization purposes if the cpu
  138. permits directly sending this type of parameter.
  139. @param(r reference to get address from)
  140. @param(nr parameter number (starting from one) of routine (from left to right))
  141. }
  142. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  143. { Remarks:
  144. * If a method specifies a size you have only to take care
  145. of that number of bits, i.e. load_const_reg with OP_8 must
  146. only load the lower 8 bit of the specified register
  147. the rest of the register can be undefined
  148. if necessary the compiler will call a method
  149. to zero or sign extend the register
  150. * The a_load_XX_XX with OP_64 needn't to be
  151. implemented for 32 bit
  152. processors, the code generator takes care of that
  153. * the addr size is for work with the natural pointer
  154. size
  155. * the procedures without fpu/mm are only for integer usage
  156. * normally the first location is the source and the
  157. second the destination
  158. }
  159. {# Emits instruction to call the method specified by symbol name.
  160. This routine must be overriden for each new target cpu.
  161. There is no a_call_ref because loading the reference will use
  162. a temp register on most cpu's resulting in conflicts with the
  163. registers used for the parameters (PFV)
  164. }
  165. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  166. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  167. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  168. { same as a_call_name, might be overriden on certain architectures to emit
  169. static calls without usage of a got trampoline }
  170. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  171. { move instructions }
  172. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  173. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  174. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  175. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  176. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  177. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  178. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  179. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  180. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  181. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  182. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  183. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  184. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  185. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  186. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  187. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  188. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  189. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  190. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  191. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  192. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  193. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  194. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  195. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  196. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  197. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  198. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  199. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  200. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  201. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  202. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  203. { bit test instructions }
  204. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  205. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister); virtual;
  206. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister); virtual;
  207. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); virtual;
  208. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  209. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  210. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  211. { bit set/clear instructions }
  212. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  213. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference); virtual;
  214. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister); virtual;
  215. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister); virtual;
  216. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  217. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  218. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  219. { fpu move instructions }
  220. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  221. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  222. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  223. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  224. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  225. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  226. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  227. { vector register move instructions }
  228. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  229. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  230. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  231. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  232. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  233. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  234. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  235. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  236. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  237. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  238. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  239. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  240. { basic arithmetic operations }
  241. { note: for operators which require only one argument (not, neg), use }
  242. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  243. { that in this case the *second* operand is used as both source and }
  244. { destination (JM) }
  245. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  246. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  247. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  248. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  249. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  250. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  251. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  252. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  253. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  254. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  255. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  256. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  257. { trinary operations for processors that support them, 'emulated' }
  258. { on others. None with "ref" arguments since I don't think there }
  259. { are any processors that support it (JM) }
  260. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  261. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  262. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  263. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  264. { comparison operations }
  265. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  266. l : tasmlabel);virtual; abstract;
  267. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  268. l : tasmlabel); virtual;
  269. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  270. l : tasmlabel);
  271. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  272. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  273. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  274. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  275. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  276. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  277. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  278. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  279. l : tasmlabel);
  280. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  281. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  282. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  283. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  284. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  285. }
  286. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  287. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  288. {
  289. This routine tries to optimize the op_const_reg/ref opcode, and should be
  290. called at the start of a_op_const_reg/ref. It returns the actual opcode
  291. to emit, and the constant value to emit. This function can opcode OP_NONE to
  292. remove the opcode and OP_MOVE to replace it with a simple load
  293. @param(op The opcode to emit, returns the opcode which must be emitted)
  294. @param(a The constant which should be emitted, returns the constant which must
  295. be emitted)
  296. }
  297. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  298. {#
  299. This routine is used in exception management nodes. It should
  300. save the exception reason currently in the FUNCTION_RETURN_REG. The
  301. save should be done either to a temp (pointed to by href).
  302. or on the stack (pushing the value on the stack).
  303. The size of the value to save is OS_S32. The default version
  304. saves the exception reason to a temp. memory area.
  305. }
  306. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  307. {#
  308. This routine is used in exception management nodes. It should
  309. save the exception reason constant. The
  310. save should be done either to a temp (pointed to by href).
  311. or on the stack (pushing the value on the stack).
  312. The size of the value to save is OS_S32. The default version
  313. saves the exception reason to a temp. memory area.
  314. }
  315. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  316. {#
  317. This routine is used in exception management nodes. It should
  318. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  319. should either be in the temp. area (pointed to by href , href should
  320. *NOT* be freed) or on the stack (the value should be popped).
  321. The size of the value to save is OS_S32. The default version
  322. saves the exception reason to a temp. memory area.
  323. }
  324. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  325. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  326. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  327. {# This should emit the opcode to copy len bytes from the source
  328. to destination.
  329. It must be overriden for each new target processor.
  330. @param(source Source reference of copy)
  331. @param(dest Destination reference of copy)
  332. }
  333. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  334. {# This should emit the opcode to copy len bytes from the an unaligned source
  335. to destination.
  336. It must be overriden for each new target processor.
  337. @param(source Source reference of copy)
  338. @param(dest Destination reference of copy)
  339. }
  340. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  341. {# This should emit the opcode to a shortrstring from the source
  342. to destination.
  343. @param(source Source reference of copy)
  344. @param(dest Destination reference of copy)
  345. }
  346. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  347. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  348. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  349. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  350. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  351. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  352. {# Generates range checking code. It is to note
  353. that this routine does not need to be overriden,
  354. as it takes care of everything.
  355. @param(p Node which contains the value to check)
  356. @param(todef Type definition of node to range check)
  357. }
  358. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  359. {# Generates overflow checking code for a node }
  360. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  361. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  362. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  363. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  364. {# Emits instructions when compilation is done in profile
  365. mode (this is set as a command line option). The default
  366. behavior does nothing, should be overriden as required.
  367. }
  368. procedure g_profilecode(list : TAsmList);virtual;
  369. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  370. @param(size Number of bytes to allocate)
  371. }
  372. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  373. {# Emits instruction for allocating the locals in entry
  374. code of a routine. This is one of the first
  375. routine called in @var(genentrycode).
  376. @param(localsize Number of bytes to allocate as locals)
  377. }
  378. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  379. {# Emits instructions for returning from a subroutine.
  380. Should also restore the framepointer and stack.
  381. @param(parasize Number of bytes of parameters to deallocate from stack)
  382. }
  383. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  384. {# This routine is called when generating the code for the entry point
  385. of a routine. It should save all registers which are not used in this
  386. routine, and which should be declared as saved in the std_saved_registers
  387. set.
  388. This routine is mainly used when linking to code which is generated
  389. by ABI-compliant compilers (like GCC), to make sure that the reserved
  390. registers of that ABI are not clobbered.
  391. @param(usedinproc Registers which are used in the code of this routine)
  392. }
  393. procedure g_save_standard_registers(list:TAsmList);virtual;
  394. {# This routine is called when generating the code for the exit point
  395. of a routine. It should restore all registers which were previously
  396. saved in @var(g_save_standard_registers).
  397. @param(usedinproc Registers which are used in the code of this routine)
  398. }
  399. procedure g_restore_standard_registers(list:TAsmList);virtual;
  400. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  401. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  402. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  403. protected
  404. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  405. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  406. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  407. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  408. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  409. function get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  410. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  411. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  412. end;
  413. {$ifndef cpu64bit}
  414. {# @abstract(Abstract code generator for 64 Bit operations)
  415. This class implements an abstract code generator class
  416. for 64 Bit operations.
  417. }
  418. tcg64 = class
  419. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  420. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  421. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  422. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  423. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  424. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  425. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  426. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  427. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  428. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  429. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  430. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  431. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  432. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  433. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  434. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  435. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  436. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  437. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  438. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  439. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  440. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  441. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  442. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  443. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  444. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  445. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  446. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  447. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  448. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  449. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  450. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  451. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  452. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  453. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  454. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  455. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  456. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  457. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  458. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  459. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  460. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  461. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  462. {
  463. This routine tries to optimize the const_reg opcode, and should be
  464. called at the start of a_op64_const_reg. It returns the actual opcode
  465. to emit, and the constant value to emit. If this routine returns
  466. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  467. @param(op The opcode to emit, returns the opcode which must be emitted)
  468. @param(a The constant which should be emitted, returns the constant which must
  469. be emitted)
  470. @param(reg The register to emit the opcode with, returns the register with
  471. which the opcode will be emitted)
  472. }
  473. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  474. { override to catch 64bit rangechecks }
  475. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  476. end;
  477. {$endif cpu64bit}
  478. var
  479. {# Main code generator class }
  480. cg : tcg;
  481. {$ifndef cpu64bit}
  482. {# Code generator class for all operations working with 64-Bit operands }
  483. cg64 : tcg64;
  484. {$endif cpu64bit}
  485. implementation
  486. uses
  487. globals,options,systems,
  488. verbose,defutil,paramgr,symsym,
  489. tgobj,cutils,procinfo,
  490. ncgrtti;
  491. {*****************************************************************************
  492. basic functionallity
  493. ******************************************************************************}
  494. constructor tcg.create;
  495. begin
  496. end;
  497. {*****************************************************************************
  498. register allocation
  499. ******************************************************************************}
  500. procedure tcg.init_register_allocators;
  501. begin
  502. fillchar(rg,sizeof(rg),0);
  503. add_reg_instruction_hook:=@add_reg_instruction;
  504. end;
  505. procedure tcg.done_register_allocators;
  506. begin
  507. { Safety }
  508. fillchar(rg,sizeof(rg),0);
  509. add_reg_instruction_hook:=nil;
  510. end;
  511. {$ifdef flowgraph}
  512. procedure Tcg.init_flowgraph;
  513. begin
  514. aktflownode:=0;
  515. end;
  516. procedure Tcg.done_flowgraph;
  517. begin
  518. end;
  519. {$endif}
  520. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  521. begin
  522. if not assigned(rg[R_INTREGISTER]) then
  523. internalerror(200312122);
  524. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  525. end;
  526. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  527. begin
  528. if not assigned(rg[R_FPUREGISTER]) then
  529. internalerror(200312123);
  530. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  531. end;
  532. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  533. begin
  534. if not assigned(rg[R_MMREGISTER]) then
  535. internalerror(2003121214);
  536. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  537. end;
  538. function tcg.getaddressregister(list:TAsmList):Tregister;
  539. begin
  540. if assigned(rg[R_ADDRESSREGISTER]) then
  541. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  542. else
  543. begin
  544. if not assigned(rg[R_INTREGISTER]) then
  545. internalerror(200312121);
  546. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  547. end;
  548. end;
  549. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  550. var
  551. subreg:Tsubregister;
  552. begin
  553. subreg:=cgsize2subreg(size);
  554. result:=reg;
  555. setsubreg(result,subreg);
  556. { notify RA }
  557. if result<>reg then
  558. list.concat(tai_regalloc.resize(result));
  559. end;
  560. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  561. begin
  562. if not assigned(rg[getregtype(r)]) then
  563. internalerror(200312125);
  564. rg[getregtype(r)].getcpuregister(list,r);
  565. end;
  566. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  567. begin
  568. if not assigned(rg[getregtype(r)]) then
  569. internalerror(200312126);
  570. rg[getregtype(r)].ungetcpuregister(list,r);
  571. end;
  572. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  573. begin
  574. if assigned(rg[rt]) then
  575. rg[rt].alloccpuregisters(list,r)
  576. else
  577. internalerror(200310092);
  578. end;
  579. procedure tcg.allocallcpuregisters(list:TAsmList);
  580. begin
  581. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  582. {$ifndef i386}
  583. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  584. {$ifdef cpumm}
  585. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  586. {$endif cpumm}
  587. {$endif i386}
  588. end;
  589. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  590. begin
  591. if assigned(rg[rt]) then
  592. rg[rt].dealloccpuregisters(list,r)
  593. else
  594. internalerror(200310093);
  595. end;
  596. procedure tcg.deallocallcpuregisters(list:TAsmList);
  597. begin
  598. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  599. {$ifndef i386}
  600. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  601. {$ifdef cpumm}
  602. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  603. {$endif cpumm}
  604. {$endif i386}
  605. end;
  606. function tcg.uses_registers(rt:Tregistertype):boolean;
  607. begin
  608. if assigned(rg[rt]) then
  609. result:=rg[rt].uses_registers
  610. else
  611. result:=false;
  612. end;
  613. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  614. var
  615. rt : tregistertype;
  616. begin
  617. rt:=getregtype(r);
  618. { Only add it when a register allocator is configured.
  619. No IE can be generated, because the VMT is written
  620. without a valid rg[] }
  621. if assigned(rg[rt]) then
  622. rg[rt].add_reg_instruction(instr,r);
  623. end;
  624. procedure tcg.add_move_instruction(instr:Taicpu);
  625. var
  626. rt : tregistertype;
  627. begin
  628. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  629. if assigned(rg[rt]) then
  630. rg[rt].add_move_instruction(instr)
  631. else
  632. internalerror(200310095);
  633. end;
  634. procedure tcg.set_regalloc_extend_backwards(b: boolean);
  635. var
  636. rt : tregistertype;
  637. begin
  638. for rt:=low(rg) to high(rg) do
  639. begin
  640. if assigned(rg[rt]) then
  641. rg[rt].extend_live_range_backwards := b;;
  642. end;
  643. end;
  644. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  645. var
  646. rt : tregistertype;
  647. begin
  648. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  649. begin
  650. if assigned(rg[rt]) then
  651. rg[rt].do_register_allocation(list,headertai);
  652. end;
  653. { running the other register allocator passes could require addition int/addr. registers
  654. when spilling so run int/addr register allocation at the end }
  655. if assigned(rg[R_INTREGISTER]) then
  656. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  657. if assigned(rg[R_ADDRESSREGISTER]) then
  658. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  659. end;
  660. procedure tcg.translate_register(var reg : tregister);
  661. begin
  662. rg[getregtype(reg)].translate_register(reg);
  663. end;
  664. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  665. begin
  666. list.concat(tai_regalloc.alloc(r,nil));
  667. end;
  668. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  669. begin
  670. list.concat(tai_regalloc.dealloc(r,nil));
  671. end;
  672. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  673. var
  674. instr : tai;
  675. begin
  676. instr:=tai_regalloc.sync(r);
  677. list.concat(instr);
  678. add_reg_instruction(instr,r);
  679. end;
  680. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  681. begin
  682. list.concat(tai_label.create(l));
  683. end;
  684. {*****************************************************************************
  685. for better code generation these methods should be overridden
  686. ******************************************************************************}
  687. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  688. var
  689. ref : treference;
  690. begin
  691. cgpara.check_simple_location;
  692. case cgpara.location^.loc of
  693. LOC_REGISTER,LOC_CREGISTER:
  694. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  695. LOC_REFERENCE,LOC_CREFERENCE:
  696. begin
  697. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  698. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  699. end
  700. else
  701. internalerror(2002071004);
  702. end;
  703. end;
  704. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  705. var
  706. ref : treference;
  707. begin
  708. cgpara.check_simple_location;
  709. case cgpara.location^.loc of
  710. LOC_REGISTER,LOC_CREGISTER:
  711. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  712. LOC_REFERENCE,LOC_CREFERENCE:
  713. begin
  714. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  715. a_load_const_ref(list,cgpara.location^.size,a,ref);
  716. end
  717. else
  718. internalerror(2002071004);
  719. end;
  720. end;
  721. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  722. var
  723. ref : treference;
  724. begin
  725. cgpara.check_simple_location;
  726. case cgpara.location^.loc of
  727. LOC_REGISTER,LOC_CREGISTER:
  728. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  729. LOC_REFERENCE,LOC_CREFERENCE:
  730. begin
  731. reference_reset(ref);
  732. ref.base:=cgpara.location^.reference.index;
  733. ref.offset:=cgpara.location^.reference.offset;
  734. if (size <> OS_NO) and
  735. (tcgsize2size[size] < sizeof(aint)) then
  736. begin
  737. if (cgpara.size = OS_NO) or
  738. assigned(cgpara.location^.next) then
  739. internalerror(2006052401);
  740. a_load_ref_ref(list,size,cgpara.size,r,ref);
  741. end
  742. else
  743. { use concatcopy, because the parameter can be larger than }
  744. { what the OS_* constants can handle }
  745. g_concatcopy(list,r,ref,cgpara.intsize);
  746. end
  747. else
  748. internalerror(2002071004);
  749. end;
  750. end;
  751. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  752. begin
  753. case l.loc of
  754. LOC_REGISTER,
  755. LOC_CREGISTER :
  756. a_param_reg(list,l.size,l.register,cgpara);
  757. LOC_CONSTANT :
  758. a_param_const(list,l.size,l.value,cgpara);
  759. LOC_CREFERENCE,
  760. LOC_REFERENCE :
  761. a_param_ref(list,l.size,l.reference,cgpara);
  762. else
  763. internalerror(2002032211);
  764. end;
  765. end;
  766. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  767. var
  768. hr : tregister;
  769. begin
  770. cgpara.check_simple_location;
  771. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  772. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  773. else
  774. begin
  775. hr:=getaddressregister(list);
  776. a_loadaddr_ref_reg(list,r,hr);
  777. a_param_reg(list,OS_ADDR,hr,cgpara);
  778. end;
  779. end;
  780. {****************************************************************************
  781. some generic implementations
  782. ****************************************************************************}
  783. {$ifopt r+}
  784. {$define rangeon}
  785. {$r-}
  786. {$endif}
  787. {$ifopt q+}
  788. {$define overflowon}
  789. {$q-}
  790. {$endif}
  791. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  792. var
  793. bitmask: aword;
  794. tmpreg: tregister;
  795. stopbit: byte;
  796. begin
  797. tmpreg:=getintregister(list,sreg.subsetregsize);
  798. if (subsetsize in [OS_S8..OS_S128]) then
  799. begin
  800. { sign extend in case the value has a bitsize mod 8 <> 0 }
  801. { both instructions will be optimized away if not }
  802. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  803. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  804. end
  805. else
  806. begin
  807. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  808. stopbit := sreg.startbit + sreg.bitlen;
  809. // on x86(64), 1 shl 32(64) = 1 instead of 0
  810. // use aword to prevent overflow with 1 shl 31
  811. if (stopbit - sreg.startbit <> AIntBits) then
  812. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  813. else
  814. bitmask := high(aword);
  815. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  816. end;
  817. tmpreg := makeregsize(list,tmpreg,subsetsize);
  818. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  819. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  820. end;
  821. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  822. begin
  823. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  824. end;
  825. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  826. var
  827. bitmask: aword;
  828. tmpreg: tregister;
  829. stopbit: byte;
  830. begin
  831. stopbit := sreg.startbit + sreg.bitlen;
  832. // on x86(64), 1 shl 32(64) = 1 instead of 0
  833. if (stopbit <> AIntBits) then
  834. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  835. else
  836. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  837. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  838. begin
  839. tmpreg:=getintregister(list,sreg.subsetregsize);
  840. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  841. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  842. if (slopt <> SL_REGNOSRCMASK) then
  843. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  844. end;
  845. if (slopt <> SL_SETMAX) then
  846. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  847. case slopt of
  848. SL_SETZERO : ;
  849. SL_SETMAX :
  850. if (sreg.bitlen <> AIntBits) then
  851. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  852. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  853. sreg.subsetreg)
  854. else
  855. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  856. else
  857. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  858. end;
  859. end;
  860. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  861. var
  862. tmpreg: tregister;
  863. bitmask: aword;
  864. stopbit: byte;
  865. begin
  866. if (fromsreg.bitlen >= tosreg.bitlen) then
  867. begin
  868. tmpreg := getintregister(list,tosreg.subsetregsize);
  869. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  870. if (fromsreg.startbit <= tosreg.startbit) then
  871. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  872. else
  873. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  874. stopbit := tosreg.startbit + tosreg.bitlen;
  875. // on x86(64), 1 shl 32(64) = 1 instead of 0
  876. if (stopbit <> AIntBits) then
  877. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  878. else
  879. bitmask := (aword(1) shl tosreg.startbit) - 1;
  880. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  881. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  882. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  883. end
  884. else
  885. begin
  886. tmpreg := getintregister(list,tosubsetsize);
  887. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  888. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  889. end;
  890. end;
  891. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  892. var
  893. tmpreg: tregister;
  894. begin
  895. tmpreg := getintregister(list,tosize);
  896. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  897. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  898. end;
  899. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  900. var
  901. tmpreg: tregister;
  902. begin
  903. tmpreg := getintregister(list,subsetsize);
  904. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  905. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  906. end;
  907. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  908. var
  909. bitmask: aword;
  910. stopbit: byte;
  911. begin
  912. stopbit := sreg.startbit + sreg.bitlen;
  913. // on x86(64), 1 shl 32(64) = 1 instead of 0
  914. if (stopbit <> AIntBits) then
  915. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  916. else
  917. bitmask := (aword(1) shl sreg.startbit) - 1;
  918. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  919. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  920. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  921. end;
  922. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  923. begin
  924. case loc.loc of
  925. LOC_REFERENCE,LOC_CREFERENCE:
  926. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  927. LOC_REGISTER,LOC_CREGISTER:
  928. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  929. LOC_CONSTANT:
  930. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  931. LOC_SUBSETREG,LOC_CSUBSETREG:
  932. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  933. LOC_SUBSETREF,LOC_CSUBSETREF:
  934. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  935. else
  936. internalerror(200608053);
  937. end;
  938. end;
  939. (*
  940. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  941. in memory. They are like a regular reference, but contain an extra bit
  942. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  943. and a bit length (always constant).
  944. Bit packed values are stored differently in memory depending on whether we
  945. are on a big or a little endian system (compatible with at least GPC). The
  946. size of the basic working unit is always the smallest power-of-2 byte size
  947. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  948. bytes, 17..32 bits -> 4 bytes etc).
  949. On a big endian, 5-bit: values are stored like this:
  950. 11111222 22333334 44445555 56666677 77788888
  951. The leftmost bit of each 5-bit value corresponds to the most significant
  952. bit.
  953. On little endian, it goes like this:
  954. 22211111 43333322 55554444 77666665 88888777
  955. In this case, per byte the left-most bit is more significant than those on
  956. the right, but the bits in the next byte are all more significant than
  957. those in the previous byte (e.g., the 222 in the first byte are the low
  958. three bits of that value, while the 22 in the second byte are the upper
  959. two bits.
  960. Big endian, 9 bit values:
  961. 11111111 12222222 22333333 33344444 ...
  962. Little endian, 9 bit values:
  963. 11111111 22222221 33333322 44444333 ...
  964. This is memory representation and the 16 bit values are byteswapped.
  965. Similarly as in the previous case, the 2222222 string contains the lower
  966. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  967. registers (two 16 bit registers in the current implementation, although a
  968. single 32 bit register would be possible too, in particular if 32 bit
  969. alignment can be guaranteed), this becomes:
  970. 22222221 11111111 44444333 33333322 ...
  971. (l)ow u l l u l u
  972. The startbit/bitindex in a subsetreference always refers to
  973. a) on big endian: the most significant bit of the value
  974. (bits counted from left to right, both memory an registers)
  975. b) on little endian: the least significant bit when the value
  976. is loaded in a register (bit counted from right to left)
  977. Although a) results in more complex code for big endian systems, it's
  978. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  979. Apple's universal interfaces which depend on these layout differences).
  980. Note: when changing the loadsize calculated in get_subsetref_load_info,
  981. make sure the appropriate alignment is guaranteed, at least in case of
  982. {$defined cpurequiresproperalignment}.
  983. *)
  984. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  985. var
  986. intloadsize: aint;
  987. begin
  988. intloadsize := packedbitsloadsize(sref.bitlen);
  989. {$if not(defined(arm)) and not(defined(sparc))}
  990. { may need to be split into several smaller loads/stores }
  991. if (tf_requires_proper_alignment in target_info.flags) and
  992. (intloadsize <> 1) and
  993. (intloadsize <> sref.ref.alignment) then
  994. internalerror(2006082011);
  995. {$endif not(defined(arm)) and not(defined(sparc))}
  996. if (intloadsize = 0) then
  997. internalerror(2006081310);
  998. if (intloadsize > sizeof(aint)) then
  999. intloadsize := sizeof(aint);
  1000. loadsize := int_cgsize(intloadsize);
  1001. if (loadsize = OS_NO) then
  1002. internalerror(2006081311);
  1003. if (sref.bitlen > sizeof(aint)*8) then
  1004. internalerror(2006081312);
  1005. extra_load :=
  1006. (sref.bitlen <> 1) and
  1007. ((sref.bitindexreg <> NR_NO) or
  1008. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1009. end;
  1010. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1011. var
  1012. restbits: byte;
  1013. begin
  1014. if (target_info.endian = endian_big) then
  1015. begin
  1016. { valuereg contains the upper bits, extra_value_reg the lower }
  1017. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1018. if (subsetsize in [OS_S8..OS_S128]) then
  1019. begin
  1020. { sign extend }
  1021. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1022. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1023. end
  1024. else
  1025. begin
  1026. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1027. { mask other bits }
  1028. if (sref.bitlen <> AIntBits) then
  1029. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1030. end;
  1031. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1032. end
  1033. else
  1034. begin
  1035. { valuereg contains the lower bits, extra_value_reg the upper }
  1036. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1037. if (subsetsize in [OS_S8..OS_S128]) then
  1038. begin
  1039. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1040. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1041. end
  1042. else
  1043. begin
  1044. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1045. { mask other bits }
  1046. if (sref.bitlen <> AIntBits) then
  1047. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1048. end;
  1049. end;
  1050. { merge }
  1051. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1052. end;
  1053. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1054. var
  1055. tmpreg: tregister;
  1056. begin
  1057. tmpreg := getintregister(list,OS_INT);
  1058. if (target_info.endian = endian_big) then
  1059. begin
  1060. { since this is a dynamic index, it's possible that the value }
  1061. { is entirely in valuereg. }
  1062. { get the data in valuereg in the right place }
  1063. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1064. if (subsetsize in [OS_S8..OS_S128]) then
  1065. begin
  1066. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1067. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1068. end
  1069. else
  1070. begin
  1071. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1072. if (loadbitsize <> AIntBits) then
  1073. { mask left over bits }
  1074. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1075. end;
  1076. tmpreg := getintregister(list,OS_INT);
  1077. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1078. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1079. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1080. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1081. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1082. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1083. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1084. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1085. { => extra_value_reg is now 0 }
  1086. { merge }
  1087. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1088. { no need to mask, necessary masking happened earlier on }
  1089. end
  1090. else
  1091. begin
  1092. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1093. { Y-x = -(Y-x) }
  1094. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1095. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1096. { tmpreg is in the range 1..<cpu_bitsize> -> will zero extra_value_reg }
  1097. { if all bits are in valuereg }
  1098. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1099. {$ifdef x86}
  1100. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1101. if (loadbitsize = AIntBits) then
  1102. begin
  1103. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1104. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
  1105. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1106. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1107. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1108. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1109. end;
  1110. {$endif x86}
  1111. { merge }
  1112. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1113. { sign extend or mask other bits }
  1114. if (subsetsize in [OS_S8..OS_S128]) then
  1115. begin
  1116. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1117. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1118. end
  1119. else
  1120. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1121. end;
  1122. end;
  1123. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1124. var
  1125. tmpref: treference;
  1126. valuereg,extra_value_reg: tregister;
  1127. tosreg: tsubsetregister;
  1128. loadsize: tcgsize;
  1129. loadbitsize: byte;
  1130. extra_load: boolean;
  1131. begin
  1132. get_subsetref_load_info(sref,loadsize,extra_load);
  1133. loadbitsize := tcgsize2size[loadsize]*8;
  1134. { load the (first part) of the bit sequence }
  1135. valuereg := getintregister(list,OS_INT);
  1136. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1137. if not extra_load then
  1138. begin
  1139. { everything is guaranteed to be in a single register of loadsize }
  1140. if (sref.bitindexreg = NR_NO) then
  1141. begin
  1142. { use subsetreg routine, it may have been overridden with an optimized version }
  1143. tosreg.subsetreg := valuereg;
  1144. tosreg.subsetregsize := OS_INT;
  1145. { subsetregs always count bits from right to left }
  1146. if (target_info.endian = endian_big) then
  1147. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1148. else
  1149. tosreg.startbit := sref.startbit;
  1150. tosreg.bitlen := sref.bitlen;
  1151. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1152. exit;
  1153. end
  1154. else
  1155. begin
  1156. if (sref.startbit <> 0) then
  1157. internalerror(2006081510);
  1158. if (target_info.endian = endian_big) then
  1159. begin
  1160. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1161. if (subsetsize in [OS_S8..OS_S128]) then
  1162. begin
  1163. { sign extend to entire register }
  1164. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1165. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1166. end
  1167. else
  1168. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1169. end
  1170. else
  1171. begin
  1172. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1173. if (subsetsize in [OS_S8..OS_S128]) then
  1174. begin
  1175. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1176. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1177. end
  1178. end;
  1179. { mask other bits/sign extend }
  1180. if not(subsetsize in [OS_S8..OS_S128]) then
  1181. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1182. end
  1183. end
  1184. else
  1185. begin
  1186. { load next value as well }
  1187. extra_value_reg := getintregister(list,OS_INT);
  1188. tmpref := sref.ref;
  1189. inc(tmpref.offset,loadbitsize div 8);
  1190. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1191. if (sref.bitindexreg = NR_NO) then
  1192. { can be overridden to optimize }
  1193. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1194. else
  1195. begin
  1196. if (sref.startbit <> 0) then
  1197. internalerror(2006080610);
  1198. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg);
  1199. end;
  1200. end;
  1201. { store in destination }
  1202. { avoid unnecessary sign extension and zeroing }
  1203. valuereg := makeregsize(list,valuereg,OS_INT);
  1204. destreg := makeregsize(list,destreg,OS_INT);
  1205. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1206. destreg := makeregsize(list,destreg,tosize);
  1207. end;
  1208. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1209. begin
  1210. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1211. end;
  1212. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1213. var
  1214. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1215. tosreg, fromsreg: tsubsetregister;
  1216. tmpref: treference;
  1217. bitmask: aword;
  1218. loadsize: tcgsize;
  1219. loadbitsize: byte;
  1220. extra_load: boolean;
  1221. begin
  1222. { the register must be able to contain the requested value }
  1223. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1224. internalerror(2006081613);
  1225. get_subsetref_load_info(sref,loadsize,extra_load);
  1226. loadbitsize := tcgsize2size[loadsize]*8;
  1227. { load the (first part) of the bit sequence }
  1228. valuereg := getintregister(list,OS_INT);
  1229. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1230. { constant offset of bit sequence? }
  1231. if not extra_load then
  1232. begin
  1233. if (sref.bitindexreg = NR_NO) then
  1234. begin
  1235. { use subsetreg routine, it may have been overridden with an optimized version }
  1236. tosreg.subsetreg := valuereg;
  1237. tosreg.subsetregsize := OS_INT;
  1238. { subsetregs always count bits from right to left }
  1239. if (target_info.endian = endian_big) then
  1240. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1241. else
  1242. tosreg.startbit := sref.startbit;
  1243. tosreg.bitlen := sref.bitlen;
  1244. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1245. end
  1246. else
  1247. begin
  1248. if (sref.startbit <> 0) then
  1249. internalerror(2006081710);
  1250. { should be handled by normal code and will give wrong result }
  1251. { on x86 for the '1 shl bitlen' below }
  1252. if (sref.bitlen = AIntBits) then
  1253. internalerror(2006081711);
  1254. { zero the bits we have to insert }
  1255. if (slopt <> SL_SETMAX) then
  1256. begin
  1257. maskreg := getintregister(list,OS_INT);
  1258. if (target_info.endian = endian_big) then
  1259. begin
  1260. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1261. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1262. end
  1263. else
  1264. begin
  1265. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1266. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1267. end;
  1268. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1269. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1270. end;
  1271. { insert the value }
  1272. if (slopt <> SL_SETZERO) then
  1273. begin
  1274. tmpreg := getintregister(list,OS_INT);
  1275. if (slopt <> SL_SETMAX) then
  1276. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1277. else if (sref.bitlen <> AIntBits) then
  1278. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1279. else
  1280. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1281. if (target_info.endian = endian_big) then
  1282. begin
  1283. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1284. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1285. begin
  1286. if (loadbitsize <> AIntBits) then
  1287. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1288. else
  1289. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1290. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1291. end;
  1292. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1293. end
  1294. else
  1295. begin
  1296. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1297. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1298. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1299. end;
  1300. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1301. end;
  1302. end;
  1303. { store back to memory }
  1304. valuereg := makeregsize(list,valuereg,loadsize);
  1305. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1306. exit;
  1307. end
  1308. else
  1309. begin
  1310. { load next value }
  1311. extra_value_reg := getintregister(list,OS_INT);
  1312. tmpref := sref.ref;
  1313. inc(tmpref.offset,loadbitsize div 8);
  1314. { should maybe be taken out too, can be done more efficiently }
  1315. { on e.g. i386 with shld/shrd }
  1316. if (sref.bitindexreg = NR_NO) then
  1317. begin
  1318. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1319. fromsreg.subsetreg := fromreg;
  1320. fromsreg.subsetregsize := fromsize;
  1321. tosreg.subsetreg := valuereg;
  1322. tosreg.subsetregsize := OS_INT;
  1323. { transfer first part }
  1324. fromsreg.bitlen := loadbitsize-sref.startbit;
  1325. tosreg.bitlen := fromsreg.bitlen;
  1326. if (target_info.endian = endian_big) then
  1327. begin
  1328. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1329. { upper bits of the value ... }
  1330. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1331. { ... to bit 0 }
  1332. tosreg.startbit := 0
  1333. end
  1334. else
  1335. begin
  1336. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1337. { lower bits of the value ... }
  1338. fromsreg.startbit := 0;
  1339. { ... to startbit }
  1340. tosreg.startbit := sref.startbit;
  1341. end;
  1342. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1343. valuereg := makeregsize(list,valuereg,loadsize);
  1344. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1345. { transfer second part }
  1346. if (target_info.endian = endian_big) then
  1347. begin
  1348. { extra_value_reg must contain the lower bits of the value at bits }
  1349. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1350. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1351. { - bitlen - startbit }
  1352. fromsreg.startbit := 0;
  1353. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1354. end
  1355. else
  1356. begin
  1357. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1358. fromsreg.startbit := fromsreg.bitlen;
  1359. tosreg.startbit := 0;
  1360. end;
  1361. tosreg.subsetreg := extra_value_reg;
  1362. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1363. tosreg.bitlen := fromsreg.bitlen;
  1364. a_load_subsetreg_subsetreg(list,fromsize,subsetsize,fromsreg,tosreg);
  1365. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1366. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1367. exit;
  1368. end
  1369. else
  1370. begin
  1371. if (sref.startbit <> 0) then
  1372. internalerror(2006081812);
  1373. { should be handled by normal code and will give wrong result }
  1374. { on x86 for the '1 shl bitlen' below }
  1375. if (sref.bitlen = AIntBits) then
  1376. internalerror(2006081713);
  1377. { generate mask to zero the bits we have to insert }
  1378. if (slopt <> SL_SETMAX) then
  1379. begin
  1380. maskreg := getintregister(list,OS_INT);
  1381. if (target_info.endian = endian_big) then
  1382. begin
  1383. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1384. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1385. end
  1386. else
  1387. begin
  1388. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1389. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1390. end;
  1391. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1392. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1393. end;
  1394. { insert the value }
  1395. if (slopt <> SL_SETZERO) then
  1396. begin
  1397. tmpreg := getintregister(list,OS_INT);
  1398. if (slopt <> SL_SETMAX) then
  1399. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1400. else if (sref.bitlen <> AIntBits) then
  1401. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1402. else
  1403. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1404. if (target_info.endian = endian_big) then
  1405. begin
  1406. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1407. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1408. { mask left over bits }
  1409. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1410. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1411. end
  1412. else
  1413. begin
  1414. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1415. { mask left over bits }
  1416. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1417. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1418. end;
  1419. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1420. end;
  1421. valuereg := makeregsize(list,valuereg,loadsize);
  1422. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1423. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1424. tmpindexreg := getintregister(list,OS_INT);
  1425. { load current array value }
  1426. if (slopt <> SL_SETZERO) then
  1427. begin
  1428. tmpreg := getintregister(list,OS_INT);
  1429. if (slopt <> SL_SETMAX) then
  1430. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1431. else if (sref.bitlen <> AIntBits) then
  1432. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1433. else
  1434. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1435. end;
  1436. { generate mask to zero the bits we have to insert }
  1437. if (slopt <> SL_SETMAX) then
  1438. begin
  1439. maskreg := getintregister(list,OS_INT);
  1440. if (target_info.endian = endian_big) then
  1441. begin
  1442. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1443. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1444. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1445. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1446. end
  1447. else
  1448. begin
  1449. { Y-x = -(Y-x) }
  1450. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1451. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1452. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1453. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1454. {$ifdef x86}
  1455. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1456. if (loadbitsize = AIntBits) then
  1457. begin
  1458. valuereg := getintregister(list,OS_INT);
  1459. { if (tmpindexreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
  1460. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
  1461. { if (tmpindexreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
  1462. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1463. { if (tmpindexreg = cpu_bit_size) then tmpreg := maskreg := 0 }
  1464. if (slopt <> SL_SETZERO) then
  1465. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1466. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1467. end;
  1468. {$endif x86}
  1469. end;
  1470. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1471. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1472. end;
  1473. if (slopt <> SL_SETZERO) then
  1474. begin
  1475. if (target_info.endian = endian_big) then
  1476. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1477. else
  1478. begin
  1479. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1480. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1481. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1482. end;
  1483. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1484. end;
  1485. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1486. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1487. end;
  1488. end;
  1489. end;
  1490. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1491. var
  1492. tmpreg: tregister;
  1493. begin
  1494. tmpreg := getintregister(list,tosubsetsize);
  1495. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1496. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1497. end;
  1498. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1499. var
  1500. tmpreg: tregister;
  1501. begin
  1502. tmpreg := getintregister(list,tosize);
  1503. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1504. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1505. end;
  1506. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1507. var
  1508. tmpreg: tregister;
  1509. begin
  1510. tmpreg := getintregister(list,subsetsize);
  1511. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1512. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1513. end;
  1514. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1515. var
  1516. tmpreg: tregister;
  1517. slopt: tsubsetloadopt;
  1518. begin
  1519. { perform masking of the source value in advance }
  1520. slopt := SL_REGNOSRCMASK;
  1521. if (sref.bitlen <> AIntBits) then
  1522. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1523. if (
  1524. { broken x86 "x shl regbitsize = x" }
  1525. ((sref.bitlen <> AIntBits) and
  1526. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1527. ((sref.bitlen = AIntBits) and
  1528. (a = -1))
  1529. ) then
  1530. slopt := SL_SETMAX
  1531. else if (a = 0) then
  1532. slopt := SL_SETZERO;
  1533. tmpreg := getintregister(list,subsetsize);
  1534. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1535. a_load_const_reg(list,subsetsize,a,tmpreg);
  1536. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1537. end;
  1538. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1539. begin
  1540. case loc.loc of
  1541. LOC_REFERENCE,LOC_CREFERENCE:
  1542. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1543. LOC_REGISTER,LOC_CREGISTER:
  1544. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1545. LOC_SUBSETREG,LOC_CSUBSETREG:
  1546. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1547. LOC_SUBSETREF,LOC_CSUBSETREF:
  1548. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1549. else
  1550. internalerror(200608054);
  1551. end;
  1552. end;
  1553. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1554. var
  1555. tmpreg: tregister;
  1556. begin
  1557. tmpreg := getintregister(list,tosubsetsize);
  1558. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1559. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1560. end;
  1561. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1562. var
  1563. tmpreg: tregister;
  1564. begin
  1565. tmpreg := getintregister(list,tosubsetsize);
  1566. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1567. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1568. end;
  1569. {$ifdef rangeon}
  1570. {$r+}
  1571. {$undef rangeon}
  1572. {$endif}
  1573. {$ifdef overflowon}
  1574. {$q+}
  1575. {$undef overflowon}
  1576. {$endif}
  1577. { generic bit address calculation routines }
  1578. function tcg.get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  1579. begin
  1580. result.ref:=ref;
  1581. inc(result.ref.offset,bitnumber div 8);
  1582. result.bitindexreg:=NR_NO;
  1583. result.startbit:=bitnumber mod 8;
  1584. result.bitlen:=1;
  1585. end;
  1586. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  1587. begin
  1588. result.subsetreg:=setreg;
  1589. result.subsetregsize:=setregsize;
  1590. { subsetregs always count from the least significant to the most significant bit }
  1591. if (target_info.endian=endian_big) then
  1592. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1593. else
  1594. result.startbit:=bitnumber;
  1595. result.bitlen:=1;
  1596. end;
  1597. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1598. var
  1599. tmpreg,
  1600. tmpaddrreg: tregister;
  1601. begin
  1602. result.ref:=ref;
  1603. result.startbit:=0;
  1604. result.bitlen:=1;
  1605. tmpreg:=getintregister(list,bitnumbersize);
  1606. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1607. tmpaddrreg:=cg.getaddressregister(list);
  1608. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1609. if (result.ref.base=NR_NO) then
  1610. result.ref.base:=tmpaddrreg
  1611. else if (result.ref.index=NR_NO) then
  1612. result.ref.index:=tmpaddrreg
  1613. else
  1614. begin
  1615. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1616. result.ref.index:=tmpaddrreg;
  1617. end;
  1618. tmpreg:=getintregister(list,OS_INT);
  1619. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1620. result.bitindexreg:=tmpreg;
  1621. end;
  1622. { bit testing routines }
  1623. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1624. var
  1625. tmpvalue: tregister;
  1626. begin
  1627. tmpvalue:=cg.getintregister(list,valuesize);
  1628. if (target_info.endian=endian_little) then
  1629. begin
  1630. { rotate value register "bitnumber" bits to the right }
  1631. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1632. { extract the bit we want }
  1633. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1634. end
  1635. else
  1636. begin
  1637. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1638. { bit in uppermost position, then move it to the lowest position }
  1639. { "and" is not necessary since combination of shl/shr will clear }
  1640. { all other bits }
  1641. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1642. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1643. end;
  1644. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1645. end;
  1646. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister);
  1647. begin
  1648. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1649. end;
  1650. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister);
  1651. begin
  1652. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1653. end;
  1654. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
  1655. var
  1656. tmpsreg: tsubsetregister;
  1657. begin
  1658. { the first parameter is used to calculate the bit offset in }
  1659. { case of big endian, and therefore must be the size of the }
  1660. { set and not of the whole subsetreg }
  1661. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1662. { now fix the size of the subsetreg }
  1663. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1664. { correct offset of the set in the subsetreg }
  1665. inc(tmpsreg.startbit,setreg.startbit);
  1666. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1667. end;
  1668. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1669. begin
  1670. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1671. end;
  1672. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1673. var
  1674. tmpreg: tregister;
  1675. begin
  1676. case loc.loc of
  1677. LOC_REFERENCE,LOC_CREFERENCE:
  1678. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1679. LOC_REGISTER,LOC_CREGISTER,
  1680. LOC_SUBSETREG,LOC_CSUBSETREG,
  1681. LOC_CONSTANT:
  1682. begin
  1683. case loc.loc of
  1684. LOC_REGISTER,LOC_CREGISTER:
  1685. tmpreg:=loc.register;
  1686. LOC_SUBSETREG,LOC_CSUBSETREG:
  1687. begin
  1688. tmpreg:=getintregister(list,loc.size);
  1689. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1690. end;
  1691. LOC_CONSTANT:
  1692. begin
  1693. tmpreg:=getintregister(list,loc.size);
  1694. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1695. end;
  1696. end;
  1697. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1698. end;
  1699. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1700. else
  1701. internalerror(2007051701);
  1702. end;
  1703. end;
  1704. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  1705. begin
  1706. case loc.loc of
  1707. LOC_REFERENCE,LOC_CREFERENCE:
  1708. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1709. LOC_REGISTER,LOC_CREGISTER:
  1710. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1711. LOC_SUBSETREG,LOC_CSUBSETREG:
  1712. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1713. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1714. else
  1715. internalerror(2007051702);
  1716. end;
  1717. end;
  1718. { bit setting/clearing routines }
  1719. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1720. var
  1721. tmpvalue: tregister;
  1722. begin
  1723. tmpvalue:=cg.getintregister(list,destsize);
  1724. if (target_info.endian=endian_little) then
  1725. begin
  1726. a_load_const_reg(list,destsize,1,tmpvalue);
  1727. { rotate bit "bitnumber" bits to the left }
  1728. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  1729. end
  1730. else
  1731. begin
  1732. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  1733. { shr bitnumber" results in correct mask }
  1734. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  1735. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  1736. end;
  1737. { set/clear the bit we want }
  1738. if (doset) then
  1739. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  1740. else
  1741. begin
  1742. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  1743. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  1744. end;
  1745. end;
  1746. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference);
  1747. begin
  1748. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  1749. end;
  1750. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister);
  1751. begin
  1752. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  1753. end;
  1754. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister);
  1755. var
  1756. tmpsreg: tsubsetregister;
  1757. begin
  1758. { the first parameter is used to calculate the bit offset in }
  1759. { case of big endian, and therefore must be the size of the }
  1760. { set and not of the whole subsetreg }
  1761. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  1762. { now fix the size of the subsetreg }
  1763. tmpsreg.subsetregsize:=destreg.subsetregsize;
  1764. { correct offset of the set in the subsetreg }
  1765. inc(tmpsreg.startbit,destreg.startbit);
  1766. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  1767. end;
  1768. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  1769. begin
  1770. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  1771. end;
  1772. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  1773. var
  1774. tmpreg: tregister;
  1775. begin
  1776. case loc.loc of
  1777. LOC_REFERENCE:
  1778. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  1779. LOC_CREGISTER:
  1780. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  1781. { e.g. a 2-byte set in a record regvar }
  1782. LOC_CSUBSETREG:
  1783. begin
  1784. { hard to do in-place in a generic way, so operate on a copy }
  1785. tmpreg:=cg.getintregister(list,loc.size);
  1786. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1787. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  1788. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1789. end;
  1790. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1791. else
  1792. internalerror(2007051703)
  1793. end;
  1794. end;
  1795. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  1796. begin
  1797. case loc.loc of
  1798. LOC_REFERENCE:
  1799. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  1800. LOC_CREGISTER:
  1801. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  1802. LOC_CSUBSETREG:
  1803. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  1804. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1805. else
  1806. internalerror(2007051704)
  1807. end;
  1808. end;
  1809. { memory/register loading }
  1810. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1811. var
  1812. tmpref : treference;
  1813. tmpreg : tregister;
  1814. i : longint;
  1815. begin
  1816. if ref.alignment<>0 then
  1817. begin
  1818. tmpref:=ref;
  1819. { we take care of the alignment now }
  1820. tmpref.alignment:=0;
  1821. case FromSize of
  1822. OS_16,OS_S16:
  1823. begin
  1824. if target_info.endian=endian_big then
  1825. inc(tmpref.offset);
  1826. register:=makeregsize(list,register,OS_8);
  1827. a_load_reg_ref(list,OS_8,OS_8,register,tmpref);
  1828. register:=makeregsize(list,register,OS_16);
  1829. a_op_const_reg(list,OP_SHR,OS_16,8,register);
  1830. if target_info.endian=endian_big then
  1831. dec(tmpref.offset)
  1832. else
  1833. inc(tmpref.offset);
  1834. register:=makeregsize(list,register,OS_8);
  1835. a_load_reg_ref(list,OS_8,OS_8,register,tmpref);
  1836. register:=makeregsize(list,register,OS_16);
  1837. end;
  1838. OS_32,OS_S32:
  1839. begin
  1840. if target_info.endian=endian_big then
  1841. inc(tmpref.offset,3);
  1842. register:=makeregsize(list,register,OS_8);
  1843. a_load_reg_ref(list,OS_8,OS_8,register,tmpref);
  1844. register:=makeregsize(list,register,OS_32);
  1845. for i:=1 to 3 do
  1846. begin
  1847. a_op_const_reg(list,OP_SHR,OS_32,8,register);
  1848. if target_info.endian=endian_big then
  1849. dec(tmpref.offset)
  1850. else
  1851. inc(tmpref.offset);
  1852. register:=makeregsize(list,register,OS_8);
  1853. a_load_reg_ref(list,OS_8,OS_8,register,tmpref);
  1854. register:=makeregsize(list,register,OS_32);
  1855. end;
  1856. end
  1857. else
  1858. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1859. end;
  1860. end
  1861. else
  1862. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1863. end;
  1864. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1865. var
  1866. tmpref : treference;
  1867. tmpreg : tregister;
  1868. i : longint;
  1869. begin
  1870. if ref.alignment<>0 then
  1871. begin
  1872. tmpref:=ref;
  1873. { we take care of the alignment now }
  1874. tmpref.alignment:=0;
  1875. case FromSize of
  1876. OS_16,OS_S16:
  1877. begin
  1878. if target_info.endian=endian_little then
  1879. inc(tmpref.offset);
  1880. register:=makeregsize(list,register,OS_8);
  1881. a_load_ref_reg(list,OS_8,OS_8,tmpref,register);
  1882. register:=makeregsize(list,register,OS_16);
  1883. a_op_const_reg(list,OP_SHL,OS_16,8,register);
  1884. if target_info.endian=endian_little then
  1885. dec(tmpref.offset)
  1886. else
  1887. inc(tmpref.offset);
  1888. tmpreg:=getintregister(list,OS_16);
  1889. a_load_ref_reg(list,OS_8,OS_16,tmpref,tmpreg);
  1890. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1891. end;
  1892. OS_32,OS_S32:
  1893. begin
  1894. if target_info.endian=endian_little then
  1895. inc(tmpref.offset,3);
  1896. register:=makeregsize(list,register,OS_8);
  1897. a_load_ref_reg(list,OS_8,OS_8,tmpref,register);
  1898. register:=makeregsize(list,register,OS_32);
  1899. for i:=1 to 3 do
  1900. begin
  1901. a_op_const_reg(list,OP_SHL,OS_32,8,register);
  1902. if target_info.endian=endian_little then
  1903. dec(tmpref.offset)
  1904. else
  1905. inc(tmpref.offset);
  1906. tmpreg:=getintregister(list,OS_32);
  1907. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1908. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1909. end;
  1910. end
  1911. else
  1912. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1913. end;
  1914. end
  1915. else
  1916. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1917. end;
  1918. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1919. var
  1920. tmpreg: tregister;
  1921. begin
  1922. { verify if we have the same reference }
  1923. if references_equal(sref,dref) then
  1924. exit;
  1925. tmpreg:=getintregister(list,tosize);
  1926. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1927. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1928. end;
  1929. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1930. var
  1931. tmpreg: tregister;
  1932. begin
  1933. tmpreg:=getintregister(list,size);
  1934. a_load_const_reg(list,size,a,tmpreg);
  1935. a_load_reg_ref(list,size,size,tmpreg,ref);
  1936. end;
  1937. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1938. begin
  1939. case loc.loc of
  1940. LOC_REFERENCE,LOC_CREFERENCE:
  1941. a_load_const_ref(list,loc.size,a,loc.reference);
  1942. LOC_REGISTER,LOC_CREGISTER:
  1943. a_load_const_reg(list,loc.size,a,loc.register);
  1944. LOC_SUBSETREG,LOC_CSUBSETREG:
  1945. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1946. LOC_SUBSETREF,LOC_CSUBSETREF:
  1947. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1948. else
  1949. internalerror(200203272);
  1950. end;
  1951. end;
  1952. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1953. begin
  1954. case loc.loc of
  1955. LOC_REFERENCE,LOC_CREFERENCE:
  1956. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1957. LOC_REGISTER,LOC_CREGISTER:
  1958. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1959. LOC_SUBSETREG,LOC_CSUBSETREG:
  1960. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1961. LOC_SUBSETREF,LOC_CSUBSETREF:
  1962. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1963. else
  1964. internalerror(200203271);
  1965. end;
  1966. end;
  1967. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  1968. begin
  1969. case loc.loc of
  1970. LOC_REFERENCE,LOC_CREFERENCE:
  1971. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1972. LOC_REGISTER,LOC_CREGISTER:
  1973. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  1974. LOC_CONSTANT:
  1975. a_load_const_reg(list,tosize,loc.value,reg);
  1976. LOC_SUBSETREG,LOC_CSUBSETREG:
  1977. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  1978. LOC_SUBSETREF,LOC_CSUBSETREF:
  1979. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  1980. else
  1981. internalerror(200109092);
  1982. end;
  1983. end;
  1984. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  1985. begin
  1986. case loc.loc of
  1987. LOC_REFERENCE,LOC_CREFERENCE:
  1988. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  1989. LOC_REGISTER,LOC_CREGISTER:
  1990. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  1991. LOC_CONSTANT:
  1992. a_load_const_ref(list,tosize,loc.value,ref);
  1993. LOC_SUBSETREG,LOC_CSUBSETREG:
  1994. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  1995. LOC_SUBSETREF,LOC_CSUBSETREF:
  1996. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  1997. else
  1998. internalerror(200109302);
  1999. end;
  2000. end;
  2001. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2002. begin
  2003. case loc.loc of
  2004. LOC_REFERENCE,LOC_CREFERENCE:
  2005. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2006. LOC_REGISTER,LOC_CREGISTER:
  2007. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2008. LOC_CONSTANT:
  2009. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2010. LOC_SUBSETREG,LOC_CSUBSETREG:
  2011. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2012. LOC_SUBSETREF,LOC_CSUBSETREF:
  2013. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2014. else
  2015. internalerror(2006052310);
  2016. end;
  2017. end;
  2018. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2019. begin
  2020. case loc.loc of
  2021. LOC_REFERENCE,LOC_CREFERENCE:
  2022. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2023. LOC_REGISTER,LOC_CREGISTER:
  2024. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2025. LOC_SUBSETREG,LOC_CSUBSETREG:
  2026. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2027. LOC_SUBSETREF,LOC_CSUBSETREF:
  2028. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2029. else
  2030. internalerror(2006051510);
  2031. end;
  2032. end;
  2033. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  2034. var
  2035. powerval : longint;
  2036. begin
  2037. case op of
  2038. OP_OR :
  2039. begin
  2040. { or with zero returns same result }
  2041. if a = 0 then
  2042. op:=OP_NONE
  2043. else
  2044. { or with max returns max }
  2045. if a = -1 then
  2046. op:=OP_MOVE;
  2047. end;
  2048. OP_AND :
  2049. begin
  2050. { and with max returns same result }
  2051. if (a = -1) then
  2052. op:=OP_NONE
  2053. else
  2054. { and with 0 returns 0 }
  2055. if a=0 then
  2056. op:=OP_MOVE;
  2057. end;
  2058. OP_DIV :
  2059. begin
  2060. { division by 1 returns result }
  2061. if a = 1 then
  2062. op:=OP_NONE
  2063. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2064. begin
  2065. a := powerval;
  2066. op:= OP_SHR;
  2067. end;
  2068. end;
  2069. OP_IDIV:
  2070. begin
  2071. if a = 1 then
  2072. op:=OP_NONE;
  2073. end;
  2074. OP_MUL,OP_IMUL:
  2075. begin
  2076. if a = 1 then
  2077. op:=OP_NONE
  2078. else
  2079. if a=0 then
  2080. op:=OP_MOVE
  2081. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2082. begin
  2083. a := powerval;
  2084. op:= OP_SHL;
  2085. end;
  2086. end;
  2087. OP_ADD,OP_SUB:
  2088. begin
  2089. if a = 0 then
  2090. op:=OP_NONE;
  2091. end;
  2092. OP_SAR,OP_SHL,OP_SHR:
  2093. begin
  2094. if a = 0 then
  2095. op:=OP_NONE;
  2096. end;
  2097. end;
  2098. end;
  2099. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2100. begin
  2101. case loc.loc of
  2102. LOC_REFERENCE, LOC_CREFERENCE:
  2103. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2104. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2105. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2106. else
  2107. internalerror(200203301);
  2108. end;
  2109. end;
  2110. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2111. begin
  2112. case loc.loc of
  2113. LOC_REFERENCE, LOC_CREFERENCE:
  2114. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2115. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2116. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2117. else
  2118. internalerror(48991);
  2119. end;
  2120. end;
  2121. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2122. var
  2123. ref : treference;
  2124. begin
  2125. case cgpara.location^.loc of
  2126. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2127. begin
  2128. cgpara.check_simple_location;
  2129. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2130. end;
  2131. LOC_REFERENCE,LOC_CREFERENCE:
  2132. begin
  2133. cgpara.check_simple_location;
  2134. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2135. a_loadfpu_reg_ref(list,size,size,r,ref);
  2136. end;
  2137. LOC_REGISTER,LOC_CREGISTER:
  2138. begin
  2139. { paramfpu_ref does the check_simpe_location check here if necessary }
  2140. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  2141. a_loadfpu_reg_ref(list,size,size,r,ref);
  2142. a_paramfpu_ref(list,size,ref,cgpara);
  2143. tg.Ungettemp(list,ref);
  2144. end;
  2145. else
  2146. internalerror(2002071004);
  2147. end;
  2148. end;
  2149. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2150. var
  2151. href : treference;
  2152. begin
  2153. cgpara.check_simple_location;
  2154. case cgpara.location^.loc of
  2155. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2156. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2157. LOC_REFERENCE,LOC_CREFERENCE:
  2158. begin
  2159. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2160. { concatcopy should choose the best way to copy the data }
  2161. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2162. end;
  2163. else
  2164. internalerror(200402201);
  2165. end;
  2166. end;
  2167. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  2168. var
  2169. tmpreg : tregister;
  2170. begin
  2171. tmpreg:=getintregister(list,size);
  2172. a_load_ref_reg(list,size,size,ref,tmpreg);
  2173. a_op_const_reg(list,op,size,a,tmpreg);
  2174. a_load_reg_ref(list,size,size,tmpreg,ref);
  2175. end;
  2176. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  2177. var
  2178. tmpreg: tregister;
  2179. begin
  2180. tmpreg := getintregister(list, size);
  2181. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2182. a_op_const_reg(list,op,size,a,tmpreg);
  2183. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2184. end;
  2185. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  2186. var
  2187. tmpreg: tregister;
  2188. begin
  2189. tmpreg := getintregister(list, size);
  2190. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2191. a_op_const_reg(list,op,size,a,tmpreg);
  2192. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2193. end;
  2194. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  2195. begin
  2196. case loc.loc of
  2197. LOC_REGISTER, LOC_CREGISTER:
  2198. a_op_const_reg(list,op,loc.size,a,loc.register);
  2199. LOC_REFERENCE, LOC_CREFERENCE:
  2200. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2201. LOC_SUBSETREG, LOC_CSUBSETREG:
  2202. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2203. LOC_SUBSETREF, LOC_CSUBSETREF:
  2204. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2205. else
  2206. internalerror(200109061);
  2207. end;
  2208. end;
  2209. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2210. var
  2211. tmpreg : tregister;
  2212. begin
  2213. tmpreg:=getintregister(list,size);
  2214. a_load_ref_reg(list,size,size,ref,tmpreg);
  2215. a_op_reg_reg(list,op,size,reg,tmpreg);
  2216. a_load_reg_ref(list,size,size,tmpreg,ref);
  2217. end;
  2218. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2219. var
  2220. tmpreg: tregister;
  2221. begin
  2222. case op of
  2223. OP_NOT,OP_NEG:
  2224. { handle it as "load ref,reg; op reg" }
  2225. begin
  2226. a_load_ref_reg(list,size,size,ref,reg);
  2227. a_op_reg_reg(list,op,size,reg,reg);
  2228. end;
  2229. else
  2230. begin
  2231. tmpreg:=getintregister(list,size);
  2232. a_load_ref_reg(list,size,size,ref,tmpreg);
  2233. a_op_reg_reg(list,op,size,tmpreg,reg);
  2234. end;
  2235. end;
  2236. end;
  2237. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2238. var
  2239. tmpreg: tregister;
  2240. begin
  2241. tmpreg := getintregister(list, opsize);
  2242. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2243. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2244. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2245. end;
  2246. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2247. var
  2248. tmpreg: tregister;
  2249. begin
  2250. tmpreg := getintregister(list, opsize);
  2251. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2252. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2253. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2254. end;
  2255. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2256. begin
  2257. case loc.loc of
  2258. LOC_REGISTER, LOC_CREGISTER:
  2259. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2260. LOC_REFERENCE, LOC_CREFERENCE:
  2261. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2262. LOC_SUBSETREG, LOC_CSUBSETREG:
  2263. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2264. LOC_SUBSETREF, LOC_CSUBSETREF:
  2265. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2266. else
  2267. internalerror(200109061);
  2268. end;
  2269. end;
  2270. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2271. var
  2272. tmpreg: tregister;
  2273. begin
  2274. case loc.loc of
  2275. LOC_REGISTER,LOC_CREGISTER:
  2276. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2277. LOC_REFERENCE,LOC_CREFERENCE:
  2278. begin
  2279. tmpreg:=getintregister(list,loc.size);
  2280. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2281. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2282. end;
  2283. LOC_SUBSETREG, LOC_CSUBSETREG:
  2284. begin
  2285. tmpreg:=getintregister(list,loc.size);
  2286. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2287. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2288. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2289. end;
  2290. LOC_SUBSETREF, LOC_CSUBSETREF:
  2291. begin
  2292. tmpreg:=getintregister(list,loc.size);
  2293. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2294. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2295. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2296. end;
  2297. else
  2298. internalerror(200109061);
  2299. end;
  2300. end;
  2301. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2302. a:aint;src,dst:Tregister);
  2303. begin
  2304. a_load_reg_reg(list,size,size,src,dst);
  2305. a_op_const_reg(list,op,size,a,dst);
  2306. end;
  2307. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2308. size: tcgsize; src1, src2, dst: tregister);
  2309. var
  2310. tmpreg: tregister;
  2311. begin
  2312. if (dst<>src1) then
  2313. begin
  2314. a_load_reg_reg(list,size,size,src2,dst);
  2315. a_op_reg_reg(list,op,size,src1,dst);
  2316. end
  2317. else
  2318. begin
  2319. tmpreg:=getintregister(list,size);
  2320. a_load_reg_reg(list,size,size,src2,tmpreg);
  2321. a_op_reg_reg(list,op,size,src1,tmpreg);
  2322. a_load_reg_reg(list,size,size,tmpreg,dst);
  2323. end;
  2324. end;
  2325. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2326. begin
  2327. a_op_const_reg_reg(list,op,size,a,src,dst);
  2328. ovloc.loc:=LOC_VOID;
  2329. end;
  2330. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2331. begin
  2332. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2333. ovloc.loc:=LOC_VOID;
  2334. end;
  2335. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2336. l : tasmlabel);
  2337. var
  2338. tmpreg: tregister;
  2339. begin
  2340. tmpreg:=getintregister(list,size);
  2341. a_load_ref_reg(list,size,size,ref,tmpreg);
  2342. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2343. end;
  2344. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2345. l : tasmlabel);
  2346. var
  2347. tmpreg : tregister;
  2348. begin
  2349. case loc.loc of
  2350. LOC_REGISTER,LOC_CREGISTER:
  2351. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2352. LOC_REFERENCE,LOC_CREFERENCE:
  2353. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2354. LOC_SUBSETREG, LOC_CSUBSETREG:
  2355. begin
  2356. tmpreg:=getintregister(list,size);
  2357. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2358. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2359. end;
  2360. LOC_SUBSETREF, LOC_CSUBSETREF:
  2361. begin
  2362. tmpreg:=getintregister(list,size);
  2363. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2364. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2365. end;
  2366. else
  2367. internalerror(200109061);
  2368. end;
  2369. end;
  2370. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2371. var
  2372. tmpreg: tregister;
  2373. begin
  2374. tmpreg:=getintregister(list,size);
  2375. a_load_ref_reg(list,size,size,ref,tmpreg);
  2376. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2377. end;
  2378. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2379. var
  2380. tmpreg: tregister;
  2381. begin
  2382. tmpreg:=getintregister(list,size);
  2383. a_load_ref_reg(list,size,size,ref,tmpreg);
  2384. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2385. end;
  2386. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2387. begin
  2388. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2389. end;
  2390. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2391. begin
  2392. case loc.loc of
  2393. LOC_REGISTER,
  2394. LOC_CREGISTER:
  2395. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2396. LOC_REFERENCE,
  2397. LOC_CREFERENCE :
  2398. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2399. LOC_CONSTANT:
  2400. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2401. LOC_SUBSETREG,
  2402. LOC_CSUBSETREG:
  2403. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2404. LOC_SUBSETREF,
  2405. LOC_CSUBSETREF:
  2406. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2407. else
  2408. internalerror(200203231);
  2409. end;
  2410. end;
  2411. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2412. var
  2413. tmpreg: tregister;
  2414. begin
  2415. tmpreg:=getintregister(list, cmpsize);
  2416. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2417. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2418. end;
  2419. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2420. var
  2421. tmpreg: tregister;
  2422. begin
  2423. tmpreg:=getintregister(list, cmpsize);
  2424. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2425. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2426. end;
  2427. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2428. l : tasmlabel);
  2429. var
  2430. tmpreg: tregister;
  2431. begin
  2432. case loc.loc of
  2433. LOC_REGISTER,LOC_CREGISTER:
  2434. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2435. LOC_REFERENCE,LOC_CREFERENCE:
  2436. begin
  2437. tmpreg:=getintregister(list,size);
  2438. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2439. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2440. end;
  2441. LOC_SUBSETREG, LOC_CSUBSETREG:
  2442. begin
  2443. tmpreg:=getintregister(list, size);
  2444. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2445. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2446. end;
  2447. LOC_SUBSETREF, LOC_CSUBSETREF:
  2448. begin
  2449. tmpreg:=getintregister(list, size);
  2450. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2451. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2452. end;
  2453. else
  2454. internalerror(200109061);
  2455. end;
  2456. end;
  2457. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2458. begin
  2459. case loc.loc of
  2460. LOC_MMREGISTER,LOC_CMMREGISTER:
  2461. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2462. LOC_REFERENCE,LOC_CREFERENCE:
  2463. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2464. else
  2465. internalerror(200310121);
  2466. end;
  2467. end;
  2468. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2469. begin
  2470. case loc.loc of
  2471. LOC_MMREGISTER,LOC_CMMREGISTER:
  2472. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2473. LOC_REFERENCE,LOC_CREFERENCE:
  2474. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2475. else
  2476. internalerror(200310122);
  2477. end;
  2478. end;
  2479. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2480. var
  2481. href : treference;
  2482. begin
  2483. cgpara.check_simple_location;
  2484. case cgpara.location^.loc of
  2485. LOC_MMREGISTER,LOC_CMMREGISTER:
  2486. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2487. LOC_REFERENCE,LOC_CREFERENCE:
  2488. begin
  2489. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2490. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2491. end
  2492. else
  2493. internalerror(200310123);
  2494. end;
  2495. end;
  2496. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2497. var
  2498. hr : tregister;
  2499. hs : tmmshuffle;
  2500. begin
  2501. cgpara.check_simple_location;
  2502. hr:=getmmregister(list,cgpara.location^.size);
  2503. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2504. if realshuffle(shuffle) then
  2505. begin
  2506. hs:=shuffle^;
  2507. removeshuffles(hs);
  2508. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2509. end
  2510. else
  2511. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2512. end;
  2513. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2514. begin
  2515. case loc.loc of
  2516. LOC_MMREGISTER,LOC_CMMREGISTER:
  2517. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2518. LOC_REFERENCE,LOC_CREFERENCE:
  2519. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2520. else
  2521. internalerror(200310123);
  2522. end;
  2523. end;
  2524. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2525. var
  2526. hr : tregister;
  2527. hs : tmmshuffle;
  2528. begin
  2529. hr:=getmmregister(list,size);
  2530. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2531. if realshuffle(shuffle) then
  2532. begin
  2533. hs:=shuffle^;
  2534. removeshuffles(hs);
  2535. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2536. end
  2537. else
  2538. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2539. end;
  2540. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2541. var
  2542. hr : tregister;
  2543. hs : tmmshuffle;
  2544. begin
  2545. hr:=getmmregister(list,size);
  2546. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2547. if realshuffle(shuffle) then
  2548. begin
  2549. hs:=shuffle^;
  2550. removeshuffles(hs);
  2551. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2552. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2553. end
  2554. else
  2555. begin
  2556. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2557. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2558. end;
  2559. end;
  2560. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2561. begin
  2562. case loc.loc of
  2563. LOC_CMMREGISTER,LOC_MMREGISTER:
  2564. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2565. LOC_CREFERENCE,LOC_REFERENCE:
  2566. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2567. else
  2568. internalerror(200312232);
  2569. end;
  2570. end;
  2571. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2572. begin
  2573. g_concatcopy(list,source,dest,len);
  2574. end;
  2575. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2576. var
  2577. cgpara1,cgpara2,cgpara3 : TCGPara;
  2578. begin
  2579. cgpara1.init;
  2580. cgpara2.init;
  2581. cgpara3.init;
  2582. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2583. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2584. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2585. paramanager.allocparaloc(list,cgpara3);
  2586. a_paramaddr_ref(list,dest,cgpara3);
  2587. paramanager.allocparaloc(list,cgpara2);
  2588. a_paramaddr_ref(list,source,cgpara2);
  2589. paramanager.allocparaloc(list,cgpara1);
  2590. a_param_const(list,OS_INT,len,cgpara1);
  2591. paramanager.freeparaloc(list,cgpara3);
  2592. paramanager.freeparaloc(list,cgpara2);
  2593. paramanager.freeparaloc(list,cgpara1);
  2594. allocallcpuregisters(list);
  2595. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  2596. deallocallcpuregisters(list);
  2597. cgpara3.done;
  2598. cgpara2.done;
  2599. cgpara1.done;
  2600. end;
  2601. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2602. var
  2603. cgpara1,cgpara2 : TCGPara;
  2604. begin
  2605. cgpara1.init;
  2606. cgpara2.init;
  2607. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2608. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2609. paramanager.allocparaloc(list,cgpara2);
  2610. a_paramaddr_ref(list,dest,cgpara2);
  2611. paramanager.allocparaloc(list,cgpara1);
  2612. a_paramaddr_ref(list,source,cgpara1);
  2613. paramanager.freeparaloc(list,cgpara2);
  2614. paramanager.freeparaloc(list,cgpara1);
  2615. allocallcpuregisters(list);
  2616. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE');
  2617. deallocallcpuregisters(list);
  2618. cgpara2.done;
  2619. cgpara1.done;
  2620. end;
  2621. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2622. var
  2623. href : treference;
  2624. incrfunc : string;
  2625. cgpara1,cgpara2 : TCGPara;
  2626. begin
  2627. cgpara1.init;
  2628. cgpara2.init;
  2629. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2630. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2631. if is_interfacecom(t) then
  2632. incrfunc:='FPC_INTF_INCR_REF'
  2633. else if is_ansistring(t) then
  2634. incrfunc:='FPC_ANSISTR_INCR_REF'
  2635. else if is_widestring(t) then
  2636. incrfunc:='FPC_WIDESTR_INCR_REF'
  2637. else if is_dynamic_array(t) then
  2638. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2639. else
  2640. incrfunc:='';
  2641. { call the special incr function or the generic addref }
  2642. if incrfunc<>'' then
  2643. begin
  2644. paramanager.allocparaloc(list,cgpara1);
  2645. { widestrings aren't ref. counted on all platforms so we need the address
  2646. to create a real copy }
  2647. if is_widestring(t) then
  2648. a_paramaddr_ref(list,ref,cgpara1)
  2649. else
  2650. { these functions get the pointer by value }
  2651. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2652. paramanager.freeparaloc(list,cgpara1);
  2653. allocallcpuregisters(list);
  2654. a_call_name(list,incrfunc);
  2655. deallocallcpuregisters(list);
  2656. end
  2657. else
  2658. begin
  2659. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2660. paramanager.allocparaloc(list,cgpara2);
  2661. a_paramaddr_ref(list,href,cgpara2);
  2662. paramanager.allocparaloc(list,cgpara1);
  2663. a_paramaddr_ref(list,ref,cgpara1);
  2664. paramanager.freeparaloc(list,cgpara1);
  2665. paramanager.freeparaloc(list,cgpara2);
  2666. allocallcpuregisters(list);
  2667. a_call_name(list,'FPC_ADDREF');
  2668. deallocallcpuregisters(list);
  2669. end;
  2670. cgpara2.done;
  2671. cgpara1.done;
  2672. end;
  2673. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2674. var
  2675. href : treference;
  2676. decrfunc : string;
  2677. needrtti : boolean;
  2678. cgpara1,cgpara2 : TCGPara;
  2679. tempreg1,tempreg2 : TRegister;
  2680. begin
  2681. cgpara1.init;
  2682. cgpara2.init;
  2683. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2684. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2685. needrtti:=false;
  2686. if is_interfacecom(t) then
  2687. decrfunc:='FPC_INTF_DECR_REF'
  2688. else if is_ansistring(t) then
  2689. decrfunc:='FPC_ANSISTR_DECR_REF'
  2690. else if is_widestring(t) then
  2691. decrfunc:='FPC_WIDESTR_DECR_REF'
  2692. else if is_dynamic_array(t) then
  2693. begin
  2694. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2695. needrtti:=true;
  2696. end
  2697. else
  2698. decrfunc:='';
  2699. { call the special decr function or the generic decref }
  2700. if decrfunc<>'' then
  2701. begin
  2702. if needrtti then
  2703. begin
  2704. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2705. tempreg2:=getaddressregister(list);
  2706. a_loadaddr_ref_reg(list,href,tempreg2);
  2707. end;
  2708. tempreg1:=getaddressregister(list);
  2709. a_loadaddr_ref_reg(list,ref,tempreg1);
  2710. if needrtti then
  2711. begin
  2712. paramanager.allocparaloc(list,cgpara2);
  2713. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2714. paramanager.freeparaloc(list,cgpara2);
  2715. end;
  2716. paramanager.allocparaloc(list,cgpara1);
  2717. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2718. paramanager.freeparaloc(list,cgpara1);
  2719. allocallcpuregisters(list);
  2720. a_call_name(list,decrfunc);
  2721. deallocallcpuregisters(list);
  2722. end
  2723. else
  2724. begin
  2725. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2726. paramanager.allocparaloc(list,cgpara2);
  2727. a_paramaddr_ref(list,href,cgpara2);
  2728. paramanager.allocparaloc(list,cgpara1);
  2729. a_paramaddr_ref(list,ref,cgpara1);
  2730. paramanager.freeparaloc(list,cgpara1);
  2731. paramanager.freeparaloc(list,cgpara2);
  2732. allocallcpuregisters(list);
  2733. a_call_name(list,'FPC_DECREF');
  2734. deallocallcpuregisters(list);
  2735. end;
  2736. cgpara2.done;
  2737. cgpara1.done;
  2738. end;
  2739. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2740. var
  2741. href : treference;
  2742. cgpara1,cgpara2 : TCGPara;
  2743. begin
  2744. cgpara1.init;
  2745. cgpara2.init;
  2746. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2747. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2748. if is_ansistring(t) or
  2749. is_widestring(t) or
  2750. is_interfacecom(t) or
  2751. is_dynamic_array(t) then
  2752. a_load_const_ref(list,OS_ADDR,0,ref)
  2753. else
  2754. begin
  2755. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2756. paramanager.allocparaloc(list,cgpara2);
  2757. a_paramaddr_ref(list,href,cgpara2);
  2758. paramanager.allocparaloc(list,cgpara1);
  2759. a_paramaddr_ref(list,ref,cgpara1);
  2760. paramanager.freeparaloc(list,cgpara1);
  2761. paramanager.freeparaloc(list,cgpara2);
  2762. allocallcpuregisters(list);
  2763. a_call_name(list,'FPC_INITIALIZE');
  2764. deallocallcpuregisters(list);
  2765. end;
  2766. cgpara1.done;
  2767. cgpara2.done;
  2768. end;
  2769. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2770. var
  2771. href : treference;
  2772. cgpara1,cgpara2 : TCGPara;
  2773. begin
  2774. cgpara1.init;
  2775. cgpara2.init;
  2776. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2777. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2778. if is_ansistring(t) or
  2779. is_widestring(t) or
  2780. is_interfacecom(t) then
  2781. begin
  2782. g_decrrefcount(list,t,ref);
  2783. a_load_const_ref(list,OS_ADDR,0,ref);
  2784. end
  2785. else
  2786. begin
  2787. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2788. paramanager.allocparaloc(list,cgpara2);
  2789. a_paramaddr_ref(list,href,cgpara2);
  2790. paramanager.allocparaloc(list,cgpara1);
  2791. a_paramaddr_ref(list,ref,cgpara1);
  2792. paramanager.freeparaloc(list,cgpara1);
  2793. paramanager.freeparaloc(list,cgpara2);
  2794. allocallcpuregisters(list);
  2795. a_call_name(list,'FPC_FINALIZE');
  2796. deallocallcpuregisters(list);
  2797. end;
  2798. cgpara1.done;
  2799. cgpara2.done;
  2800. end;
  2801. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2802. { generate range checking code for the value at location p. The type }
  2803. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2804. { is the original type used at that location. When both defs are equal }
  2805. { the check is also insert (needed for succ,pref,inc,dec) }
  2806. const
  2807. aintmax=high(aint);
  2808. var
  2809. neglabel : tasmlabel;
  2810. hreg : tregister;
  2811. lto,hto,
  2812. lfrom,hfrom : TConstExprInt;
  2813. fromsize, tosize: cardinal;
  2814. from_signed, to_signed: boolean;
  2815. begin
  2816. { range checking on and range checkable value? }
  2817. if not(cs_check_range in current_settings.localswitches) or
  2818. not(fromdef.typ in [orddef,enumdef]) then
  2819. exit;
  2820. {$ifndef cpu64bit}
  2821. { handle 64bit rangechecks separate for 32bit processors }
  2822. if is_64bit(fromdef) or is_64bit(todef) then
  2823. begin
  2824. cg64.g_rangecheck64(list,l,fromdef,todef);
  2825. exit;
  2826. end;
  2827. {$endif cpu64bit}
  2828. { only check when assigning to scalar, subranges are different, }
  2829. { when todef=fromdef then the check is always generated }
  2830. getrange(fromdef,lfrom,hfrom);
  2831. getrange(todef,lto,hto);
  2832. from_signed := is_signed(fromdef);
  2833. to_signed := is_signed(todef);
  2834. { check the rangedef of the array, not the array itself }
  2835. { (only change now, since getrange needs the arraydef) }
  2836. if (todef.typ = arraydef) then
  2837. todef := tarraydef(todef).rangedef;
  2838. { no range check if from and to are equal and are both longint/dword }
  2839. { no range check if from and to are equal and are both longint/dword }
  2840. { (if we have a 32bit processor) or int64/qword, since such }
  2841. { operations can at most cause overflows (JM) }
  2842. { Note that these checks are mostly processor independent, they only }
  2843. { have to be changed once we introduce 64bit subrange types }
  2844. {$ifdef cpu64bit}
  2845. if (fromdef = todef) and
  2846. (fromdef.typ=orddef) and
  2847. (((((torddef(fromdef).ordtype = s64bit) and
  2848. (lfrom = low(int64)) and
  2849. (hfrom = high(int64))) or
  2850. ((torddef(fromdef).ordtype = u64bit) and
  2851. (lfrom = low(qword)) and
  2852. (hfrom = high(qword))) or
  2853. ((torddef(fromdef).ordtype = scurrency) and
  2854. (lfrom = low(int64)) and
  2855. (hfrom = high(int64)))))) then
  2856. exit;
  2857. {$else cpu64bit}
  2858. if (fromdef = todef) and
  2859. (fromdef.typ=orddef) and
  2860. (((((torddef(fromdef).ordtype = s32bit) and
  2861. (lfrom = low(longint)) and
  2862. (hfrom = high(longint))) or
  2863. ((torddef(fromdef).ordtype = u32bit) and
  2864. (lfrom = low(cardinal)) and
  2865. (hfrom = high(cardinal)))))) then
  2866. exit;
  2867. {$endif cpu64bit}
  2868. { optimize some range checks away in safe cases }
  2869. fromsize := fromdef.size;
  2870. tosize := todef.size;
  2871. if ((from_signed = to_signed) or
  2872. (not from_signed)) and
  2873. (lto<=lfrom) and (hto>=hfrom) and
  2874. (fromsize <= tosize) then
  2875. begin
  2876. { if fromsize < tosize, and both have the same signed-ness or }
  2877. { fromdef is unsigned, then all bit patterns from fromdef are }
  2878. { valid for todef as well }
  2879. if (fromsize < tosize) then
  2880. exit;
  2881. if (fromsize = tosize) and
  2882. (from_signed = to_signed) then
  2883. { only optimize away if all bit patterns which fit in fromsize }
  2884. { are valid for the todef }
  2885. begin
  2886. {$ifopt Q+}
  2887. {$define overflowon}
  2888. {$Q-}
  2889. {$endif}
  2890. if to_signed then
  2891. begin
  2892. { calculation of the low/high ranges must not overflow 64 bit
  2893. otherwise we end up comparing with zero for 64 bit data types on
  2894. 64 bit processors }
  2895. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2896. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2897. exit
  2898. end
  2899. else
  2900. begin
  2901. { calculation of the low/high ranges must not overflow 64 bit
  2902. otherwise we end up having all zeros for 64 bit data types on
  2903. 64 bit processors }
  2904. if (lto = 0) and
  2905. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2906. exit
  2907. end;
  2908. {$ifdef overflowon}
  2909. {$Q+}
  2910. {$undef overflowon}
  2911. {$endif}
  2912. end
  2913. end;
  2914. { generate the rangecheck code for the def where we are going to }
  2915. { store the result }
  2916. { use the trick that }
  2917. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2918. { To be able to do that, we have to make sure however that either }
  2919. { fromdef and todef are both signed or unsigned, or that we leave }
  2920. { the parts < 0 and > maxlongint out }
  2921. if from_signed xor to_signed then
  2922. begin
  2923. if from_signed then
  2924. { from is signed, to is unsigned }
  2925. begin
  2926. { if high(from) < 0 -> always range error }
  2927. if (hfrom < 0) or
  2928. { if low(to) > maxlongint also range error }
  2929. (lto > aintmax) then
  2930. begin
  2931. a_call_name(list,'FPC_RANGEERROR');
  2932. exit
  2933. end;
  2934. { from is signed and to is unsigned -> when looking at to }
  2935. { as an signed value, it must be < maxaint (otherwise }
  2936. { it will become negative, which is invalid since "to" is unsigned) }
  2937. if hto > aintmax then
  2938. hto := aintmax;
  2939. end
  2940. else
  2941. { from is unsigned, to is signed }
  2942. begin
  2943. if (lfrom > aintmax) or
  2944. (hto < 0) then
  2945. begin
  2946. a_call_name(list,'FPC_RANGEERROR');
  2947. exit
  2948. end;
  2949. { from is unsigned and to is signed -> when looking at to }
  2950. { as an unsigned value, it must be >= 0 (since negative }
  2951. { values are the same as values > maxlongint) }
  2952. if lto < 0 then
  2953. lto := 0;
  2954. end;
  2955. end;
  2956. hreg:=getintregister(list,OS_INT);
  2957. a_load_loc_reg(list,OS_INT,l,hreg);
  2958. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  2959. current_asmdata.getjumplabel(neglabel);
  2960. {
  2961. if from_signed then
  2962. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  2963. else
  2964. }
  2965. {$ifdef cpu64bit}
  2966. if qword(hto-lto)>qword(aintmax) then
  2967. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  2968. else
  2969. {$endif cpu64bit}
  2970. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  2971. a_call_name(list,'FPC_RANGEERROR');
  2972. a_label(list,neglabel);
  2973. end;
  2974. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  2975. begin
  2976. g_overflowCheck(list,loc,def);
  2977. end;
  2978. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  2979. var
  2980. tmpreg : tregister;
  2981. begin
  2982. tmpreg:=getintregister(list,size);
  2983. g_flags2reg(list,size,f,tmpreg);
  2984. a_load_reg_ref(list,size,size,tmpreg,ref);
  2985. end;
  2986. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  2987. var
  2988. OKLabel : tasmlabel;
  2989. cgpara1 : TCGPara;
  2990. begin
  2991. if (cs_check_object in current_settings.localswitches) or
  2992. (cs_check_range in current_settings.localswitches) then
  2993. begin
  2994. current_asmdata.getjumplabel(oklabel);
  2995. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  2996. cgpara1.init;
  2997. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2998. paramanager.allocparaloc(list,cgpara1);
  2999. a_param_const(list,OS_INT,210,cgpara1);
  3000. paramanager.freeparaloc(list,cgpara1);
  3001. a_call_name(list,'FPC_HANDLEERROR');
  3002. a_label(list,oklabel);
  3003. cgpara1.done;
  3004. end;
  3005. end;
  3006. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3007. var
  3008. hrefvmt : treference;
  3009. cgpara1,cgpara2 : TCGPara;
  3010. begin
  3011. cgpara1.init;
  3012. cgpara2.init;
  3013. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3014. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3015. if (cs_check_object in current_settings.localswitches) then
  3016. begin
  3017. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  3018. paramanager.allocparaloc(list,cgpara2);
  3019. a_paramaddr_ref(list,hrefvmt,cgpara2);
  3020. paramanager.allocparaloc(list,cgpara1);
  3021. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3022. paramanager.freeparaloc(list,cgpara1);
  3023. paramanager.freeparaloc(list,cgpara2);
  3024. allocallcpuregisters(list);
  3025. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  3026. deallocallcpuregisters(list);
  3027. end
  3028. else
  3029. if (cs_check_range in current_settings.localswitches) then
  3030. begin
  3031. paramanager.allocparaloc(list,cgpara1);
  3032. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3033. paramanager.freeparaloc(list,cgpara1);
  3034. allocallcpuregisters(list);
  3035. a_call_name(list,'FPC_CHECK_OBJECT');
  3036. deallocallcpuregisters(list);
  3037. end;
  3038. cgpara1.done;
  3039. cgpara2.done;
  3040. end;
  3041. {*****************************************************************************
  3042. Entry/Exit Code Functions
  3043. *****************************************************************************}
  3044. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  3045. var
  3046. sizereg,sourcereg,lenreg : tregister;
  3047. cgpara1,cgpara2,cgpara3 : TCGPara;
  3048. begin
  3049. { because some abis don't support dynamic stack allocation properly
  3050. open array value parameters are copied onto the heap
  3051. }
  3052. { calculate necessary memory }
  3053. { read/write operations on one register make the life of the register allocator hard }
  3054. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3055. begin
  3056. lenreg:=getintregister(list,OS_INT);
  3057. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3058. end
  3059. else
  3060. lenreg:=lenloc.register;
  3061. sizereg:=getintregister(list,OS_INT);
  3062. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3063. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3064. { load source }
  3065. sourcereg:=getaddressregister(list);
  3066. a_loadaddr_ref_reg(list,ref,sourcereg);
  3067. { do getmem call }
  3068. cgpara1.init;
  3069. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3070. paramanager.allocparaloc(list,cgpara1);
  3071. a_param_reg(list,OS_INT,sizereg,cgpara1);
  3072. paramanager.freeparaloc(list,cgpara1);
  3073. allocallcpuregisters(list);
  3074. a_call_name(list,'FPC_GETMEM');
  3075. deallocallcpuregisters(list);
  3076. cgpara1.done;
  3077. { return the new address }
  3078. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3079. { do move call }
  3080. cgpara1.init;
  3081. cgpara2.init;
  3082. cgpara3.init;
  3083. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3084. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3085. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3086. { load size }
  3087. paramanager.allocparaloc(list,cgpara3);
  3088. a_param_reg(list,OS_INT,sizereg,cgpara3);
  3089. { load destination }
  3090. paramanager.allocparaloc(list,cgpara2);
  3091. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  3092. { load source }
  3093. paramanager.allocparaloc(list,cgpara1);
  3094. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  3095. paramanager.freeparaloc(list,cgpara3);
  3096. paramanager.freeparaloc(list,cgpara2);
  3097. paramanager.freeparaloc(list,cgpara1);
  3098. allocallcpuregisters(list);
  3099. a_call_name(list,'FPC_MOVE');
  3100. deallocallcpuregisters(list);
  3101. cgpara3.done;
  3102. cgpara2.done;
  3103. cgpara1.done;
  3104. end;
  3105. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3106. var
  3107. cgpara1 : TCGPara;
  3108. begin
  3109. { do move call }
  3110. cgpara1.init;
  3111. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3112. { load source }
  3113. paramanager.allocparaloc(list,cgpara1);
  3114. a_param_loc(list,l,cgpara1);
  3115. paramanager.freeparaloc(list,cgpara1);
  3116. allocallcpuregisters(list);
  3117. a_call_name(list,'FPC_FREEMEM');
  3118. deallocallcpuregisters(list);
  3119. cgpara1.done;
  3120. end;
  3121. procedure tcg.g_save_standard_registers(list:TAsmList);
  3122. var
  3123. href : treference;
  3124. size : longint;
  3125. r : integer;
  3126. begin
  3127. { Get temp }
  3128. size:=0;
  3129. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3130. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3131. inc(size,sizeof(aint));
  3132. if size>0 then
  3133. begin
  3134. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  3135. { Copy registers to temp }
  3136. href:=current_procinfo.save_regs_ref;
  3137. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3138. begin
  3139. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3140. begin
  3141. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3142. inc(href.offset,sizeof(aint));
  3143. end;
  3144. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3145. end;
  3146. end;
  3147. end;
  3148. procedure tcg.g_restore_standard_registers(list:TAsmList);
  3149. var
  3150. href : treference;
  3151. r : integer;
  3152. hreg : tregister;
  3153. begin
  3154. { Copy registers from temp }
  3155. href:=current_procinfo.save_regs_ref;
  3156. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3157. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3158. begin
  3159. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3160. { Allocate register so the optimizer does not remove the load }
  3161. a_reg_alloc(list,hreg);
  3162. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3163. inc(href.offset,sizeof(aint));
  3164. end;
  3165. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3166. end;
  3167. procedure tcg.g_profilecode(list : TAsmList);
  3168. begin
  3169. end;
  3170. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3171. begin
  3172. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3173. end;
  3174. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  3175. begin
  3176. a_load_const_ref(list, OS_INT, a, href);
  3177. end;
  3178. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3179. begin
  3180. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3181. end;
  3182. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  3183. var
  3184. hsym : tsym;
  3185. href : treference;
  3186. paraloc : tcgparalocation;
  3187. begin
  3188. { calculate the parameter info for the procdef }
  3189. if not procdef.has_paraloc_info then
  3190. begin
  3191. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  3192. procdef.has_paraloc_info:=true;
  3193. end;
  3194. hsym:=tsym(procdef.parast.Find('self'));
  3195. if not(assigned(hsym) and
  3196. (hsym.typ=paravarsym)) then
  3197. internalerror(200305251);
  3198. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  3199. case paraloc.loc of
  3200. LOC_REGISTER:
  3201. a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  3202. LOC_REFERENCE:
  3203. begin
  3204. { offset in the wrapper needs to be adjusted for the stored
  3205. return address }
  3206. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  3207. a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  3208. end
  3209. else
  3210. internalerror(200309189);
  3211. end;
  3212. end;
  3213. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3214. begin
  3215. a_call_name(list,s);
  3216. end;
  3217. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  3218. var
  3219. l: tasmsymbol;
  3220. ref: treference;
  3221. begin
  3222. result := NR_NO;
  3223. case target_info.system of
  3224. system_powerpc_darwin,
  3225. system_i386_darwin,
  3226. system_powerpc64_darwin,
  3227. system_x86_64_darwin:
  3228. begin
  3229. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  3230. if not(assigned(l)) then
  3231. begin
  3232. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_COMMON,AT_DATA);
  3233. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3234. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  3235. {$ifdef cpu64bit}
  3236. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3237. {$else cpu64bit}
  3238. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3239. {$endif cpu64bit}
  3240. end;
  3241. result := getaddressregister(list);
  3242. reference_reset_symbol(ref,l,0);
  3243. { ref.base:=current_procinfo.got;
  3244. ref.relsymbol:=current_procinfo.CurrGOTLabel;}
  3245. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3246. end;
  3247. end;
  3248. end;
  3249. {*****************************************************************************
  3250. TCG64
  3251. *****************************************************************************}
  3252. {$ifndef cpu64bit}
  3253. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3254. begin
  3255. a_load64_reg_reg(list,regsrc,regdst);
  3256. a_op64_const_reg(list,op,size,value,regdst);
  3257. end;
  3258. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3259. var
  3260. tmpreg64 : tregister64;
  3261. begin
  3262. { when src1=dst then we need to first create a temp to prevent
  3263. overwriting src1 with src2 }
  3264. if (regsrc1.reghi=regdst.reghi) or
  3265. (regsrc1.reglo=regdst.reghi) or
  3266. (regsrc1.reghi=regdst.reglo) or
  3267. (regsrc1.reglo=regdst.reglo) then
  3268. begin
  3269. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3270. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3271. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3272. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3273. a_load64_reg_reg(list,tmpreg64,regdst);
  3274. end
  3275. else
  3276. begin
  3277. a_load64_reg_reg(list,regsrc2,regdst);
  3278. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3279. end;
  3280. end;
  3281. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3282. var
  3283. tmpreg64 : tregister64;
  3284. begin
  3285. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3286. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3287. a_load64_subsetref_reg(list,sref,tmpreg64);
  3288. a_op64_const_reg(list,op,size,a,tmpreg64);
  3289. a_load64_reg_subsetref(list,tmpreg64,sref);
  3290. end;
  3291. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3292. var
  3293. tmpreg64 : tregister64;
  3294. begin
  3295. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3296. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3297. a_load64_subsetref_reg(list,sref,tmpreg64);
  3298. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3299. a_load64_reg_subsetref(list,tmpreg64,sref);
  3300. end;
  3301. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3302. var
  3303. tmpreg64 : tregister64;
  3304. begin
  3305. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3306. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3307. a_load64_subsetref_reg(list,sref,tmpreg64);
  3308. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3309. a_load64_reg_subsetref(list,tmpreg64,sref);
  3310. end;
  3311. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3312. var
  3313. tmpreg64 : tregister64;
  3314. begin
  3315. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3316. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3317. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3318. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3319. end;
  3320. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3321. begin
  3322. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3323. ovloc.loc:=LOC_VOID;
  3324. end;
  3325. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3326. begin
  3327. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3328. ovloc.loc:=LOC_VOID;
  3329. end;
  3330. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3331. begin
  3332. case l.loc of
  3333. LOC_REFERENCE, LOC_CREFERENCE:
  3334. a_load64_ref_subsetref(list,l.reference,sref);
  3335. LOC_REGISTER,LOC_CREGISTER:
  3336. a_load64_reg_subsetref(list,l.register64,sref);
  3337. LOC_CONSTANT :
  3338. a_load64_const_subsetref(list,l.value64,sref);
  3339. LOC_SUBSETREF,LOC_CSUBSETREF:
  3340. a_load64_subsetref_subsetref(list,l.sref,sref);
  3341. else
  3342. internalerror(2006082210);
  3343. end;
  3344. end;
  3345. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3346. begin
  3347. case l.loc of
  3348. LOC_REFERENCE, LOC_CREFERENCE:
  3349. a_load64_subsetref_ref(list,sref,l.reference);
  3350. LOC_REGISTER,LOC_CREGISTER:
  3351. a_load64_subsetref_reg(list,sref,l.register64);
  3352. LOC_SUBSETREF,LOC_CSUBSETREF:
  3353. a_load64_subsetref_subsetref(list,sref,l.sref);
  3354. else
  3355. internalerror(2006082211);
  3356. end;
  3357. end;
  3358. {$endif cpu64bit}
  3359. initialization
  3360. ;
  3361. finalization
  3362. cg.free;
  3363. {$ifndef cpu64bit}
  3364. cg64.free;
  3365. {$endif cpu64bit}
  3366. end.