ncgadd.pas 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830
  1. {
  2. Copyright (c) 2000-2002 by the FPC development team
  3. Code generation for add nodes (generic version)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgadd;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,cpubase;
  22. type
  23. tcgaddnode = class(taddnode)
  24. { function pass_1: tnode; override;}
  25. procedure pass_generate_code;override;
  26. protected
  27. { call secondpass for both left and right }
  28. procedure pass_left_right;
  29. { set the register of the result location }
  30. procedure set_result_location_reg;
  31. { load left and right nodes into registers }
  32. procedure force_reg_left_right(allow_swap,allow_constant:boolean);
  33. procedure second_opfloat;
  34. procedure second_opboolean;
  35. procedure second_opsmallset;
  36. procedure second_op64bit;
  37. procedure second_opordinal;
  38. procedure second_addstring;virtual;
  39. procedure second_addfloat;virtual;abstract;
  40. procedure second_addboolean;virtual;
  41. procedure second_addsmallset;virtual;
  42. {$ifdef x86}
  43. {$ifdef SUPPORT_MMX}
  44. procedure second_opmmxset;virtual;abstract;
  45. procedure second_opmmx;virtual;abstract;
  46. {$endif SUPPORT_MMX}
  47. {$endif x86}
  48. procedure second_opvector;virtual;abstract;
  49. procedure second_add64bit;virtual;
  50. procedure second_addordinal;virtual;
  51. procedure second_cmpfloat;virtual;abstract;
  52. procedure second_cmpboolean;virtual;
  53. procedure second_cmpsmallset;virtual;abstract;
  54. procedure second_cmp64bit;virtual;abstract;
  55. procedure second_cmpordinal;virtual;abstract;
  56. end;
  57. implementation
  58. uses
  59. globtype,systems,
  60. cutils,verbose,globals,
  61. symconst,symdef,paramgr,
  62. aasmbase,aasmtai,aasmdata,defutil,
  63. cgbase,procinfo,pass_2,
  64. ncon,nset,ncgutil,cgobj,cgutils
  65. ;
  66. {*****************************************************************************
  67. Helpers
  68. *****************************************************************************}
  69. procedure tcgaddnode.pass_left_right;
  70. var
  71. tmpreg : tregister;
  72. isjump,
  73. pushedfpu : boolean;
  74. otl,ofl : tasmlabel;
  75. begin
  76. { calculate the operator which is more difficult }
  77. firstcomplex(self);
  78. { in case of constant put it to the left }
  79. if (left.nodetype=ordconstn) then
  80. swapleftright;
  81. isjump:=(left.expectloc=LOC_JUMP);
  82. if isjump then
  83. begin
  84. otl:=current_procinfo.CurrTrueLabel;
  85. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  86. ofl:=current_procinfo.CurrFalseLabel;
  87. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  88. end;
  89. secondpass(left);
  90. if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
  91. location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(resultdef),false);
  92. if isjump then
  93. begin
  94. current_procinfo.CurrTrueLabel:=otl;
  95. current_procinfo.CurrFalseLabel:=ofl;
  96. end;
  97. { are too few registers free? }
  98. if left.location.loc=LOC_FPUREGISTER then
  99. pushedfpu:=maybe_pushfpu(current_asmdata.CurrAsmList,right.registersfpu,left.location)
  100. else
  101. pushedfpu:=false;
  102. isjump:=(right.expectloc=LOC_JUMP);
  103. if isjump then
  104. begin
  105. otl:=current_procinfo.CurrTrueLabel;
  106. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  107. ofl:=current_procinfo.CurrFalseLabel;
  108. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  109. end;
  110. secondpass(right);
  111. if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
  112. location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(resultdef),false);
  113. if isjump then
  114. begin
  115. current_procinfo.CurrTrueLabel:=otl;
  116. current_procinfo.CurrFalseLabel:=ofl;
  117. end;
  118. if pushedfpu then
  119. begin
  120. tmpreg := cg.getfpuregister(current_asmdata.CurrAsmList,left.location.size);
  121. cg.a_loadfpu_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg);
  122. location_reset(left.location,LOC_FPUREGISTER,left.location.size);
  123. left.location.register := tmpreg;
  124. {$ifdef x86}
  125. { left operand is now on top of the stack, instead of the right one! }
  126. toggleflag(nf_swapped);
  127. {$endif x86}
  128. end;
  129. end;
  130. procedure tcgaddnode.set_result_location_reg;
  131. begin
  132. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  133. {$ifdef x86}
  134. if left.location.loc=LOC_REGISTER then
  135. begin
  136. if TCGSize2Size[left.location.size]<>TCGSize2Size[location.size] then
  137. internalerror(200307041);
  138. {$ifndef cpu64bit}
  139. if location.size in [OS_64,OS_S64] then
  140. begin
  141. location.register64.reglo := left.location.register64.reglo;
  142. location.register64.reghi := left.location.register64.reghi;
  143. end
  144. else
  145. {$endif}
  146. location.register := left.location.register;
  147. end
  148. else
  149. if right.location.loc=LOC_REGISTER then
  150. begin
  151. if TCGSize2Size[right.location.size]<>TCGSize2Size[location.size] then
  152. internalerror(200307042);
  153. {$ifndef cpu64bit}
  154. if location.size in [OS_64,OS_S64] then
  155. begin
  156. location.register64.reglo := right.location.register64.reglo;
  157. location.register64.reghi := right.location.register64.reghi;
  158. end
  159. else
  160. {$endif}
  161. location.register := right.location.register;
  162. end
  163. else
  164. {$endif}
  165. begin
  166. {$ifndef cpu64bit}
  167. if location.size in [OS_64,OS_S64] then
  168. begin
  169. location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  170. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  171. end
  172. else
  173. {$endif}
  174. location.register := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  175. end;
  176. end;
  177. procedure tcgaddnode.force_reg_left_right(allow_swap,allow_constant:boolean);
  178. begin
  179. if (left.location.loc<>LOC_REGISTER) and
  180. not(
  181. allow_constant and
  182. (left.location.loc in [LOC_CONSTANT,LOC_CREGISTER])
  183. ) then
  184. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
  185. if (right.location.loc<>LOC_REGISTER) and
  186. not(
  187. allow_constant and
  188. (right.location.loc in [LOC_CONSTANT,LOC_CREGISTER]) and
  189. (left.location.loc<>LOC_CONSTANT)
  190. ) then
  191. location_force_reg(current_asmdata.CurrAsmList,right.location,right.location.size,false);
  192. { Left is always a register, right can be register or constant }
  193. if left.location.loc=LOC_CONSTANT then
  194. begin
  195. { when it is not allowed to swap we have a constant on
  196. left, that will give problems }
  197. if not allow_swap then
  198. internalerror(200307043);
  199. swapleftright;
  200. end;
  201. end;
  202. {*****************************************************************************
  203. Smallsets
  204. *****************************************************************************}
  205. procedure tcgaddnode.second_opsmallset;
  206. begin
  207. { when a setdef is passed, it has to be a smallset }
  208. if is_varset(left.resultdef) or
  209. is_normalset(left.resultdef) or
  210. is_varset(right.resultdef) or
  211. is_normalset(right.resultdef) then
  212. internalerror(200203302);
  213. if nodetype in [equaln,unequaln,gtn,gten,lten,ltn] then
  214. second_cmpsmallset
  215. else
  216. second_addsmallset;
  217. end;
  218. procedure tcgaddnode.second_addsmallset;
  219. var
  220. cgop : TOpCg;
  221. tmpreg : tregister;
  222. mask : aint;
  223. opdone : boolean;
  224. begin
  225. opdone := false;
  226. pass_left_right;
  227. force_reg_left_right(true,true);
  228. { setelementn is a special case, it must be on right.
  229. We need an extra check if left is a register because the
  230. default case can skip the register loading when the
  231. setelementn is in a register (PFV) }
  232. if (nf_swapped in flags) and
  233. (left.nodetype=setelementn) then
  234. swapleftright;
  235. if (right.nodetype=setelementn) and
  236. (left.location.loc<>LOC_REGISTER) then
  237. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
  238. set_result_location_reg;
  239. case nodetype of
  240. addn :
  241. begin
  242. { are we adding set elements ? }
  243. if right.nodetype=setelementn then
  244. begin
  245. { no range support for smallsets! }
  246. if assigned(tsetelementnode(right).right) then
  247. internalerror(43244);
  248. if (right.location.loc = LOC_CONSTANT) then
  249. begin
  250. if (target_info.endian=endian_big) then
  251. mask:=aint((aword(1) shl (resultdef.size*8-1)) shr aword(right.location.value))
  252. else
  253. mask:=aint(1 shl right.location.value);
  254. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
  255. mask,left.location.register,location.register);
  256. end
  257. else
  258. begin
  259. if (target_info.endian=endian_big) then
  260. begin
  261. mask:=aint((aword(1) shl (resultdef.size*8-1)));
  262. cgop:=OP_SHR
  263. end
  264. else
  265. begin
  266. mask:=1;
  267. cgop:=OP_SHL
  268. end;
  269. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  270. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,mask,tmpreg);
  271. location_force_reg(current_asmdata.CurrAsmList,right.location,location.size,true);
  272. cg.a_op_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  273. right.location.register,tmpreg);
  274. if left.location.loc <> LOC_CONSTANT then
  275. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,tmpreg,
  276. left.location.register,location.register)
  277. else
  278. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
  279. left.location.value,tmpreg,location.register);
  280. end;
  281. opdone := true;
  282. end
  283. else
  284. cgop := OP_OR;
  285. end;
  286. symdifn :
  287. cgop:=OP_XOR;
  288. muln :
  289. cgop:=OP_AND;
  290. subn :
  291. begin
  292. cgop:=OP_AND;
  293. if (not(nf_swapped in flags)) then
  294. if (right.location.loc=LOC_CONSTANT) then
  295. right.location.value := not(right.location.value)
  296. else
  297. opdone := true
  298. else if (left.location.loc=LOC_CONSTANT) then
  299. left.location.value := not(left.location.value)
  300. else
  301. begin
  302. swapleftright;
  303. opdone := true;
  304. end;
  305. if opdone then
  306. begin
  307. if left.location.loc = LOC_CONSTANT then
  308. begin
  309. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  310. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,
  311. left.location.value,tmpreg);
  312. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,location.size,right.location.register,right.location.register);
  313. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,location.size,right.location.register,tmpreg);
  314. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,location.size,tmpreg,location.register);
  315. end
  316. else
  317. begin
  318. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,right.location.size,right.location.register,right.location.register);
  319. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,left.location.size,right.location.register,left.location.register);
  320. cg.a_load_reg_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,location.register);
  321. end;
  322. end;
  323. end;
  324. else
  325. internalerror(2002072701);
  326. end;
  327. if not opdone then
  328. begin
  329. // these are all commutative operations
  330. if (left.location.loc = LOC_CONSTANT) then
  331. swapleftright;
  332. if (right.location.loc = LOC_CONSTANT) then
  333. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  334. right.location.value,left.location.register,
  335. location.register)
  336. else
  337. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  338. right.location.register,left.location.register,
  339. location.register);
  340. end;
  341. end;
  342. {*****************************************************************************
  343. Boolean
  344. *****************************************************************************}
  345. procedure tcgaddnode.second_opboolean;
  346. begin
  347. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  348. second_cmpboolean
  349. else
  350. second_addboolean;
  351. end;
  352. procedure tcgaddnode.second_addboolean;
  353. var
  354. cgop : TOpCg;
  355. otl,ofl : tasmlabel;
  356. oldflowcontrol : tflowcontrol;
  357. begin
  358. { And,Or will only evaluate from left to right only the
  359. needed nodes unless full boolean evaluation is enabled }
  360. if (nodetype in [orn,andn]) and
  361. (not(cs_full_boolean_eval in current_settings.localswitches) or
  362. (nf_short_bool in flags)) then
  363. begin
  364. location_reset(location,LOC_JUMP,OS_NO);
  365. case nodetype of
  366. andn :
  367. begin
  368. otl:=current_procinfo.CurrTrueLabel;
  369. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  370. secondpass(left);
  371. maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
  372. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  373. current_procinfo.CurrTrueLabel:=otl;
  374. end;
  375. orn :
  376. begin
  377. ofl:=current_procinfo.CurrFalseLabel;
  378. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  379. secondpass(left);
  380. maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
  381. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  382. current_procinfo.CurrFalseLabel:=ofl;
  383. end;
  384. else
  385. internalerror(200307044);
  386. end;
  387. { these jumps mean we're now in a flow control construct }
  388. oldflowcontrol:=flowcontrol;
  389. include(flowcontrol,fc_inflowcontrol);
  390. secondpass(right);
  391. maketojumpbool(current_asmdata.CurrAsmList,right,lr_load_regvars);
  392. flowcontrol:=oldflowcontrol+(flowcontrol-[fc_inflowcontrol]);
  393. end
  394. else
  395. begin
  396. pass_left_right;
  397. force_reg_left_right(false,true);
  398. set_result_location_reg;
  399. case nodetype of
  400. xorn :
  401. cgop:=OP_XOR;
  402. orn :
  403. cgop:=OP_OR;
  404. andn :
  405. cgop:=OP_AND;
  406. else
  407. internalerror(200203247);
  408. end;
  409. if right.location.loc <> LOC_CONSTANT then
  410. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  411. left.location.register,right.location.register,
  412. location.register)
  413. else
  414. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  415. right.location.value,left.location.register,
  416. location.register);
  417. end;
  418. end;
  419. {*****************************************************************************
  420. 64-bit
  421. *****************************************************************************}
  422. procedure tcgaddnode.second_op64bit;
  423. begin
  424. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  425. second_cmp64bit
  426. else
  427. second_add64bit;
  428. end;
  429. procedure tcgaddnode.second_add64bit;
  430. var
  431. op : TOpCG;
  432. checkoverflow : boolean;
  433. ovloc : tlocation;
  434. begin
  435. ovloc.loc:=LOC_VOID;
  436. pass_left_right;
  437. force_reg_left_right(false,true);
  438. set_result_location_reg;
  439. { assume no overflow checking is required }
  440. checkoverflow := false;
  441. case nodetype of
  442. addn :
  443. begin
  444. op:=OP_ADD;
  445. checkoverflow:=true;
  446. end;
  447. subn :
  448. begin
  449. op:=OP_SUB;
  450. checkoverflow:=true;
  451. end;
  452. xorn:
  453. op:=OP_XOR;
  454. orn:
  455. op:=OP_OR;
  456. andn:
  457. op:=OP_AND;
  458. muln:
  459. begin
  460. { should be handled in pass_1 (JM) }
  461. internalerror(200109051);
  462. end;
  463. else
  464. internalerror(2002072705);
  465. end;
  466. checkoverflow:=
  467. checkoverflow and
  468. (left.resultdef.typ<>pointerdef) and
  469. (right.resultdef.typ<>pointerdef);
  470. {$ifdef cpu64bit}
  471. case nodetype of
  472. xorn,orn,andn,addn:
  473. begin
  474. if (right.location.loc = LOC_CONSTANT) then
  475. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.value,
  476. left.location.register,location.register)
  477. else
  478. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.register,
  479. left.location.register,location.register);
  480. end;
  481. subn:
  482. begin
  483. if (nf_swapped in flags) then
  484. swapleftright;
  485. if left.location.loc <> LOC_CONSTANT then
  486. begin
  487. if right.location.loc <> LOC_CONSTANT then
  488. // reg64 - reg64
  489. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  490. right.location.register,left.location.register,location.register,
  491. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  492. else
  493. // reg64 - const64
  494. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  495. right.location.value,left.location.register,location.register,
  496. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  497. end
  498. else
  499. begin
  500. // const64 - reg64
  501. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
  502. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  503. right.location.register,left.location.register,location.register,
  504. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  505. end;
  506. end;
  507. else
  508. internalerror(2002072803);
  509. end;
  510. {$else cpu64bit}
  511. case nodetype of
  512. xorn,orn,andn,addn:
  513. begin
  514. if (right.location.loc = LOC_CONSTANT) then
  515. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.value64,
  516. left.location.register64,location.register64,
  517. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  518. else
  519. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.register64,
  520. left.location.register64,location.register64,
  521. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  522. end;
  523. subn:
  524. begin
  525. if (nf_swapped in flags) then
  526. swapleftright;
  527. if left.location.loc <> LOC_CONSTANT then
  528. begin
  529. if right.location.loc <> LOC_CONSTANT then
  530. // reg64 - reg64
  531. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  532. right.location.register64,left.location.register64,
  533. location.register64,
  534. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  535. else
  536. // reg64 - const64
  537. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  538. right.location.value64,left.location.register64,
  539. location.register64,
  540. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  541. end
  542. else
  543. begin
  544. // const64 - reg64
  545. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
  546. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  547. right.location.register64,left.location.register64,
  548. location.register64,
  549. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  550. end;
  551. end;
  552. else
  553. internalerror(2002072803);
  554. end;
  555. {$endif cpu64bit}
  556. { emit overflow check if enabled }
  557. if checkoverflow then
  558. cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  559. end;
  560. {*****************************************************************************
  561. Strings
  562. *****************************************************************************}
  563. procedure tcgaddnode.second_addstring;
  564. begin
  565. { this should already be handled in pass1 }
  566. internalerror(2002072402);
  567. end;
  568. {*****************************************************************************
  569. Floats
  570. *****************************************************************************}
  571. procedure tcgaddnode.second_opfloat;
  572. begin
  573. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  574. second_cmpfloat
  575. else
  576. second_addfloat;
  577. end;
  578. {*****************************************************************************
  579. Ordinals
  580. *****************************************************************************}
  581. procedure tcgaddnode.second_opordinal;
  582. begin
  583. if (nodetype in [ltn,lten,gtn,gten,equaln,unequaln]) then
  584. second_cmpordinal
  585. else
  586. second_addordinal;
  587. end;
  588. procedure tcgaddnode.second_addordinal;
  589. var
  590. unsigned,
  591. checkoverflow : boolean;
  592. cgop : topcg;
  593. tmpreg : tregister;
  594. ovloc : tlocation;
  595. begin
  596. ovloc.loc:=LOC_VOID;
  597. pass_left_right;
  598. force_reg_left_right(false,true);
  599. set_result_location_reg;
  600. { determine if the comparison will be unsigned }
  601. unsigned:=not(is_signed(left.resultdef)) or
  602. not(is_signed(right.resultdef));
  603. { assume no overflow checking is require }
  604. checkoverflow := false;
  605. case nodetype of
  606. addn:
  607. begin
  608. cgop:=OP_ADD;
  609. checkoverflow:=true;
  610. end;
  611. xorn :
  612. begin
  613. cgop:=OP_XOR;
  614. end;
  615. orn :
  616. begin
  617. cgop:=OP_OR;
  618. end;
  619. andn:
  620. begin
  621. cgop:=OP_AND;
  622. end;
  623. muln:
  624. begin
  625. checkoverflow:=true;
  626. if unsigned then
  627. cgop:=OP_MUL
  628. else
  629. cgop:=OP_IMUL;
  630. end;
  631. subn :
  632. begin
  633. checkoverflow:=true;
  634. cgop:=OP_SUB;
  635. end;
  636. end;
  637. checkoverflow:=
  638. checkoverflow and
  639. (left.resultdef.typ<>pointerdef) and
  640. (right.resultdef.typ<>pointerdef);
  641. if nodetype<>subn then
  642. begin
  643. if (right.location.loc<>LOC_CONSTANT) then
  644. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
  645. left.location.register,right.location.register,
  646. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  647. else
  648. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
  649. right.location.value,left.location.register,
  650. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  651. end
  652. else { subtract is a special case since its not commutative }
  653. begin
  654. if (nf_swapped in flags) then
  655. swapleftright;
  656. if left.location.loc<>LOC_CONSTANT then
  657. begin
  658. if right.location.loc<>LOC_CONSTANT then
  659. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  660. right.location.register,left.location.register,
  661. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  662. else
  663. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  664. right.location.value,left.location.register,
  665. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  666. end
  667. else
  668. begin
  669. tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  670. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,
  671. left.location.value,tmpreg);
  672. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  673. right.location.register,tmpreg,location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  674. end;
  675. end;
  676. { emit overflow check if required }
  677. if checkoverflow then
  678. cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  679. end;
  680. procedure tcgaddnode.second_cmpboolean;
  681. begin
  682. second_cmpordinal;
  683. end;
  684. {*****************************************************************************
  685. pass_generate_code;
  686. *****************************************************************************}
  687. procedure tcgaddnode.pass_generate_code;
  688. begin
  689. case left.resultdef.typ of
  690. orddef :
  691. begin
  692. { handling boolean expressions }
  693. if is_boolean(left.resultdef) and
  694. is_boolean(right.resultdef) then
  695. second_opboolean
  696. { 64bit operations }
  697. else if is_64bit(left.resultdef) then
  698. second_op64bit
  699. else
  700. second_opordinal;
  701. end;
  702. stringdef :
  703. begin
  704. second_addstring;
  705. end;
  706. setdef :
  707. begin
  708. {Normalsets are already handled in pass1 if mmx
  709. should not be used.}
  710. if is_varset(tsetdef(left.resultdef)) or
  711. is_normalset(tsetdef(left.resultdef)) then
  712. begin
  713. {$ifdef SUPPORT_MMX}
  714. {$ifdef i386}
  715. if cs_mmx in current_settings.localswitches then
  716. second_opmmxset
  717. else
  718. {$endif}
  719. {$endif SUPPORT_MMX}
  720. internalerror(200109041);
  721. end
  722. else
  723. second_opsmallset;
  724. end;
  725. arraydef :
  726. begin
  727. { support dynarr=nil }
  728. if is_dynamic_array(left.resultdef) then
  729. second_opordinal
  730. else
  731. if (cs_support_vectors in current_settings.globalswitches) and
  732. is_vector(left.resultdef) then
  733. second_opvector
  734. {$ifdef SUPPORT_MMX}
  735. else
  736. if is_mmx_able_array(left.resultdef) then
  737. second_opmmx
  738. {$endif SUPPORT_MMX}
  739. else
  740. internalerror(200306016);
  741. end;
  742. floatdef :
  743. second_opfloat;
  744. else
  745. second_opordinal;
  746. end;
  747. end;
  748. begin
  749. caddnode:=tcgaddnode;
  750. end.