nz80add.pas 13 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Code generation for add nodes on the AVR
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nz80add;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ncgadd, symtype,cpubase;
  22. type
  23. { TZ80AddNode }
  24. TZ80AddNode = class(tcgaddnode)
  25. private
  26. function NoEqual(anodetype:tnodetype):tnodetype;
  27. function GetResFlags(unsigned:Boolean;anodetype:tnodetype):TResFlags;
  28. protected
  29. function pass_1 : tnode;override;
  30. procedure second_cmpordinal;override;
  31. procedure second_cmpsmallset;override;
  32. procedure second_cmp64bit;override;
  33. procedure second_cmp16_32_64bit;
  34. procedure second_cmp;
  35. end;
  36. implementation
  37. uses
  38. globtype,systems,
  39. cutils,verbose,globals,
  40. symconst,symdef,paramgr,
  41. aasmbase,aasmtai,aasmdata,aasmcpu,defutil,htypechk,
  42. cgbase,cgutils,cgcpu,
  43. cpuinfo,pass_1,pass_2,procinfo,
  44. cpupara,
  45. ncon,nset,nadd,
  46. ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32,
  47. hlcgobj;
  48. {*****************************************************************************
  49. TZ80AddNode
  50. *****************************************************************************}
  51. function TZ80AddNode.NoEqual(anodetype: tnodetype): tnodetype;
  52. begin
  53. if anodetype=lten then
  54. result:=ltn
  55. else if anodetype=gten then
  56. result:=gtn
  57. else
  58. result:=anodetype;
  59. end;
  60. function TZ80AddNode.GetResFlags(unsigned: Boolean; anodetype: tnodetype): TResFlags;
  61. begin
  62. case anodetype of
  63. equaln:
  64. GetResFlags:=F_E;
  65. unequaln:
  66. GetResFlags:=F_NE;
  67. else
  68. if not(unsigned) then
  69. begin
  70. { signed }
  71. if nf_swapped in flags then
  72. case anodetype of
  73. ltn:
  74. GetResFlags:=F_NotPossible;
  75. lten:
  76. GetResFlags:=F_P;
  77. gtn:
  78. GetResFlags:=F_M;
  79. gten:
  80. GetResFlags:=F_NotPossible;
  81. else
  82. internalerror(2014082020);
  83. end
  84. else
  85. case anodetype of
  86. ltn:
  87. GetResFlags:=F_M;
  88. lten:
  89. GetResFlags:=F_NotPossible;
  90. gtn:
  91. GetResFlags:=F_NotPossible;
  92. gten:
  93. GetResFlags:=F_P;
  94. else
  95. internalerror(2014082021);
  96. end;
  97. end
  98. else
  99. begin
  100. { unsigned }
  101. if nf_swapped in Flags then
  102. case anodetype of
  103. ltn:
  104. GetResFlags:=F_NotPossible;
  105. lten:
  106. GetResFlags:=F_NC;
  107. gtn:
  108. GetResFlags:=F_C;
  109. gten:
  110. GetResFlags:=F_NotPossible;
  111. else
  112. internalerror(2014082022);
  113. end
  114. else
  115. case anodetype of
  116. ltn:
  117. GetResFlags:=F_C;
  118. lten:
  119. GetResFlags:=F_NotPossible;
  120. gtn:
  121. GetResFlags:=F_NotPossible;
  122. gten:
  123. GetResFlags:=F_NC;
  124. else
  125. internalerror(2014082023);
  126. end;
  127. end;
  128. end;
  129. end;
  130. procedure TZ80AddNode.second_cmpsmallset;
  131. procedure gencmp(tmpreg1,tmpreg2 : tregister);
  132. var
  133. i : byte;
  134. begin
  135. //current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CP,tmpreg1,tmpreg2));
  136. //for i:=2 to tcgsize2size[left.location.size] do
  137. // begin
  138. // tmpreg1:=GetNextReg(tmpreg1);
  139. // tmpreg2:=GetNextReg(tmpreg2);
  140. // current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CPC,tmpreg1,tmpreg2));
  141. // end;
  142. end;
  143. var
  144. tmpreg : tregister;
  145. begin
  146. //pass_left_right;
  147. //location_reset(location,LOC_FLAGS,OS_NO);
  148. //force_reg_left_right(false,false);
  149. //
  150. //case nodetype of
  151. // equaln:
  152. // begin
  153. // gencmp(left.location.register,right.location.register);
  154. // location.resflags:=F_EQ;
  155. // end;
  156. // unequaln:
  157. // begin
  158. // gencmp(left.location.register,right.location.register);
  159. // location.resflags:=F_NE;
  160. // end;
  161. // lten,
  162. // gten:
  163. // begin
  164. // if (not(nf_swapped in flags) and
  165. // (nodetype = lten)) or
  166. // ((nf_swapped in flags) and
  167. // (nodetype = gten)) then
  168. // swapleftright;
  169. // tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  170. // cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_AND,location.size,
  171. // left.location.register,right.location.register,tmpreg);
  172. // gencmp(tmpreg,right.location.register);
  173. // location.resflags:=F_EQ;
  174. // end;
  175. // else
  176. // internalerror(2004012401);
  177. //end;
  178. end;
  179. procedure TZ80AddNode.second_cmp;
  180. var
  181. unsigned : boolean;
  182. tmpreg1,tmpreg2 : tregister;
  183. i : longint;
  184. opdef: tdef;
  185. opsize: TCgSize;
  186. ai: taicpu;
  187. l: TAsmLabel;
  188. begin
  189. unsigned:=not(is_signed(left.resultdef)) or
  190. not(is_signed(right.resultdef));
  191. opdef:=left.resultdef;
  192. opsize:=def_cgsize(opdef);
  193. pass_left_right;
  194. if (opsize=OS_8) or ((opsize=OS_S8) and (NodeType in [equaln,unequaln])) then
  195. begin
  196. if getresflags(unsigned,NodeType)=F_NotPossible then
  197. swapleftright;
  198. if left.location.loc<>LOC_REGISTER then
  199. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  200. if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  201. begin
  202. if is_ref_in_opertypes(right.location.reference,[OT_REF_IX_d,OT_REF_IY_d,OT_REF_HL]) then
  203. begin
  204. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  205. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  206. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_ref(A_CP,NR_A,right.location.reference));
  207. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  208. end
  209. else
  210. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,false);
  211. end;
  212. case right.location.loc of
  213. LOC_CONSTANT:
  214. begin
  215. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  216. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  217. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_const(A_CP,NR_A,right.location.value));
  218. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  219. end;
  220. LOC_REGISTER,LOC_CREGISTER:
  221. begin
  222. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  223. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  224. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg(A_CP,NR_A,right.location.register));
  225. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  226. end;
  227. LOC_REFERENCE,LOC_CREFERENCE:
  228. begin
  229. { Already handled before the case statement. Nothing to do here. }
  230. end;
  231. else
  232. internalerror(2020040402);
  233. end;
  234. location_reset(location,LOC_FLAGS,OS_NO);
  235. location.resflags:=getresflags(unsigned,NodeType);
  236. end
  237. else if opsize=OS_S8 then
  238. begin
  239. if getresflags(unsigned,NodeType)=F_NotPossible then
  240. swapleftright;
  241. if left.location.loc<>LOC_REGISTER then
  242. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  243. if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  244. begin
  245. if is_ref_in_opertypes(right.location.reference,[OT_REF_IX_d,OT_REF_IY_d,OT_REF_HL]) then
  246. begin
  247. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  248. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  249. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_ref(A_SUB,NR_A,right.location.reference));
  250. end
  251. else
  252. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,false);
  253. end;
  254. case right.location.loc of
  255. LOC_CONSTANT:
  256. begin
  257. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  258. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  259. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_const(A_SUB,NR_A,right.location.value));
  260. end;
  261. LOC_REGISTER,LOC_CREGISTER:
  262. begin
  263. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  264. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  265. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg(A_SUB,NR_A,right.location.register));
  266. end;
  267. LOC_REFERENCE,LOC_CREFERENCE:
  268. begin
  269. { Already handled before the case statement. Nothing to do here. }
  270. end;
  271. else
  272. internalerror(2020040402);
  273. end;
  274. current_asmdata.getjumplabel(l);
  275. ai:=taicpu.op_cond_sym(A_JP,C_PO,l);
  276. ai.is_jmp:=true;
  277. current_asmdata.CurrAsmList.concat(ai);
  278. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_const(A_XOR,NR_A,$80));
  279. cg.a_label(current_asmdata.CurrAsmList,l);
  280. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  281. location_reset(location,LOC_FLAGS,OS_NO);
  282. location.resflags:=getresflags(unsigned,NodeType);
  283. end
  284. else
  285. internalerror(2020040401);
  286. end;
  287. procedure TZ80AddNode.second_cmp64bit;
  288. begin
  289. second_cmp16_32_64bit;
  290. end;
  291. procedure TZ80AddNode.second_cmp16_32_64bit;
  292. var
  293. truelabel,
  294. falselabel: tasmlabel;
  295. unsigned : boolean;
  296. begin
  297. truelabel:=nil;
  298. falselabel:=nil;
  299. pass_left_right;
  300. unsigned:=not(is_signed(left.resultdef)) or
  301. not(is_signed(right.resultdef));
  302. { we have LOC_JUMP as result }
  303. current_asmdata.getjumplabel(truelabel);
  304. current_asmdata.getjumplabel(falselabel);
  305. location_reset_jump(location,truelabel,falselabel);
  306. // todo: implement the rest
  307. internalerror(2020041601);
  308. end;
  309. function TZ80AddNode.pass_1 : tnode;
  310. begin
  311. result:=inherited pass_1;
  312. {$ifdef dummy}
  313. if not(assigned(result)) then
  314. begin
  315. unsigned:=not(is_signed(left.resultdef)) or
  316. not(is_signed(right.resultdef));
  317. if is_64bit(left.resultdef) and
  318. ((nodetype in [equaln,unequaln]) or
  319. (unsigned and (nodetype in [ltn,lten,gtn,gten]))
  320. ) then
  321. expectloc:=LOC_FLAGS;
  322. end;
  323. { handling boolean expressions }
  324. if not(assigned(result)) and
  325. (
  326. not(is_boolean(left.resultdef)) or
  327. not(is_boolean(right.resultdef)) or
  328. is_dynamic_array(left.resultdef)
  329. ) then
  330. expectloc:=LOC_FLAGS;
  331. {$endif dummy}
  332. end;
  333. procedure TZ80AddNode.second_cmpordinal;
  334. begin
  335. if is_32bit(left.resultdef) or is_16bit(left.resultdef) then
  336. second_cmp16_32_64bit
  337. else
  338. second_cmp;
  339. end;
  340. begin
  341. caddnode:=TZ80AddNode;
  342. end.