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aoptcpu.pas
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a277a5f8db
* Removed unused local vars.
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il y a 6 ans |
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aoptcpub.pas
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9b0ff05ee8
- get rid of MaxOps, it is redundant with max_operands
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il y a 6 ans |
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aoptcpud.pas
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3c2dab9878
* i386 peephole assembler uses largely the common peephole optimizer infrastructure, the resulting code is besides a few improvements the same
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il y a 9 ans |
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cgcpu.pas
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50c82b6468
* synchronised with trunk till r41537
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il y a 6 ans |
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cpubase.inc
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518cdf9674
* replaced the saved_XXX_registers arrays with virtual methods inside
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il y a 7 ans |
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cpuelf.pas
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901275b4a1
Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen).
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il y a 10 ans |
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cpuinfo.pas
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aec03309ef
+ added CPUX86_HAS_SSE2 to x86 tcpuflags
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il y a 8 ans |
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cpunode.pas
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a0efde8167
* automatically generate necessary indirect symbols when a new assembler
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il y a 9 ans |
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cpupara.pas
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8b9e90dc7a
* keep track of whether a routine has a C-style variadic parameter in the
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il y a 6 ans |
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cpupi.pas
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50c82b6468
* synchronised with trunk till r41537
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il y a 6 ans |
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cputarg.pas
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4431ba2c08
merged/updated AROS/i386 target to trunk from AROS branch, to support Marcus Sackrow's work on AROS support which will hopefully benefit all Amiga-like targets (classic, MorphOS) on the long run. Compiler only, RTL comes in the next run.
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il y a 11 ans |
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hlcgcpu.pas
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50c82b6468
* synchronised with trunk till r41537
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il y a 6 ans |
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i386att.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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il y a 6 ans |
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i386atts.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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il y a 6 ans |
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i386int.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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il y a 6 ans |
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i386nop.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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il y a 6 ans |
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i386op.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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il y a 6 ans |
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i386prop.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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il y a 6 ans |
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i386tab.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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il y a 6 ans |
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n386add.pas
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a25ebbba3e
+ added volatility information to all memory references
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il y a 8 ans |
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n386cal.pas
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f5f895e2a3
syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed
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il y a 8 ans |
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n386flw.pas
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91d5457b38
* moved around/replaced the following procedures to stop nflw from depending
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il y a 6 ans |
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n386inl.pas
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aefa317474
+ fast and branchless implementation of abs(int64) for i386
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il y a 8 ans |
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n386ld.pas
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3c6aa91a96
* factored out the loading of threadvars in its own method, and put the
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il y a 10 ans |
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n386mat.pas
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8c5606b41d
+ support mmx shifting
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il y a 7 ans |
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n386mem.pas
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3318703ece
* moved nf_typedaddr to addrnodeflags (anf_typedaddr)
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il y a 7 ans |
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n386set.pas
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07bd4ba517
* let all the case code generation work with tconstexprint instead of aint,
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il y a 6 ans |
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r386ari.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386att.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386con.inc
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8b0bbdcaab
* fix flag subregs after r38206
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il y a 7 ans |
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r386dwrf.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386int.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386iri.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386nasm.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386nor.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386nri.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386num.inc
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8b0bbdcaab
* fix flag subregs after r38206
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il y a 7 ans |
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r386ot.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386rni.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386sri.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386stab.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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r386std.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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il y a 8 ans |
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ra386att.pas
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757ed4e8d3
* standard assembler reader for i386
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il y a 20 ans |
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ra386int.pas
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6c6bf452ca
* Fixed level 2 comment warnings.
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il y a 17 ans |
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rgcpu.pas
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b7fe6797bf
Merged revisions 2921-2922,2925 via svnmerge from
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il y a 19 ans |
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symcpu.pas
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acf02ab64b
* when creating wrappers, add a prefix to parameter names to prevent them
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il y a 6 ans |
Jonas Maebe
50c82b6468
* synchronised with trunk till r41537