tcmat.pas 19 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl
  4. Type checking and register allocation for math nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit tcmat;
  19. interface
  20. uses
  21. tree;
  22. procedure firstmoddiv(var p : ptree);
  23. procedure firstshlshr(var p : ptree);
  24. procedure firstunaryminus(var p : ptree);
  25. procedure firstnot(var p : ptree);
  26. implementation
  27. uses
  28. globtype,systems,tokens,
  29. cobjects,verbose,globals,
  30. symconst,symtable,aasm,types,
  31. hcodegen,htypechk,pass_1,cpubase,
  32. { for isbinaryoverloaded function }
  33. tcadd;
  34. {*****************************************************************************
  35. FirstModDiv
  36. *****************************************************************************}
  37. procedure firstmoddiv(var p : ptree);
  38. var
  39. t : ptree;
  40. rv,lv : longint;
  41. rd,ld : pdef;
  42. begin
  43. firstpass(p^.left);
  44. set_varstate(p^.left,true);
  45. firstpass(p^.right);
  46. set_varstate(p^.right,true);
  47. if codegenerror then
  48. exit;
  49. if isbinaryoverloaded(p) then
  50. exit;
  51. { check for division by zero }
  52. rv:=p^.right^.value;
  53. lv:=p^.left^.value;
  54. if is_constintnode(p^.right) and (rv=0) then
  55. begin
  56. Message(parser_e_division_by_zero);
  57. { recover }
  58. rv:=1;
  59. end;
  60. if is_constintnode(p^.left) and is_constintnode(p^.right) then
  61. begin
  62. case p^.treetype of
  63. modn : t:=genordinalconstnode(lv mod rv,s32bitdef);
  64. divn : t:=genordinalconstnode(lv div rv,s32bitdef);
  65. end;
  66. disposetree(p);
  67. firstpass(t);
  68. p:=t;
  69. exit;
  70. end;
  71. if (p^.left^.resulttype^.deftype=orddef) and (p^.right^.resulttype^.deftype=orddef) and
  72. (is_64bitint(p^.left^.resulttype) or is_64bitint(p^.right^.resulttype)) then
  73. begin
  74. rd:=p^.right^.resulttype;
  75. ld:=p^.left^.resulttype;
  76. if (porddef(rd)^.typ=s64bit) or (porddef(ld)^.typ=s64bit) then
  77. begin
  78. if (porddef(ld)^.typ<>s64bit) then
  79. begin
  80. p^.left:=gentypeconvnode(p^.left,cs64bitdef);
  81. firstpass(p^.left);
  82. end;
  83. if (porddef(rd)^.typ<>s64bit) then
  84. begin
  85. p^.right:=gentypeconvnode(p^.right,cs64bitdef);
  86. firstpass(p^.right);
  87. end;
  88. calcregisters(p,2,0,0);
  89. end
  90. else if (porddef(rd)^.typ=u64bit) or (porddef(ld)^.typ=u64bit) then
  91. begin
  92. if (porddef(ld)^.typ<>u64bit) then
  93. begin
  94. p^.left:=gentypeconvnode(p^.left,cu64bitdef);
  95. firstpass(p^.left);
  96. end;
  97. if (porddef(rd)^.typ<>u64bit) then
  98. begin
  99. p^.right:=gentypeconvnode(p^.right,cu64bitdef);
  100. firstpass(p^.right);
  101. end;
  102. calcregisters(p,2,0,0);
  103. end;
  104. p^.resulttype:=p^.left^.resulttype;
  105. end
  106. else
  107. begin
  108. if not(p^.right^.resulttype^.deftype=orddef) or
  109. not(porddef(p^.right^.resulttype)^.typ in [s32bit,u32bit]) then
  110. p^.right:=gentypeconvnode(p^.right,s32bitdef);
  111. if not(p^.left^.resulttype^.deftype=orddef) or
  112. not(porddef(p^.left^.resulttype)^.typ in [s32bit,u32bit]) then
  113. p^.left:=gentypeconvnode(p^.left,s32bitdef);
  114. firstpass(p^.left);
  115. firstpass(p^.right);
  116. {$ifdef cardinalmulfix}
  117. { if we divide a u32bit by a positive constant, the result is also u32bit (JM) }
  118. if (p^.left^.resulttype^.deftype = orddef) and
  119. (p^.left^.resulttype^.deftype = orddef) then
  120. begin
  121. if (porddef(p^.left^.resulttype)^.typ = u32bit) and
  122. is_constintnode(p^.right) and
  123. { (porddef(p^.right^.resulttype)^.typ <> u32bit) and}
  124. (p^.right^.value > 0) then
  125. begin
  126. p^.right := gentypeconvnode(p^.right,u32bitdef);
  127. firstpass(p^.right);
  128. end;
  129. { adjust also the left resulttype if necessary }
  130. if (porddef(p^.right^.resulttype)^.typ = u32bit) and
  131. is_constintnode(p^.left) and
  132. { (porddef(p^.left^.resulttype)^.typ <> u32bit) and}
  133. (p^.left^.value > 0) then
  134. begin
  135. p^.left := gentypeconvnode(p^.left,u32bitdef);
  136. firstpass(p^.left);
  137. end;
  138. end;
  139. {$endif cardinalmulfix}
  140. { the resulttype depends on the right side, because the left becomes }
  141. { always 64 bit }
  142. p^.resulttype:=p^.right^.resulttype;
  143. if codegenerror then
  144. exit;
  145. left_right_max(p);
  146. if p^.left^.registers32<=p^.right^.registers32 then
  147. inc(p^.registers32);
  148. end;
  149. p^.location.loc:=LOC_REGISTER;
  150. end;
  151. {*****************************************************************************
  152. FirstShlShr
  153. *****************************************************************************}
  154. procedure firstshlshr(var p : ptree);
  155. var
  156. t : ptree;
  157. regs : longint;
  158. begin
  159. firstpass(p^.left);
  160. set_varstate(p^.left,true);
  161. firstpass(p^.right);
  162. set_varstate(p^.right,true);
  163. if codegenerror then
  164. exit;
  165. if isbinaryoverloaded(p) then
  166. exit;
  167. if is_constintnode(p^.left) and is_constintnode(p^.right) then
  168. begin
  169. case p^.treetype of
  170. shrn : t:=genordinalconstnode(p^.left^.value shr p^.right^.value,s32bitdef);
  171. shln : t:=genordinalconstnode(p^.left^.value shl p^.right^.value,s32bitdef);
  172. end;
  173. disposetree(p);
  174. firstpass(t);
  175. p:=t;
  176. exit;
  177. end;
  178. { 64 bit ints have their own shift handling }
  179. if not(is_64bitint(p^.left^.resulttype)) then
  180. begin
  181. p^.left:=gentypeconvnode(p^.left,s32bitdef);
  182. firstpass(p^.left);
  183. regs:=1;
  184. p^.resulttype:=s32bitdef;
  185. end
  186. else
  187. begin
  188. p^.resulttype:=p^.left^.resulttype;
  189. regs:=2;
  190. end;
  191. p^.right:=gentypeconvnode(p^.right,s32bitdef);
  192. firstpass(p^.right);
  193. if codegenerror then
  194. exit;
  195. if (p^.right^.treetype<>ordconstn) then
  196. inc(regs);
  197. calcregisters(p,regs,0,0);
  198. p^.location.loc:=LOC_REGISTER;
  199. end;
  200. {*****************************************************************************
  201. FirstUnaryMinus
  202. *****************************************************************************}
  203. procedure firstunaryminus(var p : ptree);
  204. var
  205. t : ptree;
  206. minusdef : pprocdef;
  207. begin
  208. firstpass(p^.left);
  209. set_varstate(p^.left,true);
  210. p^.registers32:=p^.left^.registers32;
  211. p^.registersfpu:=p^.left^.registersfpu;
  212. {$ifdef SUPPORT_MMX}
  213. p^.registersmmx:=p^.left^.registersmmx;
  214. {$endif SUPPORT_MMX}
  215. p^.resulttype:=p^.left^.resulttype;
  216. if codegenerror then
  217. exit;
  218. if is_constintnode(p^.left) then
  219. begin
  220. t:=genordinalconstnode(-p^.left^.value,s32bitdef);
  221. disposetree(p);
  222. firstpass(t);
  223. p:=t;
  224. exit;
  225. end;
  226. { nasm can not cope with negativ reals !! }
  227. if is_constrealnode(p^.left)
  228. {$ifdef i386}
  229. and not(aktoutputformat in [as_i386_nasmcoff,as_i386_nasmelf,as_i386_nasmobj])
  230. {$endif i386}
  231. then
  232. begin
  233. t:=genrealconstnode(-p^.left^.value_real,bestrealdef^);
  234. disposetree(p);
  235. firstpass(t);
  236. p:=t;
  237. exit;
  238. end;
  239. if (p^.left^.resulttype^.deftype=floatdef) then
  240. begin
  241. if pfloatdef(p^.left^.resulttype)^.typ=f32bit then
  242. begin
  243. if (p^.left^.location.loc<>LOC_REGISTER) and
  244. (p^.registers32<1) then
  245. p^.registers32:=1;
  246. p^.location.loc:=LOC_REGISTER;
  247. end
  248. else
  249. p^.location.loc:=LOC_FPU;
  250. end
  251. {$ifdef SUPPORT_MMX}
  252. else if (cs_mmx in aktlocalswitches) and
  253. is_mmx_able_array(p^.left^.resulttype) then
  254. begin
  255. if (p^.left^.location.loc<>LOC_MMXREGISTER) and
  256. (p^.registersmmx<1) then
  257. p^.registersmmx:=1;
  258. { if saturation is on, p^.left^.resulttype isn't
  259. "mmx able" (FK)
  260. if (cs_mmx_saturation in aktlocalswitches^) and
  261. (porddef(parraydef(p^.resulttype)^.definition)^.typ in
  262. [s32bit,u32bit]) then
  263. CGMessage(type_e_mismatch);
  264. }
  265. end
  266. {$endif SUPPORT_MMX}
  267. else if is_64bitint(p^.left^.resulttype) then
  268. begin
  269. firstpass(p^.left);
  270. p^.registersfpu:=p^.left^.registersfpu;
  271. {$ifdef SUPPORT_MMX}
  272. p^.registersmmx:=p^.left^.registersmmx;
  273. {$endif SUPPORT_MMX}
  274. p^.registers32:=p^.left^.registers32;
  275. if codegenerror then
  276. exit;
  277. if (p^.left^.location.loc<>LOC_REGISTER) and
  278. (p^.registers32<2) then
  279. p^.registers32:=2;
  280. p^.location.loc:=LOC_REGISTER;
  281. p^.resulttype:=p^.left^.resulttype;
  282. end
  283. else if (p^.left^.resulttype^.deftype=orddef) then
  284. begin
  285. p^.left:=gentypeconvnode(p^.left,s32bitdef);
  286. firstpass(p^.left);
  287. p^.registersfpu:=p^.left^.registersfpu;
  288. {$ifdef SUPPORT_MMX}
  289. p^.registersmmx:=p^.left^.registersmmx;
  290. {$endif SUPPORT_MMX}
  291. p^.registers32:=p^.left^.registers32;
  292. if codegenerror then
  293. exit;
  294. if (p^.left^.location.loc<>LOC_REGISTER) and
  295. (p^.registers32<1) then
  296. p^.registers32:=1;
  297. p^.location.loc:=LOC_REGISTER;
  298. p^.resulttype:=p^.left^.resulttype;
  299. end
  300. else
  301. begin
  302. if assigned(overloaded_operators[_minus]) then
  303. minusdef:=overloaded_operators[_minus]^.definition
  304. else
  305. minusdef:=nil;
  306. while assigned(minusdef) do
  307. begin
  308. if (pparaitem(minusdef^.para^.first)^.paratype.def=p^.left^.resulttype) and
  309. (pparaitem(minusdef^.para^.first)^.next=nil) then
  310. begin
  311. t:=gencallnode(overloaded_operators[_minus],nil);
  312. t^.left:=gencallparanode(p^.left,nil);
  313. putnode(p);
  314. p:=t;
  315. firstpass(p);
  316. exit;
  317. end;
  318. minusdef:=minusdef^.nextoverloaded;
  319. end;
  320. CGMessage(type_e_mismatch);
  321. end;
  322. end;
  323. {*****************************************************************************
  324. FirstNot
  325. *****************************************************************************}
  326. procedure firstnot(var p : ptree);
  327. var
  328. t : ptree;
  329. begin
  330. firstpass(p^.left);
  331. set_varstate(p^.left,true);
  332. if codegenerror then
  333. exit;
  334. if (p^.left^.treetype=ordconstn) then
  335. begin
  336. if is_boolean(p^.left^.resulttype) then
  337. t:=genordinalconstnode(byte(not(boolean(p^.left^.value))),p^.left^.resulttype)
  338. else
  339. t:=genordinalconstnode(not(p^.left^.value),p^.left^.resulttype);
  340. disposetree(p);
  341. firstpass(t);
  342. p:=t;
  343. exit;
  344. end;
  345. p^.resulttype:=p^.left^.resulttype;
  346. p^.location.loc:=p^.left^.location.loc;
  347. {$ifdef SUPPORT_MMX}
  348. p^.registersmmx:=p^.left^.registersmmx;
  349. {$endif SUPPORT_MMX}
  350. if is_boolean(p^.resulttype) then
  351. begin
  352. p^.registers32:=p^.left^.registers32;
  353. if (p^.location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
  354. begin
  355. p^.location.loc:=LOC_REGISTER;
  356. if (p^.registers32<1) then
  357. p^.registers32:=1;
  358. end;
  359. { before loading it into flags we need to load it into
  360. a register thus 1 register is need PM }
  361. {$ifdef i386}
  362. if p^.left^.location.loc<>LOC_JUMP then
  363. p^.location.loc:=LOC_FLAGS;
  364. {$endif def i386}
  365. end
  366. else
  367. {$ifdef SUPPORT_MMX}
  368. if (cs_mmx in aktlocalswitches) and
  369. is_mmx_able_array(p^.left^.resulttype) then
  370. begin
  371. if (p^.left^.location.loc<>LOC_MMXREGISTER) and
  372. (p^.registersmmx<1) then
  373. p^.registersmmx:=1;
  374. end
  375. else
  376. {$endif SUPPORT_MMX}
  377. if is_64bitint(p^.left^.resulttype) then
  378. begin
  379. p^.registers32:=p^.left^.registers32;
  380. if (p^.location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
  381. begin
  382. p^.location.loc:=LOC_REGISTER;
  383. if (p^.registers32<2) then
  384. p^.registers32:=2;
  385. end;
  386. end
  387. else
  388. begin
  389. p^.left:=gentypeconvnode(p^.left,s32bitdef);
  390. firstpass(p^.left);
  391. if codegenerror then
  392. exit;
  393. p^.resulttype:=p^.left^.resulttype;
  394. p^.registers32:=p^.left^.registers32;
  395. {$ifdef SUPPORT_MMX}
  396. p^.registersmmx:=p^.left^.registersmmx;
  397. {$endif SUPPORT_MMX}
  398. if (p^.left^.location.loc<>LOC_REGISTER) and
  399. (p^.registers32<1) then
  400. p^.registers32:=1;
  401. p^.location.loc:=LOC_REGISTER;
  402. end;
  403. p^.registersfpu:=p^.left^.registersfpu;
  404. end;
  405. end.
  406. {
  407. $Log$
  408. Revision 1.27 2000-01-07 01:14:46 peter
  409. * updated copyright to 2000
  410. Revision 1.26 1999/12/11 18:53:31 jonas
  411. * fixed type conversions of results of operations with cardinals
  412. (between -dcardinalmulfix)
  413. Revision 1.25 1999/11/30 10:40:58 peter
  414. + ttype, tsymlist
  415. Revision 1.24 1999/11/26 13:51:29 pierre
  416. * fix for overloading of shr shl mod and div
  417. Revision 1.23 1999/11/18 15:34:50 pierre
  418. * Notes/Hints for local syms changed to
  419. Set_varstate function
  420. Revision 1.22 1999/11/06 14:34:30 peter
  421. * truncated log to 20 revs
  422. Revision 1.21 1999/10/26 12:30:46 peter
  423. * const parameter is now checked
  424. * better and generic check if a node can be used for assigning
  425. * export fixes
  426. * procvar equal works now (it never had worked at least from 0.99.8)
  427. * defcoll changed to linkedlist with pparaitem so it can easily be
  428. walked both directions
  429. Revision 1.20 1999/08/23 23:37:01 pierre
  430. * firstnot register counting error corrected
  431. Revision 1.19 1999/08/04 13:03:15 jonas
  432. * all tokens now start with an underscore
  433. * PowerPC compiles!!
  434. Revision 1.18 1999/08/04 00:23:43 florian
  435. * renamed i386asm and i386base to cpuasm and cpubase
  436. Revision 1.17 1999/08/03 22:03:34 peter
  437. * moved bitmask constants to sets
  438. * some other type/const renamings
  439. Revision 1.16 1999/06/02 10:11:54 florian
  440. * make cycle fixed i.e. compilation with 0.99.10
  441. * some fixes for qword
  442. * start of register calling conventions
  443. Revision 1.15 1999/05/27 19:45:22 peter
  444. * removed oldasm
  445. * plabel -> pasmlabel
  446. * -a switches to source writing automaticly
  447. * assembler readers OOPed
  448. * asmsymbol automaticly external
  449. * jumptables and other label fixes for asm readers
  450. Revision 1.14 1999/05/06 09:05:38 peter
  451. * generic write_float and str_float
  452. * fixed constant float conversions
  453. Revision 1.13 1999/05/01 13:24:55 peter
  454. * merged nasm compiler
  455. * old asm moved to oldasm/
  456. Revision 1.12 1999/02/22 02:15:53 peter
  457. * updates for ag386bin
  458. Revision 1.11 1999/02/03 10:11:11 pierre
  459. * fix for bug0211 for i386
  460. Revision 1.10 1998/12/11 16:50:24 florian
  461. + typed const int64 and qword
  462. + unary minus-operator q1:=-q2;
  463. + not-operator
  464. Revision 1.9 1998/12/11 16:10:12 florian
  465. + shifting for 64 bit ints added
  466. * bug in getexplicitregister32 fixed: usableregs wasn't decremented !!
  467. Revision 1.8 1998/12/11 00:03:56 peter
  468. + globtype,tokens,version unit splitted from globals
  469. Revision 1.7 1998/11/13 10:16:38 peter
  470. * fixed constant not(boolean)
  471. Revision 1.6 1998/11/05 14:26:01 peter
  472. * fixed shlshr which would push ecx when not needed
  473. Revision 1.5 1998/10/20 13:12:39 peter
  474. * fixed 'not not boolean', the location was not set to register
  475. Revision 1.4 1998/10/13 16:50:25 pierre
  476. * undid some changes of Peter that made the compiler wrong
  477. for m68k (I had to reinsert some ifdefs)
  478. * removed several memory leaks under m68k
  479. * removed the meory leaks for assembler readers
  480. * cross compiling shoud work again better
  481. ( crosscompiling sysamiga works
  482. but as68k still complain about some code !)
  483. Revision 1.3 1998/10/13 13:10:33 peter
  484. * new style for m68k/i386 infos and enums
  485. Revision 1.2 1998/10/11 14:31:20 peter
  486. + checks for division by zero
  487. }