cgbase.pas 24 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. { since we have only 16bit offsets, we need to be able to specify the high
  56. and lower 16 bits of the address of a symbol of up to 64 bit }
  57. trefaddr = (
  58. addr_no,
  59. addr_full,
  60. addr_pic,
  61. addr_pic_no_got
  62. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS)}
  63. ,
  64. addr_low, // bits 48-63
  65. addr_high, // bits 32-47
  66. {$IF defined(POWERPC64)}
  67. addr_higher, // bits 16-31
  68. addr_highest, // bits 00-15
  69. {$ENDIF}
  70. addr_higha // bits 16-31, adjusted
  71. {$IF defined(POWERPC64)}
  72. ,
  73. addr_highera, // bits 32-47, adjusted
  74. addr_highesta // bits 48-63, adjusted
  75. {$ENDIF}
  76. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS}
  77. {$IFDEF MIPS}
  78. ,
  79. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  80. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  81. addr_high_pic,
  82. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  83. addr_high_call
  84. {$ENDIF}
  85. {$IFDEF AVR}
  86. ,addr_lo8
  87. ,addr_hi8
  88. {$ENDIF}
  89. {$IFDEF i8086}
  90. ,addr_dgroup // the data segment group
  91. ,addr_seg // used for getting the segment of an object, e.g. 'mov ax, SEG symbol'
  92. {$ENDIF}
  93. {$IFDEF AARCH64}
  94. ,addr_gotpage
  95. ,addr_gotpageoffset
  96. {$ENDIF AARCH64}
  97. );
  98. {# Generic opcodes, which must be supported by all processors
  99. }
  100. topcg =
  101. (
  102. OP_NONE,
  103. OP_MOVE, { replaced operation with direct load }
  104. OP_ADD, { simple addition }
  105. OP_AND, { simple logical and }
  106. OP_DIV, { simple unsigned division }
  107. OP_IDIV, { simple signed division }
  108. OP_IMUL, { simple signed multiply }
  109. OP_MUL, { simple unsigned multiply }
  110. OP_NEG, { simple negate }
  111. OP_NOT, { simple logical not }
  112. OP_OR, { simple logical or }
  113. OP_SAR, { arithmetic shift-right }
  114. OP_SHL, { logical shift left }
  115. OP_SHR, { logical shift right }
  116. OP_SUB, { simple subtraction }
  117. OP_XOR, { simple exclusive or }
  118. OP_ROL, { rotate left }
  119. OP_ROR { rotate right }
  120. );
  121. {# Generic flag values - used for jump locations }
  122. TOpCmp =
  123. (
  124. OC_NONE,
  125. OC_EQ, { equality comparison }
  126. OC_GT, { greater than (signed) }
  127. OC_LT, { less than (signed) }
  128. OC_GTE, { greater or equal than (signed) }
  129. OC_LTE, { less or equal than (signed) }
  130. OC_NE, { not equal }
  131. OC_BE, { less or equal than (unsigned) }
  132. OC_B, { less than (unsigned) }
  133. OC_AE, { greater or equal than (unsigned) }
  134. OC_A { greater than (unsigned) }
  135. );
  136. { indirect symbol flags }
  137. tindsymflag = (is_data,is_weak);
  138. tindsymflags = set of tindsymflag;
  139. { OS_NO is also used memory references with large data that can
  140. not be loaded in a register directly }
  141. TCgSize = (OS_NO,
  142. { integer registers }
  143. OS_8,OS_16,OS_32,OS_64,OS_128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  144. { single,double,extended,comp,float128 }
  145. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  146. { multi-media sizes: split in byte, word, dword, ... }
  147. { entities, then the signed counterparts }
  148. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,
  149. OS_MS8,OS_MS16,OS_MS32,OS_MS64,OS_MS128,OS_MS256 );
  150. { Register types }
  151. TRegisterType = (
  152. R_INVALIDREGISTER, { = 0 }
  153. R_INTREGISTER, { = 1 }
  154. R_FPUREGISTER, { = 2 }
  155. { used by Intel only }
  156. R_MMXREGISTER, { = 3 }
  157. R_MMREGISTER, { = 4 }
  158. R_SPECIALREGISTER, { = 5 }
  159. R_ADDRESSREGISTER { = 6 }
  160. );
  161. { Sub registers }
  162. TSubRegister = (
  163. R_SUBNONE, { = 0; no sub register possible }
  164. R_SUBL, { = 1; 8 bits, Like AL }
  165. R_SUBH, { = 2; 8 bits, Like AH }
  166. R_SUBW, { = 3; 16 bits, Like AX }
  167. R_SUBD, { = 4; 32 bits, Like EAX }
  168. R_SUBQ, { = 5; 64 bits, Like RAX }
  169. { For Sparc floats that use F0:F1 to store doubles }
  170. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  171. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  172. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  173. R_SUBMMS, { = 9; single scalar in multi media register }
  174. R_SUBMMD, { = 10; double scalar in multi media register }
  175. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  176. { For Intel X86 AVX-Register }
  177. R_SUBMMX, { = 12; 128 BITS }
  178. R_SUBMMY { = 13; 256 BITS }
  179. );
  180. TSubRegisterSet = set of TSubRegister;
  181. TSuperRegister = type word;
  182. {
  183. The new register coding:
  184. SuperRegister (bits 0..15)
  185. Subregister (bits 16..23)
  186. Register type (bits 24..31)
  187. TRegister is defined as an enum to make it incompatible
  188. with TSuperRegister to avoid mixing them
  189. }
  190. TRegister = (
  191. TRegisterLowEnum := Low(longint),
  192. TRegisterHighEnum := High(longint)
  193. );
  194. TRegisterRec=packed record
  195. {$ifdef FPC_BIG_ENDIAN}
  196. regtype : Tregistertype;
  197. subreg : Tsubregister;
  198. supreg : Tsuperregister;
  199. {$else FPC_BIG_ENDIAN}
  200. supreg : Tsuperregister;
  201. subreg : Tsubregister;
  202. regtype : Tregistertype;
  203. {$endif FPC_BIG_ENDIAN}
  204. end;
  205. { A type to store register locations for 64 Bit values. }
  206. {$ifdef cpu64bitalu}
  207. tregister64 = tregister;
  208. tregister128 = record
  209. reglo,reghi : tregister;
  210. end;
  211. {$else cpu64bitalu}
  212. tregister64 = record
  213. reglo,reghi : tregister;
  214. end;
  215. {$endif cpu64bitalu}
  216. Tregistermmxset = record
  217. reg0,reg1,reg2,reg3:Tregister
  218. end;
  219. { Set type definition for registers }
  220. tsuperregisterset = array[byte] of set of byte;
  221. pmmshuffle = ^tmmshuffle;
  222. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  223. passed to an mm operation is nil, it means that the whole location is moved }
  224. tmmshuffle = record
  225. { describes how many shuffles are actually described, if len=0 then
  226. moving the scalar with index 0 to the scalar with index 0 is meant }
  227. len : byte;
  228. { lower nibble of each entry of this array describes index of the source data index while
  229. the upper nibble describes the destination index }
  230. shuffles : array[1..1] of byte;
  231. end;
  232. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  233. Psuperregisterarray=^Tsuperregisterarray;
  234. Tsuperregisterworklist=object
  235. buflength,
  236. buflengthinc,
  237. length:word;
  238. buf:Psuperregisterarray;
  239. constructor init;
  240. constructor copyfrom(const x:Tsuperregisterworklist);
  241. destructor done;
  242. procedure clear;
  243. procedure add(s:tsuperregister);
  244. function addnodup(s:tsuperregister): boolean;
  245. function get:tsuperregister;
  246. function readidx(i:word):tsuperregister;
  247. procedure deleteidx(i:word);
  248. function delete(s:tsuperregister):boolean;
  249. end;
  250. psuperregisterworklist=^tsuperregisterworklist;
  251. const
  252. { alias for easier understanding }
  253. R_SSEREGISTER = R_MMREGISTER;
  254. { Invalid register number }
  255. RS_INVALID = high(tsuperregister);
  256. NR_INVALID = tregister($fffffffff);
  257. tcgsize2size : Array[tcgsize] of integer =
  258. { integer values }
  259. (0,1,2,4,8,16,1,2,4,8,16,
  260. { floating point values }
  261. 4,8,10,8,16,
  262. { multimedia values }
  263. 1,2,4,8,16,32,1,2,4,8,16,32);
  264. tfloat2tcgsize: array[tfloattype] of tcgsize =
  265. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  266. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  267. (s32real,s64real,s80real,s64comp);
  268. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  269. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  270. {$if defined(cpu64bitalu)}
  271. { operand size describing an unsigned value in a pair of int registers }
  272. OS_PAIR = OS_128;
  273. { operand size describing an signed value in a pair of int registers }
  274. OS_SPAIR = OS_S128;
  275. {$elseif defined(cpu32bitalu)}
  276. { operand size describing an unsigned value in a pair of int registers }
  277. OS_PAIR = OS_64;
  278. { operand size describing an signed value in a pair of int registers }
  279. OS_SPAIR = OS_S64;
  280. {$elseif defined(cpu16bitalu)}
  281. { operand size describing an unsigned value in a pair of int registers }
  282. OS_PAIR = OS_32;
  283. { operand size describing an signed value in a pair of int registers }
  284. OS_SPAIR = OS_S32;
  285. {$elseif defined(cpu8bitalu)}
  286. { operand size describing an unsigned value in a pair of int registers }
  287. OS_PAIR = OS_16;
  288. { operand size describing an signed value in a pair of int registers }
  289. OS_SPAIR = OS_S16;
  290. {$endif}
  291. { Table to convert tcgsize variables to the correspondending
  292. unsigned types }
  293. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  294. OS_8,OS_16,OS_32,OS_64,OS_128,OS_8,OS_16,OS_32,OS_64,OS_128,
  295. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  296. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  297. OS_M64,OS_M128,OS_M256);
  298. tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
  299. OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  300. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  301. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  302. OS_M64,OS_M128,OS_M256);
  303. tcgloc2str : array[TCGLoc] of string[12] = (
  304. 'LOC_INVALID',
  305. 'LOC_VOID',
  306. 'LOC_CONST',
  307. 'LOC_JUMP',
  308. 'LOC_FLAGS',
  309. 'LOC_REG',
  310. 'LOC_CREG',
  311. 'LOC_FPUREG',
  312. 'LOC_CFPUREG',
  313. 'LOC_MMXREG',
  314. 'LOC_CMMXREG',
  315. 'LOC_MMREG',
  316. 'LOC_CMMREG',
  317. 'LOC_SSETREG',
  318. 'LOC_CSSETREG',
  319. 'LOC_SSETREF',
  320. 'LOC_CSSETREF',
  321. 'LOC_CREF',
  322. 'LOC_REF'
  323. );
  324. var
  325. mms_movescalar : pmmshuffle;
  326. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  327. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  328. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  329. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  330. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  331. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  332. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  333. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  334. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  335. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  336. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  337. function generic_regname(r:tregister):string;
  338. {# From a constant numeric value, return the abstract code generator
  339. size.
  340. }
  341. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  342. function int_float_cgsize(const a: tcgint): tcgsize;
  343. function tcgsize2str(cgsize: tcgsize):string;
  344. { return the inverse condition of opcmp }
  345. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  346. { return the opcmp needed when swapping the operands }
  347. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  348. { return whether op is commutative }
  349. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  350. { returns true, if shuffle describes a real shuffle operation and not only a move }
  351. function realshuffle(shuffle : pmmshuffle) : boolean;
  352. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  353. function shufflescalar(shuffle : pmmshuffle) : boolean;
  354. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  355. the source }
  356. procedure removeshuffles(var shuffle : tmmshuffle);
  357. implementation
  358. uses
  359. verbose;
  360. {******************************************************************************
  361. tsuperregisterworklist
  362. ******************************************************************************}
  363. constructor tsuperregisterworklist.init;
  364. begin
  365. length:=0;
  366. buflength:=0;
  367. buflengthinc:=16;
  368. buf:=nil;
  369. end;
  370. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  371. begin
  372. self:=x;
  373. if x.buf<>nil then
  374. begin
  375. getmem(buf,buflength*sizeof(Tsuperregister));
  376. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  377. end;
  378. end;
  379. destructor tsuperregisterworklist.done;
  380. begin
  381. if assigned(buf) then
  382. freemem(buf);
  383. end;
  384. procedure tsuperregisterworklist.add(s:tsuperregister);
  385. begin
  386. inc(length);
  387. { Need to increase buffer length? }
  388. if length>=buflength then
  389. begin
  390. inc(buflength,buflengthinc);
  391. buflengthinc:=buflengthinc*2;
  392. if buflengthinc>256 then
  393. buflengthinc:=256;
  394. reallocmem(buf,buflength*sizeof(Tsuperregister));
  395. end;
  396. buf^[length-1]:=s;
  397. end;
  398. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  399. begin
  400. addnodup := false;
  401. if indexword(buf^,length,s) = -1 then
  402. begin
  403. add(s);
  404. addnodup := true;
  405. end;
  406. end;
  407. procedure tsuperregisterworklist.clear;
  408. begin
  409. length:=0;
  410. end;
  411. procedure tsuperregisterworklist.deleteidx(i:word);
  412. begin
  413. if i>=length then
  414. internalerror(200310144);
  415. buf^[i]:=buf^[length-1];
  416. dec(length);
  417. end;
  418. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  419. begin
  420. if (i >= length) then
  421. internalerror(2005010601);
  422. result := buf^[i];
  423. end;
  424. function tsuperregisterworklist.get:tsuperregister;
  425. begin
  426. if length=0 then
  427. internalerror(200310142);
  428. get:=buf^[0];
  429. buf^[0]:=buf^[length-1];
  430. dec(length);
  431. end;
  432. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  433. var
  434. i:longint;
  435. begin
  436. delete:=false;
  437. { indexword in 1.0.x and 1.9.4 is broken }
  438. i:=indexword(buf^,length,s);
  439. if i<>-1 then
  440. begin
  441. deleteidx(i);
  442. delete := true;
  443. end;
  444. end;
  445. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  446. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  447. begin
  448. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  449. end;
  450. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  451. begin
  452. include(regs[s shr 8],(s and $ff));
  453. end;
  454. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  455. begin
  456. exclude(regs[s shr 8],(s and $ff));
  457. end;
  458. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  459. begin
  460. result:=(s and $ff) in regs[s shr 8];
  461. end;
  462. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  463. begin
  464. tregisterrec(result).regtype:=rt;
  465. tregisterrec(result).supreg:=sr;
  466. tregisterrec(result).subreg:=sb;
  467. end;
  468. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  469. begin
  470. result:=tregisterrec(r).subreg;
  471. end;
  472. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  473. begin
  474. result:=tregisterrec(r).supreg;
  475. end;
  476. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  477. begin
  478. result:=tregisterrec(r).regtype;
  479. end;
  480. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  481. begin
  482. tregisterrec(r).subreg:=sr;
  483. end;
  484. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  485. begin
  486. tregisterrec(r).supreg:=sr;
  487. end;
  488. function generic_regname(r:tregister):string;
  489. var
  490. nr : string[12];
  491. begin
  492. str(getsupreg(r),nr);
  493. case getregtype(r) of
  494. R_INTREGISTER:
  495. result:='ireg'+nr;
  496. R_FPUREGISTER:
  497. result:='freg'+nr;
  498. R_MMREGISTER:
  499. result:='mreg'+nr;
  500. R_MMXREGISTER:
  501. result:='xreg'+nr;
  502. R_ADDRESSREGISTER:
  503. result:='areg'+nr;
  504. R_SPECIALREGISTER:
  505. result:='sreg'+nr;
  506. else
  507. begin
  508. result:='INVALID';
  509. exit;
  510. end;
  511. end;
  512. case getsubreg(r) of
  513. R_SUBNONE:
  514. ;
  515. R_SUBL:
  516. result:=result+'l';
  517. R_SUBH:
  518. result:=result+'h';
  519. R_SUBW:
  520. result:=result+'w';
  521. R_SUBD:
  522. result:=result+'d';
  523. R_SUBQ:
  524. result:=result+'q';
  525. R_SUBFS:
  526. result:=result+'fs';
  527. R_SUBFD:
  528. result:=result+'fd';
  529. R_SUBMMD:
  530. result:=result+'md';
  531. R_SUBMMS:
  532. result:=result+'ms';
  533. R_SUBMMWHOLE:
  534. result:=result+'ma';
  535. R_SUBMMX:
  536. result:=result+'mx';
  537. R_SUBMMY:
  538. result:=result+'my';
  539. else
  540. internalerror(200308252);
  541. end;
  542. end;
  543. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  544. const
  545. size2cgsize : array[0..8] of tcgsize = (
  546. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  547. );
  548. begin
  549. {$ifdef cpu64bitalu}
  550. if a=16 then
  551. result:=OS_128
  552. else
  553. {$endif cpu64bitalu}
  554. if a>8 then
  555. result:=OS_NO
  556. else
  557. result:=size2cgsize[a];
  558. end;
  559. function int_float_cgsize(const a: tcgint): tcgsize;
  560. begin
  561. case a of
  562. 4 :
  563. result:=OS_F32;
  564. 8 :
  565. result:=OS_F64;
  566. 10 :
  567. result:=OS_F80;
  568. 16 :
  569. result:=OS_F128;
  570. else
  571. internalerror(200603211);
  572. end;
  573. end;
  574. function tcgsize2str(cgsize: tcgsize):string;
  575. begin
  576. Str(cgsize, Result);
  577. end;
  578. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  579. const
  580. list: array[TOpCmp] of TOpCmp =
  581. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  582. OC_B,OC_BE);
  583. begin
  584. inverse_opcmp := list[opcmp];
  585. end;
  586. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  587. const
  588. list: array[TOpCmp] of TOpCmp =
  589. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  590. OC_BE,OC_B);
  591. begin
  592. swap_opcmp := list[opcmp];
  593. end;
  594. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  595. const
  596. list: array[topcg] of boolean =
  597. (true,false,true,true,false,false,true,true,false,false,
  598. true,false,false,false,false,true,false,false);
  599. begin
  600. commutativeop := list[op];
  601. end;
  602. function realshuffle(shuffle : pmmshuffle) : boolean;
  603. var
  604. i : longint;
  605. begin
  606. realshuffle:=true;
  607. if (shuffle=nil) or (shuffle^.len=0) then
  608. realshuffle:=false
  609. else
  610. begin
  611. for i:=1 to shuffle^.len do
  612. begin
  613. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
  614. exit;
  615. end;
  616. realshuffle:=false;
  617. end;
  618. end;
  619. function shufflescalar(shuffle : pmmshuffle) : boolean;
  620. begin
  621. result:=shuffle^.len=0;
  622. end;
  623. procedure removeshuffles(var shuffle : tmmshuffle);
  624. var
  625. i : longint;
  626. begin
  627. if shuffle.len=0 then
  628. exit;
  629. for i:=1 to shuffle.len do
  630. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  631. end;
  632. initialization
  633. new(mms_movescalar);
  634. mms_movescalar^.len:=0;
  635. finalization
  636. dispose(mms_movescalar);
  637. end.