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ncgmem.pas 50 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpuinfo,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgwithnode = class(twithnode)
  45. procedure pass_generate_code;override;
  46. end;
  47. tcgvecnode = class(tvecnode)
  48. function get_mul_size : aint;
  49. private
  50. procedure rangecheck_array;
  51. procedure rangecheck_string;
  52. protected
  53. {# This routine is used to calculate the address of the reference.
  54. On entry reg contains the index in the array,
  55. and l contains the size of each element in the array.
  56. This routine should update location.reference correctly,
  57. so it points to the correct address.
  58. }
  59. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  60. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  61. procedure update_reference_offset(var ref: treference; index, mulsize: aint); virtual;
  62. procedure second_wideansistring;virtual;
  63. procedure second_dynamicarray;virtual;
  64. function valid_index_size(size: tcgsize): boolean;virtual;
  65. public
  66. procedure pass_generate_code;override;
  67. end;
  68. implementation
  69. uses
  70. systems,
  71. cutils,cclasses,verbose,globals,constexp,
  72. symconst,symbase,symdef,symsym,symcpu,symtable,defutil,paramgr,
  73. aasmbase,aasmtai,aasmdata,
  74. procinfo,pass_2,parabase,
  75. pass_1,nld,ncon,nadd,ncnv,nutils,
  76. cgobj,hlcgobj,
  77. tgobj,ncgutil,objcgutl,
  78. defcmp
  79. ;
  80. {*****************************************************************************
  81. TCGLOADVMTADDRNODE
  82. *****************************************************************************}
  83. procedure tcgloadvmtaddrnode.pass_generate_code;
  84. var
  85. href : treference;
  86. pool : THashSet;
  87. entry : PHashSetItem;
  88. begin
  89. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  90. if (left.nodetype=typen) then
  91. begin
  92. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  93. if not is_objcclass(left.resultdef) then
  94. begin
  95. reference_reset_symbol(href,
  96. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  97. voidpointertype.size);
  98. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,resultdef,href,location.register);
  99. end
  100. else
  101. begin
  102. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  103. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  104. if (target_info.system in systems_objc_nfabi) then
  105. begin
  106. { find/add necessary classref/classname pool entries }
  107. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  108. end
  109. else
  110. begin
  111. { find/add necessary classref/classname pool entries }
  112. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  113. end;
  114. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  115. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,objc_idtype,objc_idtype,href,location.register);
  116. end;
  117. end
  118. else
  119. { should be handled in pass 1 }
  120. internalerror(2015052801);
  121. end;
  122. {*****************************************************************************
  123. TCGLOADPARENTFPNODE
  124. *****************************************************************************}
  125. procedure tcgloadparentfpnode.pass_generate_code;
  126. var
  127. currpi : tprocinfo;
  128. hsym : tparavarsym;
  129. href : treference;
  130. begin
  131. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  132. begin
  133. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  134. location.register:=current_procinfo.framepointer;
  135. end
  136. else
  137. begin
  138. currpi:=current_procinfo;
  139. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  140. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  141. { load framepointer of current proc }
  142. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  143. if not assigned(hsym) then
  144. internalerror(200309281);
  145. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  146. { walk parents }
  147. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  148. begin
  149. currpi:=currpi.parent;
  150. if not assigned(currpi) then
  151. internalerror(200311201);
  152. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  153. if not assigned(hsym) then
  154. internalerror(200309282);
  155. if hsym.localloc.loc<>LOC_REFERENCE then
  156. internalerror(200309283);
  157. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  158. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  159. end;
  160. end;
  161. end;
  162. {*****************************************************************************
  163. TCGADDRNODE
  164. *****************************************************************************}
  165. procedure tcgaddrnode.pass_generate_code;
  166. begin
  167. secondpass(left);
  168. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  169. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  170. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  171. { on x86_64-win64, array of chars can be returned in registers, however,
  172. when passing these arrays to other functions, the compiler wants to take
  173. the address of the array so when the addrnode has been created internally,
  174. we have to force the data into memory, see also tw14388.pp
  175. }
  176. if nf_internal in flags then
  177. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  178. else
  179. internalerror(2006111510);
  180. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  181. end;
  182. {*****************************************************************************
  183. TCGDEREFNODE
  184. *****************************************************************************}
  185. procedure tcgderefnode.pass_generate_code;
  186. var
  187. paraloc1 : tcgpara;
  188. pd : tprocdef;
  189. sym : tsym;
  190. st : tsymtable;
  191. hp : pnode;
  192. extraoffset : tcgint;
  193. begin
  194. sym:=nil;
  195. { assume natural alignment, except for packed records }
  196. if not(resultdef.typ in [recorddef,objectdef]) or
  197. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  198. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  199. else
  200. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  201. { can we fold an add/sub node into the offset of the deref node? }
  202. extraoffset:=0;
  203. hp:=actualtargetnode(@left);
  204. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  205. begin
  206. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  207. replacenode(hp^,taddnode(hp^).left);
  208. end
  209. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  210. begin
  211. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  212. replacenode(hp^,taddnode(hp^).left);
  213. end
  214. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  215. begin
  216. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  217. replacenode(hp^,taddnode(hp^).right);
  218. end;
  219. secondpass(left);
  220. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  221. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  222. case left.location.loc of
  223. LOC_CREGISTER,
  224. LOC_REGISTER:
  225. begin
  226. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  227. {$ifdef cpu_uses_separate_address_registers}
  228. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  229. begin
  230. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  231. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  232. location.reference.base);
  233. end
  234. else
  235. {$endif}
  236. location.reference.base := left.location.register;
  237. end;
  238. LOC_CREFERENCE,
  239. LOC_REFERENCE:
  240. begin
  241. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  242. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  243. end;
  244. LOC_CONSTANT:
  245. begin
  246. location.reference.offset:=left.location.value;
  247. end;
  248. else
  249. internalerror(200507031);
  250. end;
  251. location.reference.offset:=location.reference.offset+extraoffset;
  252. if (cs_use_heaptrc in current_settings.globalswitches) and
  253. (cs_checkpointer in current_settings.localswitches) and
  254. not(cs_compilesystem in current_settings.moduleswitches) and
  255. tpointerdef(left.resultdef).compatible_with_pointerdef_size(tpointerdef(voidpointertype)) and
  256. not(nf_no_checkpointer in flags) and
  257. { can be NR_NO in case of LOC_CONSTANT }
  258. (location.reference.base<>NR_NO) then
  259. begin
  260. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  261. (sym.typ<>procsym) then
  262. internalerror(2012010601);
  263. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  264. paraloc1.init;
  265. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  266. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  267. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  268. paraloc1.done;
  269. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  270. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  271. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  272. end;
  273. end;
  274. {*****************************************************************************
  275. TCGSUBSCRIPTNODE
  276. *****************************************************************************}
  277. function tcgsubscriptnode.handle_platform_subscript: boolean;
  278. begin
  279. result:=false;
  280. end;
  281. procedure tcgsubscriptnode.pass_generate_code;
  282. var
  283. asmsym: tasmsymbol;
  284. paraloc1 : tcgpara;
  285. tmpref: treference;
  286. sref: tsubsetreference;
  287. awordoffset,
  288. offsetcorrection : aint;
  289. pd : tprocdef;
  290. sym : tsym;
  291. st : tsymtable;
  292. begin
  293. sym:=nil;
  294. secondpass(left);
  295. if codegenerror then
  296. exit;
  297. paraloc1.init;
  298. { several object types must be dereferenced implicitly }
  299. if is_implicit_pointer_object_type(left.resultdef) then
  300. begin
  301. if (not is_managed_type(left.resultdef)) or
  302. (target_info.system in systems_garbage_collected_managed_types) then
  303. begin
  304. { the contents of a class are aligned to a sizeof(pointer) }
  305. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  306. case left.location.loc of
  307. LOC_CREGISTER,
  308. LOC_REGISTER:
  309. begin
  310. {$ifdef cpu_uses_separate_address_registers}
  311. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  312. begin
  313. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  314. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  315. left.location.register,location.reference.base);
  316. end
  317. else
  318. {$endif}
  319. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  320. end;
  321. LOC_CREFERENCE,
  322. LOC_REFERENCE,
  323. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  324. LOC_SUBSETREG,
  325. LOC_CSUBSETREG,
  326. LOC_SUBSETREF,
  327. LOC_CSUBSETREF:
  328. begin
  329. hlcg.reference_reset_base(location.reference,left.resultdef,
  330. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  331. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  332. end;
  333. LOC_CONSTANT:
  334. begin
  335. { can happen with @classtype(pointerconst).field }
  336. location.reference.offset:=left.location.value;
  337. end;
  338. else
  339. internalerror(2009092401);
  340. end;
  341. { implicit deferencing }
  342. if (cs_use_heaptrc in current_settings.globalswitches) and
  343. (cs_checkpointer in current_settings.localswitches) and
  344. not(cs_compilesystem in current_settings.moduleswitches) then
  345. begin
  346. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  347. (sym.typ<>procsym) then
  348. internalerror(2012010602);
  349. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  350. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  351. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  352. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  353. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  354. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  355. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  356. end;
  357. end
  358. else
  359. { reference-counted implicit pointer object types don't have
  360. fields -> cannot be subscripted (calls are handled via call
  361. nodes) }
  362. internalerror(2011011901);
  363. end
  364. else
  365. begin
  366. location_copy(location,left.location);
  367. { some abi's require that functions return (some) records in }
  368. { registers }
  369. case location.loc of
  370. LOC_REFERENCE,
  371. LOC_CREFERENCE:
  372. ;
  373. LOC_CONSTANT,
  374. LOC_REGISTER,
  375. LOC_CREGISTER,
  376. { if a floating point value is casted into a record, it
  377. can happen that we get here an fpu or mm register }
  378. LOC_MMREGISTER,
  379. LOC_FPUREGISTER,
  380. LOC_CMMREGISTER,
  381. LOC_CFPUREGISTER:
  382. begin
  383. { in case the result is not something that can be put
  384. into an integer register (e.g.
  385. function_returning_record().non_regable_field, or
  386. a function returning a value > sizeof(intreg))
  387. -> force to memory
  388. }
  389. if not tstoreddef(left.resultdef).is_intregable or
  390. not tstoreddef(resultdef).is_intregable or
  391. { if the field spans multiple registers, we must force the record into
  392. memory as well }
  393. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  394. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  395. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  396. { actually, we should be able to "subscript" a constant, but this would require some code
  397. which enables dumping and reading constants from a temporary memory buffer. This
  398. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  399. }
  400. LOC_CONSTANT]) then
  401. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  402. else
  403. begin
  404. if (left.location.loc = LOC_REGISTER) then
  405. location.loc := LOC_SUBSETREG
  406. else
  407. location.loc := LOC_CSUBSETREG;
  408. location.size:=def_cgsize(resultdef);
  409. offsetcorrection:=0;
  410. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  411. begin
  412. if not is_packed_record_or_object(left.resultdef) then
  413. awordoffset:=sizeof(aword)
  414. else
  415. awordoffset:=sizeof(aword)*8;
  416. if (vs.fieldoffset>=awordoffset) xor (target_info.endian=endian_big) then
  417. location.sreg.subsetreg := left.location.registerhi
  418. else
  419. location.sreg.subsetreg := left.location.register;
  420. if vs.fieldoffset>=awordoffset then
  421. offsetcorrection := sizeof(aword)*8;
  422. location.sreg.subsetregsize := OS_INT;
  423. end
  424. else
  425. begin
  426. location.sreg.subsetreg := left.location.register;
  427. location.sreg.subsetregsize := left.location.size;
  428. end;
  429. if not is_packed_record_or_object(left.resultdef) then
  430. begin
  431. if (target_info.endian = ENDIAN_BIG) then
  432. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  433. else
  434. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  435. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  436. end
  437. else
  438. begin
  439. location.sreg.bitlen := resultdef.packedbitsize;
  440. if (target_info.endian = ENDIAN_BIG) then
  441. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  442. else
  443. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  444. end;
  445. end;
  446. end;
  447. LOC_SUBSETREG,
  448. LOC_CSUBSETREG:
  449. begin
  450. location.size:=def_cgsize(resultdef);
  451. if not is_packed_record_or_object(left.resultdef) then
  452. begin
  453. if (target_info.endian = ENDIAN_BIG) then
  454. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  455. else
  456. inc(location.sreg.startbit, vs.fieldoffset * 8);
  457. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  458. end
  459. else
  460. begin
  461. location.sreg.bitlen := resultdef.packedbitsize;
  462. if (target_info.endian = ENDIAN_BIG) then
  463. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  464. else
  465. inc(location.sreg.startbit, vs.fieldoffset);
  466. end;
  467. end;
  468. else
  469. internalerror(2006031901);
  470. end;
  471. end;
  472. if is_objc_class_or_protocol(left.resultdef) and
  473. (target_info.system in systems_objc_nfabi) then
  474. begin
  475. if (location.loc<>LOC_REFERENCE) or
  476. (location.reference.index<>NR_NO) then
  477. internalerror(2009092402);
  478. { the actual field offset is stored in memory (to solve the
  479. "fragile base class" problem: this way the layout of base
  480. classes can be changed without breaking programs compiled against
  481. earlier versions)
  482. }
  483. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  484. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  485. hlcg.g_ptrtypecast_ref(current_asmdata.CurrAsmList,left.resultdef,cpointerdef.getreusable(resultdef),location.reference);
  486. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  487. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  488. { always packrecords C -> natural alignment }
  489. location.reference.alignment:=vs.vardef.alignment;
  490. end
  491. else if handle_platform_subscript then
  492. begin
  493. { done }
  494. end
  495. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  496. begin
  497. if not is_packed_record_or_object(left.resultdef) then
  498. begin
  499. inc(location.reference.offset,vs.fieldoffset);
  500. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  501. end
  502. else if (vs.fieldoffset mod 8 = 0) and
  503. (resultdef.packedbitsize mod 8 = 0) and
  504. { is different in case of e.g. packenum 2 and an enum }
  505. { which fits in 8 bits }
  506. (resultdef.size*8 = resultdef.packedbitsize) then
  507. begin
  508. inc(location.reference.offset,vs.fieldoffset div 8);
  509. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  510. end
  511. else
  512. begin
  513. sref.ref:=location.reference;
  514. sref.ref.alignment:=1;
  515. sref.bitindexreg:=NR_NO;
  516. inc(sref.ref.offset,vs.fieldoffset div 8);
  517. sref.startbit:=vs.fieldoffset mod 8;
  518. sref.bitlen:=resultdef.packedbitsize;
  519. if (left.location.loc=LOC_REFERENCE) then
  520. location.loc:=LOC_SUBSETREF
  521. else
  522. location.loc:=LOC_CSUBSETREF;
  523. location.sref:=sref;
  524. end;
  525. { also update the size of the location }
  526. location.size:=def_cgsize(resultdef);
  527. end;
  528. paraloc1.done;
  529. end;
  530. {*****************************************************************************
  531. TCGWITHNODE
  532. *****************************************************************************}
  533. procedure tcgwithnode.pass_generate_code;
  534. begin
  535. location_reset(location,LOC_VOID,OS_NO);
  536. if assigned(left) then
  537. secondpass(left);
  538. end;
  539. {*****************************************************************************
  540. TCGVECNODE
  541. *****************************************************************************}
  542. function tcgvecnode.get_mul_size : aint;
  543. begin
  544. if nf_memindex in flags then
  545. get_mul_size:=1
  546. else
  547. begin
  548. if (left.resultdef.typ=arraydef) then
  549. if not is_packed_array(left.resultdef) then
  550. get_mul_size:=tarraydef(left.resultdef).elesize
  551. else
  552. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  553. else
  554. get_mul_size:=resultdef.size;
  555. end
  556. end;
  557. { this routine must, like any other routine, not change the contents }
  558. { of base/index registers of references, as these may be regvars. }
  559. { The register allocator can coalesce one LOC_REGISTER being moved }
  560. { into another (as their live ranges won't overlap), but not a }
  561. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  562. { the live range of the LOC_CREGISTER will most likely overlap the }
  563. { the live range of the target LOC_(C)REGISTER) }
  564. { The passed register may be a LOC_CREGISTER as well. }
  565. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  566. var
  567. hreg: tregister;
  568. begin
  569. if l<>1 then
  570. begin
  571. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  572. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  573. maybe_const_reg:=hreg;
  574. end;
  575. if location.reference.base=NR_NO then
  576. location.reference.base:=maybe_const_reg
  577. else if location.reference.index=NR_NO then
  578. location.reference.index:=maybe_const_reg
  579. else
  580. begin
  581. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  582. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  583. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  584. { insert new index register }
  585. location.reference.index:=maybe_const_reg;
  586. end;
  587. { update alignment }
  588. if (location.reference.alignment=0) then
  589. internalerror(2009020704);
  590. location.reference.alignment:=newalignment(location.reference.alignment,l);
  591. end;
  592. { see remarks for tcgvecnode.update_reference_reg_mul above }
  593. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  594. var
  595. sref: tsubsetreference;
  596. offsetreg, hreg: tregister;
  597. alignpower: aint;
  598. temp : longint;
  599. begin
  600. { only orddefs are bitpacked. Even then we only need special code in }
  601. { case the bitpacked *byte size* is not a power of two, otherwise }
  602. { everything can be handled using the the regular array code. }
  603. if ((l mod 8) = 0) and
  604. (ispowerof2(l div 8,temp) or
  605. not is_ordinal(resultdef)
  606. {$ifndef cpu64bitalu}
  607. or is_64bitint(resultdef)
  608. {$endif not cpu64bitalu}
  609. ) then
  610. begin
  611. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  612. exit;
  613. end;
  614. if (l > 8*sizeof(aint)) then
  615. internalerror(200608051);
  616. sref.ref := location.reference;
  617. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  618. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_ADDR,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  619. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,hreg);
  620. { keep alignment for index }
  621. sref.ref.alignment := left.resultdef.alignment;
  622. if not ispowerof2(packedbitsloadsize(l),temp) then
  623. internalerror(2006081201);
  624. alignpower:=temp;
  625. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  626. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  627. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  628. if (sref.ref.base = NR_NO) then
  629. sref.ref.base := offsetreg
  630. else if (sref.ref.index = NR_NO) then
  631. sref.ref.index := offsetreg
  632. else
  633. begin
  634. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  635. sref.ref.base := offsetreg;
  636. end;
  637. { the if expression below is a constant evaluated at compile time, so disable the unreachable code
  638. warning }
  639. {$push}
  640. {$warn 6018 off}
  641. { we can reuse hreg only if OS_INT and OS_ADDR have the same size/type }
  642. if OS_INT<>OS_ADDR then
  643. begin
  644. sref.bitindexreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  645. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_INT,hreg,sref.bitindexreg);
  646. end
  647. else
  648. sref.bitindexreg:=hreg;
  649. {$pop}
  650. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,sref.bitindexreg);
  651. sref.startbit := 0;
  652. sref.bitlen := resultdef.packedbitsize;
  653. if (left.location.loc = LOC_REFERENCE) then
  654. location.loc := LOC_SUBSETREF
  655. else
  656. location.loc := LOC_CSUBSETREF;
  657. location.sref := sref;
  658. end;
  659. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: aint);
  660. begin
  661. inc(ref.offset,index*mulsize);
  662. end;
  663. procedure tcgvecnode.second_wideansistring;
  664. begin
  665. end;
  666. procedure tcgvecnode.second_dynamicarray;
  667. begin
  668. end;
  669. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  670. begin
  671. result:=
  672. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  673. end;
  674. procedure tcgvecnode.rangecheck_array;
  675. var
  676. hightree : tnode;
  677. poslabel,
  678. neglabel : tasmlabel;
  679. hreg : tregister;
  680. paraloc1,paraloc2 : tcgpara;
  681. pd : tprocdef;
  682. begin
  683. { omit range checking when this is an array access to a pointer which has been
  684. typecasted from an array }
  685. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  686. exit;
  687. paraloc1.init;
  688. paraloc2.init;
  689. if is_open_array(left.resultdef) or
  690. is_array_of_const(left.resultdef) then
  691. begin
  692. { cdecl functions don't have high() so we can not check the range }
  693. { (can't use current_procdef, since it may be a nested procedure) }
  694. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  695. begin
  696. { Get high value }
  697. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  698. { it must be available }
  699. if not assigned(hightree) then
  700. internalerror(200212201);
  701. firstpass(hightree);
  702. secondpass(hightree);
  703. { generate compares }
  704. {$ifndef cpuhighleveltarget}
  705. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  706. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  707. else
  708. {$endif not cpuhighleveltarget}
  709. begin
  710. hreg:=hlcg.getintregister(current_asmdata.CurrAsmList,ossinttype);
  711. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,ossinttype,right.location,hreg);
  712. end;
  713. current_asmdata.getjumplabel(neglabel);
  714. current_asmdata.getjumplabel(poslabel);
  715. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,ossinttype,OC_LT,0,hreg,poslabel);
  716. hlcg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,osuinttype,OC_BE,hightree.location,hreg,neglabel);
  717. hlcg.a_label(current_asmdata.CurrAsmList,poslabel);
  718. hlcg.g_call_system_proc(current_asmdata.CurrAsmList,'fpc_rangeerror',[],nil).resetiftemp;
  719. hlcg.a_label(current_asmdata.CurrAsmList,neglabel);
  720. { release hightree }
  721. hightree.free;
  722. end;
  723. end
  724. else
  725. if is_dynamic_array(left.resultdef) then
  726. begin
  727. pd:=search_system_proc('fpc_dynarray_rangecheck');
  728. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  729. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  730. if pd.is_pushleftright then
  731. begin
  732. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  733. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  734. end
  735. else
  736. begin
  737. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  738. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  739. end;
  740. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  741. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  742. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  743. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  744. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  745. end;
  746. { for regular arrays, we don't have to do anything because the index has been
  747. type converted to the index type, which already inserted a range check if
  748. necessary }
  749. paraloc1.done;
  750. paraloc2.done;
  751. end;
  752. procedure tcgvecnode.rangecheck_string;
  753. var
  754. paraloc1,
  755. paraloc2: tcgpara;
  756. helpername: TIDString;
  757. pd: tprocdef;
  758. begin
  759. paraloc1.init;
  760. paraloc2.init;
  761. case tstringdef(left.resultdef).stringtype of
  762. { it's the same for ansi- and wide strings }
  763. st_unicodestring,
  764. st_widestring,
  765. st_ansistring:
  766. begin
  767. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  768. pd:=search_system_proc(helpername);
  769. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  770. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  771. if pd.is_pushleftright then
  772. begin
  773. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  774. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  775. end
  776. else
  777. begin
  778. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  779. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  780. end;
  781. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  782. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  783. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  784. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  785. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  786. end;
  787. st_shortstring:
  788. begin
  789. {!!!!!!!!!!!!!!!!!}
  790. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  791. end;
  792. st_longstring:
  793. begin
  794. {!!!!!!!!!!!!!!!!!}
  795. end;
  796. end;
  797. paraloc1.done;
  798. paraloc2.done;
  799. end;
  800. procedure tcgvecnode.pass_generate_code;
  801. var
  802. offsetdec,
  803. extraoffset : aint;
  804. rightp : pnode;
  805. newsize : tcgsize;
  806. mulsize,
  807. bytemulsize,
  808. alignpow : aint;
  809. paraloc1,
  810. paraloc2 : tcgpara;
  811. subsetref : tsubsetreference;
  812. temp : longint;
  813. indexdef : tdef;
  814. begin
  815. paraloc1.init;
  816. paraloc2.init;
  817. mulsize:=get_mul_size;
  818. if not is_packed_array(left.resultdef) then
  819. bytemulsize:=mulsize
  820. else
  821. bytemulsize:=mulsize div 8;
  822. newsize:=def_cgsize(resultdef);
  823. secondpass(left);
  824. if left.location.loc=LOC_CREFERENCE then
  825. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  826. else
  827. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  828. { an ansistring needs to be dereferenced }
  829. if is_ansistring(left.resultdef) or
  830. is_wide_or_unicode_string(left.resultdef) then
  831. begin
  832. if nf_callunique in flags then
  833. internalerror(200304236);
  834. {DM!!!!!}
  835. case left.location.loc of
  836. LOC_REGISTER,
  837. LOC_CREGISTER :
  838. begin
  839. {$ifdef m68k}
  840. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  841. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  842. {$else m68k}
  843. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  844. {$endif m68k}
  845. end;
  846. LOC_CREFERENCE,
  847. LOC_REFERENCE :
  848. begin
  849. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  850. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  851. end;
  852. LOC_CONSTANT:
  853. begin
  854. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  855. end;
  856. else
  857. internalerror(2002032218);
  858. end;
  859. if is_ansistring(left.resultdef) then
  860. offsetdec:=1
  861. else
  862. offsetdec:=2;
  863. location.reference.alignment:=offsetdec;
  864. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  865. if not(cs_zerobasedstrings in current_settings.localswitches) then
  866. update_reference_offset(location.reference,-1,offsetdec);
  867. end
  868. else if is_dynamic_array(left.resultdef) then
  869. begin
  870. case left.location.loc of
  871. LOC_REGISTER,
  872. LOC_CREGISTER :
  873. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  874. LOC_REFERENCE,
  875. LOC_CREFERENCE :
  876. begin
  877. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  878. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  879. left.location.reference,location.reference.base);
  880. end;
  881. else
  882. internalerror(2002032219);
  883. end;
  884. { a dynarray points to the start of a memory block, which
  885. we assume to be always aligned to a multiple of the
  886. pointer size
  887. }
  888. location.reference.alignment:=voidpointertype.size;
  889. end
  890. else
  891. begin
  892. { may happen in case of function results }
  893. case left.location.loc of
  894. LOC_CSUBSETREG,
  895. LOC_CREGISTER,
  896. LOC_CMMREGISTER,
  897. LOC_SUBSETREG,
  898. LOC_REGISTER,
  899. LOC_MMREGISTER:
  900. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  901. end;
  902. location_copy(location,left.location);
  903. end;
  904. { location must be memory }
  905. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  906. internalerror(200411013);
  907. { offset can only differ from 0 if arraydef }
  908. if (left.resultdef.typ=arraydef) and
  909. not(is_dynamic_array(left.resultdef)) and
  910. (not(is_packed_array(left.resultdef)) or
  911. ((mulsize mod 8 = 0) and
  912. ispowerof2(mulsize div 8,temp)) or
  913. { only orddefs are bitpacked }
  914. not is_ordinal(resultdef)
  915. {$ifndef cpu64bitalu}
  916. or is_64bitint(resultdef)
  917. {$endif not cpu64bitalu}
  918. ) then
  919. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  920. if right.nodetype=ordconstn then
  921. begin
  922. { offset can only differ from 0 if arraydef }
  923. if cs_check_range in current_settings.localswitches then
  924. begin
  925. secondpass(right);
  926. case left.resultdef.typ of
  927. arraydef :
  928. rangecheck_array;
  929. stringdef :
  930. rangecheck_string;
  931. end;
  932. end;
  933. if not(is_packed_array(left.resultdef)) or
  934. ((mulsize mod 8 = 0) and
  935. (ispowerof2(mulsize div 8,temp) or
  936. { only orddefs are bitpacked }
  937. not is_ordinal(resultdef))) then
  938. begin
  939. extraoffset:=tordconstnode(right).value.svalue;
  940. update_reference_offset(location.reference,extraoffset,bytemulsize);
  941. { adjust alignment after this change }
  942. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  943. { don't do this for floats etc.; needed to properly set the }
  944. { size for bitpacked arrays (e.g. a bitpacked array of }
  945. { enums who are size 2 but fit in one byte -> in the array }
  946. { they will be one byte and have to be stored like that) }
  947. if is_packed_array(left.resultdef) and
  948. (tcgsize2size[newsize] <> bytemulsize) then
  949. newsize:=int_cgsize(bytemulsize);
  950. end
  951. else
  952. begin
  953. subsetref.ref := location.reference;
  954. subsetref.ref.alignment := left.resultdef.alignment;
  955. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  956. internalerror(2006081212);
  957. alignpow:=temp;
  958. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  959. subsetref.bitindexreg := NR_NO;
  960. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  961. subsetref.bitlen := resultdef.packedbitsize;
  962. if (left.location.loc = LOC_REFERENCE) then
  963. location.loc := LOC_SUBSETREF
  964. else
  965. location.loc := LOC_CSUBSETREF;
  966. location.sref := subsetref;
  967. end;
  968. end
  969. else
  970. { not nodetype=ordconstn }
  971. begin
  972. if (cs_opt_level1 in current_settings.optimizerswitches) and
  973. { if we do range checking, we don't }
  974. { need that fancy code (it would be }
  975. { buggy) }
  976. not(cs_check_range in current_settings.localswitches) and
  977. (left.resultdef.typ=arraydef) and
  978. not is_packed_array(left.resultdef) then
  979. begin
  980. extraoffset:=0;
  981. rightp:=actualtargetnode(@right);
  982. if rightp^.nodetype=addn then
  983. begin
  984. if taddnode(rightp^).right.nodetype=ordconstn then
  985. begin
  986. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  987. replacenode(rightp^,taddnode(rightp^).left);
  988. end
  989. else if taddnode(rightp^).left.nodetype=ordconstn then
  990. begin
  991. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  992. replacenode(rightp^,taddnode(rightp^).right);
  993. end;
  994. end
  995. else if rightp^.nodetype=subn then
  996. begin
  997. if taddnode(rightp^).right.nodetype=ordconstn then
  998. begin
  999. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  1000. replacenode(rightp^,taddnode(rightp^).left);
  1001. end;
  1002. end;
  1003. update_reference_offset(location.reference,extraoffset,mulsize);
  1004. end;
  1005. { calculate from left to right }
  1006. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  1007. internalerror(200304237);
  1008. secondpass(right);
  1009. if (right.expectloc=LOC_JUMP)<>
  1010. (right.location.loc=LOC_JUMP) then
  1011. internalerror(2006010801);
  1012. { if mulsize = 1, we won't have to modify the index }
  1013. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  1014. not valid_index_size(right.location.size) then
  1015. begin
  1016. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  1017. indexdef:=ptruinttype
  1018. end
  1019. else
  1020. indexdef:=right.resultdef;
  1021. { produce possible range check code: }
  1022. if cs_check_range in current_settings.localswitches then
  1023. begin
  1024. if left.resultdef.typ=arraydef then
  1025. rangecheck_array
  1026. else if (left.resultdef.typ=stringdef) then
  1027. rangecheck_string;
  1028. end;
  1029. { insert the register and the multiplication factor in the
  1030. reference }
  1031. if not is_packed_array(left.resultdef) then
  1032. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  1033. else
  1034. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  1035. end;
  1036. location.size:=newsize;
  1037. paraloc1.done;
  1038. paraloc2.done;
  1039. end;
  1040. begin
  1041. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1042. cloadparentfpnode:=tcgloadparentfpnode;
  1043. caddrnode:=tcgaddrnode;
  1044. cderefnode:=tcgderefnode;
  1045. csubscriptnode:=tcgsubscriptnode;
  1046. cwithnode:=tcgwithnode;
  1047. cvecnode:=tcgvecnode;
  1048. end.