ncginl.pas 32 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncginl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl;
  22. type
  23. tcginlinenode = class(tinlinenode)
  24. procedure pass_generate_code;override;
  25. procedure second_sizeoftypeof;virtual;
  26. procedure second_length;virtual;
  27. procedure second_predsucc;virtual;
  28. procedure second_incdec;virtual;
  29. procedure second_AndOrXor_assign;virtual;
  30. procedure second_NegNot_assign;virtual;
  31. procedure second_typeinfo;virtual;
  32. procedure second_includeexclude;virtual;
  33. procedure second_pi; virtual;
  34. procedure second_arctan_real; virtual;
  35. procedure second_abs_real; virtual;
  36. procedure second_sqr_real; virtual;
  37. procedure second_sqrt_real; virtual;
  38. procedure second_ln_real; virtual;
  39. procedure second_cos_real; virtual;
  40. procedure second_sin_real; virtual;
  41. procedure second_assigned; virtual;
  42. procedure second_get_frame;virtual;
  43. procedure second_get_caller_frame;virtual;
  44. procedure second_get_caller_addr;virtual;
  45. procedure second_prefetch; virtual;
  46. procedure second_round_real; virtual;
  47. procedure second_trunc_real; virtual;
  48. procedure second_int_real; virtual;
  49. procedure second_abs_long; virtual;
  50. procedure second_rox_sar; virtual;
  51. procedure second_bsfbsr; virtual;
  52. procedure second_new; virtual;
  53. procedure second_setlength; virtual; abstract;
  54. procedure second_box; virtual; abstract;
  55. procedure second_popcnt; virtual;
  56. procedure second_seg; virtual; abstract;
  57. procedure second_fma; virtual;
  58. end;
  59. implementation
  60. uses
  61. globtype,systems,constexp,
  62. cutils,verbose,globals,
  63. symconst,symtype,symdef,defutil,symsym,
  64. aasmbase,aasmtai,aasmdata,aasmcpu,parabase,
  65. cgbase,pass_1,pass_2,
  66. cpuinfo,cpubase,paramgr,procinfo,
  67. nbas,ncon,ncal,ncnv,nld,ncgrtti,
  68. tgobj,ncgutil,
  69. cgutils,cgobj,hlcgobj
  70. {$ifndef cpu64bitalu}
  71. ,cg64f32
  72. {$endif not cpu64bitalu}
  73. ;
  74. {*****************************************************************************
  75. TCGINLINENODE
  76. *****************************************************************************}
  77. procedure tcginlinenode.pass_generate_code;
  78. begin
  79. location_reset(location,LOC_VOID,OS_NO);
  80. case inlinenumber of
  81. in_sizeof_x,
  82. in_typeof_x :
  83. second_SizeofTypeOf;
  84. in_length_x :
  85. second_Length;
  86. in_pred_x,
  87. in_succ_x:
  88. second_PredSucc;
  89. in_dec_x,
  90. in_inc_x :
  91. second_IncDec;
  92. in_typeinfo_x:
  93. second_TypeInfo;
  94. in_include_x_y,
  95. in_exclude_x_y:
  96. second_IncludeExclude;
  97. in_pi_real:
  98. second_pi;
  99. in_sin_real:
  100. second_sin_real;
  101. in_arctan_real:
  102. second_arctan_real;
  103. in_abs_real:
  104. second_abs_real;
  105. in_abs_long:
  106. second_abs_long;
  107. in_round_real:
  108. second_round_real;
  109. in_trunc_real:
  110. second_trunc_real;
  111. in_int_real:
  112. second_int_real;
  113. in_sqr_real:
  114. second_sqr_real;
  115. in_sqrt_real:
  116. second_sqrt_real;
  117. in_ln_real:
  118. second_ln_real;
  119. in_cos_real:
  120. second_cos_real;
  121. in_prefetch_var:
  122. second_prefetch;
  123. in_assigned_x:
  124. second_assigned;
  125. in_get_frame:
  126. second_get_frame;
  127. in_get_caller_frame:
  128. second_get_caller_frame;
  129. in_get_caller_addr:
  130. second_get_caller_addr;
  131. in_unaligned_x:
  132. begin
  133. secondpass(tcallparanode(left).left);
  134. location:=tcallparanode(left).left.location;
  135. if location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  136. location.reference.alignment:=1;
  137. end;
  138. in_aligned_x:
  139. begin
  140. secondpass(tcallparanode(left).left);
  141. location:=tcallparanode(left).left.location;
  142. if location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  143. location.reference.alignment:=resultdef.alignment;
  144. end;
  145. {$ifdef SUPPORT_MMX}
  146. in_mmx_pcmpeqb..in_mmx_pcmpgtw:
  147. begin
  148. location_reset(location,LOC_MMXREGISTER,OS_NO);
  149. if left.location.loc=LOC_REGISTER then
  150. begin
  151. {!!!!!!!}
  152. end
  153. else if tcallparanode(left).left.location.loc=LOC_REGISTER then
  154. begin
  155. {!!!!!!!}
  156. end
  157. else
  158. begin
  159. {!!!!!!!}
  160. end;
  161. end;
  162. {$endif SUPPORT_MMX}
  163. in_rol_x,
  164. in_rol_x_y,
  165. in_ror_x,
  166. in_ror_x_y,
  167. in_sar_x,
  168. in_sar_x_y:
  169. second_rox_sar;
  170. in_bsf_x,
  171. in_bsr_x:
  172. second_BsfBsr;
  173. in_new_x:
  174. second_new;
  175. in_setlength_x:
  176. second_setlength;
  177. in_box_x:
  178. second_box;
  179. in_popcnt_x:
  180. second_popcnt;
  181. in_seg_x:
  182. second_seg;
  183. in_fma_single,
  184. in_fma_double,
  185. in_fma_extended,
  186. in_fma_float128:
  187. second_fma;
  188. in_and_assign_x_y,
  189. in_or_assign_x_y,
  190. in_xor_assign_x_y:
  191. second_AndOrXor_assign;
  192. in_neg_assign_x,
  193. in_not_assign_x:
  194. second_NegNot_assign;
  195. else internalerror(9);
  196. end;
  197. end;
  198. {*****************************************************************************
  199. SIZEOF / TYPEOF GENERIC HANDLING
  200. *****************************************************************************}
  201. { second_handle_ the sizeof and typeof routines }
  202. procedure tcginlinenode.second_SizeOfTypeOf;
  203. begin
  204. { handled in pass 1 }
  205. internalerror(2015122701);
  206. end;
  207. {*****************************************************************************
  208. LENGTH GENERIC HANDLING
  209. *****************************************************************************}
  210. procedure tcginlinenode.second_Length;
  211. var
  212. lengthlab : tasmlabel;
  213. hregister : tregister;
  214. lendef : tdef;
  215. href : treference;
  216. begin
  217. secondpass(left);
  218. if is_shortstring(left.resultdef) then
  219. begin
  220. location_copy(location,left.location);
  221. location.size:=OS_8;
  222. end
  223. else
  224. begin
  225. { length in ansi/wide strings and high in dynamic arrays is at offset -sizeof(pint) }
  226. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  227. current_asmdata.getjumplabel(lengthlab);
  228. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,left.resultdef,OC_EQ,0,left.location.register,lengthlab);
  229. { the length of a widestring is a 32 bit unsigned int. Since every
  230. character occupies 2 bytes, on a 32 bit platform you can express
  231. the maximum length using 31 bits. On a 64 bit platform, it may be
  232. 32 bits. This means that regardless of the platform, a location
  233. with size OS_SINT/ossinttype can hold the length without
  234. overflowing (this code returns an ossinttype value) }
  235. if is_widestring(left.resultdef) then
  236. lendef:=u32inttype
  237. else
  238. lendef:=ossinttype;
  239. { volatility of the ansistring/widestring refers to the volatility of the
  240. string pointer, not of the string data }
  241. hlcg.reference_reset_base(href,left.resultdef,left.location.register,-lendef.size,lendef.alignment,[]);
  242. { if the string pointer is nil, the length is 0 -> reuse the register
  243. that originally held the string pointer for the length, so that we
  244. can keep the original nil/0 as length in that case }
  245. hregister:=cg.makeregsize(current_asmdata.CurrAsmList,left.location.register,def_cgsize(resultdef));
  246. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,lendef,resultdef,href,hregister);
  247. if is_widestring(left.resultdef) then
  248. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHR,resultdef,1,hregister);
  249. { Dynamic arrays do not have their length attached but their maximum index }
  250. if is_dynamic_array(left.resultdef) then
  251. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_ADD,resultdef,1,hregister);
  252. cg.a_label(current_asmdata.CurrAsmList,lengthlab);
  253. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  254. location.register:=hregister;
  255. end;
  256. end;
  257. {*****************************************************************************
  258. PRED/SUCC GENERIC HANDLING
  259. *****************************************************************************}
  260. procedure tcginlinenode.second_PredSucc;
  261. var
  262. cgop : topcg;
  263. begin
  264. secondpass(left);
  265. if inlinenumber=in_pred_x then
  266. cgop:=OP_SUB
  267. else
  268. cgop:=OP_ADD;
  269. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  270. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  271. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  272. {$ifndef cpu64bitalu}
  273. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  274. begin
  275. location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  276. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  277. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,cgop,def_cgsize(resultdef),1,left.location.register64,location.register64);
  278. end
  279. else
  280. {$endif not cpu64bitalu}
  281. begin
  282. location.register:=hlcg.getregisterfordef(current_asmdata.CurrAsmList,resultdef);
  283. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,1,left.location.register,location.register);
  284. end;
  285. end;
  286. {*****************************************************************************
  287. INC/DEC GENERIC HANDLING
  288. *****************************************************************************}
  289. procedure tcginlinenode.second_IncDec;
  290. const
  291. addsubop:array[in_inc_x..in_dec_x] of TOpCG=(OP_ADD,OP_SUB);
  292. var
  293. addvalue : TConstExprInt;
  294. addconstant : boolean;
  295. {$ifndef cpu64bitalu}
  296. hregisterhi,
  297. {$endif not cpu64bitalu}
  298. hregister : tregister;
  299. begin
  300. { set defaults }
  301. addconstant:=true;
  302. hregister:=NR_NO;
  303. {$ifndef cpu64bitalu}
  304. hregisterhi:=NR_NO;
  305. {$endif not cpu64bitalu}
  306. { first secondpass second argument, because if the first arg }
  307. { is used in that expression then SSL may move it to another }
  308. { register }
  309. if assigned(tcallparanode(left).right) then
  310. secondpass(tcallparanode(tcallparanode(left).right).left);
  311. { load first parameter, must be a reference }
  312. secondpass(tcallparanode(left).left);
  313. { get addvalue }
  314. case tcallparanode(left).left.resultdef.typ of
  315. orddef,
  316. enumdef :
  317. addvalue:=1;
  318. pointerdef :
  319. begin
  320. if is_void(tpointerdef(tcallparanode(left).left.resultdef).pointeddef) then
  321. addvalue:=1
  322. else
  323. addvalue:=tpointerdef(tcallparanode(left).left.resultdef).pointeddef.size;
  324. end;
  325. else
  326. internalerror(10081);
  327. end;
  328. { second_ argument specified?, must be a s32bit in register }
  329. if assigned(tcallparanode(left).right) then
  330. begin
  331. { when constant, just multiply the addvalue }
  332. if is_constintnode(tcallparanode(tcallparanode(left).right).left) then
  333. addvalue:=addvalue*get_ordinal_value(tcallparanode(tcallparanode(left).right).left)
  334. else if is_constpointernode(tcallparanode(tcallparanode(left).right).left) then
  335. addvalue:=addvalue*tpointerconstnode(tcallparanode(tcallparanode(left).right).left).value
  336. else
  337. begin
  338. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,tcallparanode(tcallparanode(left).right).left.resultdef,left.resultdef,addvalue<=1);
  339. hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
  340. {$ifndef cpu64bitalu}
  341. hregisterhi:=tcallparanode(tcallparanode(left).right).left.location.register64.reghi;
  342. {$endif not cpu64bitalu}
  343. { insert multiply with addvalue if its >1 }
  344. if addvalue>1 then
  345. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,left.resultdef,addvalue.svalue,hregister);
  346. addconstant:=false;
  347. end;
  348. end;
  349. { write the add instruction }
  350. if addconstant then
  351. begin
  352. {$ifndef cpu64bitalu}
  353. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  354. cg64.a_op64_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],def_cgsize(left.resultdef),addvalue,tcallparanode(left).left.location)
  355. else
  356. {$endif not cpu64bitalu}
  357. hlcg.a_op_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],left.resultdef,
  358. {$ifdef cpu64bitalu}
  359. aint(addvalue.svalue),
  360. {$else cpu64bitalu}
  361. longint(addvalue.svalue), // can't use aint, because it breaks 16-bit and 8-bit CPUs
  362. {$endif cpu64bitalu}
  363. tcallparanode(left).left.location);
  364. end
  365. else
  366. begin
  367. {$ifndef cpu64bitalu}
  368. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  369. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],def_cgsize(left.resultdef),
  370. joinreg64(hregister,hregisterhi),tcallparanode(left).left.location)
  371. else
  372. {$endif not cpu64bitalu}
  373. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],left.resultdef,
  374. hregister,tcallparanode(left).left.location);
  375. end;
  376. { no overflow checking for pointers (see ninl), and range checking }
  377. { is not applicable for them }
  378. if (tcallparanode(left).left.resultdef.typ <> pointerdef) then
  379. begin
  380. { things which can overflow must NOT pass via here, but have to be }
  381. { handled via a regular add node (conversion in tinlinenode.pass_1) }
  382. { Or someone has to rewrite the above to use a_op_const_reg_reg_ov }
  383. { and friends in case of overflow checking, and ask everyone to }
  384. { implement these methods since they don't exist for all cpus (JM) }
  385. { Similarly, range checking also has to be handled separately, }
  386. { see mantis #14841 (JM) }
  387. if ([cs_check_overflow,cs_check_range] * current_settings.localswitches <> []) then
  388. internalerror(2006111010);
  389. // cg.g_overflowcheck(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).resultdef);
  390. // cg.g_rangecheck(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,
  391. // tcallparanode(left).left.resultdef);
  392. end;
  393. end;
  394. {*****************************************************************************
  395. AND/OR/XOR ASSIGN GENERIC HANDLING
  396. *****************************************************************************}
  397. procedure tcginlinenode.second_AndOrXor_assign;
  398. const
  399. andorxorop:array[in_and_assign_x_y..in_xor_assign_x_y] of TOpCG=(OP_AND,OP_OR,OP_XOR);
  400. var
  401. maskvalue : TConstExprInt;
  402. maskconstant : boolean;
  403. {$ifndef cpu64bitalu}
  404. hregisterhi,
  405. {$endif not cpu64bitalu}
  406. hregister : tregister;
  407. begin
  408. { set defaults }
  409. maskconstant:=true;
  410. hregister:=NR_NO;
  411. maskvalue:=0;
  412. {$ifndef cpu64bitalu}
  413. hregisterhi:=NR_NO;
  414. {$endif not cpu64bitalu}
  415. { first secondpass first argument, because if the second arg }
  416. { is used in that expression then SSL may move it to another }
  417. { register }
  418. secondpass(tcallparanode(left).left);
  419. { load second parameter, must be a reference }
  420. secondpass(tcallparanode(tcallparanode(left).right).left);
  421. { when constant, just get the maskvalue }
  422. if is_constintnode(tcallparanode(left).left) then
  423. maskvalue:=get_ordinal_value(tcallparanode(left).left)
  424. else
  425. begin
  426. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,tcallparanode(left).right.resultdef,true);
  427. hregister:=tcallparanode(left).left.location.register;
  428. {$ifndef cpu64bitalu}
  429. hregisterhi:=tcallparanode(left).left.location.register64.reghi;
  430. {$endif not cpu64bitalu}
  431. maskconstant:=false;
  432. end;
  433. { write the and/or/xor instruction }
  434. if maskconstant then
  435. begin
  436. {$ifndef cpu64bitalu}
  437. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  438. cg64.a_op64_const_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],def_cgsize(tcallparanode(left).right.resultdef),maskvalue.svalue,tcallparanode(tcallparanode(left).right).left.location)
  439. else
  440. {$endif not cpu64bitalu}
  441. hlcg.a_op_const_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],tcallparanode(left).right.resultdef,
  442. {$ifdef cpu64bitalu}
  443. aint(maskvalue.svalue),
  444. {$else cpu64bitalu}
  445. longint(maskvalue.svalue), // can't use aint, because it breaks 16-bit and 8-bit CPUs
  446. {$endif cpu64bitalu}
  447. tcallparanode(tcallparanode(left).right).left.location);
  448. end
  449. else
  450. begin
  451. {$ifndef cpu64bitalu}
  452. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  453. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],def_cgsize(tcallparanode(left).right.resultdef),
  454. joinreg64(hregister,hregisterhi),tcallparanode(tcallparanode(left).right).left.location)
  455. else
  456. {$endif not cpu64bitalu}
  457. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],tcallparanode(left).right.resultdef,
  458. hregister,tcallparanode(tcallparanode(left).right).left.location);
  459. end;
  460. end;
  461. {*****************************************************************************
  462. NEG/NOT ASSIGN GENERIC HANDLING
  463. *****************************************************************************}
  464. procedure tcginlinenode.second_NegNot_assign;
  465. const
  466. negnotop:array[in_neg_assign_x..in_not_assign_x] of TOpCG=(OP_NEG,OP_NOT);
  467. {$ifndef cpu64bitalu}
  468. var
  469. NR_NO64: tregister64=(reglo:NR_NO;reghi:NR_NO);
  470. {$endif not cpu64bitalu}
  471. begin
  472. { load parameter, must be a reference }
  473. secondpass(left);
  474. location_reset(location,LOC_VOID,OS_NO);
  475. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  476. begin
  477. {$ifndef cpu64bitalu}
  478. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  479. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],def_cgsize(left.resultdef),left.location.register64,left.location)
  480. else
  481. {$endif not cpu64bitalu}
  482. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],left.resultdef,left.location.register,left.location);
  483. end
  484. else if left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  485. begin
  486. {$ifndef cpu64bitalu}
  487. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  488. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],def_cgsize(left.resultdef),NR_NO64,left.location)
  489. else
  490. {$endif not cpu64bitalu}
  491. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],left.resultdef,NR_NO,left.location);
  492. end
  493. else
  494. internalerror(2017040701);
  495. end;
  496. {*****************************************************************************
  497. TYPEINFO GENERIC HANDLING
  498. *****************************************************************************}
  499. procedure tcginlinenode.second_typeinfo;
  500. begin
  501. internalerror(2013060301);
  502. end;
  503. {*****************************************************************************
  504. INCLUDE/EXCLUDE GENERIC HANDLING
  505. *****************************************************************************}
  506. procedure tcginlinenode.second_IncludeExclude;
  507. var
  508. setpara, elepara: tnode;
  509. begin
  510. { the set }
  511. secondpass(tcallparanode(left).left);
  512. { the element to set }
  513. secondpass(tcallparanode(tcallparanode(left).right).left);
  514. setpara:=tcallparanode(left).left;
  515. elepara:=tcallparanode(tcallparanode(left).right).left;
  516. if elepara.location.loc=LOC_CONSTANT then
  517. begin
  518. hlcg.a_bit_set_const_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
  519. setpara.resultdef,elepara.location.value-tsetdef(setpara.resultdef).setbase,setpara.location);
  520. end
  521. else
  522. begin
  523. hlcg.location_force_reg(current_asmdata.CurrAsmList,elepara.location,elepara.resultdef,u32inttype,true);
  524. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,u32inttype,elepara.location,tsetdef(setpara.resultdef).setbase);
  525. hlcg.a_bit_set_reg_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
  526. u32inttype,setpara.resultdef,elepara.location.register,setpara.location);
  527. end;
  528. end;
  529. {*****************************************************************************
  530. FLOAT GENERIC HANDLING
  531. *****************************************************************************}
  532. {
  533. These routines all call internal RTL routines, so if they are
  534. called here, they give an internal error
  535. }
  536. procedure tcginlinenode.second_pi;
  537. begin
  538. internalerror(20020718);
  539. end;
  540. procedure tcginlinenode.second_arctan_real;
  541. begin
  542. internalerror(20020718);
  543. end;
  544. procedure tcginlinenode.second_abs_real;
  545. begin
  546. internalerror(20020718);
  547. end;
  548. procedure tcginlinenode.second_round_real;
  549. begin
  550. internalerror(20020718);
  551. end;
  552. procedure tcginlinenode.second_trunc_real;
  553. begin
  554. internalerror(20020718);
  555. end;
  556. procedure tcginlinenode.second_int_real;
  557. begin
  558. internalerror(2016112702);
  559. end;
  560. procedure tcginlinenode.second_sqr_real;
  561. begin
  562. internalerror(20020718);
  563. end;
  564. procedure tcginlinenode.second_sqrt_real;
  565. begin
  566. internalerror(20020718);
  567. end;
  568. procedure tcginlinenode.second_ln_real;
  569. begin
  570. internalerror(20020718);
  571. end;
  572. procedure tcginlinenode.second_cos_real;
  573. begin
  574. internalerror(20020718);
  575. end;
  576. procedure tcginlinenode.second_sin_real;
  577. begin
  578. internalerror(20020718);
  579. end;
  580. procedure tcginlinenode.second_prefetch;
  581. begin
  582. end;
  583. procedure tcginlinenode.second_abs_long;
  584. var
  585. tempreg1, tempreg2: tregister;
  586. begin
  587. secondpass(left);
  588. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  589. location:=left.location;
  590. location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  591. tempreg1:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  592. tempreg2:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  593. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,left.resultdef,left.resultdef.size*8-1,left.location.register,tempreg1);
  594. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_XOR,left.resultdef,left.location.register,tempreg1,tempreg2);
  595. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmlist,OP_SUB,left.resultdef,tempreg1,tempreg2,location.register);
  596. end;
  597. {*****************************************************************************
  598. ASSIGNED GENERIC HANDLING
  599. *****************************************************************************}
  600. procedure tcginlinenode.second_assigned;
  601. begin
  602. internalerror(2013091602);
  603. end;
  604. procedure Tcginlinenode.second_get_frame;
  605. begin
  606. {$if defined(x86) or defined(arm)}
  607. if current_procinfo.framepointer=NR_STACK_POINTER_REG then
  608. begin
  609. location_reset(location,LOC_CONSTANT,OS_ADDR);
  610. location.value:=0;
  611. end
  612. else
  613. {$endif defined(x86) or defined(arm)}
  614. begin
  615. location_reset(location,LOC_CREGISTER,OS_ADDR);
  616. location.register:=current_procinfo.framepointer;
  617. end;
  618. end;
  619. procedure Tcginlinenode.second_get_caller_frame;
  620. var
  621. frame_reg:Tregister;
  622. use_frame_pointer:boolean;
  623. begin
  624. frame_reg:=NR_NO;
  625. if left<>nil then
  626. begin
  627. secondpass(left);
  628. if left.location.loc=LOC_CONSTANT then
  629. use_frame_pointer:=true
  630. else
  631. begin
  632. hlcg.location_force_reg(current_asmdata.currasmlist,left.location,left.resultdef,voidpointertype,false);
  633. frame_reg:=left.location.register;
  634. use_frame_pointer:=false;
  635. end
  636. end
  637. else
  638. begin
  639. use_frame_pointer:=current_procinfo.framepointer=NR_STACK_POINTER_REG;
  640. frame_reg:=current_procinfo.framepointer;
  641. end;
  642. if use_frame_pointer then
  643. begin
  644. location_reset(location,LOC_CREGISTER,OS_ADDR);
  645. location.register:=NR_FRAME_POINTER_REG;
  646. end
  647. else
  648. begin
  649. location_reset_ref(location,LOC_REFERENCE,OS_ADDR,sizeof(pint),[]);
  650. location.reference.base:=frame_reg;
  651. end;
  652. end;
  653. procedure Tcginlinenode.second_get_caller_addr;
  654. var
  655. frame_ref:Treference;
  656. begin
  657. if current_procinfo.framepointer=NR_STACK_POINTER_REG then
  658. begin
  659. location_reset(location,LOC_REGISTER,OS_ADDR);
  660. location.register:=cg.getaddressregister(current_asmdata.currasmlist);
  661. reference_reset_base(frame_ref,NR_STACK_POINTER_REG,{current_procinfo.calc_stackframe_size}tg.lasttemp,sizeof(pint),[]);
  662. cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
  663. end
  664. else
  665. begin
  666. location_reset(location,LOC_REGISTER,OS_ADDR);
  667. location.register:=cg.getaddressregister(current_asmdata.currasmlist);
  668. reference_reset_base(frame_ref,current_procinfo.framepointer,sizeof(pint),sizeof(pint),[]);
  669. cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
  670. end;
  671. end;
  672. procedure tcginlinenode.second_rox_sar;
  673. var
  674. op : topcg;
  675. op1,op2 : tnode;
  676. begin
  677. { one or two parameters? }
  678. if (left.nodetype=callparan) and
  679. assigned(tcallparanode(left).right) then
  680. begin
  681. op1:=tcallparanode(tcallparanode(left).right).left;
  682. op2:=tcallparanode(left).left;
  683. secondpass(op2);
  684. end
  685. else
  686. begin
  687. op1:=left;
  688. op2:=nil;
  689. end;
  690. secondpass(op1);
  691. case inlinenumber of
  692. in_ror_x,
  693. in_ror_x_y:
  694. op:=OP_ROR;
  695. in_rol_x,
  696. in_rol_x_y:
  697. op:=OP_ROL;
  698. in_sar_x,
  699. in_sar_x_y:
  700. op:=OP_SAR;
  701. else
  702. internalerror(2013120110);
  703. end;
  704. hlcg.location_force_reg(current_asmdata.CurrAsmList,op1.location,op1.resultdef,resultdef,true);
  705. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  706. location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  707. if assigned(op2) then
  708. begin
  709. { rotating by a constant directly coded: }
  710. if op2.nodetype=ordconstn then
  711. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,
  712. tordconstnode(op2).value.uvalue and (resultdef.size*8-1),
  713. op1.location.register, location.register)
  714. else
  715. begin
  716. hlcg.location_force_reg(current_asmdata.CurrAsmList,op2.location,
  717. op2.resultdef,resultdef,true);
  718. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,resultdef,
  719. op2.location.register,op1.location.register,
  720. location.register);
  721. end;
  722. end
  723. else
  724. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,1,
  725. op1.location.register,location.register);
  726. end;
  727. procedure tcginlinenode.second_BsfBsr;
  728. var
  729. reverse: boolean;
  730. opsize: tcgsize;
  731. begin
  732. reverse:=(inlinenumber = in_bsr_x);
  733. secondpass(left);
  734. opsize:=tcgsize2unsigned[left.location.size];
  735. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  736. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(opsize),true);
  737. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  738. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  739. cg.a_bit_scan_reg_reg(current_asmdata.CurrAsmList,reverse,opsize,location.size,left.location.register,location.register);
  740. end;
  741. procedure tcginlinenode.second_new;
  742. begin
  743. internalerror(2011012202);
  744. end;
  745. procedure tcginlinenode.second_popcnt;
  746. begin
  747. internalerror(2012082601);
  748. end;
  749. procedure tcginlinenode.second_fma;
  750. begin
  751. internalerror(2014032701);
  752. end;
  753. begin
  754. cinlinenode:=tcginlinenode;
  755. end. s