cgcpu.pas 55 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  40. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  41. procedure a_call_ref(list : TAsmList;ref: treference);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { comparison operations }
  50. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  51. l : tasmlabel);override;
  52. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  53. procedure a_jmp_name(list : TAsmList;const s : string); override;
  54. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  55. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  56. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  57. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  58. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  59. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  60. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);override;
  61. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  62. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  63. procedure g_save_registers(list : TAsmList);override;
  64. procedure g_restore_registers(list : TAsmList);override;
  65. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  66. procedure fixref(list : TAsmList;var ref : treference);
  67. function normalize_ref(list : TAsmList;ref : treference;
  68. tmpreg : tregister) : treference;
  69. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  70. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  71. procedure a_adjust_sp(list: TAsmList; value: longint);
  72. function GetLoad(const ref : treference) : tasmop;
  73. function GetStore(const ref: treference): tasmop;
  74. end;
  75. tcg64favr = class(tcg64f32)
  76. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  77. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  78. end;
  79. procedure create_codegen;
  80. const
  81. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  82. A_NONE,A_MUL,A_MULS,A_NEG,A_COM,A_OR,
  83. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  84. implementation
  85. uses
  86. globals,verbose,systems,cutils,
  87. fmodule,
  88. symconst,symsym,
  89. tgobj,
  90. procinfo,cpupi,
  91. paramgr;
  92. procedure tcgavr.init_register_allocators;
  93. begin
  94. inherited init_register_allocators;
  95. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  96. [RS_R8,RS_R9,
  97. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  98. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  99. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7],first_int_imreg,[]);
  100. { rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  101. [RS_R26,RS_R30],first_int_imreg,[]); }
  102. end;
  103. procedure tcgavr.done_register_allocators;
  104. begin
  105. rg[R_INTREGISTER].free;
  106. // rg[R_ADDRESSREGISTER].free;
  107. inherited done_register_allocators;
  108. end;
  109. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  110. var
  111. tmp1,tmp2,tmp3 : TRegister;
  112. begin
  113. case size of
  114. OS_8,OS_S8:
  115. Result:=inherited getintregister(list, size);
  116. OS_16,OS_S16:
  117. begin
  118. Result:=inherited getintregister(list, OS_8);
  119. { ensure that the high register can be retrieved by
  120. GetNextReg
  121. }
  122. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  123. internalerror(2011021331);
  124. end;
  125. OS_32,OS_S32:
  126. begin
  127. Result:=inherited getintregister(list, OS_8);
  128. tmp1:=inherited getintregister(list, OS_8);
  129. { ensure that the high register can be retrieved by
  130. GetNextReg
  131. }
  132. if tmp1<>GetNextReg(Result) then
  133. internalerror(2011021332);
  134. tmp2:=inherited getintregister(list, OS_8);
  135. { ensure that the upper register can be retrieved by
  136. GetNextReg
  137. }
  138. if tmp2<>GetNextReg(tmp1) then
  139. internalerror(2011021333);
  140. tmp3:=inherited getintregister(list, OS_8);
  141. { ensure that the upper register can be retrieved by
  142. GetNextReg
  143. }
  144. if tmp3<>GetNextReg(tmp2) then
  145. internalerror(2011021334);
  146. end;
  147. else
  148. internalerror(2011021330);
  149. end;
  150. end;
  151. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  152. begin
  153. Result:=getintregister(list,OS_ADDR);
  154. end;
  155. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);
  156. var
  157. ref: treference;
  158. begin
  159. paraloc.check_simple_location;
  160. paramanager.allocparaloc(list,paraloc.location);
  161. case paraloc.location^.loc of
  162. LOC_REGISTER,LOC_CREGISTER:
  163. a_load_const_reg(list,size,a,paraloc.location^.register);
  164. LOC_REFERENCE:
  165. begin
  166. reference_reset(ref,paraloc.alignment);
  167. ref.base:=paraloc.location^.reference.index;
  168. ref.offset:=paraloc.location^.reference.offset;
  169. a_load_const_ref(list,size,a,ref);
  170. end;
  171. else
  172. internalerror(2002081101);
  173. end;
  174. end;
  175. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  176. var
  177. tmpref, ref: treference;
  178. location: pcgparalocation;
  179. sizeleft: aint;
  180. begin
  181. location := paraloc.location;
  182. tmpref := r;
  183. sizeleft := paraloc.intsize;
  184. while assigned(location) do
  185. begin
  186. paramanager.allocparaloc(list,location);
  187. case location^.loc of
  188. LOC_REGISTER,LOC_CREGISTER:
  189. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  190. LOC_REFERENCE:
  191. begin
  192. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  193. { doubles in softemu mode have a strange order of registers and references }
  194. if location^.size=OS_32 then
  195. g_concatcopy(list,tmpref,ref,4)
  196. else
  197. begin
  198. g_concatcopy(list,tmpref,ref,sizeleft);
  199. if assigned(location^.next) then
  200. internalerror(2005010710);
  201. end;
  202. end;
  203. LOC_VOID:
  204. begin
  205. // nothing to do
  206. end;
  207. else
  208. internalerror(2002081103);
  209. end;
  210. inc(tmpref.offset,tcgsize2size[location^.size]);
  211. dec(sizeleft,tcgsize2size[location^.size]);
  212. location := location^.next;
  213. end;
  214. end;
  215. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  216. var
  217. ref: treference;
  218. tmpreg: tregister;
  219. begin
  220. paraloc.check_simple_location;
  221. paramanager.allocparaloc(list,paraloc.location);
  222. case paraloc.location^.loc of
  223. LOC_REGISTER,LOC_CREGISTER:
  224. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  225. LOC_REFERENCE:
  226. begin
  227. reference_reset(ref,paraloc.alignment);
  228. ref.base := paraloc.location^.reference.index;
  229. ref.offset := paraloc.location^.reference.offset;
  230. tmpreg := getintregister(list,OS_ADDR);
  231. a_loadaddr_ref_reg(list,r,tmpreg);
  232. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  233. end;
  234. else
  235. internalerror(2002080701);
  236. end;
  237. end;
  238. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  239. begin
  240. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  241. {
  242. the compiler does not properly set this flag anymore in pass 1, and
  243. for now we only need it after pass 2 (I hope) (JM)
  244. if not(pi_do_call in current_procinfo.flags) then
  245. internalerror(2003060703);
  246. }
  247. include(current_procinfo.flags,pi_do_call);
  248. end;
  249. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  250. begin
  251. a_reg_alloc(list,NR_ZLO);
  252. a_reg_alloc(list,NR_ZHI);
  253. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  254. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  255. list.concat(taicpu.op_none(A_ICALL));
  256. a_reg_dealloc(list,NR_ZLO);
  257. a_reg_dealloc(list,NR_ZHI);
  258. include(current_procinfo.flags,pi_do_call);
  259. end;
  260. procedure tcgavr.a_call_ref(list : TAsmList;ref: treference);
  261. begin
  262. a_reg_alloc(list,NR_ZLO);
  263. a_reg_alloc(list,NR_ZHI);
  264. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,NR_ZLO);
  265. list.concat(taicpu.op_none(A_ICALL));
  266. a_reg_dealloc(list,NR_ZLO);
  267. a_reg_dealloc(list,NR_ZHI);
  268. include(current_procinfo.flags,pi_do_call);
  269. end;
  270. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister);
  271. var
  272. mask : qword;
  273. shift : byte;
  274. i : byte;
  275. tmpreg : tregister;
  276. begin
  277. mask:=$ff;
  278. shift:=0;
  279. case op of
  280. OP_OR:
  281. begin
  282. for i:=1 to tcgsize2size[size] do
  283. begin
  284. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  285. reg:=GetNextReg(reg);
  286. mask:=mask shl 8;
  287. inc(shift,8);
  288. end;
  289. end;
  290. OP_AND:
  291. begin
  292. for i:=1 to tcgsize2size[size] do
  293. begin
  294. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  295. reg:=GetNextReg(reg);
  296. mask:=mask shl 8;
  297. inc(shift,8);
  298. end;
  299. end;
  300. OP_SUB:
  301. begin
  302. list.concat(taicpu.op_reg_const(A_SUBI,reg,a));
  303. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  304. begin
  305. for i:=2 to tcgsize2size[size] do
  306. begin
  307. reg:=GetNextReg(reg);
  308. mask:=mask shl 8;
  309. inc(shift,8);
  310. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  311. end;
  312. end;
  313. end;
  314. else
  315. begin
  316. tmpreg:=getintregister(list,size);
  317. a_load_const_reg(list,size,a,tmpreg);
  318. a_op_reg_reg(list,op,size,tmpreg,reg);
  319. end;
  320. end;
  321. end;
  322. procedure tcgavr.a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister);
  323. var
  324. countreg,
  325. tmpreg: tregister;
  326. i : integer;
  327. instr : taicpu;
  328. paraloc1,paraloc2,paraloc3 : TCGPara;
  329. l1,l2 : tasmlabel;
  330. begin
  331. case op of
  332. OP_ADD:
  333. begin
  334. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  335. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  336. begin
  337. for i:=2 to tcgsize2size[size] do
  338. begin
  339. dst:=GetNextReg(dst);
  340. src:=GetNextReg(src);
  341. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  342. end;
  343. end
  344. else
  345. end;
  346. OP_SUB:
  347. begin
  348. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  349. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  350. begin
  351. for i:=2 to tcgsize2size[size] do
  352. begin
  353. dst:=GetNextReg(dst);
  354. src:=GetNextReg(src);
  355. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  356. end;
  357. end;
  358. end;
  359. OP_NEG:
  360. begin
  361. if src<>dst then
  362. a_load_reg_reg(list,size,size,src,dst);
  363. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  364. begin
  365. tmpreg:=GetNextReg(dst);
  366. for i:=2 to tcgsize2size[size] do
  367. begin
  368. list.concat(taicpu.op_reg(A_COM,tmpreg));
  369. tmpreg:=GetNextReg(tmpreg);
  370. end;
  371. list.concat(taicpu.op_reg(A_NEG,dst));
  372. tmpreg:=GetNextReg(dst);
  373. for i:=2 to tcgsize2size[size] do
  374. begin
  375. list.concat(taicpu.op_reg_const(A_SBCI,dst,-1));
  376. tmpreg:=GetNextReg(tmpreg);
  377. end;
  378. end
  379. else
  380. list.concat(taicpu.op_reg(A_NEG,dst));
  381. end;
  382. OP_NOT:
  383. begin
  384. for i:=1 to tcgsize2size[size] do
  385. begin
  386. if src<>dst then
  387. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  388. list.concat(taicpu.op_reg(A_COM,dst));
  389. src:=GetNextReg(src);
  390. dst:=GetNextReg(dst);
  391. end;
  392. end;
  393. OP_MUL,OP_IMUL:
  394. begin
  395. if size in [OS_8,OS_S8] then
  396. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src))
  397. else if size=OS_16 then
  398. begin
  399. paraloc1.init;
  400. paraloc2.init;
  401. paraloc3.init;
  402. paramanager.getintparaloc(pocall_default,1,paraloc1);
  403. paramanager.getintparaloc(pocall_default,2,paraloc2);
  404. paramanager.getintparaloc(pocall_default,3,paraloc3);
  405. a_load_const_cgpara(list,OS_8,0,paraloc3);
  406. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  407. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  408. paramanager.freecgpara(list,paraloc3);
  409. paramanager.freecgpara(list,paraloc2);
  410. paramanager.freecgpara(list,paraloc1);
  411. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  412. a_call_name(list,'FPC_MUL_WORD',false);
  413. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  414. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  415. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  416. paraloc3.done;
  417. paraloc2.done;
  418. paraloc1.done;
  419. end
  420. else
  421. internalerror(2011022002);
  422. end;
  423. OP_DIV,OP_IDIV:
  424. { special stuff, needs separate handling inside code }
  425. { generator }
  426. internalerror(2011022001);
  427. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  428. begin
  429. current_asmdata.getjumplabel(l1);
  430. current_asmdata.getjumplabel(l2);
  431. countreg:=getintregister(list,OS_8);
  432. a_load_reg_reg(list,size,OS_8,src,countreg);
  433. list.concat(taicpu.op_reg_const(A_CP,countreg,0));
  434. a_jmp_flags(list,F_EQ,l2);
  435. cg.a_label(list,l1);
  436. case op of
  437. OP_SHR:
  438. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg(dst,tcgsize2size[size]-1)));
  439. OP_SHL:
  440. list.concat(taicpu.op_reg(A_LSL,dst));
  441. OP_SAR:
  442. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg(dst,tcgsize2size[size]-1)));
  443. OP_ROR:
  444. begin
  445. { load carry? }
  446. if not(size in [OS_8,OS_S8]) then
  447. begin
  448. list.concat(taicpu.op_none(A_CLC));
  449. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  450. list.concat(taicpu.op_none(A_SEC));
  451. end;
  452. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg(dst,tcgsize2size[size]-1)));
  453. end;
  454. OP_ROL:
  455. begin
  456. { load carry? }
  457. if not(size in [OS_8,OS_S8]) then
  458. begin
  459. list.concat(taicpu.op_none(A_CLC));
  460. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg(dst,tcgsize2size[size]-1),7));
  461. list.concat(taicpu.op_none(A_SEC));
  462. end;
  463. list.concat(taicpu.op_reg(A_ROL,dst))
  464. end;
  465. else
  466. internalerror(2011030901);
  467. end;
  468. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  469. begin
  470. for i:=2 to tcgsize2size[size] do
  471. begin
  472. case op of
  473. OP_ROR,
  474. OP_SHR:
  475. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg(dst,tcgsize2size[size]-i)));
  476. OP_ROL,
  477. OP_SHL:
  478. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg(dst,i-1)));
  479. OP_SAR:
  480. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg(dst,tcgsize2size[size]-i)));
  481. else
  482. internalerror(2011030902);
  483. end;
  484. end;
  485. end;
  486. a_op_const_reg(list,OP_SUB,OS_8,1,countreg);
  487. a_jmp_flags(list,F_NE,l1);
  488. // keep registers alive
  489. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  490. cg.a_label(list,l2);
  491. end;
  492. OP_AND,OP_OR,OP_XOR:
  493. begin
  494. for i:=1 to tcgsize2size[size] do
  495. begin
  496. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  497. dst:=GetNextReg(dst);
  498. src:=GetNextReg(src);
  499. end;
  500. end;
  501. else
  502. internalerror(2011022004);
  503. end;
  504. end;
  505. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);
  506. var
  507. mask : qword;
  508. shift : byte;
  509. i : byte;
  510. begin
  511. mask:=$ff;
  512. shift:=0;
  513. for i:=1 to tcgsize2size[size] do
  514. begin
  515. if ((qword(a) and mask) shr shift)=0 then
  516. emit_mov(list,reg,NR_R1)
  517. else
  518. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  519. mask:=mask shl 8;
  520. inc(shift,8);
  521. reg:=GetNextReg(reg);
  522. end;
  523. end;
  524. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  525. var
  526. tmpref : treference;
  527. l : tasmlabel;
  528. begin
  529. Result:=ref;
  530. if ref.addressmode<>AM_UNCHANGED then
  531. internalerror(2011021701);
  532. { Be sure to have a base register }
  533. if (ref.base=NR_NO) then
  534. begin
  535. { only symbol+offset? }
  536. if ref.index=NR_NO then
  537. exit;
  538. ref.base:=ref.index;
  539. ref.index:=NR_NO;
  540. end;
  541. if assigned(ref.symbol) or (ref.offset<>0) then
  542. begin
  543. reference_reset(tmpref,0);
  544. tmpref.symbol:=ref.symbol;
  545. tmpref.offset:=ref.offset;
  546. tmpref.refaddr:=addr_lo8;
  547. getcpuregister(list,tmpreg);
  548. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  549. tmpref.refaddr:=addr_hi8;
  550. getcpuregister(list,GetNextReg(tmpreg));
  551. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  552. if (ref.base<>NR_NO) then
  553. begin
  554. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  555. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  556. end;
  557. if (ref.index<>NR_NO) then
  558. begin
  559. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  560. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  561. end;
  562. ref.symbol:=nil;
  563. ref.offset:=0;
  564. ref.base:=tmpreg;
  565. ref.index:=NR_NO;
  566. end
  567. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  568. begin
  569. getcpuregister(list,tmpreg);
  570. emit_mov(list,tmpreg,ref.index);
  571. getcpuregister(list,GetNextReg(tmpreg));
  572. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  573. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  574. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  575. ref.base:=tmpreg;
  576. ref.index:=NR_NO;
  577. end
  578. else if (ref.base<>NR_NO) then
  579. begin
  580. getcpuregister(list,tmpreg);
  581. emit_mov(list,tmpreg,ref.base);
  582. getcpuregister(list,GetNextReg(tmpreg));
  583. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  584. ref.base:=tmpreg;
  585. ref.index:=NR_NO;
  586. end
  587. else if (ref.index<>NR_NO) then
  588. begin
  589. getcpuregister(list,tmpreg);
  590. emit_mov(list,tmpreg,ref.index);
  591. getcpuregister(list,GetNextReg(tmpreg));
  592. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  593. ref.base:=tmpreg;
  594. ref.index:=NR_NO;
  595. end;
  596. Result:=ref;
  597. end;
  598. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  599. var
  600. href : treference;
  601. conv_done: boolean;
  602. tmpreg : tregister;
  603. i : integer;
  604. QuickRef : Boolean;
  605. begin
  606. QuickRef:=false;
  607. if not((Ref.addressmode=AM_UNCHANGED) and
  608. (Ref.symbol=nil) and
  609. ((Ref.base=NR_R28) or
  610. (Ref.base=NR_R29)) and
  611. (Ref.Index=NR_No) and
  612. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  613. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  614. href:=normalize_ref(list,Ref,NR_R30)
  615. else
  616. begin
  617. QuickRef:=true;
  618. href:=Ref;
  619. end;
  620. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  621. internalerror(2011021307);
  622. conv_done:=false;
  623. if tosize<>fromsize then
  624. begin
  625. conv_done:=true;
  626. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  627. fromsize:=tosize;
  628. case fromsize of
  629. OS_8:
  630. begin
  631. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  632. href.addressmode:=AM_POSTINCREMENT;
  633. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  634. for i:=2 to tcgsize2size[tosize] do
  635. begin
  636. if QuickRef then
  637. inc(href.offset);
  638. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  639. href.addressmode:=AM_POSTINCREMENT
  640. else
  641. href.addressmode:=AM_UNCHANGED;
  642. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  643. end;
  644. end;
  645. OS_S8:
  646. begin
  647. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  648. href.addressmode:=AM_POSTINCREMENT;
  649. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  650. if tcgsize2size[tosize]>1 then
  651. begin
  652. tmpreg:=getintregister(list,OS_8);
  653. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  654. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  655. list.concat(taicpu.op_reg(A_COM,tmpreg));
  656. for i:=2 to tcgsize2size[tosize] do
  657. begin
  658. if QuickRef then
  659. inc(href.offset);
  660. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  661. href.addressmode:=AM_POSTINCREMENT
  662. else
  663. href.addressmode:=AM_UNCHANGED;
  664. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  665. end;
  666. end;
  667. end;
  668. OS_16:
  669. begin
  670. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  671. href.addressmode:=AM_POSTINCREMENT;
  672. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  673. if QuickRef then
  674. inc(href.offset)
  675. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  676. href.addressmode:=AM_POSTINCREMENT
  677. else
  678. href.addressmode:=AM_UNCHANGED;
  679. reg:=GetNextReg(reg);
  680. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  681. for i:=3 to tcgsize2size[tosize] do
  682. begin
  683. if QuickRef then
  684. inc(href.offset);
  685. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  686. href.addressmode:=AM_POSTINCREMENT
  687. else
  688. href.addressmode:=AM_UNCHANGED;
  689. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  690. end;
  691. end;
  692. OS_S16:
  693. begin
  694. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  695. href.addressmode:=AM_POSTINCREMENT;
  696. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  697. if QuickRef then
  698. inc(href.offset)
  699. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  700. href.addressmode:=AM_POSTINCREMENT
  701. else
  702. href.addressmode:=AM_UNCHANGED;
  703. reg:=GetNextReg(reg);
  704. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  705. if tcgsize2size[tosize]>2 then
  706. begin
  707. tmpreg:=getintregister(list,OS_8);
  708. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  709. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  710. list.concat(taicpu.op_reg(A_COM,tmpreg));
  711. for i:=3 to tcgsize2size[tosize] do
  712. begin
  713. if QuickRef then
  714. inc(href.offset);
  715. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  716. href.addressmode:=AM_POSTINCREMENT
  717. else
  718. href.addressmode:=AM_UNCHANGED;
  719. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  720. end;
  721. end;
  722. end;
  723. else
  724. conv_done:=false;
  725. end;
  726. end;
  727. if not conv_done then
  728. begin
  729. for i:=1 to tcgsize2size[fromsize] do
  730. begin
  731. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  732. href.addressmode:=AM_POSTINCREMENT
  733. else
  734. href.addressmode:=AM_UNCHANGED;
  735. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  736. if QuickRef then
  737. inc(href.offset);
  738. reg:=GetNextReg(reg);
  739. end;
  740. end;
  741. if not(QuickRef) then
  742. begin
  743. ungetcpuregister(list,href.base);
  744. ungetcpuregister(list,GetNextReg(href.base));
  745. end;
  746. end;
  747. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  748. const Ref : treference;reg : tregister);
  749. var
  750. href : treference;
  751. conv_done: boolean;
  752. tmpreg : tregister;
  753. i : integer;
  754. QuickRef : boolean;
  755. begin
  756. QuickRef:=false;
  757. if not((Ref.addressmode=AM_UNCHANGED) and
  758. (Ref.symbol=nil) and
  759. ((Ref.base=NR_R28) or
  760. (Ref.base=NR_R29)) and
  761. (Ref.Index=NR_No) and
  762. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  763. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  764. href:=normalize_ref(list,Ref,NR_R30)
  765. else
  766. begin
  767. QuickRef:=true;
  768. href:=Ref;
  769. end;
  770. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  771. internalerror(2011021307);
  772. conv_done:=false;
  773. if tosize<>fromsize then
  774. begin
  775. conv_done:=true;
  776. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  777. fromsize:=tosize;
  778. case fromsize of
  779. OS_8:
  780. begin
  781. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  782. for i:=2 to tcgsize2size[tosize] do
  783. begin
  784. reg:=GetNextReg(reg);
  785. list.concat(taicpu.op_reg(A_CLR,reg));
  786. end;
  787. end;
  788. OS_S8:
  789. begin
  790. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  791. tmpreg:=reg;
  792. if tcgsize2size[tosize]>1 then
  793. begin
  794. reg:=GetNextReg(reg);
  795. list.concat(taicpu.op_reg(A_CLR,reg));
  796. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  797. list.concat(taicpu.op_reg(A_COM,reg));
  798. tmpreg:=reg;
  799. for i:=3 to tcgsize2size[tosize] do
  800. begin
  801. reg:=GetNextReg(reg);
  802. emit_mov(list,reg,tmpreg);
  803. end;
  804. end;
  805. end;
  806. OS_16:
  807. begin
  808. if not(QuickRef) then
  809. href.addressmode:=AM_POSTINCREMENT;
  810. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  811. if QuickRef then
  812. inc(href.offset);
  813. href.addressmode:=AM_UNCHANGED;
  814. reg:=GetNextReg(reg);
  815. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  816. for i:=3 to tcgsize2size[tosize] do
  817. begin
  818. reg:=GetNextReg(reg);
  819. list.concat(taicpu.op_reg(A_CLR,reg));
  820. end;
  821. end;
  822. OS_S16:
  823. begin
  824. if not(QuickRef) then
  825. href.addressmode:=AM_POSTINCREMENT;
  826. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  827. if QuickRef then
  828. inc(href.offset);
  829. href.addressmode:=AM_UNCHANGED;
  830. reg:=GetNextReg(reg);
  831. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  832. tmpreg:=reg;
  833. reg:=GetNextReg(reg);
  834. list.concat(taicpu.op_reg(A_CLR,reg));
  835. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  836. list.concat(taicpu.op_reg(A_COM,reg));
  837. tmpreg:=reg;
  838. for i:=4 to tcgsize2size[tosize] do
  839. begin
  840. reg:=GetNextReg(reg);
  841. emit_mov(list,reg,tmpreg);
  842. end;
  843. end;
  844. else
  845. conv_done:=false;
  846. end;
  847. end;
  848. if not conv_done then
  849. begin
  850. for i:=1 to tcgsize2size[fromsize] do
  851. begin
  852. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  853. href.addressmode:=AM_POSTINCREMENT
  854. else
  855. href.addressmode:=AM_UNCHANGED;
  856. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  857. if QuickRef then
  858. inc(href.offset);
  859. reg:=GetNextReg(reg);
  860. end;
  861. end;
  862. if not(QuickRef) then
  863. begin
  864. ungetcpuregister(list,href.base);
  865. ungetcpuregister(list,GetNextReg(href.base));
  866. end;
  867. end;
  868. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  869. var
  870. conv_done: boolean;
  871. tmpreg : tregister;
  872. i : integer;
  873. begin
  874. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  875. internalerror(2011021310);
  876. conv_done:=false;
  877. if tosize<>fromsize then
  878. begin
  879. conv_done:=true;
  880. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  881. fromsize:=tosize;
  882. case fromsize of
  883. OS_8:
  884. begin
  885. emit_mov(list,reg2,reg1);
  886. for i:=2 to tcgsize2size[tosize] do
  887. begin
  888. reg2:=GetNextReg(reg2);
  889. list.concat(taicpu.op_reg(A_CLR,reg2));
  890. end;
  891. end;
  892. OS_S8:
  893. begin
  894. { dest is always at least 16 bit at this point }
  895. emit_mov(list,reg2,reg1);
  896. reg2:=GetNextReg(reg2);
  897. list.concat(taicpu.op_reg(A_CLR,reg2));
  898. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  899. list.concat(taicpu.op_reg(A_COM,reg2));
  900. tmpreg:=reg2;
  901. for i:=3 to tcgsize2size[tosize] do
  902. begin
  903. reg2:=GetNextReg(reg2);
  904. emit_mov(list,reg2,tmpreg);
  905. end;
  906. end;
  907. OS_16:
  908. begin
  909. emit_mov(list,reg2,reg1);
  910. reg1:=GetNextReg(reg1);
  911. reg2:=GetNextReg(reg2);
  912. emit_mov(list,reg2,reg1);
  913. for i:=3 to tcgsize2size[tosize] do
  914. begin
  915. reg2:=GetNextReg(reg2);
  916. list.concat(taicpu.op_reg(A_CLR,reg2));
  917. end;
  918. end;
  919. OS_S16:
  920. begin
  921. { dest is always at least 32 bit at this point }
  922. emit_mov(list,reg2,reg1);
  923. reg1:=GetNextReg(reg1);
  924. reg2:=GetNextReg(reg2);
  925. emit_mov(list,reg2,reg1);
  926. reg2:=GetNextReg(reg2);
  927. list.concat(taicpu.op_reg(A_CLR,reg2));
  928. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  929. list.concat(taicpu.op_reg(A_COM,reg2));
  930. tmpreg:=reg2;
  931. for i:=4 to tcgsize2size[tosize] do
  932. begin
  933. reg2:=GetNextReg(reg2);
  934. emit_mov(list,reg2,tmpreg);
  935. end;
  936. end;
  937. else
  938. conv_done:=false;
  939. end;
  940. end;
  941. if not conv_done and (reg1<>reg2) then
  942. begin
  943. for i:=1 to tcgsize2size[fromsize] do
  944. begin
  945. emit_mov(list,reg2,reg1);
  946. reg1:=GetNextReg(reg1);
  947. reg2:=GetNextReg(reg2);
  948. end;
  949. end;
  950. end;
  951. { comparison operations }
  952. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  953. cmp_op : topcmp;a : aint;reg : tregister;l : tasmlabel);
  954. begin
  955. { TODO : a_cmp_const_reg_label }
  956. end;
  957. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  958. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  959. begin
  960. { TODO : a_cmp_reg_reg_label }
  961. end;
  962. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  963. var
  964. ai : taicpu;
  965. begin
  966. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s));
  967. ai.is_jmp:=true;
  968. list.concat(ai);
  969. end;
  970. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  971. var
  972. ai : taicpu;
  973. begin
  974. ai:=taicpu.op_sym(A_JMP,l);
  975. ai.is_jmp:=true;
  976. list.concat(ai);
  977. end;
  978. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  979. var
  980. ai : taicpu;
  981. begin
  982. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  983. ai.is_jmp:=true;
  984. list.concat(ai);
  985. end;
  986. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  987. begin
  988. { TODO : implement g_flags2reg }
  989. end;
  990. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  991. var
  992. i : integer;
  993. begin
  994. case value of
  995. 0:
  996. ;
  997. -14..-1:
  998. begin
  999. if ((-value) mod 2)<>0 then
  1000. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1001. for i:=1 to (-value) div 2 do
  1002. list.concat(taicpu.op_const(A_RCALL,0));
  1003. end;
  1004. 1..7:
  1005. begin
  1006. for i:=1 to value do
  1007. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1008. end;
  1009. else
  1010. begin
  1011. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1012. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1013. // get SREG
  1014. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1015. // block interrupts
  1016. list.concat(taicpu.op_none(A_CLI));
  1017. // write high SP
  1018. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1019. // release interrupts
  1020. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1021. // write low SP
  1022. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1023. end;
  1024. end;
  1025. end;
  1026. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1027. begin
  1028. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1029. result:=A_LDS
  1030. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1031. result:=A_LDD
  1032. else
  1033. result:=A_LD;
  1034. end;
  1035. function tcgavr.GetStore(const ref: treference) : tasmop;
  1036. begin
  1037. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1038. result:=A_STS
  1039. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1040. result:=A_STD
  1041. else
  1042. result:=A_ST;
  1043. end;
  1044. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1045. var
  1046. regs : tcpuregisterset;
  1047. reg : tsuperregister;
  1048. begin
  1049. if not(nostackframe) then
  1050. begin
  1051. { save int registers }
  1052. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1053. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1054. regs:=regs+[RS_R28,RS_R29];
  1055. for reg:=RS_R31 downto RS_R0 do
  1056. if reg in regs then
  1057. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1058. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1059. begin
  1060. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1061. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1062. end
  1063. else
  1064. { the framepointer cannot be omitted on avr because sp
  1065. is not a register but part of the i/o map
  1066. }
  1067. internalerror(2011021901);
  1068. a_adjust_sp(list,-localsize);
  1069. end;
  1070. end;
  1071. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1072. var
  1073. regs : tcpuregisterset;
  1074. reg : TSuperRegister;
  1075. LocalSize : longint;
  1076. begin
  1077. if not(nostackframe) then
  1078. begin
  1079. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1080. begin
  1081. LocalSize:=current_procinfo.calc_stackframe_size;
  1082. a_adjust_sp(list,LocalSize);
  1083. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1084. for reg:=RS_R0 to RS_R31 do
  1085. if reg in regs then
  1086. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1087. end
  1088. else
  1089. { the framepointer cannot be omitted on avr because sp
  1090. is not a register but part of the i/o map
  1091. }
  1092. internalerror(2011021902);
  1093. end;
  1094. list.concat(taicpu.op_none(A_RET));
  1095. end;
  1096. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1097. var
  1098. tmpref : treference;
  1099. begin
  1100. if ref.addressmode<>AM_UNCHANGED then
  1101. internalerror(2011021701);
  1102. if assigned(ref.symbol) or (ref.offset<>0) then
  1103. begin
  1104. reference_reset(tmpref,0);
  1105. tmpref.symbol:=ref.symbol;
  1106. tmpref.offset:=ref.offset;
  1107. tmpref.refaddr:=addr_lo8;
  1108. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1109. tmpref.refaddr:=addr_hi8;
  1110. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1111. if (ref.base<>NR_NO) then
  1112. begin
  1113. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1114. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1115. end;
  1116. if (ref.index<>NR_NO) then
  1117. begin
  1118. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1119. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1120. end;
  1121. end
  1122. else if (ref.base<>NR_NO)then
  1123. begin
  1124. emit_mov(list,r,ref.base);
  1125. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1126. if (ref.index<>NR_NO) then
  1127. begin
  1128. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1129. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1130. end;
  1131. end
  1132. else if (ref.index<>NR_NO) then
  1133. begin
  1134. emit_mov(list,r,ref.index);
  1135. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1136. end;
  1137. end;
  1138. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1139. begin
  1140. internalerror(2011021320);
  1141. end;
  1142. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  1143. var
  1144. paraloc1,paraloc2,paraloc3 : TCGPara;
  1145. begin
  1146. paraloc1.init;
  1147. paraloc2.init;
  1148. paraloc3.init;
  1149. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1150. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1151. paramanager.getintparaloc(pocall_default,3,paraloc3);
  1152. a_load_const_cgpara(list,OS_INT,len,paraloc3);
  1153. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1154. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1155. paramanager.freecgpara(list,paraloc3);
  1156. paramanager.freecgpara(list,paraloc2);
  1157. paramanager.freecgpara(list,paraloc1);
  1158. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1159. a_call_name_static(list,'FPC_MOVE');
  1160. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1161. paraloc3.done;
  1162. paraloc2.done;
  1163. paraloc1.done;
  1164. end;
  1165. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);
  1166. var
  1167. countreg,tmpreg : tregister;
  1168. srcref,dstref : treference;
  1169. copysize,countregsize : tcgsize;
  1170. l : TAsmLabel;
  1171. i : longint;
  1172. SrcQuickRef, DestQuickRef : Boolean;
  1173. begin
  1174. if len>16 then
  1175. begin
  1176. current_asmdata.getjumplabel(l);
  1177. reference_reset(srcref,0);
  1178. reference_reset(dstref,0);
  1179. srcref.base:=NR_R30;
  1180. srcref.addressmode:=AM_POSTINCREMENT;
  1181. dstref.base:=NR_R26;
  1182. dstref.addressmode:=AM_POSTINCREMENT;
  1183. copysize:=OS_8;
  1184. if len<256 then
  1185. countregsize:=OS_8
  1186. else if len<65536 then
  1187. countregsize:=OS_16
  1188. else
  1189. internalerror(2011022007);
  1190. countreg:=getintregister(list,countregsize);
  1191. a_load_const_reg(list,countregsize,len,countreg);
  1192. a_loadaddr_ref_reg(list,source,NR_R30);
  1193. tmpreg:=getaddressregister(list);
  1194. a_loadaddr_ref_reg(list,dest,tmpreg);
  1195. { X is used for spilling code so we can load it
  1196. only by a push/pop sequence, this can be
  1197. optimized later on by the peephole optimizer
  1198. }
  1199. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1200. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1201. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1202. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1203. cg.a_label(list,l);
  1204. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1205. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1206. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1207. a_jmp_flags(list,F_NE,l);
  1208. // keep registers alive
  1209. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1210. end
  1211. else
  1212. begin
  1213. SrcQuickRef:=false;
  1214. DestQuickRef:=false;
  1215. if not((source.addressmode=AM_UNCHANGED) and
  1216. (source.symbol=nil) and
  1217. ((source.base=NR_R28) or
  1218. (source.base=NR_R29)) and
  1219. (source.Index=NR_No) and
  1220. (source.Offset in [0..64-len])) and
  1221. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1222. srcref:=normalize_ref(list,source,NR_R30)
  1223. else
  1224. begin
  1225. SrcQuickRef:=true;
  1226. srcref:=source;
  1227. end;
  1228. if not((dest.addressmode=AM_UNCHANGED) and
  1229. (dest.symbol=nil) and
  1230. ((dest.base=NR_R28) or
  1231. (dest.base=NR_R29)) and
  1232. (dest.Index=NR_No) and
  1233. (dest.Offset in [0..64-len])) and
  1234. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1235. begin
  1236. if not(SrcQuickRef) then
  1237. begin
  1238. tmpreg:=getaddressregister(list);
  1239. dstref:=normalize_ref(list,dest,tmpreg);
  1240. { X is used for spilling code so we can load it
  1241. only by a push/pop sequence, this can be
  1242. optimized later on by the peephole optimizer
  1243. }
  1244. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1245. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1246. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1247. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1248. end
  1249. else
  1250. dstref:=normalize_ref(list,dest,NR_R30);
  1251. end
  1252. else
  1253. begin
  1254. DestQuickRef:=true;
  1255. dstref:=dest;
  1256. end;
  1257. for i:=1 to len do
  1258. begin
  1259. if not(SrcQuickRef) and (i<len) then
  1260. srcref.addressmode:=AM_POSTINCREMENT
  1261. else
  1262. srcref.addressmode:=AM_UNCHANGED;
  1263. if not(DestQuickRef) and (i<len) then
  1264. dstref.addressmode:=AM_POSTINCREMENT
  1265. else
  1266. dstref.addressmode:=AM_UNCHANGED;
  1267. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1268. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1269. if SrcQuickRef then
  1270. inc(srcref.offset);
  1271. if DestQuickRef then
  1272. inc(dstref.offset);
  1273. end;
  1274. if not(SrcQuickRef) then
  1275. begin
  1276. ungetcpuregister(list,srcref.base);
  1277. ungetcpuregister(list,GetNextReg(srcref.base));
  1278. end;
  1279. end;
  1280. end;
  1281. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1282. var
  1283. hl : tasmlabel;
  1284. ai : taicpu;
  1285. cond : TAsmCond;
  1286. begin
  1287. if not(cs_check_overflow in current_settings.localswitches) then
  1288. exit;
  1289. current_asmdata.getjumplabel(hl);
  1290. if not ((def.typ=pointerdef) or
  1291. ((def.typ=orddef) and
  1292. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,pasbool]))) then
  1293. cond:=C_VC
  1294. else
  1295. cond:=C_CC;
  1296. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1297. ai.SetCondition(cond);
  1298. ai.is_jmp:=true;
  1299. list.concat(ai);
  1300. a_call_name(list,'FPC_OVERFLOW',false);
  1301. a_label(list,hl);
  1302. end;
  1303. procedure tcgavr.g_save_registers(list: TAsmList);
  1304. begin
  1305. { this is done by the entry code }
  1306. end;
  1307. procedure tcgavr.g_restore_registers(list: TAsmList);
  1308. begin
  1309. { this is done by the exit code }
  1310. end;
  1311. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1312. var
  1313. ai : taicpu;
  1314. begin
  1315. { TODO : fix a_jmp_cond }
  1316. {
  1317. ai:=Taicpu.Op_sym(A_BRxx,l);
  1318. case cond of
  1319. OC_EQ:
  1320. ai.SetCondition(C_EQ);
  1321. OC_GT
  1322. OC_LT
  1323. OC_GTE
  1324. OC_LTE
  1325. OC_NE
  1326. OC_BE
  1327. OC_B
  1328. OC_AE
  1329. OC_A:
  1330. ai.is_jmp:=true;
  1331. list.concat(ai);
  1332. }
  1333. end;
  1334. procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  1335. begin
  1336. internalerror(2011021324);
  1337. end;
  1338. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1339. var
  1340. instr: taicpu;
  1341. begin
  1342. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1343. list.Concat(instr);
  1344. { Notify the register allocator that we have written a move instruction so
  1345. it can try to eliminate it. }
  1346. add_move_instruction(instr);
  1347. end;
  1348. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1349. begin
  1350. { TODO : a_op64_reg_reg }
  1351. end;
  1352. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1353. begin
  1354. { TODO : a_op64_const_reg }
  1355. end;
  1356. procedure create_codegen;
  1357. begin
  1358. cg:=tcgavr.create;
  1359. cg64:=tcg64favr.create;
  1360. end;
  1361. end.