cg386mat.pas 45 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl
  4. Generate i386 assembler for math nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cg386mat;
  19. interface
  20. uses
  21. tree;
  22. procedure secondmoddiv(var p : ptree);
  23. procedure secondshlshr(var p : ptree);
  24. procedure secondunaryminus(var p : ptree);
  25. procedure secondnot(var p : ptree);
  26. implementation
  27. uses
  28. globtype,systems,
  29. cobjects,verbose,globals,
  30. symconst,symtable,aasm,types,
  31. hcodegen,temp_gen,pass_2,
  32. cpubase,cpuasm,
  33. {$ifdef dummy}
  34. end { this overcomes the annoying highlighting problem in my TP IDE,
  35. the IDE assumes i386asm start a asm block (FK) }
  36. {$endif}
  37. cgai386,tgeni386;
  38. {*****************************************************************************
  39. SecondModDiv
  40. *****************************************************************************}
  41. procedure secondmoddiv(var p : ptree);
  42. var
  43. hreg1, hreg2 : tregister;
  44. shrdiv, andmod, pushed,popeax,popedx : boolean;
  45. power : longint;
  46. hl : pasmlabel;
  47. hloc : tlocation;
  48. pushedreg : tpushed;
  49. typename,opname : string[6];
  50. begin
  51. shrdiv := false;
  52. andmod := false;
  53. secondpass(p^.left);
  54. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  55. secondpass(p^.right);
  56. if pushed then
  57. restore(p^.left,is_64bitint(p^.left^.resulttype));
  58. set_location(p^.location,p^.left^.location);
  59. if is_64bitint(p^.resulttype) then
  60. begin
  61. { save p^.lcoation, because we change it now }
  62. set_location(hloc,p^.location);
  63. release_qword_loc(p^.location);
  64. release_qword_loc(p^.right^.location);
  65. p^.location.registerlow:=getexplicitregister32(R_EAX);
  66. p^.location.registerhigh:=getexplicitregister32(R_EDX);
  67. pushusedregisters(pushedreg,$ff
  68. and not($80 shr byte(p^.location.registerlow))
  69. and not($80 shr byte(p^.location.registerhigh)));
  70. { the left operand is in hloc, because the
  71. location of left is p^.location but p^.location
  72. is already destroyed
  73. }
  74. emit_pushq_loc(hloc);
  75. clear_location(hloc);
  76. emit_pushq_loc(p^.right^.location);
  77. if porddef(p^.resulttype)^.typ=u64bit then
  78. typename:='QWORD'
  79. else
  80. typename:='INT64';
  81. if p^.treetype=divn then
  82. opname:='DIV_'
  83. else
  84. opname:='MOD_';
  85. emitcall('FPC_'+opname+typename);
  86. emit_reg_reg(A_MOV,S_L,R_EAX,p^.location.registerlow);
  87. emit_reg_reg(A_MOV,S_L,R_EDX,p^.location.registerhigh);
  88. popusedregisters(pushedreg);
  89. p^.location.loc:=LOC_REGISTER;
  90. end
  91. else
  92. begin
  93. { put numerator in register }
  94. if p^.left^.location.loc<>LOC_REGISTER then
  95. begin
  96. if p^.left^.location.loc=LOC_CREGISTER then
  97. begin
  98. hreg1:=getregister32;
  99. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,hreg1);
  100. end
  101. else
  102. begin
  103. del_reference(p^.left^.location.reference);
  104. hreg1:=getregister32;
  105. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  106. hreg1);
  107. end;
  108. clear_location(p^.left^.location);
  109. p^.left^.location.loc:=LOC_REGISTER;
  110. p^.left^.location.register:=hreg1;
  111. end
  112. else hreg1:=p^.left^.location.register;
  113. if (p^.treetype=divn) and (p^.right^.treetype=ordconstn) and
  114. ispowerof2(p^.right^.value,power) then
  115. Begin
  116. shrdiv := true;
  117. {for signed numbers, the numerator must be adjusted before the
  118. shift instruction, but not wih unsigned numbers! Otherwise,
  119. "Cardinal($ffffffff) div 16" overflows! (JM)}
  120. If is_signed(p^.left^.resulttype) Then
  121. Begin
  122. {$ifdef newOptimizations}
  123. If (aktOptProcessor <> class386) and
  124. not(CS_LittleSize in aktglobalswitches) then
  125. { use a sequence without jumps, saw this in
  126. comp.compilers (JM) }
  127. begin
  128. { no jumps, but more operations }
  129. if (hreg1 = R_EAX) and
  130. (R_EDX in unused) then
  131. begin
  132. hreg2 := getexplicitregister32(R_EDX);
  133. emit_none(A_CDQ,S_NO);
  134. end
  135. else
  136. begin
  137. {$ifndef noAllocEdi}
  138. getexplicitregister32(R_EDI);
  139. {$endif noAllocEdi}
  140. hreg2 := R_EDI;
  141. emit_reg_reg(A_MOV,S_L,hreg1,R_EDI);
  142. { if the left value is signed, R_EDI := $ffffffff,
  143. otherwise 0 }
  144. emit_const_reg(A_SAR,S_L,31,R_EDI);
  145. { if signed, R_EDI := right value-1, otherwise 0 }
  146. end;
  147. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg2);
  148. { add to the left value }
  149. emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
  150. { release EDX if we used it }
  151. {$ifndef noAllocEdi}
  152. { also releas EDI }
  153. ungetregister32(hreg2);
  154. {$else noAllocEdi}
  155. if (hreg2 = R_EDX) then
  156. ungetregister32(hreg2);
  157. {$endif noAllocEdi}
  158. { do the shift }
  159. emit_const_reg(A_SAR,S_L,power,hreg1);
  160. end
  161. else
  162. {$endif newOptimizations}
  163. begin
  164. { a jump, but less operations }
  165. emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
  166. getlabel(hl);
  167. emitjmp(C_NS,hl);
  168. if power=1 then
  169. emit_reg(A_INC,S_L,hreg1)
  170. else
  171. emit_const_reg(A_ADD,S_L,p^.right^.value-1,hreg1);
  172. emitlab(hl);
  173. emit_const_reg(A_SAR,S_L,power,hreg1);
  174. end
  175. End
  176. Else
  177. emit_const_reg(A_SHR,S_L,power,hreg1);
  178. End
  179. else
  180. if (p^.treetype=modn) and (p^.right^.treetype=ordconstn) and
  181. ispowerof2(p^.right^.value,power) and Not(is_signed(p^.left^.resulttype)) Then
  182. {is there a similar trick for MOD'ing signed numbers? (JM)}
  183. Begin
  184. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg1);
  185. andmod := true;
  186. End
  187. else
  188. begin
  189. { bring denominator to EDI }
  190. { EDI is always free, it's }
  191. { only used for temporary }
  192. { purposes }
  193. {$ifndef noAllocEdi}
  194. getexplicitregister32(R_EDI);
  195. {$endif noAllocEdi}
  196. if (p^.right^.location.loc<>LOC_REGISTER) and
  197. (p^.right^.location.loc<>LOC_CREGISTER) then
  198. begin
  199. del_reference(p^.right^.location.reference);
  200. p^.left^.location.loc:=LOC_REGISTER;
  201. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),R_EDI);
  202. end
  203. else
  204. begin
  205. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,R_EDI);
  206. ungetregister32(p^.right^.location.register);
  207. end;
  208. popedx:=false;
  209. popeax:=false;
  210. if hreg1=R_EDX then
  211. begin
  212. if not(R_EAX in unused) then
  213. begin
  214. emit_reg(A_PUSH,S_L,R_EAX);
  215. popeax:=true;
  216. end;
  217. emit_reg_reg(A_MOV,S_L,R_EDX,R_EAX);
  218. end
  219. else
  220. begin
  221. if not(R_EDX in unused) then
  222. begin
  223. emit_reg(A_PUSH,S_L,R_EDX);
  224. popedx:=true;
  225. end;
  226. if hreg1<>R_EAX then
  227. begin
  228. if not(R_EAX in unused) then
  229. begin
  230. emit_reg(A_PUSH,S_L,R_EAX);
  231. popeax:=true;
  232. end;
  233. emit_reg_reg(A_MOV,S_L,hreg1,R_EAX);
  234. end;
  235. end;
  236. { sign extension depends on the left type }
  237. if porddef(p^.left^.resulttype)^.typ=u32bit then
  238. emit_reg_reg(A_XOR,S_L,R_EDX,R_EDX)
  239. else
  240. emit_none(A_CDQ,S_NO);
  241. { division depends on the right type }
  242. if porddef(p^.right^.resulttype)^.typ=u32bit then
  243. emit_reg(A_DIV,S_L,R_EDI)
  244. else
  245. emit_reg(A_IDIV,S_L,R_EDI);
  246. {$ifndef noAllocEdi}
  247. ungetregister32(R_EDI);
  248. {$endif noAllocEdi}
  249. if p^.treetype=divn then
  250. begin
  251. { if result register is busy then copy }
  252. if popeax then
  253. begin
  254. if hreg1=R_EAX then
  255. internalerror(112);
  256. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1)
  257. end
  258. else
  259. if hreg1<>R_EAX then
  260. Begin
  261. ungetregister32(hreg1);
  262. hreg1 := getexplicitregister32(R_EAX);
  263. { I don't think it's possible that now hreg1 <> R_EAX
  264. since popeax is false, but for all certainty I do
  265. support that situation (JM)}
  266. if hreg1 <> R_EAX then
  267. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1);
  268. end;
  269. end
  270. else
  271. {if we did the mod by an "and", the result is in hreg1 and
  272. EDX certainly hasn't been pushed (JM)}
  273. if not(andmod) Then
  274. if popedx then
  275. {the mod was done by an (i)div (so the result is now in
  276. edx), but edx was occupied prior to the division, so
  277. move the result into a safe place (JM)}
  278. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1)
  279. else
  280. Begin
  281. {Get rid of the unnecessary hreg1 if possible (same as with
  282. EAX in divn) (JM)}
  283. ungetregister32(hreg1);
  284. hreg1 := getexplicitregister32(R_EDX);
  285. if hreg1 <> R_EDX then
  286. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1);;
  287. End;
  288. if popeax then
  289. emit_reg(A_POP,S_L,R_EAX);
  290. if popedx then
  291. emit_reg(A_POP,S_L,R_EDX);
  292. end;
  293. If not(andmod or shrdiv) then
  294. {andmod and shrdiv only use hreg1 (which is already in usedinproc,
  295. since it was acquired with getregister), the others also use both
  296. EAX and EDX (JM)}
  297. Begin
  298. usedinproc:=usedinproc or ($80 shr byte(R_EAX));
  299. usedinproc:=usedinproc or ($80 shr byte(R_EDX));
  300. End;
  301. clear_location(p^.location);
  302. p^.location.loc:=LOC_REGISTER;
  303. p^.location.register:=hreg1;
  304. end;
  305. end;
  306. {*****************************************************************************
  307. SecondShlShr
  308. *****************************************************************************}
  309. procedure secondshlshr(var p : ptree);
  310. var
  311. hregister1,hregister2,hregister3,
  312. hregisterhigh,hregisterlow : tregister;
  313. pushed,popecx : boolean;
  314. op : tasmop;
  315. hr : preference;
  316. l1,l2,l3 : pasmlabel;
  317. begin
  318. popecx:=false;
  319. secondpass(p^.left);
  320. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  321. secondpass(p^.right);
  322. if pushed then
  323. restore(p^.left,is_64bitint(p^.left^.resulttype));
  324. if is_64bitint(p^.left^.resulttype) then
  325. begin
  326. { load left operator in a register }
  327. if p^.left^.location.loc<>LOC_REGISTER then
  328. begin
  329. if p^.left^.location.loc=LOC_CREGISTER then
  330. begin
  331. hregisterlow:=getregister32;
  332. hregisterhigh:=getregister32;
  333. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,
  334. hregisterlow);
  335. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,
  336. hregisterlow);
  337. end
  338. else
  339. begin
  340. del_reference(p^.left^.location.reference);
  341. hregisterlow:=getregister32;
  342. hregisterhigh:=getregister32;
  343. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  344. hregisterlow);
  345. hr:=newreference(p^.left^.location.reference);
  346. inc(hr^.offset,4);
  347. emit_ref_reg(A_MOV,S_L,hr,
  348. hregisterhigh);
  349. end;
  350. end
  351. else
  352. begin
  353. hregisterlow:=p^.left^.location.registerlow;
  354. hregisterhigh:=p^.left^.location.registerhigh;
  355. end;
  356. { shifting by a constant directly coded: }
  357. if (p^.right^.treetype=ordconstn) then
  358. begin
  359. { shrd/shl works only for values <=31 !! }
  360. if p^.right^.value>31 then
  361. begin
  362. if p^.treetype=shln then
  363. begin
  364. emit_reg_reg(A_XOR,S_L,hregisterhigh,
  365. hregisterhigh);
  366. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  367. hregisterlow);
  368. end
  369. else
  370. begin
  371. emit_reg_reg(A_XOR,S_L,hregisterlow,
  372. hregisterlow);
  373. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  374. hregisterhigh);
  375. end;
  376. p^.location.registerhigh:=hregisterlow;
  377. p^.location.registerlow:=hregisterhigh;
  378. end
  379. else
  380. begin
  381. if p^.treetype=shln then
  382. begin
  383. emit_const_reg_reg(A_SHLD,S_L,p^.right^.value and 31,
  384. hregisterlow,hregisterhigh);
  385. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  386. hregisterlow);
  387. end
  388. else
  389. begin
  390. emit_const_reg_reg(A_SHRD,S_L,p^.right^.value and 31,
  391. hregisterhigh,hregisterlow);
  392. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  393. hregisterhigh);
  394. end;
  395. p^.location.registerlow:=hregisterlow;
  396. p^.location.registerhigh:=hregisterhigh;
  397. end;
  398. p^.location.loc:=LOC_REGISTER;
  399. end
  400. else
  401. begin
  402. { load right operators in a register }
  403. if p^.right^.location.loc<>LOC_REGISTER then
  404. begin
  405. if p^.right^.location.loc=LOC_CREGISTER then
  406. begin
  407. hregister2:=getexplicitregister32(R_ECX);
  408. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  409. hregister2);
  410. end
  411. else
  412. begin
  413. del_reference(p^.right^.location.reference);
  414. hregister2:=getexplicitregister32(R_ECX);
  415. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  416. hregister2);
  417. end;
  418. end
  419. else
  420. hregister2:=p^.right^.location.register;
  421. { left operator is already in a register }
  422. { hence are both in a register }
  423. { is it in the case ECX ? }
  424. if (hregisterlow=R_ECX) then
  425. begin
  426. { then only swap }
  427. emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
  428. hregister3:=hregisterlow;
  429. hregisterlow:=hregister2;
  430. hregister2:=hregister3;
  431. end
  432. else if (hregisterhigh=R_ECX) then
  433. begin
  434. { then only swap }
  435. emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
  436. hregister3:=hregisterhigh;
  437. hregisterhigh:=hregister2;
  438. hregister2:=hregister3;
  439. end
  440. { if second operator not in ECX ? }
  441. else if (hregister2<>R_ECX) then
  442. begin
  443. { ECX occupied then push it }
  444. if not (R_ECX in unused) then
  445. begin
  446. popecx:=true;
  447. emit_reg(A_PUSH,S_L,R_ECX);
  448. end;
  449. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  450. end;
  451. ungetregister32(hregister2);
  452. { the damned shift instructions work only til a count of 32 }
  453. { so we've to do some tricks here }
  454. if p^.treetype=shln then
  455. begin
  456. getlabel(l1);
  457. getlabel(l2);
  458. getlabel(l3);
  459. emit_const_reg(A_CMP,S_L,64,R_ECX);
  460. emitjmp(C_L,l1);
  461. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  462. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  463. emitjmp(C_None,l3);
  464. emitlab(l1);
  465. emit_const_reg(A_CMP,S_L,32,R_ECX);
  466. emitjmp(C_L,l2);
  467. emit_const_reg(A_SUB,S_L,32,R_ECX);
  468. emit_reg_reg(A_SHL,S_L,R_CL,
  469. hregisterlow);
  470. emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
  471. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  472. emitjmp(C_None,l3);
  473. emitlab(l2);
  474. emit_reg_reg_reg(A_SHLD,S_L,R_CL,
  475. hregisterlow,hregisterhigh);
  476. emit_reg_reg(A_SHL,S_L,R_CL,
  477. hregisterlow);
  478. emitlab(l3);
  479. end
  480. else
  481. begin
  482. getlabel(l1);
  483. getlabel(l2);
  484. getlabel(l3);
  485. emit_const_reg(A_CMP,S_L,64,R_ECX);
  486. emitjmp(C_L,l1);
  487. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  488. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  489. emitjmp(C_None,l3);
  490. emitlab(l1);
  491. emit_const_reg(A_CMP,S_L,32,R_ECX);
  492. emitjmp(C_L,l2);
  493. emit_const_reg(A_SUB,S_L,32,R_ECX);
  494. emit_reg_reg(A_SHR,S_L,R_CL,
  495. hregisterhigh);
  496. emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
  497. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  498. emitjmp(C_None,l3);
  499. emitlab(l2);
  500. emit_reg_reg_reg(A_SHRD,S_L,R_CL,
  501. hregisterhigh,hregisterlow);
  502. emit_reg_reg(A_SHR,S_L,R_CL,
  503. hregisterhigh);
  504. emitlab(l3);
  505. end;
  506. { maybe put ECX back }
  507. if popecx then
  508. emit_reg(A_POP,S_L,R_ECX);
  509. p^.location.registerlow:=hregisterlow;
  510. p^.location.registerhigh:=hregisterhigh;
  511. end;
  512. end
  513. else
  514. begin
  515. { load left operators in a register }
  516. if p^.left^.location.loc<>LOC_REGISTER then
  517. begin
  518. if p^.left^.location.loc=LOC_CREGISTER then
  519. begin
  520. hregister1:=getregister32;
  521. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,
  522. hregister1);
  523. end
  524. else
  525. begin
  526. del_reference(p^.left^.location.reference);
  527. hregister1:=getregister32;
  528. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  529. hregister1);
  530. end;
  531. end
  532. else
  533. hregister1:=p^.left^.location.register;
  534. { determine operator }
  535. if p^.treetype=shln then
  536. op:=A_SHL
  537. else
  538. op:=A_SHR;
  539. { shifting by a constant directly coded: }
  540. if (p^.right^.treetype=ordconstn) then
  541. begin
  542. { l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
  543. if p^.right^.value<=31 then
  544. }
  545. emit_const_reg(op,S_L,p^.right^.value and 31,
  546. hregister1);
  547. {
  548. else
  549. emit_reg_reg(A_XOR,S_L,hregister1,
  550. hregister1);
  551. }
  552. p^.location.loc:=LOC_REGISTER;
  553. p^.location.register:=hregister1;
  554. end
  555. else
  556. begin
  557. { load right operators in a register }
  558. if p^.right^.location.loc<>LOC_REGISTER then
  559. begin
  560. if p^.right^.location.loc=LOC_CREGISTER then
  561. begin
  562. hregister2:=getexplicitregister32(R_ECX);
  563. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  564. hregister2);
  565. end
  566. else
  567. begin
  568. del_reference(p^.right^.location.reference);
  569. hregister2:=getexplicitregister32(R_ECX);
  570. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  571. hregister2);
  572. end;
  573. end
  574. else
  575. hregister2:=p^.right^.location.register;
  576. { left operator is already in a register }
  577. { hence are both in a register }
  578. { is it in the case ECX ? }
  579. if (hregister1=R_ECX) then
  580. begin
  581. { then only swap }
  582. emit_reg_reg(A_XCHG,S_L,hregister1,hregister2);
  583. hregister3:=hregister1;
  584. hregister1:=hregister2;
  585. hregister2:=hregister3;
  586. end
  587. { if second operator not in ECX ? }
  588. else if (hregister2<>R_ECX) then
  589. begin
  590. { ECX occupied then push it }
  591. if not (R_ECX in unused) then
  592. begin
  593. popecx:=true;
  594. emit_reg(A_PUSH,S_L,R_ECX);
  595. end;
  596. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  597. end;
  598. ungetregister32(hregister2);
  599. { right operand is in ECX }
  600. emit_reg_reg(op,S_L,R_CL,hregister1);
  601. { maybe ECX back }
  602. if popecx then
  603. emit_reg(A_POP,S_L,R_ECX);
  604. p^.location.register:=hregister1;
  605. end;
  606. end;
  607. end;
  608. {*****************************************************************************
  609. SecondUnaryMinus
  610. *****************************************************************************}
  611. procedure secondunaryminus(var p : ptree);
  612. {$ifdef SUPPORT_MMX}
  613. procedure do_mmx_neg;
  614. var
  615. op : tasmop;
  616. begin
  617. p^.location.loc:=LOC_MMXREGISTER;
  618. if cs_mmx_saturation in aktlocalswitches then
  619. case mmx_type(p^.resulttype) of
  620. mmxs8bit:
  621. op:=A_PSUBSB;
  622. mmxu8bit:
  623. op:=A_PSUBUSB;
  624. mmxs16bit,mmxfixed16:
  625. op:=A_PSUBSW;
  626. mmxu16bit:
  627. op:=A_PSUBUSW;
  628. end
  629. else
  630. case mmx_type(p^.resulttype) of
  631. mmxs8bit,mmxu8bit:
  632. op:=A_PSUBB;
  633. mmxs16bit,mmxu16bit,mmxfixed16:
  634. op:=A_PSUBW;
  635. mmxs32bit,mmxu32bit:
  636. op:=A_PSUBD;
  637. end;
  638. emit_reg_reg(op,S_NO,p^.location.register,R_MM7);
  639. emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register);
  640. end;
  641. {$endif}
  642. var
  643. hr : preference;
  644. begin
  645. if is_64bitint(p^.left^.resulttype) then
  646. begin
  647. secondpass(p^.left);
  648. clear_location(p^.location);
  649. p^.location.loc:=LOC_REGISTER;
  650. case p^.left^.location.loc of
  651. LOC_REGISTER :
  652. begin
  653. p^.location.registerlow:=p^.left^.location.registerlow;
  654. p^.location.registerhigh:=p^.left^.location.registerhigh;
  655. end;
  656. LOC_CREGISTER :
  657. begin
  658. p^.location.registerlow:=getregister32;
  659. p^.location.registerhigh:=getregister32;
  660. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  661. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  662. end;
  663. LOC_REFERENCE,LOC_MEM :
  664. begin
  665. del_reference(p^.left^.location.reference);
  666. p^.location.registerlow:=getregister32;
  667. p^.location.registerhigh:=getregister32;
  668. emit_ref_reg(A_MOV,S_L,
  669. newreference(p^.left^.location.reference),p^.location.registerlow);
  670. hr:=newreference(p^.left^.location.reference);
  671. inc(hr^.offset,4);
  672. emit_ref_reg(A_MOV,S_L,
  673. hr,p^.location.registerhigh);
  674. end;
  675. end;
  676. emit_reg(A_NEG,S_L,p^.location.registerlow);
  677. emit_const_reg(A_ADC,S_L,0,p^.location.registerhigh);
  678. emit_reg(A_NEG,S_L,p^.location.registerhigh);
  679. end
  680. else
  681. begin
  682. secondpass(p^.left);
  683. p^.location.loc:=LOC_REGISTER;
  684. case p^.left^.location.loc of
  685. LOC_REGISTER:
  686. begin
  687. p^.location.register:=p^.left^.location.register;
  688. emit_reg(A_NEG,S_L,p^.location.register);
  689. end;
  690. LOC_CREGISTER:
  691. begin
  692. p^.location.register:=getregister32;
  693. emit_reg_reg(A_MOV,S_L,p^.location.register,
  694. p^.location.register);
  695. emit_reg(A_NEG,S_L,p^.location.register);
  696. end;
  697. {$ifdef SUPPORT_MMX}
  698. LOC_MMXREGISTER:
  699. begin
  700. set_location(p^.location,p^.left^.location);
  701. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  702. do_mmx_neg;
  703. end;
  704. LOC_CMMXREGISTER:
  705. begin
  706. p^.location.register:=getregistermmx;
  707. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  708. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,
  709. p^.location.register);
  710. do_mmx_neg;
  711. end;
  712. {$endif SUPPORT_MMX}
  713. LOC_REFERENCE,LOC_MEM:
  714. begin
  715. del_reference(p^.left^.location.reference);
  716. if (p^.left^.resulttype^.deftype=floatdef) and
  717. (pfloatdef(p^.left^.resulttype)^.typ<>f32bit) then
  718. begin
  719. p^.location.loc:=LOC_FPU;
  720. floatload(pfloatdef(p^.left^.resulttype)^.typ,
  721. p^.left^.location.reference);
  722. emit_none(A_FCHS,S_NO);
  723. end
  724. {$ifdef SUPPORT_MMX}
  725. else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  726. begin
  727. p^.location.register:=getregistermmx;
  728. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  729. emit_ref_reg(A_MOVQ,S_NO,
  730. newreference(p^.left^.location.reference),
  731. p^.location.register);
  732. do_mmx_neg;
  733. end
  734. {$endif SUPPORT_MMX}
  735. else
  736. begin
  737. p^.location.register:=getregister32;
  738. emit_ref_reg(A_MOV,S_L,
  739. newreference(p^.left^.location.reference),
  740. p^.location.register);
  741. emit_reg(A_NEG,S_L,p^.location.register);
  742. end;
  743. end;
  744. LOC_FPU:
  745. begin
  746. p^.location.loc:=LOC_FPU;
  747. emit_none(A_FCHS,S_NO);
  748. end;
  749. LOC_CFPUREGISTER:
  750. begin
  751. emit_reg(A_FLD,S_NO,
  752. correct_fpuregister(p^.left^.location.register,fpuvaroffset));
  753. inc(fpuvaroffset);
  754. p^.location.loc:=LOC_FPU;
  755. emit_none(A_FCHS,S_NO);
  756. end;
  757. end;
  758. end;
  759. { Here was a problem... }
  760. { Operand to be negated always }
  761. { seems to be converted to signed }
  762. { 32-bit before doing neg!! }
  763. { So this is useless... }
  764. { that's not true: -2^31 gives an overflow error if it is negaded (FK) }
  765. { emitoverflowcheck(p);}
  766. end;
  767. {*****************************************************************************
  768. SecondNot
  769. *****************************************************************************}
  770. procedure secondnot(var p : ptree);
  771. const
  772. flagsinvers : array[F_E..F_BE] of tresflags =
  773. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
  774. F_A,F_AE,F_B,F_BE);
  775. var
  776. hl : pasmlabel;
  777. opsize : topsize;
  778. hr : preference;
  779. begin
  780. if is_boolean(p^.resulttype) then
  781. begin
  782. opsize:=def_opsize(p^.resulttype);
  783. case p^.left^.location.loc of
  784. LOC_JUMP :
  785. begin
  786. hl:=truelabel;
  787. truelabel:=falselabel;
  788. falselabel:=hl;
  789. secondpass(p^.left);
  790. maketojumpbool(p^.left);
  791. hl:=truelabel;
  792. truelabel:=falselabel;
  793. falselabel:=hl;
  794. end;
  795. LOC_FLAGS :
  796. begin
  797. secondpass(p^.left);
  798. p^.location.resflags:=flagsinvers[p^.left^.location.resflags];
  799. end;
  800. LOC_REGISTER :
  801. begin
  802. secondpass(p^.left);
  803. {p^.location.register:=p^.left^.location.register;
  804. emit_const_reg(A_XOR,opsize,1,p^.location.register);}
  805. p^.location.loc:=LOC_FLAGS;
  806. p^.location.resflags:=F_E;
  807. emit_reg_reg(A_TEST,opsize,
  808. p^.left^.location.register,p^.left^.location.register);
  809. ungetregister(p^.left^.location.register);
  810. end;
  811. LOC_CREGISTER :
  812. begin
  813. secondpass(p^.left);
  814. clear_location(p^.location);
  815. p^.location.loc:=LOC_REGISTER;
  816. p^.location.register:=def_getreg(p^.resulttype);
  817. emit_reg_reg(A_MOV,opsize,p^.left^.location.register,p^.location.register);
  818. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  819. ungetregister(p^.location.register);
  820. p^.location.loc:=LOC_FLAGS;
  821. p^.location.resflags:=F_E;
  822. end;
  823. LOC_REFERENCE,
  824. LOC_MEM :
  825. begin
  826. secondpass(p^.left);
  827. clear_location(p^.location);
  828. p^.location.loc:=LOC_REGISTER;
  829. del_reference(p^.left^.location.reference);
  830. { this was placed before del_ref => internaalerror(10) }
  831. p^.location.register:=def_getreg(p^.resulttype);
  832. emit_ref_reg(A_MOV,opsize,
  833. newreference(p^.left^.location.reference),p^.location.register);
  834. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  835. ungetregister(p^.location.register);
  836. p^.location.loc:=LOC_FLAGS;
  837. p^.location.resflags:=F_E;
  838. end;
  839. end;
  840. end
  841. {$ifdef SUPPORT_MMX}
  842. else
  843. if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  844. begin
  845. secondpass(p^.left);
  846. p^.location.loc:=LOC_MMXREGISTER;
  847. { prepare EDI }
  848. {$ifndef noAllocEdi}
  849. getexplicitregister32(R_EDI);
  850. {$endif noAllocEdi}
  851. emit_const_reg(A_MOV,S_L,$ffffffff,R_EDI);
  852. { load operand }
  853. case p^.left^.location.loc of
  854. LOC_MMXREGISTER:
  855. set_location(p^.location,p^.left^.location);
  856. LOC_CMMXREGISTER:
  857. begin
  858. p^.location.register:=getregistermmx;
  859. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,p^.location.register);
  860. end;
  861. LOC_REFERENCE,LOC_MEM:
  862. begin
  863. del_reference(p^.left^.location.reference);
  864. p^.location.register:=getregistermmx;
  865. emit_ref_reg(A_MOVQ,S_NO,
  866. newreference(p^.left^.location.reference),p^.location.register);
  867. end;
  868. end;
  869. { load mask }
  870. emit_reg_reg(A_MOVD,S_NO,R_EDI,R_MM7);
  871. {$ifndef noAllocEdi}
  872. ungetregister32(R_EDI);
  873. {$endif noAllocEdi}
  874. { lower 32 bit }
  875. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  876. { shift mask }
  877. emit_const_reg(A_PSLLQ,S_NO,32,R_MM7);
  878. { higher 32 bit }
  879. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  880. end
  881. {$endif SUPPORT_MMX}
  882. else if is_64bitint(p^.left^.resulttype) then
  883. begin
  884. secondpass(p^.left);
  885. clear_location(p^.location);
  886. p^.location.loc:=LOC_REGISTER;
  887. case p^.left^.location.loc of
  888. LOC_REGISTER :
  889. begin
  890. p^.location.registerlow:=p^.left^.location.registerlow;
  891. p^.location.registerhigh:=p^.left^.location.registerhigh;
  892. emit_reg(A_NOT,S_L,p^.location.registerlow);
  893. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  894. end;
  895. LOC_CREGISTER :
  896. begin
  897. p^.location.registerlow:=getregister32;
  898. p^.location.registerhigh:=getregister32;
  899. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  900. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  901. emit_reg(A_NOT,S_L,p^.location.registerlow);
  902. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  903. end;
  904. LOC_REFERENCE,LOC_MEM :
  905. begin
  906. del_reference(p^.left^.location.reference);
  907. p^.location.registerlow:=getregister32;
  908. p^.location.registerhigh:=getregister32;
  909. emit_ref_reg(A_MOV,S_L,
  910. newreference(p^.left^.location.reference),p^.location.registerlow);
  911. hr:=newreference(p^.left^.location.reference);
  912. inc(hr^.offset,4);
  913. emit_ref_reg(A_MOV,S_L,
  914. hr,p^.location.registerhigh);
  915. emit_reg(A_NOT,S_L,p^.location.registerlow);
  916. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  917. end;
  918. end;
  919. end
  920. else
  921. begin
  922. secondpass(p^.left);
  923. clear_location(p^.location);
  924. p^.location.loc:=LOC_REGISTER;
  925. case p^.left^.location.loc of
  926. LOC_REGISTER :
  927. begin
  928. p^.location.register:=p^.left^.location.register;
  929. emit_reg(A_NOT,S_L,p^.location.register);
  930. end;
  931. LOC_CREGISTER :
  932. begin
  933. p^.location.register:=getregister32;
  934. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,p^.location.register);
  935. emit_reg(A_NOT,S_L,p^.location.register);
  936. end;
  937. LOC_REFERENCE,LOC_MEM :
  938. begin
  939. del_reference(p^.left^.location.reference);
  940. p^.location.register:=getregister32;
  941. emit_ref_reg(A_MOV,S_L,
  942. newreference(p^.left^.location.reference),p^.location.register);
  943. emit_reg(A_NOT,S_L,p^.location.register);
  944. end;
  945. end;
  946. end;
  947. end;
  948. end.
  949. {
  950. $Log$
  951. Revision 1.40 2000-01-09 12:35:01 jonas
  952. * changed edi allocation to use getexplicitregister32/ungetregister
  953. (adapted tgeni386 a bit for this) and enabled it by default
  954. * fixed very big and stupid bug of mine in cg386mat that broke the
  955. include() code (and make cycle :( ) if you compiled without
  956. -dnewoptimizations
  957. Revision 1.39 2000/01/09 01:44:20 jonas
  958. + (de)allocation info for EDI to fix reported bug on mailinglist.
  959. Also some (de)allocation info for ESI added. Between -dallocEDI
  960. because at this time of the night bugs could easily slip in ;)
  961. Revision 1.38 2000/01/07 01:14:21 peter
  962. * updated copyright to 2000
  963. Revision 1.37 2000/01/07 00:12:10 peter
  964. * fixed movd isntruction to be A_MOVD instead of A_MOV S_D
  965. Revision 1.36 1999/11/18 15:34:44 pierre
  966. * Notes/Hints for local syms changed to
  967. Set_varstate function
  968. Revision 1.35 1999/11/06 14:34:18 peter
  969. * truncated log to 20 revs
  970. Revision 1.34 1999/09/28 19:43:47 florian
  971. * the maybe_push fix of Pierre wasn't 100%, the tree parameter
  972. must contain a valid location (which is saved if necessary)
  973. Revision 1.33 1999/09/27 23:37:26 peter
  974. * fixed push/restore bug in div/mod
  975. Revision 1.32 1999/09/02 17:07:38 florian
  976. * problems with -Or fixed: tdef.isfpuregable was wrong!
  977. Revision 1.31 1999/08/19 13:08:50 pierre
  978. * emit_??? used
  979. Revision 1.30 1999/08/04 13:45:23 florian
  980. + floating point register variables !!
  981. * pairegalloc is now generated for register variables
  982. Revision 1.29 1999/08/04 00:22:51 florian
  983. * renamed i386asm and i386base to cpuasm and cpubase
  984. Revision 1.28 1999/08/03 22:02:45 peter
  985. * moved bitmask constants to sets
  986. * some other type/const renamings
  987. Revision 1.27 1999/06/28 22:29:14 florian
  988. * qword division fixed
  989. + code for qword/int64 type casting added:
  990. range checking isn't implemented yet
  991. Revision 1.26 1999/06/02 10:11:44 florian
  992. * make cycle fixed i.e. compilation with 0.99.10
  993. * some fixes for qword
  994. * start of register calling conventions
  995. Revision 1.25 1999/05/27 19:44:16 peter
  996. * removed oldasm
  997. * plabel -> pasmlabel
  998. * -a switches to source writing automaticly
  999. * assembler readers OOPed
  1000. * asmsymbol automaticly external
  1001. * jumptables and other label fixes for asm readers
  1002. Revision 1.24 1999/05/25 20:36:13 florian
  1003. * some bugs in the qword code generation fixed
  1004. Revision 1.23 1999/05/08 20:41:08 jonas
  1005. + positive number MOD power of 2 now done with AND instruction
  1006. * fix to division of positive numbers by power of 2
  1007. * the result of a MOD is left in EDX if possible
  1008. Revision 1.22 1999/05/01 13:24:11 peter
  1009. * merged nasm compiler
  1010. * old asm moved to oldasm/
  1011. Revision 1.21 1999/04/16 13:42:27 jonas
  1012. * more regalloc fixes (still not complete)
  1013. Revision 1.20 1999/02/22 02:15:13 peter
  1014. * updates for ag386bin
  1015. Revision 1.19 1999/02/04 10:49:40 florian
  1016. + range checking for ansi- and widestrings
  1017. * made it compilable with TP
  1018. Revision 1.18 1999/02/03 10:11:12 pierre
  1019. * fix for bug0211 for i386
  1020. Revision 1.17 1999/01/21 22:10:41 peter
  1021. * fixed array of const
  1022. * generic platform independent high() support
  1023. Revision 1.16 1999/01/19 10:51:32 pierre
  1024. * fix to bug0183 in secondnot
  1025. Revision 1.15 1998/12/11 16:50:22 florian
  1026. + typed const int64 and qword
  1027. + unary minus-operator q1:=-q2;
  1028. + not-operator
  1029. }