ncgmem.pas 49 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpuinfo,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgwithnode = class(twithnode)
  45. procedure pass_generate_code;override;
  46. end;
  47. tcgvecnode = class(tvecnode)
  48. function get_mul_size : aint;
  49. private
  50. procedure rangecheck_array;
  51. procedure rangecheck_string;
  52. protected
  53. {# This routine is used to calculate the address of the reference.
  54. On entry reg contains the index in the array,
  55. and l contains the size of each element in the array.
  56. This routine should update location.reference correctly,
  57. so it points to the correct address.
  58. }
  59. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  60. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  61. procedure update_reference_offset(var ref: treference; index, mulsize: aint); virtual;
  62. procedure second_wideansistring;virtual;
  63. procedure second_dynamicarray;virtual;
  64. function valid_index_size(size: tcgsize): boolean;virtual;
  65. public
  66. procedure pass_generate_code;override;
  67. end;
  68. implementation
  69. uses
  70. systems,
  71. cutils,cclasses,verbose,globals,constexp,
  72. symconst,symbase,symdef,symsym,symcpu,symtable,defutil,paramgr,
  73. aasmbase,aasmtai,aasmdata,
  74. procinfo,pass_2,parabase,
  75. pass_1,nld,ncon,nadd,ncnv,nutils,
  76. cgobj,hlcgobj,
  77. tgobj,ncgutil,objcgutl,
  78. defcmp
  79. ;
  80. {*****************************************************************************
  81. TCGLOADVMTADDRNODE
  82. *****************************************************************************}
  83. procedure tcgloadvmtaddrnode.pass_generate_code;
  84. var
  85. href : treference;
  86. pool : THashSet;
  87. entry : PHashSetItem;
  88. begin
  89. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  90. if (left.nodetype=typen) then
  91. begin
  92. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  93. if not is_objcclass(left.resultdef) then
  94. begin
  95. reference_reset_symbol(href,
  96. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  97. voidpointertype.size);
  98. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  99. end
  100. else
  101. begin
  102. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  103. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  104. if (target_info.system in systems_objc_nfabi) then
  105. begin
  106. { find/add necessary classref/classname pool entries }
  107. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  108. end
  109. else
  110. begin
  111. { find/add necessary classref/classname pool entries }
  112. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  113. end;
  114. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  115. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  116. end;
  117. end
  118. else
  119. begin
  120. { left contains self, load vmt from self }
  121. secondpass(left);
  122. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  123. end;
  124. end;
  125. {*****************************************************************************
  126. TCGLOADPARENTFPNODE
  127. *****************************************************************************}
  128. procedure tcgloadparentfpnode.pass_generate_code;
  129. var
  130. currpi : tprocinfo;
  131. hsym : tparavarsym;
  132. href : treference;
  133. begin
  134. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  135. begin
  136. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  137. location.register:=current_procinfo.framepointer;
  138. end
  139. else
  140. begin
  141. currpi:=current_procinfo;
  142. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  143. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  144. { load framepointer of current proc }
  145. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  146. if not assigned(hsym) then
  147. internalerror(200309281);
  148. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  149. { walk parents }
  150. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  151. begin
  152. currpi:=currpi.parent;
  153. if not assigned(currpi) then
  154. internalerror(200311201);
  155. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  156. if not assigned(hsym) then
  157. internalerror(200309282);
  158. if hsym.localloc.loc<>LOC_REFERENCE then
  159. internalerror(200309283);
  160. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  161. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  162. end;
  163. end;
  164. end;
  165. {*****************************************************************************
  166. TCGADDRNODE
  167. *****************************************************************************}
  168. procedure tcgaddrnode.pass_generate_code;
  169. begin
  170. secondpass(left);
  171. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  172. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  173. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  174. { on x86_64-win64, array of chars can be returned in registers, however,
  175. when passing these arrays to other functions, the compiler wants to take
  176. the address of the array so when the addrnode has been created internally,
  177. we have to force the data into memory, see also tw14388.pp
  178. }
  179. if nf_internal in flags then
  180. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  181. else
  182. internalerror(2006111510);
  183. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  184. end;
  185. {*****************************************************************************
  186. TCGDEREFNODE
  187. *****************************************************************************}
  188. procedure tcgderefnode.pass_generate_code;
  189. var
  190. paraloc1 : tcgpara;
  191. pd : tprocdef;
  192. sym : tsym;
  193. st : tsymtable;
  194. hp : pnode;
  195. hp2 : tnode;
  196. extraoffset : tcgint;
  197. begin
  198. sym:=nil;
  199. { assume natural alignment, except for packed records }
  200. if not(resultdef.typ in [recorddef,objectdef]) or
  201. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  202. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  203. else
  204. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  205. { can we fold an add/sub node into the offset of the deref node? }
  206. extraoffset:=0;
  207. hp:=actualtargetnode(@left);
  208. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  209. begin
  210. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  211. replacenode(hp^,taddnode(hp^).left);
  212. end
  213. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  214. begin
  215. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  216. replacenode(hp^,taddnode(hp^).left);
  217. end
  218. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  219. begin
  220. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  221. replacenode(hp^,taddnode(hp^).right);
  222. end;
  223. secondpass(left);
  224. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  225. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  226. case left.location.loc of
  227. LOC_CREGISTER,
  228. LOC_REGISTER:
  229. begin
  230. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  231. {$ifdef cpu_uses_separate_address_registers}
  232. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  233. begin
  234. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  235. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  236. location.reference.base);
  237. end
  238. else
  239. {$endif}
  240. location.reference.base := left.location.register;
  241. end;
  242. LOC_CREFERENCE,
  243. LOC_REFERENCE:
  244. begin
  245. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  246. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  247. end;
  248. LOC_CONSTANT:
  249. begin
  250. location.reference.offset:=left.location.value;
  251. end;
  252. else
  253. internalerror(200507031);
  254. end;
  255. location.reference.offset:=location.reference.offset+extraoffset;
  256. if (cs_use_heaptrc in current_settings.globalswitches) and
  257. (cs_checkpointer in current_settings.localswitches) and
  258. not(cs_compilesystem in current_settings.moduleswitches) and
  259. {$ifdef x86}
  260. (tcpupointerdef(left.resultdef).x86pointertyp = tcpupointerdefclass(cpointerdef).default_x86_data_pointer_type) and
  261. {$endif x86}
  262. not(nf_no_checkpointer in flags) and
  263. { can be NR_NO in case of LOC_CONSTANT }
  264. (location.reference.base<>NR_NO) then
  265. begin
  266. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  267. (sym.typ<>procsym) then
  268. internalerror(2012010601);
  269. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  270. paraloc1.init;
  271. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  272. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  273. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  274. paraloc1.done;
  275. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  276. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  277. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  278. end;
  279. end;
  280. {*****************************************************************************
  281. TCGSUBSCRIPTNODE
  282. *****************************************************************************}
  283. function tcgsubscriptnode.handle_platform_subscript: boolean;
  284. begin
  285. result:=false;
  286. end;
  287. procedure tcgsubscriptnode.pass_generate_code;
  288. var
  289. asmsym: tasmsymbol;
  290. paraloc1 : tcgpara;
  291. tmpref: treference;
  292. sref: tsubsetreference;
  293. offsetcorrection : aint;
  294. pd : tprocdef;
  295. sym : tsym;
  296. st : tsymtable;
  297. begin
  298. sym:=nil;
  299. secondpass(left);
  300. if codegenerror then
  301. exit;
  302. paraloc1.init;
  303. { several object types must be dereferenced implicitly }
  304. if is_implicit_pointer_object_type(left.resultdef) then
  305. begin
  306. if (not is_managed_type(left.resultdef)) or
  307. (target_info.system in systems_garbage_collected_managed_types) then
  308. begin
  309. { the contents of a class are aligned to a sizeof(pointer) }
  310. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  311. case left.location.loc of
  312. LOC_CREGISTER,
  313. LOC_REGISTER:
  314. begin
  315. {$ifdef cpu_uses_separate_address_registers}
  316. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  317. begin
  318. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  319. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  320. left.location.register,location.reference.base);
  321. end
  322. else
  323. {$endif}
  324. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  325. end;
  326. LOC_CREFERENCE,
  327. LOC_REFERENCE,
  328. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  329. LOC_SUBSETREG,
  330. LOC_CSUBSETREG,
  331. LOC_SUBSETREF,
  332. LOC_CSUBSETREF:
  333. begin
  334. hlcg.reference_reset_base(location.reference,left.resultdef,
  335. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  336. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  337. end;
  338. LOC_CONSTANT:
  339. begin
  340. { can happen with @classtype(pointerconst).field }
  341. location.reference.offset:=left.location.value;
  342. end;
  343. else
  344. internalerror(2009092401);
  345. end;
  346. { implicit deferencing }
  347. if (cs_use_heaptrc in current_settings.globalswitches) and
  348. (cs_checkpointer in current_settings.localswitches) and
  349. not(cs_compilesystem in current_settings.moduleswitches) then
  350. begin
  351. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  352. (sym.typ<>procsym) then
  353. internalerror(2012010602);
  354. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  355. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  356. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  357. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  358. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  359. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  360. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  361. end;
  362. end
  363. else
  364. { reference-counted implicit pointer object types don't have
  365. fields -> cannot be subscripted (calls are handled via call
  366. nodes) }
  367. internalerror(2011011901);
  368. end
  369. else
  370. begin
  371. location_copy(location,left.location);
  372. { some abi's require that functions return (some) records in }
  373. { registers }
  374. case location.loc of
  375. LOC_REFERENCE,
  376. LOC_CREFERENCE:
  377. ;
  378. LOC_CONSTANT,
  379. LOC_REGISTER,
  380. LOC_CREGISTER,
  381. { if a floating point value is casted into a record, it
  382. can happen that we get here an fpu or mm register }
  383. LOC_MMREGISTER,
  384. LOC_FPUREGISTER,
  385. LOC_CMMREGISTER,
  386. LOC_CFPUREGISTER:
  387. begin
  388. { in case the result is not something that can be put
  389. into an integer register (e.g.
  390. function_returning_record().non_regable_field, or
  391. a function returning a value > sizeof(intreg))
  392. -> force to memory
  393. }
  394. if not tstoreddef(left.resultdef).is_intregable or
  395. not tstoreddef(resultdef).is_intregable or
  396. { if the field spans multiple registers, we must force the record into
  397. memory as well }
  398. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  399. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  400. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  401. { actually, we should be able to "subscript" a constant, but this would require some code
  402. which enables dumping and reading constants from a temporary memory buffer. This
  403. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  404. }
  405. LOC_CONSTANT]) then
  406. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  407. else
  408. begin
  409. if (left.location.loc = LOC_REGISTER) then
  410. location.loc := LOC_SUBSETREG
  411. else
  412. location.loc := LOC_CSUBSETREG;
  413. location.size:=def_cgsize(resultdef);
  414. offsetcorrection:=0;
  415. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  416. begin
  417. if (vs.fieldoffset>=sizeof(aword)) xor (target_info.endian=endian_big) then
  418. location.sreg.subsetreg := left.location.registerhi
  419. else
  420. location.sreg.subsetreg := left.location.register;
  421. if (vs.fieldoffset>=sizeof(aword)) then
  422. offsetcorrection:=sizeof(aword)*8;
  423. location.sreg.subsetregsize := OS_INT;
  424. end
  425. else
  426. begin
  427. location.sreg.subsetreg := left.location.register;
  428. location.sreg.subsetregsize := left.location.size;
  429. end;
  430. if not is_packed_record_or_object(left.resultdef) then
  431. begin
  432. if (target_info.endian = ENDIAN_BIG) then
  433. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  434. else
  435. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  436. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  437. end
  438. else
  439. begin
  440. location.sreg.bitlen := resultdef.packedbitsize;
  441. if (target_info.endian = ENDIAN_BIG) then
  442. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  443. else
  444. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  445. end;
  446. end;
  447. end;
  448. LOC_SUBSETREG,
  449. LOC_CSUBSETREG:
  450. begin
  451. location.size:=def_cgsize(resultdef);
  452. if not is_packed_record_or_object(left.resultdef) then
  453. begin
  454. if (target_info.endian = ENDIAN_BIG) then
  455. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  456. else
  457. inc(location.sreg.startbit, vs.fieldoffset * 8);
  458. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  459. end
  460. else
  461. begin
  462. location.sreg.bitlen := resultdef.packedbitsize;
  463. if (target_info.endian = ENDIAN_BIG) then
  464. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  465. else
  466. inc(location.sreg.startbit, vs.fieldoffset);
  467. end;
  468. end;
  469. else
  470. internalerror(2006031901);
  471. end;
  472. end;
  473. if is_objc_class_or_protocol(left.resultdef) and
  474. (target_info.system in systems_objc_nfabi) then
  475. begin
  476. if (location.loc<>LOC_REFERENCE) or
  477. (location.reference.index<>NR_NO) then
  478. internalerror(2009092402);
  479. { the actual field offset is stored in memory (to solve the
  480. "fragile base class" problem: this way the layout of base
  481. classes can be changed without breaking programs compiled against
  482. earlier versions)
  483. }
  484. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  485. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  486. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  487. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  488. { always packrecords C -> natural alignment }
  489. location.reference.alignment:=vs.vardef.alignment;
  490. end
  491. else if handle_platform_subscript then
  492. begin
  493. { done }
  494. end
  495. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  496. begin
  497. if not is_packed_record_or_object(left.resultdef) then
  498. begin
  499. inc(location.reference.offset,vs.fieldoffset);
  500. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  501. end
  502. else if (vs.fieldoffset mod 8 = 0) and
  503. (resultdef.packedbitsize mod 8 = 0) and
  504. { is different in case of e.g. packenum 2 and an enum }
  505. { which fits in 8 bits }
  506. (resultdef.size*8 = resultdef.packedbitsize) then
  507. begin
  508. inc(location.reference.offset,vs.fieldoffset div 8);
  509. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  510. end
  511. else
  512. begin
  513. sref.ref:=location.reference;
  514. sref.ref.alignment:=1;
  515. sref.bitindexreg:=NR_NO;
  516. inc(sref.ref.offset,vs.fieldoffset div 8);
  517. sref.startbit:=vs.fieldoffset mod 8;
  518. sref.bitlen:=resultdef.packedbitsize;
  519. if (left.location.loc=LOC_REFERENCE) then
  520. location.loc:=LOC_SUBSETREF
  521. else
  522. location.loc:=LOC_CSUBSETREF;
  523. location.sref:=sref;
  524. end;
  525. { also update the size of the location }
  526. location.size:=def_cgsize(resultdef);
  527. end;
  528. paraloc1.done;
  529. end;
  530. {*****************************************************************************
  531. TCGWITHNODE
  532. *****************************************************************************}
  533. procedure tcgwithnode.pass_generate_code;
  534. begin
  535. location_reset(location,LOC_VOID,OS_NO);
  536. if assigned(left) then
  537. secondpass(left);
  538. end;
  539. {*****************************************************************************
  540. TCGVECNODE
  541. *****************************************************************************}
  542. function tcgvecnode.get_mul_size : aint;
  543. begin
  544. if nf_memindex in flags then
  545. get_mul_size:=1
  546. else
  547. begin
  548. if (left.resultdef.typ=arraydef) then
  549. if not is_packed_array(left.resultdef) then
  550. get_mul_size:=tarraydef(left.resultdef).elesize
  551. else
  552. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  553. else
  554. get_mul_size:=resultdef.size;
  555. end
  556. end;
  557. { this routine must, like any other routine, not change the contents }
  558. { of base/index registers of references, as these may be regvars. }
  559. { The register allocator can coalesce one LOC_REGISTER being moved }
  560. { into another (as their live ranges won't overlap), but not a }
  561. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  562. { the live range of the LOC_CREGISTER will most likely overlap the }
  563. { the live range of the target LOC_(C)REGISTER) }
  564. { The passed register may be a LOC_CREGISTER as well. }
  565. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  566. var
  567. hreg: tregister;
  568. begin
  569. if l<>1 then
  570. begin
  571. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  572. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  573. maybe_const_reg:=hreg;
  574. end;
  575. if location.reference.base=NR_NO then
  576. location.reference.base:=maybe_const_reg
  577. else if location.reference.index=NR_NO then
  578. location.reference.index:=maybe_const_reg
  579. else
  580. begin
  581. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  582. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  583. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  584. { insert new index register }
  585. location.reference.index:=maybe_const_reg;
  586. end;
  587. { update alignment }
  588. if (location.reference.alignment=0) then
  589. internalerror(2009020704);
  590. location.reference.alignment:=newalignment(location.reference.alignment,l);
  591. end;
  592. { see remarks for tcgvecnode.update_reference_reg_mul above }
  593. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  594. var
  595. sref: tsubsetreference;
  596. offsetreg, hreg: tregister;
  597. alignpower: aint;
  598. temp : longint;
  599. begin
  600. { only orddefs are bitpacked. Even then we only need special code in }
  601. { case the bitpacked *byte size* is not a power of two, otherwise }
  602. { everything can be handled using the the regular array code. }
  603. if ((l mod 8) = 0) and
  604. (ispowerof2(l div 8,temp) or
  605. not is_ordinal(resultdef)
  606. {$ifndef cpu64bitalu}
  607. or is_64bitint(resultdef)
  608. {$endif not cpu64bitalu}
  609. ) then
  610. begin
  611. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  612. exit;
  613. end;
  614. if (l > 8*sizeof(aint)) then
  615. internalerror(200608051);
  616. sref.ref := location.reference;
  617. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  618. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  619. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  620. { keep alignment for index }
  621. sref.ref.alignment := left.resultdef.alignment;
  622. if not ispowerof2(packedbitsloadsize(l),temp) then
  623. internalerror(2006081201);
  624. alignpower:=temp;
  625. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  626. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  627. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  628. if (sref.ref.base = NR_NO) then
  629. sref.ref.base := offsetreg
  630. else if (sref.ref.index = NR_NO) then
  631. sref.ref.index := offsetreg
  632. else
  633. begin
  634. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  635. sref.ref.base := offsetreg;
  636. end;
  637. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  638. sref.bitindexreg := hreg;
  639. sref.startbit := 0;
  640. sref.bitlen := resultdef.packedbitsize;
  641. if (left.location.loc = LOC_REFERENCE) then
  642. location.loc := LOC_SUBSETREF
  643. else
  644. location.loc := LOC_CSUBSETREF;
  645. location.sref := sref;
  646. end;
  647. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: aint);
  648. begin
  649. inc(ref.offset,index*mulsize);
  650. end;
  651. procedure tcgvecnode.second_wideansistring;
  652. begin
  653. end;
  654. procedure tcgvecnode.second_dynamicarray;
  655. begin
  656. end;
  657. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  658. begin
  659. result:=
  660. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  661. end;
  662. procedure tcgvecnode.rangecheck_array;
  663. var
  664. hightree : tnode;
  665. poslabel,
  666. neglabel : tasmlabel;
  667. hreg : tregister;
  668. paraloc1,paraloc2 : tcgpara;
  669. pd : tprocdef;
  670. begin
  671. { omit range checking when this is an array access to a pointer which has been
  672. typecasted from an array }
  673. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  674. exit;
  675. paraloc1.init;
  676. paraloc2.init;
  677. if is_open_array(left.resultdef) or
  678. is_array_of_const(left.resultdef) then
  679. begin
  680. { cdecl functions don't have high() so we can not check the range }
  681. { (can't use current_procdef, since it may be a nested procedure) }
  682. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  683. begin
  684. { Get high value }
  685. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  686. { it must be available }
  687. if not assigned(hightree) then
  688. internalerror(200212201);
  689. firstpass(hightree);
  690. secondpass(hightree);
  691. { generate compares }
  692. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  693. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  694. else
  695. begin
  696. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  697. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  698. end;
  699. current_asmdata.getjumplabel(neglabel);
  700. current_asmdata.getjumplabel(poslabel);
  701. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  702. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  703. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  704. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  705. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  706. { release hightree }
  707. hightree.free;
  708. end;
  709. end
  710. else
  711. if is_dynamic_array(left.resultdef) then
  712. begin
  713. pd:=search_system_proc('fpc_dynarray_rangecheck');
  714. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  715. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  716. if pd.is_pushleftright then
  717. begin
  718. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  719. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  720. end
  721. else
  722. begin
  723. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  724. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  725. end;
  726. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  727. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  728. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  729. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  730. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  731. end;
  732. { for regular arrays, we don't have to do anything because the index has been
  733. type converted to the index type, which already inserted a range check if
  734. necessary }
  735. paraloc1.done;
  736. paraloc2.done;
  737. end;
  738. procedure tcgvecnode.rangecheck_string;
  739. var
  740. paraloc1,
  741. paraloc2: tcgpara;
  742. helpername: TIDString;
  743. pd: tprocdef;
  744. begin
  745. paraloc1.init;
  746. paraloc2.init;
  747. case tstringdef(left.resultdef).stringtype of
  748. { it's the same for ansi- and wide strings }
  749. st_unicodestring,
  750. st_widestring,
  751. st_ansistring:
  752. begin
  753. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  754. pd:=search_system_proc(helpername);
  755. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  756. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  757. if pd.is_pushleftright then
  758. begin
  759. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  760. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  761. end
  762. else
  763. begin
  764. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  765. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  766. end;
  767. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  768. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  769. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  770. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  771. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  772. end;
  773. st_shortstring:
  774. begin
  775. {!!!!!!!!!!!!!!!!!}
  776. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  777. end;
  778. st_longstring:
  779. begin
  780. {!!!!!!!!!!!!!!!!!}
  781. end;
  782. end;
  783. paraloc1.done;
  784. paraloc2.done;
  785. end;
  786. procedure tcgvecnode.pass_generate_code;
  787. var
  788. offsetdec,
  789. extraoffset : aint;
  790. rightp : pnode;
  791. otl,ofl : tasmlabel;
  792. newsize : tcgsize;
  793. mulsize,
  794. bytemulsize,
  795. alignpow : aint;
  796. isjump : boolean;
  797. paraloc1,
  798. paraloc2 : tcgpara;
  799. subsetref : tsubsetreference;
  800. temp : longint;
  801. indexdef : tdef;
  802. begin
  803. paraloc1.init;
  804. paraloc2.init;
  805. mulsize:=get_mul_size;
  806. if not is_packed_array(left.resultdef) then
  807. bytemulsize:=mulsize
  808. else
  809. bytemulsize:=mulsize div 8;
  810. newsize:=def_cgsize(resultdef);
  811. secondpass(left);
  812. if left.location.loc=LOC_CREFERENCE then
  813. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  814. else
  815. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  816. { an ansistring needs to be dereferenced }
  817. if is_ansistring(left.resultdef) or
  818. is_wide_or_unicode_string(left.resultdef) then
  819. begin
  820. if nf_callunique in flags then
  821. internalerror(200304236);
  822. {DM!!!!!}
  823. case left.location.loc of
  824. LOC_REGISTER,
  825. LOC_CREGISTER :
  826. begin
  827. {$ifdef m68k}
  828. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  829. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  830. {$else m68k}
  831. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  832. {$endif m68k}
  833. end;
  834. LOC_CREFERENCE,
  835. LOC_REFERENCE :
  836. begin
  837. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  838. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  839. end;
  840. LOC_CONSTANT:
  841. begin
  842. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  843. end;
  844. else
  845. internalerror(2002032218);
  846. end;
  847. if is_ansistring(left.resultdef) then
  848. offsetdec:=1
  849. else
  850. offsetdec:=2;
  851. location.reference.alignment:=offsetdec;
  852. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  853. if not(cs_zerobasedstrings in current_settings.localswitches) then
  854. update_reference_offset(location.reference,-1,offsetdec);
  855. end
  856. else if is_dynamic_array(left.resultdef) then
  857. begin
  858. case left.location.loc of
  859. LOC_REGISTER,
  860. LOC_CREGISTER :
  861. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  862. LOC_REFERENCE,
  863. LOC_CREFERENCE :
  864. begin
  865. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  866. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  867. left.location.reference,location.reference.base);
  868. end;
  869. else
  870. internalerror(2002032219);
  871. end;
  872. { a dynarray points to the start of a memory block, which
  873. we assume to be always aligned to a multiple of the
  874. pointer size
  875. }
  876. location.reference.alignment:=voidpointertype.size;
  877. end
  878. else
  879. begin
  880. { may happen in case of function results }
  881. case left.location.loc of
  882. LOC_CREGISTER,
  883. LOC_CMMREGISTER,
  884. LOC_REGISTER,
  885. LOC_MMREGISTER:
  886. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  887. end;
  888. location_copy(location,left.location);
  889. end;
  890. { location must be memory }
  891. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  892. internalerror(200411013);
  893. { offset can only differ from 0 if arraydef }
  894. if (left.resultdef.typ=arraydef) and
  895. not(is_dynamic_array(left.resultdef)) and
  896. (not(is_packed_array(left.resultdef)) or
  897. ((mulsize mod 8 = 0) and
  898. ispowerof2(mulsize div 8,temp)) or
  899. { only orddefs are bitpacked }
  900. not is_ordinal(resultdef)
  901. {$ifndef cpu64bitalu}
  902. or is_64bitint(resultdef)
  903. {$endif not cpu64bitalu}
  904. ) then
  905. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  906. if right.nodetype=ordconstn then
  907. begin
  908. { offset can only differ from 0 if arraydef }
  909. if cs_check_range in current_settings.localswitches then
  910. begin
  911. secondpass(right);
  912. case left.resultdef.typ of
  913. arraydef :
  914. rangecheck_array;
  915. stringdef :
  916. rangecheck_string;
  917. end;
  918. end;
  919. if not(is_packed_array(left.resultdef)) or
  920. ((mulsize mod 8 = 0) and
  921. (ispowerof2(mulsize div 8,temp) or
  922. { only orddefs are bitpacked }
  923. not is_ordinal(resultdef))) then
  924. begin
  925. extraoffset:=tordconstnode(right).value.svalue;
  926. update_reference_offset(location.reference,extraoffset,bytemulsize);
  927. { adjust alignment after this change }
  928. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  929. { don't do this for floats etc.; needed to properly set the }
  930. { size for bitpacked arrays (e.g. a bitpacked array of }
  931. { enums who are size 2 but fit in one byte -> in the array }
  932. { they will be one byte and have to be stored like that) }
  933. if is_packed_array(left.resultdef) and
  934. (tcgsize2size[newsize] <> bytemulsize) then
  935. newsize:=int_cgsize(bytemulsize);
  936. end
  937. else
  938. begin
  939. subsetref.ref := location.reference;
  940. subsetref.ref.alignment := left.resultdef.alignment;
  941. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  942. internalerror(2006081212);
  943. alignpow:=temp;
  944. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  945. subsetref.bitindexreg := NR_NO;
  946. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  947. subsetref.bitlen := resultdef.packedbitsize;
  948. if (left.location.loc = LOC_REFERENCE) then
  949. location.loc := LOC_SUBSETREF
  950. else
  951. location.loc := LOC_CSUBSETREF;
  952. location.sref := subsetref;
  953. end;
  954. end
  955. else
  956. { not nodetype=ordconstn }
  957. begin
  958. if (cs_opt_level1 in current_settings.optimizerswitches) and
  959. { if we do range checking, we don't }
  960. { need that fancy code (it would be }
  961. { buggy) }
  962. not(cs_check_range in current_settings.localswitches) and
  963. (left.resultdef.typ=arraydef) and
  964. not is_packed_array(left.resultdef) then
  965. begin
  966. extraoffset:=0;
  967. rightp:=actualtargetnode(@right);
  968. if rightp^.nodetype=addn then
  969. begin
  970. if taddnode(rightp^).right.nodetype=ordconstn then
  971. begin
  972. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  973. replacenode(rightp^,taddnode(rightp^).left);
  974. end
  975. else if taddnode(rightp^).left.nodetype=ordconstn then
  976. begin
  977. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  978. replacenode(rightp^,taddnode(rightp^).right);
  979. end;
  980. end
  981. else if rightp^.nodetype=subn then
  982. begin
  983. if taddnode(rightp^).right.nodetype=ordconstn then
  984. begin
  985. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  986. replacenode(rightp^,taddnode(rightp^).left);
  987. end;
  988. end;
  989. update_reference_offset(location.reference,extraoffset,mulsize);
  990. end;
  991. { calculate from left to right }
  992. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  993. internalerror(200304237);
  994. isjump:=(right.expectloc=LOC_JUMP);
  995. otl:=nil;
  996. ofl:=nil;
  997. if isjump then
  998. begin
  999. otl:=current_procinfo.CurrTrueLabel;
  1000. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  1001. ofl:=current_procinfo.CurrFalseLabel;
  1002. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  1003. end;
  1004. secondpass(right);
  1005. { if mulsize = 1, we won't have to modify the index }
  1006. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  1007. not valid_index_size(right.location.size) then
  1008. begin
  1009. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  1010. indexdef:=ptruinttype
  1011. end
  1012. else
  1013. indexdef:=right.resultdef;
  1014. if isjump then
  1015. begin
  1016. current_procinfo.CurrTrueLabel:=otl;
  1017. current_procinfo.CurrFalseLabel:=ofl;
  1018. end
  1019. else if (right.location.loc = LOC_JUMP) then
  1020. internalerror(2006010801);
  1021. { produce possible range check code: }
  1022. if cs_check_range in current_settings.localswitches then
  1023. begin
  1024. if left.resultdef.typ=arraydef then
  1025. rangecheck_array
  1026. else if (left.resultdef.typ=stringdef) then
  1027. rangecheck_string;
  1028. end;
  1029. { insert the register and the multiplication factor in the
  1030. reference }
  1031. if not is_packed_array(left.resultdef) then
  1032. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  1033. else
  1034. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  1035. end;
  1036. location.size:=newsize;
  1037. paraloc1.done;
  1038. paraloc2.done;
  1039. end;
  1040. begin
  1041. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1042. cloadparentfpnode:=tcgloadparentfpnode;
  1043. caddrnode:=tcgaddrnode;
  1044. cderefnode:=tcgderefnode;
  1045. csubscriptnode:=tcgsubscriptnode;
  1046. cwithnode:=tcgwithnode;
  1047. cvecnode:=tcgvecnode;
  1048. end.