cgbase.pas 23 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. { since we have only 16bit offsets, we need to be able to specify the high
  56. and lower 16 bits of the address of a symbol of up to 64 bit }
  57. trefaddr = (
  58. addr_no,
  59. addr_full,
  60. addr_pic,
  61. addr_pic_no_got
  62. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS)}
  63. ,
  64. addr_low, // bits 48-63
  65. addr_high, // bits 32-47
  66. {$IF defined(POWERPC64)}
  67. addr_higher, // bits 16-31
  68. addr_highest, // bits 00-15
  69. {$ENDIF}
  70. addr_higha // bits 16-31, adjusted
  71. {$IF defined(POWERPC64)}
  72. ,
  73. addr_highera, // bits 32-47, adjusted
  74. addr_highesta // bits 48-63, adjusted
  75. {$ENDIF}
  76. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS}
  77. {$IFDEF MIPS}
  78. ,
  79. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  80. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  81. addr_high_pic,
  82. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  83. addr_high_call
  84. {$ENDIF}
  85. {$IFDEF AVR}
  86. ,addr_lo8
  87. ,addr_hi8
  88. {$ENDIF}
  89. {$IFDEF i8086}
  90. ,addr_dgroup // the data segment group
  91. ,addr_far // used for emitting 'call/jmp far label' instructions
  92. ,addr_far_ref // used for emitting 'call far [reference]' instructions
  93. {$ENDIF}
  94. );
  95. {# Generic opcodes, which must be supported by all processors
  96. }
  97. topcg =
  98. (
  99. OP_NONE,
  100. OP_MOVE, { replaced operation with direct load }
  101. OP_ADD, { simple addition }
  102. OP_AND, { simple logical and }
  103. OP_DIV, { simple unsigned division }
  104. OP_IDIV, { simple signed division }
  105. OP_IMUL, { simple signed multiply }
  106. OP_MUL, { simple unsigned multiply }
  107. OP_NEG, { simple negate }
  108. OP_NOT, { simple logical not }
  109. OP_OR, { simple logical or }
  110. OP_SAR, { arithmetic shift-right }
  111. OP_SHL, { logical shift left }
  112. OP_SHR, { logical shift right }
  113. OP_SUB, { simple subtraction }
  114. OP_XOR, { simple exclusive or }
  115. OP_ROL, { rotate left }
  116. OP_ROR { rotate right }
  117. );
  118. {# Generic flag values - used for jump locations }
  119. TOpCmp =
  120. (
  121. OC_NONE,
  122. OC_EQ, { equality comparison }
  123. OC_GT, { greater than (signed) }
  124. OC_LT, { less than (signed) }
  125. OC_GTE, { greater or equal than (signed) }
  126. OC_LTE, { less or equal than (signed) }
  127. OC_NE, { not equal }
  128. OC_BE, { less or equal than (unsigned) }
  129. OC_B, { less than (unsigned) }
  130. OC_AE, { greater or equal than (unsigned) }
  131. OC_A { greater than (unsigned) }
  132. );
  133. { indirect symbol flags }
  134. tindsymflag = (is_data,is_weak);
  135. tindsymflags = set of tindsymflag;
  136. { OS_NO is also used memory references with large data that can
  137. not be loaded in a register directly }
  138. TCgSize = (OS_NO,
  139. { integer registers }
  140. OS_8,OS_16,OS_32,OS_64,OS_128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  141. { single,double,extended,comp,float128 }
  142. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  143. { multi-media sizes: split in byte, word, dword, ... }
  144. { entities, then the signed counterparts }
  145. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,
  146. OS_MS8,OS_MS16,OS_MS32,OS_MS64,OS_MS128,OS_MS256 );
  147. { Register types }
  148. TRegisterType = (
  149. R_INVALIDREGISTER, { = 0 }
  150. R_INTREGISTER, { = 1 }
  151. R_FPUREGISTER, { = 2 }
  152. { used by Intel only }
  153. R_MMXREGISTER, { = 3 }
  154. R_MMREGISTER, { = 4 }
  155. R_SPECIALREGISTER, { = 5 }
  156. R_ADDRESSREGISTER { = 6 }
  157. );
  158. { Sub registers }
  159. TSubRegister = (
  160. R_SUBNONE, { = 0; no sub register possible }
  161. R_SUBL, { = 1; 8 bits, Like AL }
  162. R_SUBH, { = 2; 8 bits, Like AH }
  163. R_SUBW, { = 3; 16 bits, Like AX }
  164. R_SUBD, { = 4; 32 bits, Like EAX }
  165. R_SUBQ, { = 5; 64 bits, Like RAX }
  166. { For Sparc floats that use F0:F1 to store doubles }
  167. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  168. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  169. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  170. R_SUBMMS, { = 9; single scalar in multi media register }
  171. R_SUBMMD, { = 10; double scalar in multi media register }
  172. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  173. { For Intel X86 AVX-Register }
  174. R_SUBMMX, { = 12; 128 BITS }
  175. R_SUBMMY { = 13; 256 BITS }
  176. );
  177. TSubRegisterSet = set of TSubRegister;
  178. TSuperRegister = type word;
  179. {
  180. The new register coding:
  181. SuperRegister (bits 0..15)
  182. Subregister (bits 16..23)
  183. Register type (bits 24..31)
  184. TRegister is defined as an enum to make it incompatible
  185. with TSuperRegister to avoid mixing them
  186. }
  187. TRegister = (
  188. TRegisterLowEnum := Low(longint),
  189. TRegisterHighEnum := High(longint)
  190. );
  191. TRegisterRec=packed record
  192. {$ifdef FPC_BIG_ENDIAN}
  193. regtype : Tregistertype;
  194. subreg : Tsubregister;
  195. supreg : Tsuperregister;
  196. {$else FPC_BIG_ENDIAN}
  197. supreg : Tsuperregister;
  198. subreg : Tsubregister;
  199. regtype : Tregistertype;
  200. {$endif FPC_BIG_ENDIAN}
  201. end;
  202. { A type to store register locations for 64 Bit values. }
  203. {$ifdef cpu64bitalu}
  204. tregister64 = tregister;
  205. tregister128 = record
  206. reglo,reghi : tregister;
  207. end;
  208. {$else cpu64bitalu}
  209. tregister64 = record
  210. reglo,reghi : tregister;
  211. end;
  212. {$endif cpu64bitalu}
  213. Tregistermmxset = record
  214. reg0,reg1,reg2,reg3:Tregister
  215. end;
  216. { Set type definition for registers }
  217. tsuperregisterset = array[byte] of set of byte;
  218. pmmshuffle = ^tmmshuffle;
  219. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  220. passed to an mm operation is nil, it means that the whole location is moved }
  221. tmmshuffle = record
  222. { describes how many shuffles are actually described, if len=0 then
  223. moving the scalar with index 0 to the scalar with index 0 is meant }
  224. len : byte;
  225. { lower nibble of each entry of this array describes index of the source data index while
  226. the upper nibble describes the destination index }
  227. shuffles : array[1..1] of byte;
  228. end;
  229. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  230. Psuperregisterarray=^Tsuperregisterarray;
  231. Tsuperregisterworklist=object
  232. buflength,
  233. buflengthinc,
  234. length:word;
  235. buf:Psuperregisterarray;
  236. constructor init;
  237. constructor copyfrom(const x:Tsuperregisterworklist);
  238. destructor done;
  239. procedure clear;
  240. procedure add(s:tsuperregister);
  241. function addnodup(s:tsuperregister): boolean;
  242. function get:tsuperregister;
  243. function readidx(i:word):tsuperregister;
  244. procedure deleteidx(i:word);
  245. function delete(s:tsuperregister):boolean;
  246. end;
  247. psuperregisterworklist=^tsuperregisterworklist;
  248. const
  249. { alias for easier understanding }
  250. R_SSEREGISTER = R_MMREGISTER;
  251. { Invalid register number }
  252. RS_INVALID = high(tsuperregister);
  253. tcgsize2size : Array[tcgsize] of integer =
  254. { integer values }
  255. (0,1,2,4,8,16,1,2,4,8,16,
  256. { floating point values }
  257. 4,8,10,8,16,
  258. { multimedia values }
  259. 1,2,4,8,16,32,1,2,4,8,16,32);
  260. tfloat2tcgsize: array[tfloattype] of tcgsize =
  261. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  262. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  263. (s32real,s64real,s80real,s64comp);
  264. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  265. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  266. {$if defined(cpu64bitalu)}
  267. { operand size describing an unsigned value in a pair of int registers }
  268. OS_PAIR = OS_128;
  269. { operand size describing an signed value in a pair of int registers }
  270. OS_SPAIR = OS_S128;
  271. {$elseif defined(cpu32bitalu)}
  272. { operand size describing an unsigned value in a pair of int registers }
  273. OS_PAIR = OS_64;
  274. { operand size describing an signed value in a pair of int registers }
  275. OS_SPAIR = OS_S64;
  276. {$elseif defined(cpu16bitalu)}
  277. { operand size describing an unsigned value in a pair of int registers }
  278. OS_PAIR = OS_32;
  279. { operand size describing an signed value in a pair of int registers }
  280. OS_SPAIR = OS_S32;
  281. {$elseif defined(cpu8bitalu)}
  282. { operand size describing an unsigned value in a pair of int registers }
  283. OS_PAIR = OS_16;
  284. { operand size describing an signed value in a pair of int registers }
  285. OS_SPAIR = OS_S16;
  286. {$endif}
  287. { Table to convert tcgsize variables to the correspondending
  288. unsigned types }
  289. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  290. OS_8,OS_16,OS_32,OS_64,OS_128,OS_8,OS_16,OS_32,OS_64,OS_128,
  291. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  292. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  293. OS_M64,OS_M128,OS_M256);
  294. tcgloc2str : array[TCGLoc] of string[12] = (
  295. 'LOC_INVALID',
  296. 'LOC_VOID',
  297. 'LOC_CONST',
  298. 'LOC_JUMP',
  299. 'LOC_FLAGS',
  300. 'LOC_REG',
  301. 'LOC_CREG',
  302. 'LOC_FPUREG',
  303. 'LOC_CFPUREG',
  304. 'LOC_MMXREG',
  305. 'LOC_CMMXREG',
  306. 'LOC_MMREG',
  307. 'LOC_CMMREG',
  308. 'LOC_SSETREG',
  309. 'LOC_CSSETREG',
  310. 'LOC_SSETREF',
  311. 'LOC_CSSETREF',
  312. 'LOC_CREF',
  313. 'LOC_REF'
  314. );
  315. var
  316. mms_movescalar : pmmshuffle;
  317. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  318. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  319. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  320. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  321. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  322. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  323. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  324. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  325. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  326. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  327. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  328. function generic_regname(r:tregister):string;
  329. {# From a constant numeric value, return the abstract code generator
  330. size.
  331. }
  332. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  333. function int_float_cgsize(const a: tcgint): tcgsize;
  334. { return the inverse condition of opcmp }
  335. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  336. { return the opcmp needed when swapping the operands }
  337. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  338. { return whether op is commutative }
  339. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  340. { returns true, if shuffle describes a real shuffle operation and not only a move }
  341. function realshuffle(shuffle : pmmshuffle) : boolean;
  342. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  343. function shufflescalar(shuffle : pmmshuffle) : boolean;
  344. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  345. the source }
  346. procedure removeshuffles(var shuffle : tmmshuffle);
  347. implementation
  348. uses
  349. verbose;
  350. {******************************************************************************
  351. tsuperregisterworklist
  352. ******************************************************************************}
  353. constructor tsuperregisterworklist.init;
  354. begin
  355. length:=0;
  356. buflength:=0;
  357. buflengthinc:=16;
  358. buf:=nil;
  359. end;
  360. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  361. begin
  362. self:=x;
  363. if x.buf<>nil then
  364. begin
  365. getmem(buf,buflength*sizeof(Tsuperregister));
  366. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  367. end;
  368. end;
  369. destructor tsuperregisterworklist.done;
  370. begin
  371. if assigned(buf) then
  372. freemem(buf);
  373. end;
  374. procedure tsuperregisterworklist.add(s:tsuperregister);
  375. begin
  376. inc(length);
  377. { Need to increase buffer length? }
  378. if length>=buflength then
  379. begin
  380. inc(buflength,buflengthinc);
  381. buflengthinc:=buflengthinc*2;
  382. if buflengthinc>256 then
  383. buflengthinc:=256;
  384. reallocmem(buf,buflength*sizeof(Tsuperregister));
  385. end;
  386. buf^[length-1]:=s;
  387. end;
  388. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  389. begin
  390. addnodup := false;
  391. if indexword(buf^,length,s) = -1 then
  392. begin
  393. add(s);
  394. addnodup := true;
  395. end;
  396. end;
  397. procedure tsuperregisterworklist.clear;
  398. begin
  399. length:=0;
  400. end;
  401. procedure tsuperregisterworklist.deleteidx(i:word);
  402. begin
  403. if i>=length then
  404. internalerror(200310144);
  405. buf^[i]:=buf^[length-1];
  406. dec(length);
  407. end;
  408. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  409. begin
  410. if (i >= length) then
  411. internalerror(2005010601);
  412. result := buf^[i];
  413. end;
  414. function tsuperregisterworklist.get:tsuperregister;
  415. begin
  416. if length=0 then
  417. internalerror(200310142);
  418. get:=buf^[0];
  419. buf^[0]:=buf^[length-1];
  420. dec(length);
  421. end;
  422. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  423. var
  424. i:longint;
  425. begin
  426. delete:=false;
  427. { indexword in 1.0.x and 1.9.4 is broken }
  428. i:=indexword(buf^,length,s);
  429. if i<>-1 then
  430. begin
  431. deleteidx(i);
  432. delete := true;
  433. end;
  434. end;
  435. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  436. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  437. begin
  438. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  439. end;
  440. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  441. begin
  442. include(regs[s shr 8],(s and $ff));
  443. end;
  444. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  445. begin
  446. exclude(regs[s shr 8],(s and $ff));
  447. end;
  448. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  449. begin
  450. result:=(s and $ff) in regs[s shr 8];
  451. end;
  452. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  453. begin
  454. tregisterrec(result).regtype:=rt;
  455. tregisterrec(result).supreg:=sr;
  456. tregisterrec(result).subreg:=sb;
  457. end;
  458. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  459. begin
  460. result:=tregisterrec(r).subreg;
  461. end;
  462. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  463. begin
  464. result:=tregisterrec(r).supreg;
  465. end;
  466. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  467. begin
  468. result:=tregisterrec(r).regtype;
  469. end;
  470. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  471. begin
  472. tregisterrec(r).subreg:=sr;
  473. end;
  474. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  475. begin
  476. tregisterrec(r).supreg:=sr;
  477. end;
  478. function generic_regname(r:tregister):string;
  479. var
  480. nr : string[12];
  481. begin
  482. str(getsupreg(r),nr);
  483. case getregtype(r) of
  484. R_INTREGISTER:
  485. result:='ireg'+nr;
  486. R_FPUREGISTER:
  487. result:='freg'+nr;
  488. R_MMREGISTER:
  489. result:='mreg'+nr;
  490. R_MMXREGISTER:
  491. result:='xreg'+nr;
  492. R_ADDRESSREGISTER:
  493. result:='areg'+nr;
  494. R_SPECIALREGISTER:
  495. result:='sreg'+nr;
  496. else
  497. begin
  498. result:='INVALID';
  499. exit;
  500. end;
  501. end;
  502. case getsubreg(r) of
  503. R_SUBNONE:
  504. ;
  505. R_SUBL:
  506. result:=result+'l';
  507. R_SUBH:
  508. result:=result+'h';
  509. R_SUBW:
  510. result:=result+'w';
  511. R_SUBD:
  512. result:=result+'d';
  513. R_SUBQ:
  514. result:=result+'q';
  515. R_SUBFS:
  516. result:=result+'fs';
  517. R_SUBFD:
  518. result:=result+'fd';
  519. R_SUBMMD:
  520. result:=result+'md';
  521. R_SUBMMS:
  522. result:=result+'ms';
  523. R_SUBMMWHOLE:
  524. result:=result+'ma';
  525. else
  526. internalerror(200308252);
  527. end;
  528. end;
  529. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  530. const
  531. size2cgsize : array[0..8] of tcgsize = (
  532. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  533. );
  534. begin
  535. {$ifdef cpu64bitalu}
  536. if a=16 then
  537. result:=OS_128
  538. else
  539. {$endif cpu64bitalu}
  540. if a>8 then
  541. result:=OS_NO
  542. else
  543. result:=size2cgsize[a];
  544. end;
  545. function int_float_cgsize(const a: tcgint): tcgsize;
  546. begin
  547. case a of
  548. 4 :
  549. result:=OS_F32;
  550. 8 :
  551. result:=OS_F64;
  552. 10 :
  553. result:=OS_F80;
  554. 16 :
  555. result:=OS_F128;
  556. else
  557. internalerror(200603211);
  558. end;
  559. end;
  560. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  561. const
  562. list: array[TOpCmp] of TOpCmp =
  563. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  564. OC_B,OC_BE);
  565. begin
  566. inverse_opcmp := list[opcmp];
  567. end;
  568. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  569. const
  570. list: array[TOpCmp] of TOpCmp =
  571. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  572. OC_BE,OC_B);
  573. begin
  574. swap_opcmp := list[opcmp];
  575. end;
  576. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  577. const
  578. list: array[topcg] of boolean =
  579. (true,false,true,true,false,false,true,true,false,false,
  580. true,false,false,false,false,true,false,false);
  581. begin
  582. commutativeop := list[op];
  583. end;
  584. function realshuffle(shuffle : pmmshuffle) : boolean;
  585. var
  586. i : longint;
  587. begin
  588. realshuffle:=true;
  589. if (shuffle=nil) or (shuffle^.len=0) then
  590. realshuffle:=false
  591. else
  592. begin
  593. for i:=1 to shuffle^.len do
  594. begin
  595. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
  596. exit;
  597. end;
  598. realshuffle:=false;
  599. end;
  600. end;
  601. function shufflescalar(shuffle : pmmshuffle) : boolean;
  602. begin
  603. result:=shuffle^.len=0;
  604. end;
  605. procedure removeshuffles(var shuffle : tmmshuffle);
  606. var
  607. i : longint;
  608. begin
  609. if shuffle.len=0 then
  610. exit;
  611. for i:=1 to shuffle.len do
  612. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  613. end;
  614. initialization
  615. new(mms_movescalar);
  616. mms_movescalar^.len:=0;
  617. finalization
  618. dispose(mms_movescalar);
  619. end.