ncginl.pas 35 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncginl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl,symtype;
  22. type
  23. tcginlinenode = class(tinlinenode)
  24. procedure pass_generate_code;override;
  25. procedure pass_generate_code_cpu;virtual;
  26. procedure second_sizeoftypeof;virtual;
  27. procedure second_length;virtual;
  28. procedure second_predsucc;virtual;
  29. procedure second_incdec;virtual;
  30. procedure second_AndOrXorShiftRot_assign;virtual;
  31. procedure second_NegNot_assign;virtual;
  32. procedure second_typeinfo;virtual;
  33. procedure second_includeexclude;virtual;
  34. procedure second_pi; virtual;
  35. procedure second_arctan_real; virtual;
  36. procedure second_abs_real; virtual;
  37. procedure second_sqr_real; virtual;
  38. procedure second_sqrt_real; virtual;
  39. procedure second_ln_real; virtual;
  40. procedure second_cos_real; virtual;
  41. procedure second_sin_real; virtual;
  42. procedure second_assigned; virtual;
  43. procedure second_get_frame;virtual;
  44. procedure second_get_caller_frame;virtual;
  45. procedure second_get_caller_addr;virtual;
  46. procedure second_prefetch; virtual;
  47. procedure second_round_real; virtual;
  48. procedure second_trunc_real; virtual;
  49. procedure second_int_real; virtual;
  50. procedure second_abs_long; virtual;
  51. procedure second_rox_sar; virtual;
  52. procedure second_bsfbsr; virtual;
  53. procedure second_new; virtual;
  54. procedure second_setlength; virtual; abstract;
  55. procedure second_box; virtual; abstract;
  56. procedure second_popcnt; virtual;
  57. procedure second_seg; virtual; abstract;
  58. procedure second_fma; virtual;
  59. procedure second_frac_real; virtual;
  60. protected
  61. function second_incdec_tempregdef: tdef;virtual;
  62. end;
  63. implementation
  64. uses
  65. globtype,constexp,
  66. verbose,globals,compinnr,
  67. symconst,symdef,defutil,
  68. aasmbase,aasmdata,
  69. cgbase,pass_2,
  70. cpubase,procinfo,
  71. ncon,ncal,
  72. tgobj,ncgutil,
  73. cgutils,cgobj,hlcgobj
  74. {$ifndef cpu64bitalu}
  75. ,cg64f32
  76. {$endif not cpu64bitalu}
  77. ;
  78. {*****************************************************************************
  79. TCGINLINENODE
  80. *****************************************************************************}
  81. procedure tcginlinenode.pass_generate_code;
  82. begin
  83. location_reset(location,LOC_VOID,OS_NO);
  84. case inlinenumber of
  85. in_sizeof_x,
  86. in_typeof_x :
  87. second_SizeofTypeOf;
  88. in_length_x :
  89. second_Length;
  90. in_pred_x,
  91. in_succ_x:
  92. second_PredSucc;
  93. in_dec_x,
  94. in_inc_x :
  95. second_IncDec;
  96. in_typeinfo_x:
  97. second_TypeInfo;
  98. in_include_x_y,
  99. in_exclude_x_y:
  100. second_IncludeExclude;
  101. in_pi_real:
  102. second_pi;
  103. in_sin_real:
  104. second_sin_real;
  105. in_arctan_real:
  106. second_arctan_real;
  107. in_abs_real:
  108. second_abs_real;
  109. in_abs_long:
  110. second_abs_long;
  111. in_round_real:
  112. second_round_real;
  113. in_trunc_real:
  114. second_trunc_real;
  115. in_int_real:
  116. second_int_real;
  117. in_sqr_real:
  118. second_sqr_real;
  119. in_sqrt_real:
  120. second_sqrt_real;
  121. in_ln_real:
  122. second_ln_real;
  123. in_cos_real:
  124. second_cos_real;
  125. in_frac_real:
  126. second_frac_real;
  127. in_prefetch_var:
  128. second_prefetch;
  129. in_assigned_x:
  130. second_assigned;
  131. in_get_frame:
  132. second_get_frame;
  133. in_get_caller_frame:
  134. second_get_caller_frame;
  135. in_get_caller_addr:
  136. second_get_caller_addr;
  137. in_unaligned_x:
  138. begin
  139. secondpass(tcallparanode(left).left);
  140. location:=tcallparanode(left).left.location;
  141. if location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  142. location.reference.alignment:=1;
  143. end;
  144. in_aligned_x:
  145. begin
  146. secondpass(tcallparanode(left).left);
  147. location:=tcallparanode(left).left.location;
  148. if location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  149. location.reference.alignment:=resultdef.alignment;
  150. end;
  151. {$ifdef SUPPORT_MMX}
  152. in_mmx_pcmpeqb..in_mmx_pcmpgtw:
  153. begin
  154. location_reset(location,LOC_MMXREGISTER,OS_NO);
  155. if left.location.loc=LOC_REGISTER then
  156. begin
  157. {!!!!!!!}
  158. end
  159. else if tcallparanode(left).left.location.loc=LOC_REGISTER then
  160. begin
  161. {!!!!!!!}
  162. end
  163. else
  164. begin
  165. {!!!!!!!}
  166. end;
  167. end;
  168. {$endif SUPPORT_MMX}
  169. in_rol_x,
  170. in_rol_x_y,
  171. in_ror_x,
  172. in_ror_x_y,
  173. in_sar_x,
  174. in_sar_x_y:
  175. second_rox_sar;
  176. in_bsf_x,
  177. in_bsr_x:
  178. second_BsfBsr;
  179. in_new_x:
  180. second_new;
  181. in_setlength_x:
  182. second_setlength;
  183. in_box_x:
  184. second_box;
  185. in_popcnt_x:
  186. second_popcnt;
  187. in_seg_x:
  188. second_seg;
  189. in_fma_single,
  190. in_fma_double,
  191. in_fma_extended,
  192. in_fma_float128:
  193. second_fma;
  194. in_and_assign_x_y,
  195. in_or_assign_x_y,
  196. in_xor_assign_x_y,
  197. in_sar_assign_x_y,
  198. in_shl_assign_x_y,
  199. in_shr_assign_x_y,
  200. in_rol_assign_x_y,
  201. in_ror_assign_x_y:
  202. second_AndOrXorShiftRot_assign;
  203. in_neg_assign_x,
  204. in_not_assign_x:
  205. second_NegNot_assign;
  206. else
  207. pass_generate_code_cpu;
  208. end;
  209. end;
  210. procedure tcginlinenode.pass_generate_code_cpu;
  211. begin
  212. Internalerror(2017110103);
  213. end;
  214. {*****************************************************************************
  215. SIZEOF / TYPEOF GENERIC HANDLING
  216. *****************************************************************************}
  217. { second_handle_ the sizeof and typeof routines }
  218. procedure tcginlinenode.second_SizeOfTypeOf;
  219. begin
  220. { handled in pass 1 }
  221. internalerror(2015122701);
  222. end;
  223. {*****************************************************************************
  224. LENGTH GENERIC HANDLING
  225. *****************************************************************************}
  226. procedure tcginlinenode.second_Length;
  227. var
  228. lengthlab : tasmlabel;
  229. hregister : tregister;
  230. lendef : tdef;
  231. href : treference;
  232. begin
  233. secondpass(left);
  234. if is_shortstring(left.resultdef) then
  235. begin
  236. location_copy(location,left.location);
  237. location.size:=OS_8;
  238. end
  239. else
  240. begin
  241. { length in ansi/wide strings and high in dynamic arrays is at offset -sizeof(pint) }
  242. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  243. current_asmdata.getjumplabel(lengthlab);
  244. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,left.resultdef,OC_EQ,0,left.location.register,lengthlab);
  245. { the length of a widestring is a 32 bit unsigned int. Since every
  246. character occupies 2 bytes, on a 32 bit platform you can express
  247. the maximum length using 31 bits. On a 64 bit platform, it may be
  248. 32 bits. This means that regardless of the platform, a location
  249. with size OS_SINT/ossinttype can hold the length without
  250. overflowing (this code returns an ossinttype value) }
  251. if is_widestring(left.resultdef) then
  252. lendef:=u32inttype
  253. else
  254. lendef:=ossinttype;
  255. { volatility of the ansistring/widestring refers to the volatility of the
  256. string pointer, not of the string data }
  257. hlcg.reference_reset_base(href,left.resultdef,left.location.register,-lendef.size,ctempposinvalid,lendef.alignment,[]);
  258. { if the string pointer is nil, the length is 0 -> reuse the register
  259. that originally held the string pointer for the length, so that we
  260. can keep the original nil/0 as length in that case }
  261. hregister:=cg.makeregsize(current_asmdata.CurrAsmList,left.location.register,def_cgsize(resultdef));
  262. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,lendef,resultdef,href,hregister);
  263. if is_widestring(left.resultdef) then
  264. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHR,resultdef,1,hregister);
  265. { Dynamic arrays do not have their length attached but their maximum index }
  266. if is_dynamic_array(left.resultdef) then
  267. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_ADD,resultdef,1,hregister);
  268. cg.a_label(current_asmdata.CurrAsmList,lengthlab);
  269. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  270. location.register:=hregister;
  271. end;
  272. end;
  273. {*****************************************************************************
  274. PRED/SUCC GENERIC HANDLING
  275. *****************************************************************************}
  276. procedure tcginlinenode.second_PredSucc;
  277. var
  278. cgop : topcg;
  279. begin
  280. secondpass(left);
  281. if inlinenumber=in_pred_x then
  282. cgop:=OP_SUB
  283. else
  284. cgop:=OP_ADD;
  285. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  286. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  287. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  288. {$ifndef cpu64bitalu}
  289. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  290. begin
  291. location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  292. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  293. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,cgop,def_cgsize(resultdef),1,left.location.register64,location.register64);
  294. end
  295. else
  296. {$endif not cpu64bitalu}
  297. begin
  298. location.register:=hlcg.getregisterfordef(current_asmdata.CurrAsmList,resultdef);
  299. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,1,left.location.register,location.register);
  300. end;
  301. end;
  302. {*****************************************************************************
  303. INC/DEC GENERIC HANDLING
  304. *****************************************************************************}
  305. function tcginlinenode.second_incdec_tempregdef: tdef;
  306. begin
  307. second_incdec_tempregdef:=left.resultdef;
  308. end;
  309. procedure tcginlinenode.second_IncDec;
  310. const
  311. addsubop:array[in_inc_x..in_dec_x] of TOpCG=(OP_ADD,OP_SUB);
  312. var
  313. addvalue : TConstExprInt;
  314. addconstant : boolean;
  315. {$ifndef cpu64bitalu}
  316. hregisterhi,
  317. {$endif not cpu64bitalu}
  318. hregister : tregister;
  319. begin
  320. { set defaults }
  321. addconstant:=true;
  322. hregister:=NR_NO;
  323. {$ifndef cpu64bitalu}
  324. hregisterhi:=NR_NO;
  325. {$endif not cpu64bitalu}
  326. { first secondpass second argument, because if the first arg }
  327. { is used in that expression then SSL may move it to another }
  328. { register }
  329. if assigned(tcallparanode(left).right) then
  330. secondpass(tcallparanode(tcallparanode(left).right).left);
  331. { load first parameter, must be a reference }
  332. secondpass(tcallparanode(left).left);
  333. { get addvalue }
  334. case tcallparanode(left).left.resultdef.typ of
  335. orddef,
  336. enumdef :
  337. addvalue:=1;
  338. pointerdef :
  339. begin
  340. if is_void(tpointerdef(tcallparanode(left).left.resultdef).pointeddef) then
  341. addvalue:=1
  342. else
  343. addvalue:=tpointerdef(tcallparanode(left).left.resultdef).pointeddef.size;
  344. end;
  345. else
  346. internalerror(10081);
  347. end;
  348. { second_ argument specified?, must be a s32bit in register }
  349. if assigned(tcallparanode(left).right) then
  350. begin
  351. { when constant, just multiply the addvalue }
  352. if is_constintnode(tcallparanode(tcallparanode(left).right).left) then
  353. addvalue:=addvalue*get_ordinal_value(tcallparanode(tcallparanode(left).right).left)
  354. else if is_constpointernode(tcallparanode(tcallparanode(left).right).left) then
  355. addvalue:=addvalue*tpointerconstnode(tcallparanode(tcallparanode(left).right).left).value
  356. else
  357. begin
  358. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,tcallparanode(tcallparanode(left).right).left.resultdef,second_incdec_tempregdef,addvalue<=1);
  359. hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
  360. {$ifndef cpu64bitalu}
  361. hregisterhi:=tcallparanode(tcallparanode(left).right).left.location.register64.reghi;
  362. {$endif not cpu64bitalu}
  363. { insert multiply with addvalue if its >1 }
  364. if addvalue>1 then
  365. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,left.resultdef,addvalue.svalue,hregister);
  366. addconstant:=false;
  367. end;
  368. end;
  369. { write the add instruction }
  370. if addconstant then
  371. begin
  372. {$ifndef cpu64bitalu}
  373. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  374. cg64.a_op64_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],def_cgsize(left.resultdef),addvalue,tcallparanode(left).left.location)
  375. else
  376. {$endif not cpu64bitalu}
  377. hlcg.a_op_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],left.resultdef,
  378. {$ifdef cpu64bitalu}
  379. aint(addvalue.svalue),
  380. {$else cpu64bitalu}
  381. longint(addvalue.svalue), // can't use aint, because it breaks 16-bit and 8-bit CPUs
  382. {$endif cpu64bitalu}
  383. tcallparanode(left).left.location);
  384. end
  385. else
  386. begin
  387. {$ifndef cpu64bitalu}
  388. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  389. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],def_cgsize(left.resultdef),
  390. joinreg64(hregister,hregisterhi),tcallparanode(left).left.location)
  391. else
  392. {$endif not cpu64bitalu}
  393. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],left.resultdef,
  394. hregister,tcallparanode(left).left.location);
  395. end;
  396. { no overflow checking for pointers (see ninl), and range checking }
  397. { is not applicable for them }
  398. if (tcallparanode(left).left.resultdef.typ <> pointerdef) then
  399. begin
  400. { things which can overflow must NOT pass via here, but have to be }
  401. { handled via a regular add node (conversion in tinlinenode.pass_1) }
  402. { Or someone has to rewrite the above to use a_op_const_reg_reg_ov }
  403. { and friends in case of overflow checking, and ask everyone to }
  404. { implement these methods since they don't exist for all cpus (JM) }
  405. { Similarly, range checking also has to be handled separately, }
  406. { see mantis #14841 (JM) }
  407. if ([cs_check_overflow,cs_check_range] * current_settings.localswitches <> []) then
  408. internalerror(2006111010);
  409. // cg.g_overflowcheck(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).resultdef);
  410. // cg.g_rangecheck(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,
  411. // tcallparanode(left).left.resultdef);
  412. end;
  413. end;
  414. {*****************************************************************************
  415. AND/OR/XOR/SHIFT/ROTATE ASSIGN GENERIC HANDLING
  416. *****************************************************************************}
  417. procedure tcginlinenode.second_AndOrXorShiftRot_assign;
  418. const
  419. andorxorop:array[in_and_assign_x_y..in_ror_assign_x_y] of TOpCG=
  420. (OP_AND,OP_OR,OP_XOR,OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR);
  421. var
  422. maskvalue : TConstExprInt;
  423. maskconstant : boolean;
  424. {$ifndef cpu64bitalu}
  425. hregisterhi,
  426. {$endif not cpu64bitalu}
  427. hregister : tregister;
  428. begin
  429. { set defaults }
  430. maskconstant:=true;
  431. hregister:=NR_NO;
  432. maskvalue:=0;
  433. {$ifndef cpu64bitalu}
  434. hregisterhi:=NR_NO;
  435. {$endif not cpu64bitalu}
  436. { first secondpass first argument, because if the second arg }
  437. { is used in that expression then SSL may move it to another }
  438. { register }
  439. secondpass(tcallparanode(left).left);
  440. { load second parameter, must be a reference }
  441. secondpass(tcallparanode(tcallparanode(left).right).left);
  442. { when constant, just get the maskvalue }
  443. if is_constintnode(tcallparanode(left).left) then
  444. maskvalue:=get_ordinal_value(tcallparanode(left).left)
  445. else
  446. begin
  447. { for shift/rotate the shift count can be of different size than the shifted variable }
  448. if inlinenumber in [in_sar_assign_x_y,in_shl_assign_x_y,in_shr_assign_x_y,in_rol_assign_x_y,in_ror_assign_x_y] then
  449. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,tcallparanode(left).left.resultdef,true)
  450. else
  451. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,tcallparanode(left).right.resultdef,true);
  452. hregister:=tcallparanode(left).left.location.register;
  453. {$ifndef cpu64bitalu}
  454. hregisterhi:=tcallparanode(left).left.location.register64.reghi;
  455. {$endif not cpu64bitalu}
  456. maskconstant:=false;
  457. end;
  458. { write the and/or/xor/sar/shl/shr/rol/ror instruction }
  459. if maskconstant then
  460. begin
  461. if inlinenumber in [in_sar_assign_x_y,in_shl_assign_x_y,in_shr_assign_x_y,in_rol_assign_x_y,in_ror_assign_x_y] then
  462. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  463. maskvalue:=maskvalue and 63
  464. else
  465. maskvalue:=maskvalue and 31;
  466. {$ifndef cpu64bitalu}
  467. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  468. cg64.a_op64_const_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],def_cgsize(tcallparanode(left).right.resultdef),maskvalue.svalue,tcallparanode(tcallparanode(left).right).left.location)
  469. else
  470. {$endif not cpu64bitalu}
  471. hlcg.a_op_const_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],tcallparanode(left).right.resultdef,
  472. {$ifdef cpu64bitalu}
  473. aint(maskvalue.svalue),
  474. {$else cpu64bitalu}
  475. longint(maskvalue.svalue), // can't use aint, because it breaks 16-bit and 8-bit CPUs
  476. {$endif cpu64bitalu}
  477. tcallparanode(tcallparanode(left).right).left.location);
  478. end
  479. else
  480. begin
  481. {$ifndef cpu64bitalu}
  482. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  483. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],def_cgsize(tcallparanode(left).right.resultdef),
  484. joinreg64(hregister,hregisterhi),tcallparanode(tcallparanode(left).right).left.location)
  485. else
  486. {$endif not cpu64bitalu}
  487. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],tcallparanode(left).right.resultdef,
  488. hregister,tcallparanode(tcallparanode(left).right).left.location);
  489. end;
  490. end;
  491. {*****************************************************************************
  492. NEG/NOT ASSIGN GENERIC HANDLING
  493. *****************************************************************************}
  494. procedure tcginlinenode.second_NegNot_assign;
  495. const
  496. negnotop:array[in_neg_assign_x..in_not_assign_x] of TOpCG=(OP_NEG,OP_NOT);
  497. {$ifndef cpu64bitalu}
  498. var
  499. NR_NO64: tregister64=(reglo:NR_NO;reghi:NR_NO);
  500. {$endif not cpu64bitalu}
  501. begin
  502. { load parameter, must be a reference }
  503. secondpass(left);
  504. location_reset(location,LOC_VOID,OS_NO);
  505. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  506. begin
  507. {$ifndef cpu64bitalu}
  508. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  509. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],def_cgsize(left.resultdef),left.location.register64,left.location)
  510. else
  511. {$endif not cpu64bitalu}
  512. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],left.resultdef,left.location.register,left.location);
  513. end
  514. else if left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  515. begin
  516. {$ifndef cpu64bitalu}
  517. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  518. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],def_cgsize(left.resultdef),NR_NO64,left.location)
  519. else
  520. {$endif not cpu64bitalu}
  521. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],left.resultdef,NR_NO,left.location);
  522. end
  523. else
  524. internalerror(2017040701);
  525. end;
  526. {*****************************************************************************
  527. TYPEINFO GENERIC HANDLING
  528. *****************************************************************************}
  529. procedure tcginlinenode.second_typeinfo;
  530. begin
  531. internalerror(2013060301);
  532. end;
  533. {*****************************************************************************
  534. INCLUDE/EXCLUDE GENERIC HANDLING
  535. *****************************************************************************}
  536. procedure tcginlinenode.second_IncludeExclude;
  537. var
  538. setpara, elepara: tnode;
  539. begin
  540. { the set }
  541. secondpass(tcallparanode(left).left);
  542. { the element to set }
  543. secondpass(tcallparanode(tcallparanode(left).right).left);
  544. setpara:=tcallparanode(left).left;
  545. elepara:=tcallparanode(tcallparanode(left).right).left;
  546. if elepara.location.loc=LOC_CONSTANT then
  547. begin
  548. hlcg.a_bit_set_const_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
  549. setpara.resultdef,elepara.location.value-tsetdef(setpara.resultdef).setbase,setpara.location);
  550. end
  551. else
  552. begin
  553. hlcg.location_force_reg(current_asmdata.CurrAsmList,elepara.location,elepara.resultdef,u32inttype,true);
  554. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,u32inttype,elepara.location,tsetdef(setpara.resultdef).setbase);
  555. hlcg.a_bit_set_reg_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
  556. u32inttype,setpara.resultdef,elepara.location.register,setpara.location);
  557. end;
  558. end;
  559. {*****************************************************************************
  560. FLOAT GENERIC HANDLING
  561. *****************************************************************************}
  562. {
  563. These routines all call internal RTL routines, so if they are
  564. called here, they give an internal error
  565. }
  566. procedure tcginlinenode.second_pi;
  567. begin
  568. internalerror(20020718);
  569. end;
  570. procedure tcginlinenode.second_arctan_real;
  571. begin
  572. internalerror(20020718);
  573. end;
  574. procedure tcginlinenode.second_abs_real;
  575. begin
  576. internalerror(20020718);
  577. end;
  578. procedure tcginlinenode.second_round_real;
  579. begin
  580. internalerror(20020718);
  581. end;
  582. procedure tcginlinenode.second_trunc_real;
  583. begin
  584. internalerror(20020718);
  585. end;
  586. procedure tcginlinenode.second_int_real;
  587. begin
  588. internalerror(2016112702);
  589. end;
  590. procedure tcginlinenode.second_sqr_real;
  591. begin
  592. internalerror(20020718);
  593. end;
  594. procedure tcginlinenode.second_sqrt_real;
  595. begin
  596. internalerror(20020718);
  597. end;
  598. procedure tcginlinenode.second_ln_real;
  599. begin
  600. internalerror(20020718);
  601. end;
  602. procedure tcginlinenode.second_cos_real;
  603. begin
  604. internalerror(20020718);
  605. end;
  606. procedure tcginlinenode.second_sin_real;
  607. begin
  608. internalerror(20020718);
  609. end;
  610. procedure tcginlinenode.second_prefetch;
  611. begin
  612. end;
  613. procedure tcginlinenode.second_frac_real;
  614. begin
  615. internalerror(2017052104);
  616. end;
  617. procedure tcginlinenode.second_abs_long;
  618. var
  619. tempreg1, tempreg2: tregister;
  620. begin
  621. secondpass(left);
  622. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  623. location:=left.location;
  624. location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  625. tempreg1:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  626. tempreg2:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  627. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,left.resultdef,left.resultdef.size*8-1,left.location.register,tempreg1);
  628. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_XOR,left.resultdef,left.location.register,tempreg1,tempreg2);
  629. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmlist,OP_SUB,left.resultdef,tempreg1,tempreg2,location.register);
  630. end;
  631. {*****************************************************************************
  632. ASSIGNED GENERIC HANDLING
  633. *****************************************************************************}
  634. procedure tcginlinenode.second_assigned;
  635. begin
  636. internalerror(2013091602);
  637. end;
  638. procedure Tcginlinenode.second_get_frame;
  639. begin
  640. {$if defined(x86) or defined(arm)}
  641. if current_procinfo.framepointer=NR_STACK_POINTER_REG then
  642. begin
  643. location_reset(location,LOC_CONSTANT,OS_ADDR);
  644. location.value:=0;
  645. end
  646. else
  647. {$endif defined(x86) or defined(arm)}
  648. begin
  649. location_reset(location,LOC_CREGISTER,OS_ADDR);
  650. location.register:=current_procinfo.framepointer;
  651. end;
  652. end;
  653. procedure Tcginlinenode.second_get_caller_frame;
  654. var
  655. frame_reg:Tregister;
  656. use_frame_pointer:boolean;
  657. begin
  658. frame_reg:=NR_NO;
  659. if left<>nil then
  660. begin
  661. secondpass(left);
  662. if left.location.loc=LOC_CONSTANT then
  663. use_frame_pointer:=true
  664. else
  665. begin
  666. hlcg.location_force_reg(current_asmdata.currasmlist,left.location,left.resultdef,voidpointertype,false);
  667. frame_reg:=left.location.register;
  668. use_frame_pointer:=false;
  669. end
  670. end
  671. else
  672. begin
  673. use_frame_pointer:=current_procinfo.framepointer=NR_STACK_POINTER_REG;
  674. frame_reg:=current_procinfo.framepointer;
  675. end;
  676. if use_frame_pointer then
  677. begin
  678. location_reset(location,LOC_CREGISTER,OS_ADDR);
  679. location.register:=NR_FRAME_POINTER_REG;
  680. end
  681. else
  682. begin
  683. location_reset_ref(location,LOC_REFERENCE,OS_ADDR,sizeof(pint),[]);
  684. location.reference.base:=frame_reg;
  685. end;
  686. end;
  687. procedure Tcginlinenode.second_get_caller_addr;
  688. var
  689. frame_ref:Treference;
  690. begin
  691. if current_procinfo.framepointer=NR_STACK_POINTER_REG then
  692. begin
  693. location_reset(location,LOC_REGISTER,OS_ADDR);
  694. location.register:=cg.getaddressregister(current_asmdata.currasmlist);
  695. reference_reset_base(frame_ref,NR_STACK_POINTER_REG,{current_procinfo.calc_stackframe_size}tg.lasttemp,ctempposinvalid,sizeof(pint),[]);
  696. cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
  697. end
  698. else
  699. begin
  700. location_reset(location,LOC_REGISTER,OS_ADDR);
  701. location.register:=cg.getaddressregister(current_asmdata.currasmlist);
  702. reference_reset_base(frame_ref,current_procinfo.framepointer,sizeof(pint),ctempposinvalid,sizeof(pint),[]);
  703. cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
  704. end;
  705. end;
  706. procedure tcginlinenode.second_rox_sar;
  707. var
  708. op : topcg;
  709. op1,op2 : tnode;
  710. begin
  711. { one or two parameters? }
  712. if (left.nodetype=callparan) and
  713. assigned(tcallparanode(left).right) then
  714. begin
  715. op1:=tcallparanode(tcallparanode(left).right).left;
  716. op2:=tcallparanode(left).left;
  717. secondpass(op2);
  718. end
  719. else
  720. begin
  721. op1:=left;
  722. op2:=nil;
  723. end;
  724. secondpass(op1);
  725. case inlinenumber of
  726. in_ror_x,
  727. in_ror_x_y:
  728. op:=OP_ROR;
  729. in_rol_x,
  730. in_rol_x_y:
  731. op:=OP_ROL;
  732. in_sar_x,
  733. in_sar_x_y:
  734. op:=OP_SAR;
  735. else
  736. internalerror(2013120110);
  737. end;
  738. hlcg.location_force_reg(current_asmdata.CurrAsmList,op1.location,op1.resultdef,resultdef,true);
  739. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  740. {$ifndef cpu64bitalu}
  741. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  742. begin
  743. location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  744. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  745. end
  746. else
  747. {$endif not cpu64bitalu}
  748. location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  749. if assigned(op2) then
  750. begin
  751. { rotating by a constant directly coded: }
  752. if op2.nodetype=ordconstn then
  753. {$ifndef cpu64bitalu}
  754. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  755. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,op,def_cgsize(resultdef),
  756. tordconstnode(op2).value.uvalue and (resultdef.size*8-1),
  757. op1.location.register64, location.register64)
  758. else
  759. {$endif not cpu64bitalu}
  760. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,
  761. tordconstnode(op2).value.uvalue and (resultdef.size*8-1),
  762. op1.location.register, location.register)
  763. else
  764. begin
  765. {$ifndef cpu64bitalu}
  766. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  767. begin
  768. hlcg.location_force_reg(current_asmdata.CurrAsmList,op2.location,
  769. op2.resultdef,alusinttype,true);
  770. cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,op,def_cgsize(resultdef),
  771. joinreg64(op2.location.register,NR_NO),op1.location.register64,
  772. location.register64);
  773. end
  774. else
  775. {$endif not cpu64bitalu}
  776. begin
  777. hlcg.location_force_reg(current_asmdata.CurrAsmList,op2.location,
  778. op2.resultdef,resultdef,true);
  779. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,resultdef,
  780. op2.location.register,op1.location.register,
  781. location.register);
  782. end;
  783. end;
  784. end
  785. else
  786. {$ifndef cpu64bitalu}
  787. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  788. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,op,def_cgsize(resultdef),1,
  789. op1.location.register64,location.register64)
  790. else
  791. {$endif not cpu64bitalu}
  792. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,1,
  793. op1.location.register,location.register);
  794. end;
  795. procedure tcginlinenode.second_BsfBsr;
  796. var
  797. reverse: boolean;
  798. opsize: tcgsize;
  799. begin
  800. reverse:=(inlinenumber = in_bsr_x);
  801. secondpass(left);
  802. opsize:=tcgsize2unsigned[left.location.size];
  803. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  804. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(opsize),true);
  805. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  806. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  807. cg.a_bit_scan_reg_reg(current_asmdata.CurrAsmList,reverse,opsize,location.size,left.location.register,location.register);
  808. end;
  809. procedure tcginlinenode.second_new;
  810. begin
  811. internalerror(2011012202);
  812. end;
  813. procedure tcginlinenode.second_popcnt;
  814. begin
  815. internalerror(2012082601);
  816. end;
  817. procedure tcginlinenode.second_fma;
  818. begin
  819. internalerror(2014032701);
  820. end;
  821. begin
  822. cinlinenode:=tcginlinenode;
  823. end.