cgbase.pas 14 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Some basic types and constants for the code generation
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# This unit exports some types which are used across the code generator }
  19. unit cgbase;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. cpuinfo,
  24. symconst;
  25. type
  26. { Location types where value can be stored }
  27. TCGLoc=(
  28. LOC_INVALID, { added for tracking problems}
  29. LOC_VOID, { no value is available }
  30. LOC_CONSTANT, { constant value }
  31. LOC_JUMP, { boolean results only, jump to false or true label }
  32. LOC_FLAGS, { boolean results only, flags are set }
  33. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  34. LOC_REFERENCE, { in memory value }
  35. LOC_REGISTER, { in a processor register }
  36. LOC_CREGISTER, { Constant register which shouldn't be modified }
  37. LOC_FPUREGISTER, { FPU stack }
  38. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  39. LOC_MMXREGISTER, { MMX register }
  40. { MMX register variable }
  41. LOC_CMMXREGISTER,
  42. LOC_SSEREGISTER,
  43. LOC_CSSEREGISTER,
  44. { multimedia register }
  45. LOC_MMREGISTER,
  46. { Constant multimedia reg which shouldn't be modified }
  47. LOC_CMMREGISTER
  48. );
  49. {# Generic opcodes, which must be supported by all processors
  50. }
  51. topcg =
  52. (
  53. OP_NONE,
  54. OP_ADD, { simple addition }
  55. OP_AND, { simple logical and }
  56. OP_DIV, { simple unsigned division }
  57. OP_IDIV, { simple signed division }
  58. OP_IMUL, { simple signed multiply }
  59. OP_MUL, { simple unsigned multiply }
  60. OP_NEG, { simple negate }
  61. OP_NOT, { simple logical not }
  62. OP_OR, { simple logical or }
  63. OP_SAR, { arithmetic shift-right }
  64. OP_SHL, { logical shift left }
  65. OP_SHR, { logical shift right }
  66. OP_SUB, { simple subtraction }
  67. OP_XOR { simple exclusive or }
  68. );
  69. {# Generic flag values - used for jump locations }
  70. TOpCmp =
  71. (
  72. OC_NONE,
  73. OC_EQ, { equality comparison }
  74. OC_GT, { greater than (signed) }
  75. OC_LT, { less than (signed) }
  76. OC_GTE, { greater or equal than (signed) }
  77. OC_LTE, { less or equal than (signed) }
  78. OC_NE, { not equal }
  79. OC_BE, { less or equal than (unsigned) }
  80. OC_B, { less than (unsigned) }
  81. OC_AE, { greater or equal than (unsigned) }
  82. OC_A { greater than (unsigned) }
  83. );
  84. { OS_NO is also used memory references with large data that can
  85. not be loaded in a register directly }
  86. TCgSize = (OS_NO,
  87. { integer registers }
  88. OS_8,OS_16,OS_32,OS_64,OS_S8,OS_S16,OS_S32,OS_S64,
  89. { single,double,extended,comp,float128 }
  90. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  91. { multi-media sizes: split in byte, word, dword, ... }
  92. { entities, then the signed counterparts }
  93. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_MS8,OS_MS16,OS_MS32,
  94. OS_MS64,OS_MS128);
  95. { Register types }
  96. TRegisterType = (
  97. R_INVALIDREGISTER, { = 0 }
  98. R_INTREGISTER, { = 1 }
  99. R_FPUREGISTER, { = 2 }
  100. { used by Intel only }
  101. R_MMXREGISTER, { = 3 }
  102. R_MMREGISTER, { = 4 }
  103. R_SPECIALREGISTER, { = 5 }
  104. R_ADDRESSREGISTER { = 6 }
  105. );
  106. { Sub registers }
  107. TSubRegister = (
  108. R_SUBNONE, { = 0; no sub register possible }
  109. R_SUBL, { = 1; 8 bits, Like AL }
  110. R_SUBH, { = 2; 8 bits, Like AH }
  111. R_SUBW, { = 3; 16 bits, Like AX }
  112. R_SUBD, { = 4; 32 bits, Like EAX }
  113. R_SUBQ, { = 5; 64 bits, Like RAX }
  114. R_SUBF64 { = 6; 64 bits float that allocates 2 FPU registers }
  115. );
  116. TSuperRegister = type byte;
  117. {
  118. The new register coding:
  119. SuperRegister (bits 0..7)
  120. Unused (bits 8..15)
  121. Subregister (bits 16..23)
  122. Register type (bits 24..31)
  123. }
  124. TRegister = type cardinal;
  125. TRegisterRec=packed record
  126. {$ifdef FPC_BIG_ENDIAN}
  127. regtype : Tregistertype;
  128. subreg : Tsubregister;
  129. unused : byte;
  130. supreg : Tsuperregister;
  131. {$else FPC_BIG_ENDIAN}
  132. supreg : Tsuperregister;
  133. unused : byte;
  134. subreg : Tsubregister;
  135. regtype : Tregistertype;
  136. {$endif FPC_BIG_ENDIAN}
  137. end;
  138. { A type to store register locations for 64 Bit values. }
  139. {$ifdef cpu64bit}
  140. tregister64 = tregister;
  141. {$else cpu64bit}
  142. tregister64 = packed record
  143. reglo,reghi : tregister;
  144. end;
  145. {$endif cpu64bit}
  146. { Set type definition for registers }
  147. tsuperregisterset = set of tsuperregister;
  148. { Temp types }
  149. ttemptype = (tt_none,
  150. tt_free,tt_normal,tt_persistent,
  151. tt_noreuse,tt_freenoreuse,
  152. tt_ansistring,tt_freeansistring,
  153. tt_widestring,tt_freewidestring,
  154. tt_interfacecom,tt_freeinterfacecom);
  155. ttemptypeset = set of ttemptype;
  156. pmmshuffle = ^tmmshuffle;
  157. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  158. passed to an mm operation is nil, it means that the whole location is moved }
  159. tmmshuffle = record
  160. { describes how many shuffles are actually described, if len=0 then
  161. moving the scalar with index 0 to the scalar with index 0 is meant }
  162. len : byte;
  163. { lower nibble of each entry of this array describes index of the source data index while
  164. the upper nibble describes the destination index }
  165. shuffles : array[1..1] of byte;
  166. end;
  167. const
  168. { alias for easier understanding }
  169. R_SSEREGISTER = R_MMREGISTER;
  170. { Invalid register number }
  171. RS_INVALID = $ff;
  172. tcgsize2size : Array[tcgsize] of integer =
  173. { integer values }
  174. (0,1,2,4,8,1,2,4,8,
  175. { floating point values }
  176. 4,8,EXTENDED_SIZE,8,16,
  177. { multimedia values }
  178. 1,2,4,8,16,1,2,4,8,16);
  179. tfloat2tcgsize: array[tfloattype] of tcgsize =
  180. (OS_F32,OS_F64,OS_F80,OS_C64,OS_C64,OS_F128);
  181. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  182. (s32real,s64real,s80real,s64comp);
  183. { Table to convert tcgsize variables to the correspondending
  184. unsigned types }
  185. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  186. OS_8,OS_16,OS_32,OS_64,OS_8,OS_16,OS_32,OS_64,
  187. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  188. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M8,OS_M16,OS_M32,
  189. OS_M64,OS_M128);
  190. tcgloc2str : array[TCGLoc] of string[11] = (
  191. 'LOC_INVALID',
  192. 'LOC_VOID',
  193. 'LOC_CONST',
  194. 'LOC_JUMP',
  195. 'LOC_FLAGS',
  196. 'LOC_CREF',
  197. 'LOC_REF',
  198. 'LOC_REG',
  199. 'LOC_CREG',
  200. 'LOC_FPUREG',
  201. 'LOC_CFPUREG',
  202. 'LOC_MMXREG',
  203. 'LOC_CMMXREG',
  204. 'LOC_SSEREG',
  205. 'LOC_CSSEREG',
  206. 'LOC_MMREG',
  207. 'LOC_CMMREG');
  208. var
  209. mms_movescalar : pmmshuffle;
  210. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  211. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  212. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  213. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  214. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  215. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  216. function generic_regname(r:tregister):string;
  217. {# From a constant numeric value, return the abstract code generator
  218. size.
  219. }
  220. function int_cgsize(const a: aword): tcgsize;
  221. { return the inverse condition of opcmp }
  222. function inverse_opcmp(opcmp: topcmp): topcmp;
  223. { return whether op is commutative }
  224. function commutativeop(op: topcg): boolean;
  225. { returns true, if shuffle describes a real shuffle operation and not only a move }
  226. function realshuffle(shuffle : pmmshuffle) : boolean;
  227. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  228. the source }
  229. procedure removeshuffles(var shuffle : tmmshuffle);
  230. implementation
  231. uses
  232. verbose;
  233. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  234. begin
  235. tregisterrec(result).regtype:=rt;
  236. tregisterrec(result).unused:=0;
  237. tregisterrec(result).supreg:=sr;
  238. tregisterrec(result).subreg:=sb;
  239. end;
  240. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  241. begin
  242. result:=tregisterrec(r).subreg;
  243. end;
  244. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  245. begin
  246. result:=tregisterrec(r).supreg;
  247. end;
  248. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  249. begin
  250. result:=tregisterrec(r).regtype;
  251. end;
  252. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  253. begin
  254. tregisterrec(r).subreg:=sr;
  255. end;
  256. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  257. begin
  258. tregisterrec(r).supreg:=sr;
  259. end;
  260. function generic_regname(r:tregister):string;
  261. var
  262. t,sub : char;
  263. nr : string[12];
  264. begin
  265. case getregtype(r) of
  266. R_INTREGISTER:
  267. t:='i';
  268. R_FPUREGISTER:
  269. t:='f';
  270. R_MMXREGISTER:
  271. t:='x';
  272. R_MMREGISTER:
  273. t:='m';
  274. else
  275. begin
  276. result:='INVALID';
  277. exit;
  278. end;
  279. end;
  280. str(getsupreg(r),nr);
  281. case getsubreg(r) of
  282. R_SUBNONE:
  283. sub:=' ';
  284. R_SUBL:
  285. sub:='l';
  286. R_SUBH:
  287. sub:='h';
  288. R_SUBW:
  289. sub:='w';
  290. R_SUBD:
  291. sub:='d';
  292. R_SUBQ:
  293. sub:='q';
  294. else
  295. internalerror(200308252);
  296. end;
  297. if sub<>' ' then
  298. result:=t+'reg'+nr+sub
  299. else
  300. result:=t+'reg'+nr;
  301. end;
  302. function int_cgsize(const a: aword): tcgsize;
  303. begin
  304. if a > 8 then
  305. begin
  306. int_cgsize := OS_NO;
  307. exit;
  308. end;
  309. case byte(a) of
  310. 1 :
  311. result := OS_8;
  312. 2 :
  313. result := OS_16;
  314. 3,4 :
  315. result := OS_32;
  316. 5..8 :
  317. result := OS_64;
  318. end;
  319. end;
  320. function inverse_opcmp(opcmp: topcmp): topcmp;
  321. const
  322. list: array[TOpCmp] of TOpCmp =
  323. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  324. OC_B,OC_BE);
  325. begin
  326. inverse_opcmp := list[opcmp];
  327. end;
  328. function commutativeop(op: topcg): boolean;
  329. const
  330. list: array[topcg] of boolean =
  331. (true,true,true,false,false,true,true,false,false,
  332. true,false,false,false,false,true);
  333. begin
  334. commutativeop := list[op];
  335. end;
  336. function realshuffle(shuffle : pmmshuffle) : boolean;
  337. var
  338. i : longint;
  339. begin
  340. realshuffle:=true;
  341. if (shuffle=nil) or (shuffle^.len=0) then
  342. realshuffle:=false
  343. else
  344. begin
  345. for i:=1 to shuffle^.len do
  346. begin
  347. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 8) then
  348. exit;
  349. end;
  350. realshuffle:=false;
  351. end;
  352. end;
  353. procedure removeshuffles(var shuffle : tmmshuffle);
  354. var
  355. i : longint;
  356. begin
  357. if shuffle.len=0 then
  358. exit;
  359. for i:=1 to shuffle.len do
  360. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f0) or ((shuffle.shuffles[i] and $f0) shr 8);
  361. end;
  362. initialization
  363. new(mms_movescalar);
  364. mms_movescalar^.len:=0;
  365. finalization
  366. dispose(mms_movescalar);
  367. end.
  368. {
  369. $Log$
  370. Revision 1.70 2003-10-13 01:10:01 florian
  371. * some ideas for mm support implemented
  372. Revision 1.69 2003/10/11 16:06:42 florian
  373. * fixed some MMX<->SSE
  374. * started to fix ppc, needs an overhaul
  375. + stabs info improve for spilling, not sure if it works correctly/completly
  376. - MMX_SUPPORT removed from Makefile.fpc
  377. Revision 1.68 2003/10/09 21:31:37 daniel
  378. * Register allocator splitted, ans abstract now
  379. Revision 1.67 2003/10/01 20:34:48 peter
  380. * procinfo unit contains tprocinfo
  381. * cginfo renamed to cgbase
  382. * moved cgmessage to verbose
  383. * fixed ppc and sparc compiles
  384. }