aoptcpu.pas 13 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses
  22. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. function GetNextInstructionUsingReg(Current: tai;
  26. var Next: tai; reg: TRegister): Boolean;
  27. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  28. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  29. function RegUsedAfterInstruction(reg: Tregister; p: tai;
  30. var AllUsedRegs: TAllUsedRegs): Boolean;
  31. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  32. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  33. End;
  34. Implementation
  35. uses
  36. globtype,globals,aasmcpu;
  37. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  38. begin
  39. result :=
  40. (instr.typ = ait_instruction) and
  41. (taicpu(instr).opcode = op);
  42. end;
  43. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  44. begin
  45. result:=(oper.typ=top_reg) and (oper.reg=reg);
  46. end;
  47. function IsSameReg(this,next: taicpu): boolean;
  48. begin
  49. result:=(next.ops=3) and
  50. (next.oper[2]^.typ=top_reg) and
  51. (next.oper[0]^.typ=top_reg) and
  52. (next.oper[2]^.reg=next.oper[0]^.reg) and
  53. (next.oper[2]^.reg=this.oper[2]^.reg);
  54. end;
  55. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  56. var
  57. p: taicpu;
  58. i: longint;
  59. begin
  60. result:=false;
  61. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  62. exit;
  63. p:=taicpu(hp);
  64. i:=0;
  65. while(i<p.ops) do
  66. begin
  67. case p.oper[I]^.typ of
  68. top_reg:
  69. result:=(p.oper[I]^.reg=reg) and (I<2);
  70. top_ref:
  71. result:=
  72. (p.oper[I]^.ref^.base=reg) or
  73. (p.oper[I]^.ref^.index=reg);
  74. end;
  75. if result then exit; {Bailout if we found something}
  76. Inc(I);
  77. end;
  78. end;
  79. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  80. var
  81. p: taicpu;
  82. begin
  83. p:=taicpu(hp);
  84. result:=false;
  85. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  86. exit;
  87. case p.opcode of
  88. { These instructions do not write into a register at all }
  89. A_NOP,
  90. A_FCMPs,A_FCMPd,A_FCMPq,A_CMP,
  91. A_BA,A_Bxx,A_FBA,A_FBxx,
  92. A_STB,A_STH,A_ST,A_STF,A_STDF,
  93. A_STX:
  94. exit;
  95. end;
  96. result:=(p.ops>0) and (p.oper[p.ops-1]^.typ=top_reg) and
  97. (p.oper[p.ops-1]^.reg=reg);
  98. end;
  99. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  100. var Next: tai; reg: TRegister): Boolean;
  101. begin
  102. Next:=Current;
  103. repeat
  104. Result:=GetNextInstruction(Next,Next);
  105. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  106. (is_calljmp(taicpu(Next).opcode));
  107. if result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  108. begin
  109. result:=false;
  110. next:=nil;
  111. end;
  112. end;
  113. function TCpuAsmOptimizer.RegUsedAfterInstruction(reg: Tregister; p: tai;
  114. var AllUsedRegs: TAllUsedRegs): Boolean;
  115. begin
  116. AllUsedRegs[getregtype(reg)].Update(tai(p.Next),true);
  117. RegUsedAfterInstruction :=
  118. AllUsedRegs[getregtype(reg)].IsUsed(reg) and
  119. not(regLoadedWithNewValue(reg,p)) and
  120. (
  121. not(GetNextInstruction(p,p)) or
  122. instructionLoadsFromReg(reg,p) or
  123. not(regLoadedWithNewValue(reg,p))
  124. );
  125. end;
  126. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  127. var
  128. next,hp1: tai;
  129. alloc,dealloc: tai_regalloc;
  130. begin
  131. { Fold
  132. op ...,%reg1
  133. ...
  134. opcode %reg1,%reg2
  135. dealloc %reg1
  136. into
  137. op ...,%reg2
  138. opcode may be A_MOV, A_FMOVs, A_FMOVd, etc.
  139. }
  140. result:=false;
  141. if (taicpu(p).ops=3) and
  142. { don't mess with instructions using %g0 for destination }
  143. (taicpu(p).oper[2]^.reg<>NR_G0) and
  144. GetNextInstructionUsingReg(p,next,taicpu(p).oper[2]^.reg) and
  145. MatchInstruction(next,opcode) and
  146. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[2]^.reg) and
  147. { the destination register of mov cannot be used between p and next }
  148. (not RegUsedBetween(taicpu(next).oper[1]^.reg,p,next)) and
  149. { This is necessary so 'mov %reg1,%y' is not folded. Compiler should
  150. probably generate A_WRY opcode for this, not A_MOV. }
  151. (getregtype(taicpu(next).oper[1]^.reg)<>R_SPECIALREGISTER) then
  152. begin
  153. dealloc:=FindRegDealloc(taicpu(p).oper[2]^.reg,tai(next.Next));
  154. if assigned(dealloc) then
  155. begin
  156. { taicpu(p).oper[2]^.reg is not used anymore, try to find its allocation
  157. and remove it if possible }
  158. GetLastInstruction(p,hp1);
  159. asml.Remove(dealloc);
  160. alloc:=FindRegAlloc(taicpu(p).oper[2]^.reg,tai(hp1.Next));
  161. if assigned(alloc) then
  162. begin
  163. asml.Remove(alloc);
  164. alloc.free;
  165. dealloc.free;
  166. end
  167. else
  168. asml.InsertAfter(dealloc,p);
  169. { try to move the allocation of the target register }
  170. GetLastInstruction(next,hp1);
  171. alloc:=FindRegAlloc(taicpu(next).oper[1]^.reg,tai(hp1.Next));
  172. if assigned(alloc) then
  173. begin
  174. asml.Remove(alloc);
  175. asml.InsertBefore(alloc,p);
  176. { adjust used regs }
  177. IncludeRegInUsedRegs(taicpu(next).oper[1]^.reg,UsedRegs);
  178. end;
  179. { finally get rid of the mov }
  180. taicpu(p).loadreg(2,taicpu(next).oper[1]^.reg);
  181. asml.remove(next);
  182. next.free;
  183. end;
  184. end;
  185. end;
  186. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  187. var
  188. next,next2: tai;
  189. TmpUsedRegs: TAllUsedRegs;
  190. begin
  191. result:=false;
  192. case p.typ of
  193. ait_instruction:
  194. begin
  195. case taicpu(p).opcode of
  196. A_SLL:
  197. begin
  198. { if this is sign/zero extension... }
  199. if (taicpu(p).oper[1]^.typ=top_const) and
  200. GetNextInstruction(p,next) and
  201. (MatchInstruction(next,A_SRL) or MatchInstruction(next,A_SRA)) and
  202. IsSameReg(taicpu(p),taicpu(next)) and
  203. (taicpu(next).oper[1]^.typ=top_const) and
  204. (taicpu(next).oper[1]^.val=taicpu(p).oper[1]^.val) and
  205. (taicpu(next).oper[1]^.val=16) and
  206. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  207. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[2]^.reg) and
  208. MatchInstruction(next2,A_STH) and
  209. (taicpu(next2).oper[0]^.typ=top_reg) and
  210. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[2]^.reg) and
  211. { the initial register may not be reused }
  212. (not RegUsedBetween(taicpu(p).oper[0]^.reg,next,next2)) then
  213. begin
  214. CopyUsedRegs(TmpUsedRegs);
  215. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  216. UpdateUsedRegs(TmpUsedRegs, tai(next.next));
  217. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next2,TmpUsedRegs) then
  218. begin
  219. taicpu(next2).loadreg(0,taicpu(p).oper[0]^.reg);
  220. asml.remove(p);
  221. asml.remove(next);
  222. p.free;
  223. next.free;
  224. p:=next2;
  225. end;
  226. ReleaseUsedRegs(TmpUsedRegs);
  227. end
  228. else
  229. TryRemoveMov(p,A_MOV);
  230. end;
  231. A_SRL:
  232. begin
  233. { happens with a_load_const_ref(...,0), where %g0 is used instead of 0 }
  234. { TODO: override a_load_reg_ref_unaligned and don't generate such shifts }
  235. if (taicpu(p).oper[2]^.typ=top_reg) and
  236. (taicpu(p).oper[2]^.reg=NR_G0) then
  237. begin
  238. next:=tai(p.next);
  239. asml.remove(p);
  240. p.free;
  241. p:=next;
  242. end
  243. { kill zero extension after right shift (e.g. happens with "high(dword)")}
  244. else if (taicpu(p).oper[1]^.typ=top_const) and
  245. (taicpu(p).oper[1]^.val>=16) and
  246. GetNextInstruction(p,next) and
  247. MatchInstruction(next,A_SLL) and
  248. GetNextInstruction(next,next2) and
  249. MatchInstruction(next2,A_SRL) and
  250. IsSameReg(taicpu(p),taicpu(next)) and
  251. IsSameReg(taicpu(p),taicpu(next2)) and
  252. (taicpu(next).oper[1]^.typ=top_const) and
  253. (taicpu(next2).oper[1]^.typ=top_const) and
  254. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  255. (taicpu(next).oper[1]^.val=16) then
  256. begin
  257. asml.remove(next);
  258. asml.remove(next2);
  259. next.free;
  260. next2.free;
  261. end
  262. else
  263. TryRemoveMov(p,A_MOV);
  264. end;
  265. A_AND:
  266. begin
  267. { Remove sign extension after 'and' if bit 7 of const operand is clear }
  268. if (taicpu(p).oper[1]^.typ=top_const) and
  269. GetNextInstruction(p,next) and
  270. MatchInstruction(next,A_SLL) and
  271. GetNextInstruction(next,next2) and
  272. MatchInstruction(next2,A_SRA) and
  273. IsSameReg(taicpu(p),taicpu(next)) and
  274. IsSameReg(taicpu(p),taicpu(next2)) and
  275. (taicpu(next).oper[1]^.typ=top_const) and
  276. (taicpu(next2).oper[1]^.typ=top_const) and
  277. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  278. ({(
  279. (taicpu(p).oper[2]^.val<=$7fff) and
  280. (taicpu(next).oper[2]^.val=16)
  281. ) or }(
  282. (taicpu(p).oper[1]^.val<=$7f) and
  283. (taicpu(next).oper[1]^.val=24)
  284. )) then
  285. begin
  286. asml.remove(next);
  287. asml.remove(next2);
  288. next.free;
  289. next2.free;
  290. end
  291. else if (taicpu(p).oper[1]^.typ=top_const) and
  292. (taicpu(p).oper[1]^.val=255) and
  293. GetNextInstruction(p,next) and
  294. MatchInstruction(next,A_STB) and
  295. (taicpu(next).oper[0]^.typ=top_reg) and
  296. (taicpu(next).oper[0]^.reg=taicpu(p).oper[2]^.reg) then
  297. begin
  298. CopyUsedRegs(TmpUsedRegs);
  299. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  300. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next,TmpUsedRegs) then
  301. begin
  302. taicpu(next).loadreg(0,taicpu(p).oper[0]^.reg);
  303. asml.remove(p);
  304. p.free;
  305. p:=next;
  306. end;
  307. ReleaseUsedRegs(TmpUsedRegs);
  308. end
  309. else
  310. TryRemoveMov(p,A_MOV);
  311. end;
  312. A_ADD,A_ADDcc,A_ADDX,
  313. A_SUB,A_SUBcc,A_SUBX,
  314. A_SRA,
  315. A_ANDcc,A_OR,A_ORcc,A_XOR,A_XORcc:
  316. TryRemoveMov(p,A_MOV);
  317. A_FADDs, A_FSUBs, A_FMULs, A_FDIVs,
  318. A_FABSs, A_FNEGs, A_FSQRTs,
  319. A_FDTOs, A_FITOs, A_FQTOs:
  320. TryRemoveMov(p,A_FMOVs);
  321. A_FADDd, A_FSUBd, A_FMULd, A_FDIVd,
  322. A_FABSd, A_FNEGd, A_FSQRTd,
  323. A_FSTOd, A_FITOd, A_FQTOd:
  324. TryRemoveMov(p,A_FMOVd);
  325. end;
  326. end;
  327. end;
  328. end;
  329. begin
  330. casmoptimizer:=TCpuAsmOptimizer;
  331. end.