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aasmcpu.pas
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110a5642c0
- removed ait_weak/tai_weak, and replaced it with the previously existing
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%!s(int64=9) %!d(string=hai) anos |
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agavrgas.pas
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991e1f49bd
* store a pointer to the used tasminfo record in every assembler writer, so
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%!s(int64=10) %!d(string=hai) anos |
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aoptcpu.pas
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baae6ec169
Fix incorrect AVR optimization.
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%!s(int64=9) %!d(string=hai) anos |
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aoptcpub.pas
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03880c2f74
Added some peephole optimizations, and fixed generic unconditional jump optimizations, for AVR.
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%!s(int64=10) %!d(string=hai) anos |
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aoptcpud.pas
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bc73f9021c
Merged revisions 5891-10167,10169-10180 via svnmerge from
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%!s(int64=17) %!d(string=hai) anos |
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avrreg.dat
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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cgcpu.pas
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159c28eca8
Fix AVR comparison with zero.
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%!s(int64=9) %!d(string=hai) anos |
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cpubase.pas
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ffe67a93b4
Fix is_calljmp to include call instructions. This was breaking some optimizations previously.
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%!s(int64=10) %!d(string=hai) anos |
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cpuinfo.pas
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56b6cedcf4
* increase ram size of the avrsim controller target
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%!s(int64=9) %!d(string=hai) anos |
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cpunode.pas
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5ec4d38231
Add support for ram-less AVR chips and simultanously optimize flash/ram size the initfinal calling sequence.
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%!s(int64=9) %!d(string=hai) anos |
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cpupara.pas
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fa3b0ca312
* support marking defs created via the getreusable*() class methods as
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%!s(int64=9) %!d(string=hai) anos |
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cpupi.pas
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e733efbbc2
* proper tavrprocinfo.calc_stackframe_size
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%!s(int64=10) %!d(string=hai) anos |
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cputarg.pas
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0e13d07a31
+ more avr code
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%!s(int64=17) %!d(string=hai) anos |
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hlcgcpu.pas
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b745dcc64c
* moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because
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%!s(int64=11) %!d(string=hai) anos |
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itcpugas.pas
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652f623983
* mulsu opcode spelling fixed
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%!s(int64=10) %!d(string=hai) anos |
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navradd.pas
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d014572b8e
* do not use an extra register, if CPC does a comparison with 0,
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%!s(int64=10) %!d(string=hai) anos |
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navrcnv.pas
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061a1aacf3
* named class properly
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%!s(int64=10) %!d(string=hai) anos |
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navrmat.pas
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10b2ea3b1b
* use handle_locjump() instead of local inlined version
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%!s(int64=10) %!d(string=hai) anos |
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navrutil.pas
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5ec4d38231
Add support for ram-less AVR chips and simultanously optimize flash/ram size the initfinal calling sequence.
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%!s(int64=9) %!d(string=hai) anos |
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raavr.pas
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0e13d07a31
+ more avr code
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%!s(int64=17) %!d(string=hai) anos |
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raavrgas.pas
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2dae6a2dd7
Added predecrement addressing support to the AVR assembler reader
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%!s(int64=10) %!d(string=hai) anos |
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ravrcon.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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ravrdwa.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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ravrnor.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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ravrnum.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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ravrrni.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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ravrsri.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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ravrsta.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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ravrstd.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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ravrsup.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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%!s(int64=13) %!d(string=hai) anos |
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rgcpu.pas
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cf58a7ad60
* cosmetics
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%!s(int64=10) %!d(string=hai) anos |
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symcpu.pas
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7dd1d6aa77
o fixes handling of iso i/o parameters/program parameters:
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%!s(int64=10) %!d(string=hai) anos |
florian
56b6cedcf4
* increase ram size of the avrsim controller target