daopt386.pas 95 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { useful for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO,
  49. OS_NO);
  50. {********************************* Types *********************************}
  51. type
  52. TRegEnum = RS_EAX..RS_ESP;
  53. TRegArray = Array[TRegEnum] of tsuperregister;
  54. TRegSet = Set of TRegEnum;
  55. toptreginfo = Record
  56. NewRegsEncountered, OldRegsEncountered: TRegSet;
  57. RegsLoadedForRef: TRegSet;
  58. lastReload: array[RS_EAX..RS_ESP] of tai;
  59. New2OldReg: TRegArray;
  60. end;
  61. {possible actions on an operand: read, write or modify (= read & write)}
  62. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  63. {the possible states of a flag}
  64. TFlagContents = (F_Unknown, F_notSet, F_Set);
  65. TContent = Packed Record
  66. {start and end of block instructions that defines the
  67. content of this register.}
  68. StartMod: tai;
  69. MemWrite: taicpu;
  70. {how many instructions starting with StarMod does the block consist of}
  71. NrOfMods: Word;
  72. {the type of the content of the register: unknown, memory, constant}
  73. Typ: Byte;
  74. case byte of
  75. {starts at 0, gets increased everytime the register is written to}
  76. 1: (WState: Byte;
  77. {starts at 0, gets increased everytime the register is read from}
  78. RState: Byte);
  79. { to compare both states in one operation }
  80. 2: (state: word);
  81. end;
  82. {Contents of the integer registers}
  83. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  84. {contents of the FPU registers}
  85. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  86. {$ifdef tempOpts}
  87. { linked list which allows searching/deleting based on value, no extra frills}
  88. PSearchLinkedListItem = ^TSearchLinkedListItem;
  89. TSearchLinkedListItem = object(TLinkedList_Item)
  90. constructor init;
  91. function equals(p: PSearchLinkedListItem): boolean; virtual;
  92. end;
  93. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  94. TSearchDoubleIntItem = object(TLinkedList_Item)
  95. constructor init(_int1,_int2: longint);
  96. function equals(p: PSearchLinkedListItem): boolean; virtual;
  97. private
  98. int1, int2: longint;
  99. end;
  100. PSearchLinkedList = ^TSearchLinkedList;
  101. TSearchLinkedList = object(TLinkedList)
  102. function searchByValue(p: PSearchLinkedListItem): boolean;
  103. procedure removeByValue(p: PSearchLinkedListItem);
  104. end;
  105. {$endif tempOpts}
  106. {information record with the contents of every register. Every tai object
  107. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  108. TtaiProp = Record
  109. Regs: TRegContent;
  110. { FPURegs: TRegFPUContent;} {currently not yet used}
  111. { allocated Registers }
  112. UsedRegs: TRegSet;
  113. { status of the direction flag }
  114. DirFlag: TFlagContents;
  115. {$ifdef tempOpts}
  116. { currently used temps }
  117. tempAllocs: PSearchLinkedList;
  118. {$endif tempOpts}
  119. { can this instruction be removed? }
  120. CanBeRemoved: Boolean;
  121. { are the resultflags set by this instruction used? }
  122. FlagsUsed: Boolean;
  123. end;
  124. ptaiprop = ^TtaiProp;
  125. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  126. PtaiPropBlock = ^TtaiPropBlock;
  127. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  128. TLabelTableItem = Record
  129. taiObj: tai;
  130. {$ifDef JumpAnal}
  131. InstrNr: Longint;
  132. RefsFound: Word;
  133. JmpsProcessed: Word
  134. {$endif JumpAnal}
  135. end;
  136. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  137. PLabelTable = ^TLabelTable;
  138. {*********************** procedures and functions ************************}
  139. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  140. function isgp32reg(supreg: tsuperregister): Boolean;
  141. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  142. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  143. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  145. function reginop(supreg: tsuperregister; const o:toper): boolean;
  146. function instrWritesFlags(p: tai): boolean;
  147. function instrReadsFlags(p: tai): boolean;
  148. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  149. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  150. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  151. const c: tcontent): boolean;
  152. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  153. const c: tcontent; var memwritedestroyed: boolean): boolean;
  154. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  155. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  156. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  157. procedure SkipHead(var p: tai);
  158. function labelCanBeSkipped(p: tai_label): boolean;
  159. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  160. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  161. hp: tai): boolean;
  162. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  163. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  164. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  165. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  166. function sizescompatible(loadsize,newsize: topsize): boolean;
  167. function OpsEqual(const o1,o2:toper): Boolean;
  168. type
  169. tdfaobj = class
  170. constructor create(_list: TAsmList); virtual;
  171. function pass_1(_blockstart: tai): tai;
  172. function pass_generate_code: boolean;
  173. procedure clear;
  174. function getlabelwithsym(sym: tasmlabel): tai;
  175. private
  176. { asm list we're working on }
  177. list: TAsmList;
  178. { current part of the asm list }
  179. blockstart, blockend: tai;
  180. { the amount of taiObjects in the current part of the assembler list }
  181. nroftaiobjs: longint;
  182. { Array which holds all TtaiProps }
  183. taipropblock: ptaipropblock;
  184. { all labels in the current block: their value mapped to their location }
  185. lolab, hilab, labdif: longint;
  186. labeltable: plabeltable;
  187. { Walks through the list to find the lowest and highest label number, inits the }
  188. { labeltable and fixes/optimizes some regallocs }
  189. procedure initlabeltable;
  190. function initdfapass2: boolean;
  191. procedure dodfapass2;
  192. end;
  193. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  194. procedure incState(var S: Byte; amount: longint);
  195. {******************************* Variables *******************************}
  196. var
  197. dfa: tdfaobj;
  198. {*********************** end of Interface section ************************}
  199. Implementation
  200. Uses
  201. {$ifdef csdebug}
  202. cutils,
  203. {$else}
  204. {$ifdef statedebug}
  205. cutils,
  206. {$else}
  207. {$ifdef allocregdebug}
  208. cutils,
  209. {$endif}
  210. {$endif}
  211. {$endif}
  212. globals, systems, verbose, symconst, cgobj, procinfo,
  213. aoptx86;
  214. Type
  215. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  216. var
  217. {How many instructions are between the current instruction and the last one
  218. that modified the register}
  219. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  220. {$ifdef tempOpts}
  221. constructor TSearchLinkedListItem.init;
  222. begin
  223. end;
  224. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  225. begin
  226. equals := false;
  227. end;
  228. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  229. begin
  230. int1 := _int1;
  231. int2 := _int2;
  232. end;
  233. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  234. begin
  235. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  236. (TSearchDoubleIntItem(p).int2 = int2);
  237. end;
  238. function TSearchLinkedList.FindByValue(p: PSearchLinkedListItem): boolean;
  239. var temp: PSearchLinkedListItem;
  240. begin
  241. temp := first;
  242. while (temp <> last.next) and
  243. not(temp.equals(p)) do
  244. temp := temp.next;
  245. searchByValue := temp <> last.next;
  246. end;
  247. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  248. begin
  249. temp := first;
  250. while (temp <> last.next) and
  251. not(temp.equals(p)) do
  252. temp := temp.next;
  253. if temp <> last.next then
  254. begin
  255. remove(temp);
  256. dispose(temp,done);
  257. end;
  258. end;
  259. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  260. {updates UsedRegs with the RegAlloc Information coming after p}
  261. begin
  262. repeat
  263. while assigned(p) and
  264. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  265. ((p.typ = ait_label) and
  266. labelCanBeSkipped(tai_label(current)))) Do
  267. p := tai(p.next);
  268. while assigned(p) and
  269. (p.typ=ait_RegAlloc) Do
  270. begin
  271. case tai_regalloc(p).ratype of
  272. ra_alloc :
  273. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  274. ra_dealloc :
  275. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  276. end;
  277. p := tai(p.next);
  278. end;
  279. until not(assigned(p)) or
  280. (not(p.typ in SkipInstr) and
  281. not((p.typ = ait_label) and
  282. labelCanBeSkipped(tai_label(current))));
  283. end;
  284. {$endif tempOpts}
  285. {************************ Create the Label table ************************}
  286. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  287. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  288. { starting with Starttai and ending with the next "real" instruction }
  289. begin
  290. findregalloc := false;
  291. repeat
  292. while assigned(starttai) and
  293. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  294. ((starttai.typ = ait_label) and
  295. labelcanbeskipped(tai_label(starttai)))) do
  296. starttai := tai(starttai.next);
  297. if assigned(starttai) and
  298. (starttai.typ = ait_regalloc) then
  299. begin
  300. if (tai_regalloc(Starttai).ratype = ratyp) and
  301. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  302. begin
  303. findregalloc:=true;
  304. break;
  305. end;
  306. starttai := tai(starttai.next);
  307. end
  308. else
  309. break;
  310. until false;
  311. end;
  312. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  313. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  314. var
  315. hp2: tai;
  316. begin
  317. hp2 := p;
  318. repeat
  319. hp2 := tai(hp2.previous);
  320. if assigned(hp2) and
  321. (hp2.typ = ait_regalloc) and
  322. (tai_regalloc(hp2).ratype=ra_dealloc) and
  323. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  324. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  325. begin
  326. asml.remove(hp2);
  327. hp2.free;
  328. break;
  329. end;
  330. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  331. end;
  332. begin
  333. case current_procinfo.procdef.returndef.typ of
  334. arraydef,recorddef,pointerdef,
  335. stringdef,enumdef,procdef,objectdef,errordef,
  336. filedef,setdef,procvardef,
  337. classrefdef,forwarddef:
  338. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  339. orddef:
  340. if current_procinfo.procdef.returndef.size <> 0 then
  341. begin
  342. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  343. { for int64/qword }
  344. if current_procinfo.procdef.returndef.size = 8 then
  345. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  346. end;
  347. end;
  348. end;
  349. procedure getNoDeallocRegs(var regs: tregset);
  350. var
  351. regCounter: TSuperRegister;
  352. begin
  353. regs := [];
  354. case current_procinfo.procdef.returndef.typ of
  355. arraydef,recorddef,pointerdef,
  356. stringdef,enumdef,procdef,objectdef,errordef,
  357. filedef,setdef,procvardef,
  358. classrefdef,forwarddef:
  359. regs := [RS_EAX];
  360. orddef:
  361. if current_procinfo.procdef.returndef.size <> 0 then
  362. begin
  363. regs := [RS_EAX];
  364. { for int64/qword }
  365. if current_procinfo.procdef.returndef.size = 8 then
  366. regs := regs + [RS_EDX];
  367. end;
  368. end;
  369. for regCounter := RS_EAX to RS_EBX do
  370. { if not(regCounter in rg.usableregsint) then}
  371. include(regs,regcounter);
  372. end;
  373. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  374. var
  375. hp1: tai;
  376. funcResRegs: tregset;
  377. { funcResReg: boolean;}
  378. begin
  379. { if not(supreg in rg.usableregsint) then
  380. exit;}
  381. { if not(supreg in [RS_EDI]) then
  382. exit;}
  383. getNoDeallocRegs(funcresregs);
  384. { funcResRegs := funcResRegs - rg.usableregsint;}
  385. { funcResRegs := funcResRegs - [RS_EDI];}
  386. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  387. { funcResReg := getsupreg(reg) in funcresregs;}
  388. hp1 := p;
  389. {
  390. while not(funcResReg and
  391. (p.typ = ait_instruction) and
  392. (taicpu(p).opcode = A_JMP) and
  393. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  394. getLastInstruction(p, p) and
  395. not(regInInstruction(supreg, p)) do
  396. hp1 := p;
  397. }
  398. { don't insert a dealloc for registers which contain the function result }
  399. { if they are followed by a jump to the exit label (for exit(...)) }
  400. { if not(funcResReg) or
  401. not((hp1.typ = ait_instruction) and
  402. (taicpu(hp1).opcode = A_JMP) and
  403. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  404. begin
  405. p := tai_regalloc.deAlloc(reg,nil);
  406. insertLLItem(AsmL, hp1.previous, hp1, p);
  407. end;
  408. end;
  409. {************************ Search the Label table ************************}
  410. function findlabel(l: tasmlabel; var hp: tai): boolean;
  411. {searches for the specified label starting from hp as long as the
  412. encountered instructions are labels, to be able to optimize constructs like
  413. jne l2 jmp l2
  414. jmp l3 and l1:
  415. l1: l2:
  416. l2:}
  417. var
  418. p: tai;
  419. begin
  420. p := hp;
  421. while assigned(p) and
  422. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  423. if (p.typ <> ait_Label) or
  424. (tai_label(p).labsym <> l) then
  425. GetNextInstruction(p, p)
  426. else
  427. begin
  428. hp := p;
  429. findlabel := true;
  430. exit
  431. end;
  432. findlabel := false;
  433. end;
  434. {************************ Some general functions ************************}
  435. function tch2reg(ch: tinschange): tsuperregister;
  436. {converts a TChange variable to a TRegister}
  437. const
  438. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  439. begin
  440. if (ch <= CH_REDI) then
  441. tch2reg := ch2reg[ch]
  442. else if (ch <= CH_WEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  444. else if (ch <= CH_RWEDI) then
  445. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  446. else if (ch <= CH_MEDI) then
  447. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  448. else
  449. InternalError($db)
  450. end;
  451. { inserts new_one between prev and foll }
  452. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  453. begin
  454. if assigned(prev) then
  455. if assigned(foll) then
  456. begin
  457. if assigned(new_one) then
  458. begin
  459. new_one.previous := prev;
  460. new_one.next := foll;
  461. prev.next := new_one;
  462. foll.previous := new_one;
  463. { shgould we update line information }
  464. if (not (tai(new_one).typ in SkipLineInfo)) and
  465. (not (tai(foll).typ in SkipLineInfo)) then
  466. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  467. end;
  468. end
  469. else
  470. asml.Concat(new_one)
  471. else
  472. if assigned(foll) then
  473. asml.Insert(new_one)
  474. end;
  475. {********************* Compare parts of tai objects *********************}
  476. function regssamesize(reg1, reg2: tregister): boolean;
  477. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  478. 8bit, 16bit or 32bit)}
  479. begin
  480. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  481. internalerror(2003111602);
  482. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  483. end;
  484. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  485. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  486. OldReg and NewReg have the same size (has to be chcked in advance with
  487. RegsSameSize) and that neither equals RS_INVALID}
  488. var
  489. newsupreg, oldsupreg: tsuperregister;
  490. begin
  491. if (newreg = NR_NO) or (oldreg = NR_NO) then
  492. internalerror(2003111601);
  493. newsupreg := getsupreg(newreg);
  494. oldsupreg := getsupreg(oldreg);
  495. with RegInfo Do
  496. begin
  497. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  498. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  499. New2OldReg[newsupreg] := oldsupreg;
  500. end;
  501. end;
  502. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  503. begin
  504. case o.typ Of
  505. top_reg:
  506. if (o.reg <> NR_NO) then
  507. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  508. top_ref:
  509. begin
  510. if o.ref^.base <> NR_NO then
  511. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  512. if o.ref^.index <> NR_NO then
  513. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  514. end;
  515. end;
  516. end;
  517. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  518. begin
  519. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  520. if RegsSameSize(oldreg, newreg) then
  521. with reginfo do
  522. {here we always check for the 32 bit component, because it is possible that
  523. the 8 bit component has not been set, event though NewReg already has been
  524. processed. This happens if it has been compared with a register that doesn't
  525. have an 8 bit component (such as EDI). in that case the 8 bit component is
  526. still set to RS_NO and the comparison in the else-part will fail}
  527. if (getsupreg(oldReg) in OldRegsEncountered) then
  528. if (getsupreg(NewReg) in NewRegsEncountered) then
  529. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  530. { if we haven't encountered the new register yet, but we have encountered the
  531. old one already, the new one can only be correct if it's being written to
  532. (and consequently the old one is also being written to), otherwise
  533. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  534. movl (%eax), %eax movl (%edx), %edx
  535. are considered equivalent}
  536. else
  537. if (opact = opact_write) then
  538. begin
  539. AddReg2RegInfo(oldreg, newreg, reginfo);
  540. RegsEquivalent := true
  541. end
  542. else
  543. Regsequivalent := false
  544. else
  545. if not(getsupreg(newreg) in NewRegsEncountered) and
  546. ((opact = opact_write) or
  547. ((newreg = oldreg) and
  548. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  549. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  550. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  551. begin
  552. AddReg2RegInfo(oldreg, newreg, reginfo);
  553. RegsEquivalent := true
  554. end
  555. else
  556. RegsEquivalent := false
  557. else
  558. RegsEquivalent := false
  559. else
  560. RegsEquivalent := oldreg = newreg
  561. end;
  562. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  563. begin
  564. RefsEquivalent :=
  565. (r1.offset = r2.offset) and
  566. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  567. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  568. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  569. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  570. (r1.relsymbol = r2.relsymbol);
  571. end;
  572. {$push}
  573. {$q-}
  574. // checks whether a write to r2 of size "size" contains address r1
  575. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  576. var
  577. realsize1, realsize2: aint;
  578. begin
  579. realsize1 := tcgsize2size[size1];
  580. realsize2 := tcgsize2size[size2];
  581. refsoverlapping :=
  582. (r2.offset <= r1.offset+realsize1) and
  583. (r1.offset <= r2.offset+realsize2) and
  584. (r1.segment = r2.segment) and (r1.base = r2.base) and
  585. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  586. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  587. (r1.relsymbol = r2.relsymbol);
  588. end;
  589. {$pop}
  590. function isgp32reg(supreg: tsuperregister): boolean;
  591. {Checks if the register is a 32 bit general purpose register}
  592. begin
  593. isgp32reg := false;
  594. {$push}{$warnings off}
  595. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  596. isgp32reg := true
  597. {$pop}
  598. end;
  599. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  600. begin {checks whether ref contains a reference to reg}
  601. reginref :=
  602. ((ref.base <> NR_NO) and
  603. (getsupreg(ref.base) = supreg)) or
  604. ((ref.index <> NR_NO) and
  605. (getsupreg(ref.index) = supreg))
  606. end;
  607. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  608. var
  609. p: taicpu;
  610. opcount: longint;
  611. begin
  612. RegReadByInstruction := false;
  613. if hp.typ <> ait_instruction then
  614. exit;
  615. p := taicpu(hp);
  616. case p.opcode of
  617. A_CALL:
  618. regreadbyinstruction := true;
  619. A_IMUL:
  620. case p.ops of
  621. 1:
  622. regReadByInstruction :=
  623. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  624. 2,3:
  625. regReadByInstruction :=
  626. reginop(supreg,p.oper[0]^) or
  627. reginop(supreg,p.oper[1]^);
  628. end;
  629. A_IDIV,A_DIV,A_MUL:
  630. begin
  631. regReadByInstruction :=
  632. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  633. end;
  634. else
  635. begin
  636. for opcount := 0 to p.ops-1 do
  637. if (p.oper[opCount]^.typ = top_ref) and
  638. reginref(supreg,p.oper[opcount]^.ref^) then
  639. begin
  640. RegReadByInstruction := true;
  641. exit
  642. end;
  643. for opcount := 1 to maxinschanges do
  644. case insprop[p.opcode].ch[opcount] of
  645. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  646. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  647. begin
  648. RegReadByInstruction := true;
  649. exit
  650. end;
  651. CH_RWOP1,CH_ROP1,CH_MOP1:
  652. if //(p.oper[0]^.typ = top_reg) and
  653. reginop(supreg,p.oper[0]^) then
  654. begin
  655. RegReadByInstruction := true;
  656. exit
  657. end;
  658. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  659. if //(p.oper[1]^.typ = top_reg) and
  660. reginop(supreg,p.oper[1]^) then
  661. begin
  662. RegReadByInstruction := true;
  663. exit
  664. end;
  665. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  666. if //(p.oper[2]^.typ = top_reg) and
  667. reginop(supreg,p.oper[2]^) then
  668. begin
  669. RegReadByInstruction := true;
  670. exit
  671. end;
  672. end;
  673. end;
  674. end;
  675. end;
  676. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  677. { Checks if reg is used by the instruction p1 }
  678. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  679. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  680. var
  681. p: taicpu;
  682. opcount: longint;
  683. begin
  684. regInInstruction := false;
  685. if p1.typ <> ait_instruction then
  686. exit;
  687. p := taicpu(p1);
  688. case p.opcode of
  689. A_CALL:
  690. regininstruction := true;
  691. A_IMUL:
  692. case p.ops of
  693. 1:
  694. regInInstruction :=
  695. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  696. 2,3:
  697. regInInstruction :=
  698. reginop(supreg,p.oper[0]^) or
  699. reginop(supreg,p.oper[1]^) or
  700. (assigned(p.oper[2]) and
  701. reginop(supreg,p.oper[2]^));
  702. end;
  703. A_IDIV,A_DIV,A_MUL:
  704. regInInstruction :=
  705. reginop(supreg,p.oper[0]^) or
  706. (supreg in [RS_EAX,RS_EDX])
  707. else
  708. begin
  709. for opcount := 0 to p.ops-1 do
  710. if (p.oper[opCount]^.typ = top_ref) and
  711. reginref(supreg,p.oper[opcount]^.ref^) then
  712. begin
  713. regInInstruction := true;
  714. exit
  715. end;
  716. for opcount := 1 to maxinschanges do
  717. case insprop[p.opcode].Ch[opCount] of
  718. CH_REAX..CH_MEDI:
  719. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  720. begin
  721. regInInstruction := true;
  722. exit;
  723. end;
  724. CH_ROp1..CH_MOp1:
  725. if reginop(supreg,p.oper[0]^) then
  726. begin
  727. regInInstruction := true;
  728. exit
  729. end;
  730. Ch_ROp2..Ch_MOp2:
  731. if reginop(supreg,p.oper[1]^) then
  732. begin
  733. regInInstruction := true;
  734. exit
  735. end;
  736. Ch_ROp3..Ch_MOp3:
  737. if reginop(supreg,p.oper[2]^) then
  738. begin
  739. regInInstruction := true;
  740. exit
  741. end;
  742. end;
  743. end;
  744. end;
  745. end;
  746. function reginop(supreg: tsuperregister; const o:toper): boolean;
  747. begin
  748. reginop := false;
  749. case o.typ Of
  750. top_reg:
  751. reginop :=
  752. (getregtype(o.reg) = R_INTREGISTER) and
  753. (supreg = getsupreg(o.reg));
  754. top_ref:
  755. reginop :=
  756. ((o.ref^.base <> NR_NO) and
  757. (supreg = getsupreg(o.ref^.base))) or
  758. ((o.ref^.index <> NR_NO) and
  759. (supreg = getsupreg(o.ref^.index)));
  760. end;
  761. end;
  762. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  763. var
  764. InstrProp: TInsProp;
  765. TmpResult: Boolean;
  766. Cnt: Word;
  767. begin
  768. TmpResult := False;
  769. Result := False;
  770. if supreg = RS_INVALID then
  771. exit;
  772. if (p1.typ = ait_instruction) then
  773. case taicpu(p1).opcode of
  774. A_IMUL:
  775. With taicpu(p1) Do
  776. TmpResult :=
  777. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  778. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  779. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  780. A_DIV, A_IDIV, A_MUL:
  781. With taicpu(p1) Do
  782. TmpResult :=
  783. (supreg in [RS_EAX,RS_EDX]);
  784. else
  785. begin
  786. Cnt := 1;
  787. InstrProp := InsProp[taicpu(p1).OpCode];
  788. while (Cnt <= maxinschanges) and
  789. (InstrProp.Ch[Cnt] <> Ch_None) and
  790. not(TmpResult) Do
  791. begin
  792. case InstrProp.Ch[Cnt] Of
  793. Ch_WEAX..Ch_MEDI:
  794. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  795. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  796. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  797. reginop(supreg,taicpu(p1).oper[0]^);
  798. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  799. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  800. reginop(supreg,taicpu(p1).oper[1]^);
  801. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  802. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  803. reginop(supreg,taicpu(p1).oper[2]^);
  804. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  805. Ch_ALL: TmpResult := true;
  806. end;
  807. inc(Cnt)
  808. end
  809. end
  810. end;
  811. RegModifiedByInstruction := TmpResult
  812. end;
  813. function instrWritesFlags(p: tai): boolean;
  814. var
  815. l: longint;
  816. begin
  817. instrWritesFlags := true;
  818. case p.typ of
  819. ait_instruction:
  820. begin
  821. for l := 1 to maxinschanges do
  822. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  823. exit;
  824. end;
  825. ait_label:
  826. exit;
  827. end;
  828. instrWritesFlags := false;
  829. end;
  830. function instrReadsFlags(p: tai): boolean;
  831. var
  832. l: longint;
  833. begin
  834. instrReadsFlags := true;
  835. case p.typ of
  836. ait_instruction:
  837. begin
  838. for l := 1 to maxinschanges do
  839. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  840. exit;
  841. end;
  842. ait_label:
  843. exit;
  844. end;
  845. instrReadsFlags := false;
  846. end;
  847. {********************* GetNext and GetLastInstruction *********************}
  848. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  849. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  850. { next tai object in Next. Returns false if there isn't any }
  851. begin
  852. repeat
  853. if (Current.typ = ait_marker) and
  854. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  855. begin
  856. GetNextInstruction := False;
  857. Next := Nil;
  858. Exit
  859. end;
  860. Current := tai(current.Next);
  861. while assigned(Current) and
  862. ((current.typ in skipInstr) or
  863. ((current.typ = ait_label) and
  864. labelCanBeSkipped(tai_label(current)))) do
  865. Current := tai(current.Next);
  866. { if assigned(Current) and
  867. (current.typ = ait_Marker) and
  868. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  869. begin
  870. while assigned(Current) and
  871. ((current.typ <> ait_Marker) or
  872. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  873. Current := tai(current.Next);
  874. end;}
  875. until not(assigned(Current)) or
  876. (current.typ <> ait_Marker) or
  877. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  878. Next := Current;
  879. if assigned(Current) and
  880. not((current.typ in SkipInstr) or
  881. ((current.typ = ait_label) and
  882. labelCanBeSkipped(tai_label(current))))
  883. then
  884. GetNextInstruction :=
  885. not((current.typ = ait_marker) and
  886. (tai_marker(current).kind = mark_AsmBlockStart))
  887. else
  888. begin
  889. GetNextInstruction := False;
  890. Next := nil;
  891. end;
  892. end;
  893. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  894. {skips the ait-types in SkipInstr puts the previous tai object in
  895. Last. Returns false if there isn't any}
  896. begin
  897. repeat
  898. Current := tai(current.previous);
  899. while assigned(Current) and
  900. (((current.typ = ait_Marker) and
  901. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  902. (current.typ in SkipInstr) or
  903. ((current.typ = ait_label) and
  904. labelCanBeSkipped(tai_label(current)))) Do
  905. Current := tai(current.previous);
  906. { if assigned(Current) and
  907. (current.typ = ait_Marker) and
  908. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  909. begin
  910. while assigned(Current) and
  911. ((current.typ <> ait_Marker) or
  912. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  913. Current := tai(current.previous);
  914. end;}
  915. until not(assigned(Current)) or
  916. (current.typ <> ait_Marker) or
  917. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  918. if not(assigned(Current)) or
  919. (current.typ in SkipInstr) or
  920. ((current.typ = ait_label) and
  921. labelCanBeSkipped(tai_label(current))) or
  922. ((current.typ = ait_Marker) and
  923. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  924. then
  925. begin
  926. Last := nil;
  927. GetLastInstruction := False
  928. end
  929. else
  930. begin
  931. Last := Current;
  932. GetLastInstruction := True;
  933. end;
  934. end;
  935. procedure SkipHead(var p: tai);
  936. var
  937. oldp: tai;
  938. begin
  939. repeat
  940. oldp := p;
  941. if (p.typ in SkipInstr) or
  942. ((p.typ = ait_marker) and
  943. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd])) then
  944. GetNextInstruction(p,p)
  945. else if ((p.Typ = Ait_Marker) and
  946. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  947. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  948. TAsmList list}
  949. GetNextInstruction(tai(p.previous),p);
  950. until p = oldp
  951. end;
  952. function labelCanBeSkipped(p: tai_label): boolean;
  953. begin
  954. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  955. end;
  956. {******************* The Data Flow Analyzer functions ********************}
  957. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  958. hp: tai): boolean;
  959. { assumes reg is a 32bit register }
  960. var
  961. p: taicpu;
  962. begin
  963. if not assigned(hp) or
  964. (hp.typ <> ait_instruction) then
  965. begin
  966. regLoadedWithNewValue := false;
  967. exit;
  968. end;
  969. p := taicpu(hp);
  970. regLoadedWithNewValue :=
  971. (((p.opcode = A_MOV) or
  972. (p.opcode = A_MOVZX) or
  973. (p.opcode = A_MOVSX) or
  974. (p.opcode = A_LEA)) and
  975. (p.oper[1]^.typ = top_reg) and
  976. (getsupreg(p.oper[1]^.reg) = supreg) and
  977. (canDependOnPrevValue or
  978. (p.oper[0]^.typ = top_const) or
  979. ((p.oper[0]^.typ = top_reg) and
  980. (getsupreg(p.oper[0]^.reg) <> supreg)) or
  981. ((p.oper[0]^.typ = top_ref) and
  982. not regInRef(supreg,p.oper[0]^.ref^)))) or
  983. ((p.opcode = A_POP) and
  984. (getsupreg(p.oper[0]^.reg) = supreg));
  985. end;
  986. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  987. {updates UsedRegs with the RegAlloc Information coming after p}
  988. begin
  989. repeat
  990. while assigned(p) and
  991. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  992. ((p.typ = ait_label) and
  993. labelCanBeSkipped(tai_label(p))) or
  994. ((p.typ = ait_marker) and
  995. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd]))) do
  996. p := tai(p.next);
  997. while assigned(p) and
  998. (p.typ=ait_RegAlloc) Do
  999. begin
  1000. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1001. begin
  1002. case tai_regalloc(p).ratype of
  1003. ra_alloc :
  1004. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1005. ra_dealloc :
  1006. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1007. end;
  1008. end;
  1009. p := tai(p.next);
  1010. end;
  1011. until not(assigned(p)) or
  1012. (not(p.typ in SkipInstr) and
  1013. not((p.typ = ait_label) and
  1014. labelCanBeSkipped(tai_label(p))));
  1015. end;
  1016. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  1017. { allocates register reg between (and including) instructions p1 and p2 }
  1018. { the type of p1 and p2 must not be in SkipInstr }
  1019. { note that this routine is both called from the peephole optimizer }
  1020. { where optinfo is not yet initialised) and from the cse (where it is) }
  1021. var
  1022. hp, start: tai;
  1023. removedsomething,
  1024. firstRemovedWasAlloc,
  1025. lastRemovedWasDealloc: boolean;
  1026. supreg: tsuperregister;
  1027. begin
  1028. {$ifdef EXTDEBUG}
  1029. if assigned(p1.optinfo) and
  1030. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1031. internalerror(2004101010);
  1032. {$endif EXTDEBUG}
  1033. start := p1;
  1034. if (reg = NR_ESP) or
  1035. (reg = current_procinfo.framepointer) or
  1036. not(assigned(p1)) then
  1037. { this happens with registers which are loaded implicitely, outside the }
  1038. { current block (e.g. esi with self) }
  1039. exit;
  1040. supreg := getsupreg(reg);
  1041. { make sure we allocate it for this instruction }
  1042. getnextinstruction(p2,p2);
  1043. lastRemovedWasDealloc := false;
  1044. removedSomething := false;
  1045. firstRemovedWasAlloc := false;
  1046. {$ifdef allocregdebug}
  1047. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1048. ' from here...'));
  1049. insertllitem(asml,p1.previous,p1,hp);
  1050. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1051. ' till here...'));
  1052. insertllitem(asml,p2,p2.next,hp);
  1053. {$endif allocregdebug}
  1054. if not(supreg in initialusedregs) then
  1055. begin
  1056. hp := tai_regalloc.alloc(reg,nil);
  1057. insertllItem(asmL,p1.previous,p1,hp);
  1058. include(initialusedregs,supreg);
  1059. end;
  1060. while assigned(p1) and
  1061. (p1 <> p2) do
  1062. begin
  1063. if assigned(p1.optinfo) then
  1064. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1065. p1 := tai(p1.next);
  1066. repeat
  1067. while assigned(p1) and
  1068. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1069. p1 := tai(p1.next);
  1070. { remove all allocation/deallocation info about the register in between }
  1071. if assigned(p1) and
  1072. (p1.typ = ait_regalloc) then
  1073. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1074. begin
  1075. if not removedSomething then
  1076. begin
  1077. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1078. removedSomething := true;
  1079. end;
  1080. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1081. hp := tai(p1.Next);
  1082. asml.Remove(p1);
  1083. p1.free;
  1084. p1 := hp;
  1085. end
  1086. else p1 := tai(p1.next);
  1087. until not(assigned(p1)) or
  1088. not(p1.typ in SkipInstr);
  1089. end;
  1090. if assigned(p1) then
  1091. begin
  1092. if firstRemovedWasAlloc then
  1093. begin
  1094. hp := tai_regalloc.Alloc(reg,nil);
  1095. insertLLItem(asmL,start.previous,start,hp);
  1096. end;
  1097. if lastRemovedWasDealloc then
  1098. begin
  1099. hp := tai_regalloc.DeAlloc(reg,nil);
  1100. insertLLItem(asmL,p1.previous,p1,hp);
  1101. end;
  1102. end;
  1103. end;
  1104. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1105. var
  1106. hp: tai;
  1107. first: boolean;
  1108. begin
  1109. findregdealloc := false;
  1110. first := true;
  1111. while assigned(p.previous) and
  1112. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1113. ((tai(p.previous).typ = ait_label) and
  1114. labelCanBeSkipped(tai_label(p.previous)))) do
  1115. begin
  1116. p := tai(p.previous);
  1117. if (p.typ = ait_regalloc) and
  1118. (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) and
  1119. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1120. if (tai_regalloc(p).ratype=ra_dealloc) then
  1121. if first then
  1122. begin
  1123. findregdealloc := true;
  1124. break;
  1125. end
  1126. else
  1127. begin
  1128. findRegDealloc :=
  1129. getNextInstruction(p,hp) and
  1130. regLoadedWithNewValue(supreg,false,hp);
  1131. break
  1132. end
  1133. else
  1134. first := false;
  1135. end
  1136. end;
  1137. procedure incState(var S: Byte; amount: longint);
  1138. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1139. errors}
  1140. begin
  1141. if (s <= $ff - amount) then
  1142. inc(s, amount)
  1143. else s := longint(s) + amount - $ff;
  1144. end;
  1145. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1146. { Content is the sequence of instructions that describes the contents of }
  1147. { seqReg. reg is being overwritten by the current instruction. if the }
  1148. { content of seqReg depends on reg (ie. because of a }
  1149. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1150. var
  1151. p: tai;
  1152. Counter: Word;
  1153. TmpResult: Boolean;
  1154. RegsChecked: TRegSet;
  1155. begin
  1156. RegsChecked := [];
  1157. p := Content.StartMod;
  1158. TmpResult := False;
  1159. Counter := 1;
  1160. while not(TmpResult) and
  1161. (Counter <= Content.NrOfMods) Do
  1162. begin
  1163. if (p.typ = ait_instruction) and
  1164. ((taicpu(p).opcode = A_MOV) or
  1165. (taicpu(p).opcode = A_MOVZX) or
  1166. (taicpu(p).opcode = A_MOVSX) or
  1167. (taicpu(p).opcode = A_LEA)) and
  1168. (taicpu(p).oper[0]^.typ = top_ref) then
  1169. With taicpu(p).oper[0]^.ref^ Do
  1170. if ((base = current_procinfo.FramePointer) or
  1171. (assigned(symbol) and (base = NR_NO))) and
  1172. (index = NR_NO) then
  1173. begin
  1174. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1175. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1176. break;
  1177. end
  1178. else
  1179. tmpResult :=
  1180. regReadByInstruction(supreg,p) and
  1181. regModifiedByInstruction(seqReg,p)
  1182. else
  1183. tmpResult :=
  1184. regReadByInstruction(supreg,p) and
  1185. regModifiedByInstruction(seqReg,p);
  1186. inc(Counter);
  1187. GetNextInstruction(p,p)
  1188. end;
  1189. sequenceDependsonReg := TmpResult
  1190. end;
  1191. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1192. var
  1193. counter: tsuperregister;
  1194. begin
  1195. for counter := RS_EAX to RS_EDI do
  1196. if counter <> supreg then
  1197. with p1^.regs[counter] Do
  1198. begin
  1199. if (typ in [con_ref,con_noRemoveRef]) and
  1200. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1201. if typ in [con_ref, con_invalid] then
  1202. typ := con_invalid
  1203. { con_noRemoveRef = con_unknown }
  1204. else
  1205. typ := con_unknown;
  1206. if assigned(memwrite) and
  1207. regInRef(counter,memwrite.oper[1]^.ref^) then
  1208. memwrite := nil;
  1209. end;
  1210. end;
  1211. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1212. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1213. contents of registers are loaded with a memory location based on reg.
  1214. doincState is false when this register has to be destroyed not because
  1215. it's contents are directly modified/overwritten, but because of an indirect
  1216. action (e.g. this register holds the contents of a variable and the value
  1217. of the variable in memory is changed) }
  1218. begin
  1219. {$push}{$warnings off}
  1220. { the following happens for fpu registers }
  1221. if (supreg < low(NrOfInstrSinceLastMod)) or
  1222. (supreg > high(NrOfInstrSinceLastMod)) then
  1223. exit;
  1224. {$pop}
  1225. NrOfInstrSinceLastMod[supreg] := 0;
  1226. with p1^.regs[supreg] do
  1227. begin
  1228. if doincState then
  1229. begin
  1230. incState(wstate,1);
  1231. typ := con_unknown;
  1232. startmod := nil;
  1233. end
  1234. else
  1235. if typ in [con_ref,con_const,con_invalid] then
  1236. typ := con_invalid
  1237. { con_noRemoveRef = con_unknown }
  1238. else
  1239. typ := con_unknown;
  1240. memwrite := nil;
  1241. end;
  1242. invalidateDependingRegs(p1,supreg);
  1243. end;
  1244. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1245. begin
  1246. if (p.typ = ait_instruction) then
  1247. begin
  1248. case taicpu(p).oper[0]^.typ Of
  1249. top_reg:
  1250. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1251. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1252. top_ref:
  1253. With TReference(taicpu(p).oper[0]^) Do
  1254. begin
  1255. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1256. then RegSet := RegSet + [base];
  1257. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1258. then RegSet := RegSet + [index];
  1259. end;
  1260. end;
  1261. case taicpu(p).oper[1]^.typ Of
  1262. top_reg:
  1263. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1264. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1265. top_ref:
  1266. With TReference(taicpu(p).oper[1]^) Do
  1267. begin
  1268. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1269. then RegSet := RegSet + [base];
  1270. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1271. then RegSet := RegSet + [index];
  1272. end;
  1273. end;
  1274. end;
  1275. end;}
  1276. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1277. begin {checks whether the two ops are equivalent}
  1278. OpsEquivalent := False;
  1279. if o1.typ=o2.typ then
  1280. case o1.typ Of
  1281. top_reg:
  1282. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1283. top_ref:
  1284. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1285. Top_Const:
  1286. OpsEquivalent := o1.val = o2.val;
  1287. Top_None:
  1288. OpsEquivalent := True
  1289. end;
  1290. end;
  1291. function OpsEqual(const o1,o2:toper): Boolean;
  1292. begin {checks whether the two ops are equal}
  1293. OpsEqual := False;
  1294. if o1.typ=o2.typ then
  1295. case o1.typ Of
  1296. top_reg :
  1297. OpsEqual:=o1.reg=o2.reg;
  1298. top_ref :
  1299. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1300. Top_Const :
  1301. OpsEqual:=o1.val=o2.val;
  1302. Top_None :
  1303. OpsEqual := True
  1304. end;
  1305. end;
  1306. function sizescompatible(loadsize,newsize: topsize): boolean;
  1307. begin
  1308. case loadsize of
  1309. S_B,S_BW,S_BL:
  1310. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1311. S_W,S_WL:
  1312. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1313. else
  1314. sizescompatible := newsize = S_L;
  1315. end;
  1316. end;
  1317. function opscompatible(p1,p2: taicpu): boolean;
  1318. begin
  1319. case p1.opcode of
  1320. A_MOVZX,A_MOVSX:
  1321. opscompatible :=
  1322. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1323. sizescompatible(p1.opsize,p2.opsize);
  1324. else
  1325. opscompatible :=
  1326. (p1.opcode = p2.opcode) and
  1327. (p1.ops = p2.ops) and
  1328. (p1.opsize = p2.opsize);
  1329. end;
  1330. end;
  1331. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1332. {$ifdef csdebug}
  1333. var
  1334. hp: tai;
  1335. {$endif csdebug}
  1336. begin {checks whether two taicpu instructions are equal}
  1337. if assigned(p1) and assigned(p2) and
  1338. (tai(p1).typ = ait_instruction) and
  1339. (tai(p2).typ = ait_instruction) and
  1340. opscompatible(taicpu(p1),taicpu(p2)) and
  1341. (not(assigned(taicpu(p1).oper[0])) or
  1342. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1343. (not(assigned(taicpu(p1).oper[1])) or
  1344. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1345. (not(assigned(taicpu(p1).oper[2])) or
  1346. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1347. {both instructions have the same structure:
  1348. "<operator> <operand of type1>, <operand of type 2>"}
  1349. if ((taicpu(p1).opcode = A_MOV) or
  1350. (taicpu(p1).opcode = A_MOVZX) or
  1351. (taicpu(p1).opcode = A_MOVSX) or
  1352. (taicpu(p1).opcode = A_LEA)) and
  1353. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1354. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1355. {the "old" instruction is a load of a register with a new value, not with
  1356. a value based on the contents of this register (so no "mov (reg), reg")}
  1357. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1358. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1359. {the "new" instruction is also a load of a register with a new value, and
  1360. this value is fetched from the same memory location}
  1361. begin
  1362. With taicpu(p2).oper[0]^.ref^ Do
  1363. begin
  1364. if (base <> NR_NO) and
  1365. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1366. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1367. if (index <> NR_NO) and
  1368. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1369. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1370. end;
  1371. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1372. from the reference are the same in the old and in the new instruction
  1373. sequence}
  1374. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1375. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1376. InstructionsEquivalent :=
  1377. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1378. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1379. end
  1380. {the registers are loaded with values from different memory locations. if
  1381. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1382. would be considered equivalent}
  1383. else
  1384. InstructionsEquivalent := False
  1385. else
  1386. {load register with a value based on the current value of this register}
  1387. begin
  1388. With taicpu(p2).oper[0]^.ref^ Do
  1389. begin
  1390. if (base <> NR_NO) and
  1391. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1392. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1393. {it won't do any harm if the register is already in RegsLoadedForRef}
  1394. begin
  1395. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1396. {$ifdef csdebug}
  1397. Writeln(std_regname(base), ' added');
  1398. {$endif csdebug}
  1399. end;
  1400. if (index <> NR_NO) and
  1401. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1402. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1403. begin
  1404. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1405. {$ifdef csdebug}
  1406. Writeln(std_regname(index), ' added');
  1407. {$endif csdebug}
  1408. end;
  1409. end;
  1410. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1411. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1412. begin
  1413. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1414. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1415. {$ifdef csdebug}
  1416. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1417. {$endif csdebug}
  1418. end;
  1419. InstructionsEquivalent :=
  1420. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1421. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1422. end
  1423. else
  1424. {an instruction <> mov, movzx, movsx}
  1425. begin
  1426. {$ifdef csdebug}
  1427. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1428. hp.previous := p2;
  1429. hp.next := p2.next;
  1430. p2.next.previous := hp;
  1431. p2.next := hp;
  1432. {$endif csdebug}
  1433. InstructionsEquivalent :=
  1434. (not(assigned(taicpu(p1).oper[0])) or
  1435. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1436. (not(assigned(taicpu(p1).oper[1])) or
  1437. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1438. (not(assigned(taicpu(p1).oper[2])) or
  1439. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1440. end
  1441. {the instructions haven't even got the same structure, so they're certainly
  1442. not equivalent}
  1443. else
  1444. begin
  1445. {$ifdef csdebug}
  1446. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1447. hp.previous := p2;
  1448. hp.next := p2.next;
  1449. p2.next.previous := hp;
  1450. p2.next := hp;
  1451. {$endif csdebug}
  1452. InstructionsEquivalent := False;
  1453. end;
  1454. {$ifdef csdebug}
  1455. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1456. hp.previous := p2;
  1457. hp.next := p2.next;
  1458. p2.next.previous := hp;
  1459. p2.next := hp;
  1460. {$endif csdebug}
  1461. end;
  1462. (*
  1463. function InstructionsEqual(p1, p2: tai): Boolean;
  1464. begin {checks whether two taicpu instructions are equal}
  1465. InstructionsEqual :=
  1466. assigned(p1) and assigned(p2) and
  1467. ((tai(p1).typ = ait_instruction) and
  1468. (tai(p1).typ = ait_instruction) and
  1469. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1470. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1471. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1472. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1473. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1474. end;
  1475. *)
  1476. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1477. begin
  1478. if supreg in [RS_EAX..RS_EDI] then
  1479. incState(p^.regs[supreg].rstate,1)
  1480. end;
  1481. procedure readref(p: ptaiprop; const ref: preference);
  1482. begin
  1483. if ref^.base <> NR_NO then
  1484. readreg(p, getsupreg(ref^.base));
  1485. if ref^.index <> NR_NO then
  1486. readreg(p, getsupreg(ref^.index));
  1487. end;
  1488. procedure ReadOp(p: ptaiprop;const o:toper);
  1489. begin
  1490. case o.typ Of
  1491. top_reg: readreg(p, getsupreg(o.reg));
  1492. top_ref: readref(p, o.ref);
  1493. end;
  1494. end;
  1495. function RefInInstruction(const ref: TReference; p: tai;
  1496. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1497. {checks whehter ref is used in p}
  1498. var
  1499. mysize: tcgsize;
  1500. TmpResult: Boolean;
  1501. begin
  1502. TmpResult := False;
  1503. if (p.typ = ait_instruction) then
  1504. begin
  1505. mysize := topsize2tcgsize[taicpu(p).opsize];
  1506. if (taicpu(p).ops >= 1) and
  1507. (taicpu(p).oper[0]^.typ = top_ref) then
  1508. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1509. if not(TmpResult) and
  1510. (taicpu(p).ops >= 2) and
  1511. (taicpu(p).oper[1]^.typ = top_ref) then
  1512. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1513. if not(TmpResult) and
  1514. (taicpu(p).ops >= 3) and
  1515. (taicpu(p).oper[2]^.typ = top_ref) then
  1516. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1517. end;
  1518. RefInInstruction := TmpResult;
  1519. end;
  1520. function RefInSequence(const ref: TReference; Content: TContent;
  1521. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1522. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1523. tai objects) to see whether ref is used somewhere}
  1524. var p: tai;
  1525. Counter: Word;
  1526. TmpResult: Boolean;
  1527. begin
  1528. p := Content.StartMod;
  1529. TmpResult := False;
  1530. Counter := 1;
  1531. while not(TmpResult) and
  1532. (Counter <= Content.NrOfMods) Do
  1533. begin
  1534. if (p.typ = ait_instruction) and
  1535. RefInInstruction(ref, p, RefsEq, size)
  1536. then TmpResult := True;
  1537. inc(Counter);
  1538. GetNextInstruction(p,p)
  1539. end;
  1540. RefInSequence := TmpResult
  1541. end;
  1542. {$push}
  1543. {$q-}
  1544. // checks whether a write to r2 of size "size" contains address r1
  1545. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1546. var
  1547. realsize1, realsize2: aint;
  1548. begin
  1549. realsize1 := tcgsize2size[size1];
  1550. realsize2 := tcgsize2size[size2];
  1551. arrayrefsoverlapping :=
  1552. (r2.offset <= r1.offset+realsize1) and
  1553. (r1.offset <= r2.offset+realsize2) and
  1554. (r1.segment = r2.segment) and
  1555. (r1.symbol=r2.symbol) and
  1556. (r1.base = r2.base)
  1557. end;
  1558. {$pop}
  1559. function isSimpleRef(const ref: treference): boolean;
  1560. { returns true if ref is reference to a local or global variable, to a }
  1561. { parameter or to an object field (this includes arrays). Returns false }
  1562. { otherwise. }
  1563. begin
  1564. isSimpleRef :=
  1565. assigned(ref.symbol) or
  1566. (ref.base = current_procinfo.framepointer);
  1567. end;
  1568. function containsPointerRef(p: tai): boolean;
  1569. { checks if an instruction contains a reference which is a pointer location }
  1570. var
  1571. hp: taicpu;
  1572. count: longint;
  1573. begin
  1574. containsPointerRef := false;
  1575. if p.typ <> ait_instruction then
  1576. exit;
  1577. hp := taicpu(p);
  1578. for count := 0 to hp.ops-1 do
  1579. begin
  1580. case hp.oper[count]^.typ of
  1581. top_ref:
  1582. if not isSimpleRef(hp.oper[count]^.ref^) then
  1583. begin
  1584. containsPointerRef := true;
  1585. exit;
  1586. end;
  1587. top_none:
  1588. exit;
  1589. end;
  1590. end;
  1591. end;
  1592. function containsPointerLoad(c: tcontent): boolean;
  1593. { checks whether the contents of a register contain a pointer reference }
  1594. var
  1595. p: tai;
  1596. count: longint;
  1597. begin
  1598. containsPointerLoad := false;
  1599. p := c.startmod;
  1600. for count := c.nrOfMods downto 1 do
  1601. begin
  1602. if containsPointerRef(p) then
  1603. begin
  1604. containsPointerLoad := true;
  1605. exit;
  1606. end;
  1607. getnextinstruction(p,p);
  1608. end;
  1609. end;
  1610. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1611. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1612. { returns whether the contents c of reg are invalid after regWritten is }
  1613. { is written to ref }
  1614. var
  1615. refsEq: trefCompare;
  1616. begin
  1617. if isSimpleRef(ref) then
  1618. begin
  1619. if (ref.index <> NR_NO) or
  1620. (assigned(ref.symbol) and
  1621. (ref.base <> NR_NO)) then
  1622. { local/global variable or parameter which is an array }
  1623. refsEq := @arrayRefsOverlapping
  1624. else
  1625. { local/global variable or parameter which is not an array }
  1626. refsEq := @refsOverlapping;
  1627. invalsmemwrite :=
  1628. assigned(c.memwrite) and
  1629. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1630. containsPointerRef(c.memwrite)) or
  1631. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1632. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1633. begin
  1634. writeToMemDestroysContents := false;
  1635. exit;
  1636. end;
  1637. { write something to a parameter, a local or global variable, so }
  1638. { * with uncertain optimizations on: }
  1639. { - destroy the contents of registers whose contents have somewhere a }
  1640. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1641. { are being written to memory) is not destroyed if it's StartMod is }
  1642. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1643. { expression based on ref) }
  1644. { * with uncertain optimizations off: }
  1645. { - also destroy registers that contain any pointer }
  1646. with c do
  1647. writeToMemDestroysContents :=
  1648. (typ in [con_ref,con_noRemoveRef]) and
  1649. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1650. containsPointerLoad(c)
  1651. ) or
  1652. (refInSequence(ref,c,refsEq,size) and
  1653. ((supreg <> regWritten) or
  1654. not((nrOfMods = 1) and
  1655. {StarMod is always of the type ait_instruction}
  1656. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1657. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1658. )
  1659. )
  1660. )
  1661. );
  1662. end
  1663. else
  1664. { write something to a pointer location, so }
  1665. { * with uncertain optimzations on: }
  1666. { - do not destroy registers which contain a local/global variable or }
  1667. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1668. { * with uncertain optimzations off: }
  1669. { - destroy every register which contains a memory location }
  1670. begin
  1671. invalsmemwrite :=
  1672. assigned(c.memwrite) and
  1673. (not(cs_opt_size in current_settings.optimizerswitches) or
  1674. containsPointerRef(c.memwrite));
  1675. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1676. begin
  1677. writeToMemDestroysContents := false;
  1678. exit;
  1679. end;
  1680. with c do
  1681. writeToMemDestroysContents :=
  1682. (typ in [con_ref,con_noRemoveRef]) and
  1683. (not(cs_opt_size in current_settings.optimizerswitches) or
  1684. { for movsl }
  1685. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1686. { don't destroy if reg contains a parameter, local or global variable }
  1687. containsPointerLoad(c)
  1688. );
  1689. end;
  1690. end;
  1691. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1692. const c: tcontent): boolean;
  1693. { returns whether the contents c of reg are invalid after destReg is }
  1694. { modified }
  1695. begin
  1696. writeToRegDestroysContents :=
  1697. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1698. sequenceDependsOnReg(c,supreg,destReg);
  1699. end;
  1700. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1701. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1702. { returns whether the contents c of reg are invalid after regWritten is }
  1703. { is written to op }
  1704. begin
  1705. memwritedestroyed := false;
  1706. case op.typ of
  1707. top_reg:
  1708. writeDestroysContents :=
  1709. (getregtype(op.reg) = R_INTREGISTER) and
  1710. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1711. top_ref:
  1712. writeDestroysContents :=
  1713. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1714. else
  1715. writeDestroysContents := false;
  1716. end;
  1717. end;
  1718. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1719. { destroys all registers which possibly contain a reference to ref, regWritten }
  1720. { is the register whose contents are being written to memory (if this proc }
  1721. { is called because of a "mov?? %reg, (mem)" instruction) }
  1722. var
  1723. counter: tsuperregister;
  1724. destroymemwrite: boolean;
  1725. begin
  1726. for counter := RS_EAX to RS_EDI Do
  1727. begin
  1728. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1729. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1730. destroyReg(ptaiprop(p.optInfo), counter, false)
  1731. else if destroymemwrite then
  1732. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1733. end;
  1734. end;
  1735. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1736. var Counter: tsuperregister;
  1737. begin {initializes/desrtoys all registers}
  1738. For Counter := RS_EAX To RS_EDI Do
  1739. begin
  1740. if read then
  1741. readreg(p, Counter);
  1742. DestroyReg(p, Counter, written);
  1743. p^.regs[counter].MemWrite := nil;
  1744. end;
  1745. p^.DirFlag := F_Unknown;
  1746. end;
  1747. procedure DestroyOp(taiObj: tai; const o:Toper);
  1748. {$ifdef statedebug}
  1749. var
  1750. hp: tai;
  1751. {$endif statedebug}
  1752. begin
  1753. case o.typ Of
  1754. top_reg:
  1755. begin
  1756. {$ifdef statedebug}
  1757. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1758. hp.next := taiobj.next;
  1759. hp.previous := taiobj;
  1760. taiobj.next := hp;
  1761. if assigned(hp.next) then
  1762. hp.next.previous := hp;
  1763. {$endif statedebug}
  1764. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1765. end;
  1766. top_ref:
  1767. begin
  1768. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1769. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1770. end;
  1771. end;
  1772. end;
  1773. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1774. p: taicpu; supreg: tsuperregister);
  1775. {$ifdef statedebug}
  1776. var
  1777. hp: tai;
  1778. {$endif statedebug}
  1779. begin
  1780. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1781. if (typ in [con_ref,con_noRemoveRef]) then
  1782. begin
  1783. incState(wstate,1);
  1784. { also store how many instructions are part of the sequence in the first }
  1785. { instructions ptaiprop, so it can be easily accessed from within }
  1786. { CheckSequence}
  1787. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1788. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1789. NrOfInstrSinceLastMod[supreg] := 0;
  1790. invalidateDependingRegs(p.optinfo,supreg);
  1791. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1792. {$ifdef StateDebug}
  1793. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1794. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1795. InsertLLItem(AsmL, p, p.next, hp);
  1796. {$endif StateDebug}
  1797. end
  1798. else
  1799. begin
  1800. {$ifdef statedebug}
  1801. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1802. insertllitem(asml,p,p.next,hp);
  1803. {$endif statedebug}
  1804. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1805. {$ifdef StateDebug}
  1806. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1807. InsertLLItem(AsmL, p, p.next, hp);
  1808. {$endif StateDebug}
  1809. end
  1810. end;
  1811. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1812. p: taicpu; const oper: TOper);
  1813. begin
  1814. if oper.typ = top_reg then
  1815. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1816. else
  1817. begin
  1818. ReadOp(ptaiprop(p.optinfo), oper);
  1819. DestroyOp(p, oper);
  1820. end
  1821. end;
  1822. {*************************************************************************************}
  1823. {************************************** TDFAOBJ **************************************}
  1824. {*************************************************************************************}
  1825. constructor tdfaobj.create(_list: TAsmList);
  1826. begin
  1827. list := _list;
  1828. blockstart := nil;
  1829. blockend := nil;
  1830. nroftaiobjs := 0;
  1831. taipropblock := nil;
  1832. lolab := 0;
  1833. hilab := 0;
  1834. labdif := 0;
  1835. labeltable := nil;
  1836. end;
  1837. procedure tdfaobj.initlabeltable;
  1838. var
  1839. labelfound: boolean;
  1840. p, prev: tai;
  1841. hp1, hp2: tai;
  1842. {$ifdef i386}
  1843. regcounter,
  1844. supreg : tsuperregister;
  1845. {$endif i386}
  1846. usedregs, nodeallocregs: tregset;
  1847. begin
  1848. labelfound := false;
  1849. lolab := maxlongint;
  1850. hilab := 0;
  1851. p := blockstart;
  1852. prev := p;
  1853. while assigned(p) do
  1854. begin
  1855. if (tai(p).typ = ait_label) then
  1856. if not labelcanbeskipped(tai_label(p)) then
  1857. begin
  1858. labelfound := true;
  1859. if (tai_Label(p).labsym.labelnr < lolab) then
  1860. lolab := tai_label(p).labsym.labelnr;
  1861. if (tai_Label(p).labsym.labelnr > hilab) then
  1862. hilab := tai_label(p).labsym.labelnr;
  1863. end;
  1864. prev := p;
  1865. getnextinstruction(p, p);
  1866. end;
  1867. if (prev.typ = ait_marker) and
  1868. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1869. blockend := prev
  1870. else blockend := nil;
  1871. if labelfound then
  1872. labdif := hilab+1-lolab
  1873. else labdif := 0;
  1874. usedregs := [];
  1875. if (labdif <> 0) then
  1876. begin
  1877. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1878. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1879. end;
  1880. p := blockstart;
  1881. prev := p;
  1882. while (p <> blockend) do
  1883. begin
  1884. case p.typ of
  1885. ait_label:
  1886. if not labelcanbeskipped(tai_label(p)) then
  1887. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1888. {$ifdef i386}
  1889. ait_regalloc:
  1890. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1891. begin
  1892. supreg:=getsupreg(tai_regalloc(p).reg);
  1893. case tai_regalloc(p).ratype of
  1894. ra_alloc :
  1895. begin
  1896. if not(supreg in usedregs) then
  1897. include(usedregs, supreg)
  1898. else
  1899. begin
  1900. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1901. hp1 := tai(p.previous);
  1902. list.remove(p);
  1903. p.free;
  1904. p := hp1;
  1905. end;
  1906. end;
  1907. ra_dealloc :
  1908. begin
  1909. exclude(usedregs, supreg);
  1910. hp1 := p;
  1911. hp2 := nil;
  1912. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1913. getnextinstruction(hp1, hp1) and
  1914. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1915. hp2 := hp1;
  1916. if hp2 <> nil then
  1917. begin
  1918. hp1 := tai(p.previous);
  1919. list.remove(p);
  1920. insertllitem(list, hp2, tai(hp2.next), p);
  1921. p := hp1;
  1922. end
  1923. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1924. and getnextinstruction(p,hp1) then
  1925. begin
  1926. hp1 := tai(p.previous);
  1927. list.remove(p);
  1928. p.free;
  1929. p := hp1;
  1930. // don't include here, since then the allocation will be removed when it's processed
  1931. // include(usedregs,supreg);
  1932. end;
  1933. end;
  1934. end;
  1935. end;
  1936. {$endif i386}
  1937. end;
  1938. repeat
  1939. prev := p;
  1940. p := tai(p.next);
  1941. until not(assigned(p)) or
  1942. (p = blockend) or
  1943. not(p.typ in (skipinstr - [ait_regalloc]));
  1944. end;
  1945. {$ifdef i386}
  1946. { don't add deallocation for function result variable or for regvars}
  1947. getNoDeallocRegs(noDeallocRegs);
  1948. usedRegs := usedRegs - noDeallocRegs;
  1949. for regCounter := RS_EAX to RS_EDI do
  1950. if regCounter in usedRegs then
  1951. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1952. {$endif i386}
  1953. end;
  1954. function tdfaobj.pass_1(_blockstart: tai): tai;
  1955. begin
  1956. blockstart := _blockstart;
  1957. initlabeltable;
  1958. pass_1 := blockend;
  1959. end;
  1960. function tdfaobj.initdfapass2: boolean;
  1961. {reserves memory for the PtaiProps in one big memory block when not using
  1962. TP, returns False if not enough memory is available for the optimizer in all
  1963. cases}
  1964. var
  1965. p: tai;
  1966. count: Longint;
  1967. { TmpStr: String; }
  1968. begin
  1969. p := blockstart;
  1970. skiphead(p);
  1971. nroftaiobjs := 0;
  1972. while (p <> blockend) do
  1973. begin
  1974. {$ifDef JumpAnal}
  1975. case p.typ of
  1976. ait_label:
  1977. begin
  1978. if not labelcanbeskipped(tai_label(p)) then
  1979. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1980. end;
  1981. ait_instruction:
  1982. begin
  1983. if taicpu(p).is_jmp then
  1984. begin
  1985. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1986. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1987. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  1988. end;
  1989. end;
  1990. { ait_instruction:
  1991. begin
  1992. if (taicpu(p).opcode = A_PUSH) and
  1993. (taicpu(p).oper[0]^.typ = top_symbol) and
  1994. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1995. begin
  1996. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  1997. if}
  1998. end;
  1999. {$endif JumpAnal}
  2000. inc(NrOftaiObjs);
  2001. getnextinstruction(p,p);
  2002. end;
  2003. if nroftaiobjs <> 0 then
  2004. begin
  2005. initdfapass2 := True;
  2006. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2007. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2008. p := blockstart;
  2009. skiphead(p);
  2010. for count := 1 To nroftaiobjs do
  2011. begin
  2012. ptaiprop(p.optinfo) := @taipropblock^[count];
  2013. getnextinstruction(p, p);
  2014. end;
  2015. end
  2016. else
  2017. initdfapass2 := false;
  2018. end;
  2019. procedure tdfaobj.dodfapass2;
  2020. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2021. contents for the instructions starting with p. Returns the last tai which has
  2022. been processed}
  2023. var
  2024. curprop, LastFlagsChangeProp: ptaiprop;
  2025. Cnt, InstrCnt : Longint;
  2026. InstrProp: TInsProp;
  2027. UsedRegs: TRegSet;
  2028. prev,p : tai;
  2029. tmpref: TReference;
  2030. tmpsupreg: tsuperregister;
  2031. {$ifdef statedebug}
  2032. hp : tai;
  2033. {$endif}
  2034. {$ifdef AnalyzeLoops}
  2035. hp : tai;
  2036. TmpState: Byte;
  2037. {$endif AnalyzeLoops}
  2038. begin
  2039. p := BlockStart;
  2040. LastFlagsChangeProp := nil;
  2041. prev := nil;
  2042. UsedRegs := [];
  2043. UpdateUsedregs(UsedRegs, p);
  2044. SkipHead(p);
  2045. BlockStart := p;
  2046. InstrCnt := 1;
  2047. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2048. while (p <> Blockend) Do
  2049. begin
  2050. curprop := @taiPropBlock^[InstrCnt];
  2051. if assigned(prev)
  2052. then
  2053. begin
  2054. {$ifdef JumpAnal}
  2055. if (p.Typ <> ait_label) then
  2056. {$endif JumpAnal}
  2057. begin
  2058. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2059. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2060. curprop^.FlagsUsed := false;
  2061. end
  2062. end
  2063. else
  2064. begin
  2065. fillchar(curprop^, SizeOf(curprop^), 0);
  2066. { For tmpreg := RS_EAX to RS_EDI Do
  2067. curprop^.regs[tmpreg].WState := 1;}
  2068. end;
  2069. curprop^.UsedRegs := UsedRegs;
  2070. curprop^.CanBeRemoved := False;
  2071. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2072. For tmpsupreg := RS_EAX To RS_EDI Do
  2073. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2074. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2075. else
  2076. begin
  2077. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2078. curprop^.regs[tmpsupreg].typ := con_unknown;
  2079. end;
  2080. case p.typ Of
  2081. ait_marker:;
  2082. ait_label:
  2083. {$ifndef JumpAnal}
  2084. if not labelCanBeSkipped(tai_label(p)) then
  2085. DestroyAllRegs(curprop,false,false);
  2086. {$else JumpAnal}
  2087. begin
  2088. if not labelCanBeSkipped(tai_label(p)) then
  2089. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2090. {$ifDef AnalyzeLoops}
  2091. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2092. {$else AnalyzeLoops}
  2093. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2094. {$endif AnalyzeLoops}
  2095. then
  2096. {all jumps to this label have been found}
  2097. {$ifDef AnalyzeLoops}
  2098. if (JmpsProcessed > 0)
  2099. then
  2100. {$endif AnalyzeLoops}
  2101. {we've processed at least one jump to this label}
  2102. begin
  2103. if (GetLastInstruction(p, hp) and
  2104. not(((hp.typ = ait_instruction)) and
  2105. (taicpu_labeled(hp).is_jmp))
  2106. then
  2107. {previous instruction not a JMP -> the contents of the registers after the
  2108. previous intruction has been executed have to be taken into account as well}
  2109. For tmpsupreg := RS_EAX to RS_EDI Do
  2110. begin
  2111. if (curprop^.regs[tmpsupreg].WState <>
  2112. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2113. then DestroyReg(curprop, tmpsupreg, true)
  2114. end
  2115. end
  2116. {$ifDef AnalyzeLoops}
  2117. else
  2118. {a label from a backward jump (e.g. a loop), no jump to this label has
  2119. already been processed}
  2120. if GetLastInstruction(p, hp) and
  2121. not(hp.typ = ait_instruction) and
  2122. (taicpu_labeled(hp).opcode = A_JMP))
  2123. then
  2124. {previous instruction not a jmp, so keep all the registers' contents from the
  2125. previous instruction}
  2126. begin
  2127. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2128. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2129. end
  2130. else
  2131. {previous instruction a jmp and no jump to this label processed yet}
  2132. begin
  2133. hp := p;
  2134. Cnt := InstrCnt;
  2135. {continue until we find a jump to the label or a label which has already
  2136. been processed}
  2137. while GetNextInstruction(hp, hp) and
  2138. not((hp.typ = ait_instruction) and
  2139. (taicpu(hp).is_jmp) and
  2140. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2141. not((hp.typ = ait_label) and
  2142. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2143. = tai_Label(hp).labsym^.RefCount) and
  2144. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2145. inc(Cnt);
  2146. if (hp.typ = ait_label)
  2147. then
  2148. {there's a processed label after the current one}
  2149. begin
  2150. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2151. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2152. end
  2153. else
  2154. {there's no label anymore after the current one, or they haven't been
  2155. processed yet}
  2156. begin
  2157. GetLastInstruction(p, hp);
  2158. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2159. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2160. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2161. end
  2162. end
  2163. {$endif AnalyzeLoops}
  2164. else
  2165. {not all references to this label have been found, so destroy all registers}
  2166. begin
  2167. GetLastInstruction(p, hp);
  2168. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2169. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2170. DestroyAllRegs(curprop,true,true)
  2171. end;
  2172. end;
  2173. {$endif JumpAnal}
  2174. ait_stab, ait_force_line, ait_function_name:;
  2175. ait_align: ; { may destroy flags !!! }
  2176. ait_instruction:
  2177. begin
  2178. if taicpu(p).is_jmp or
  2179. (taicpu(p).opcode = A_JMP) then
  2180. begin
  2181. {$ifNDef JumpAnal}
  2182. for tmpsupreg := RS_EAX to RS_EDI do
  2183. with curprop^.regs[tmpsupreg] do
  2184. case typ of
  2185. con_ref: typ := con_noRemoveRef;
  2186. con_const: typ := con_noRemoveConst;
  2187. con_invalid: typ := con_unknown;
  2188. end;
  2189. {$else JumpAnal}
  2190. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2191. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2192. begin
  2193. if (InstrCnt < InstrNr)
  2194. then
  2195. {forward jump}
  2196. if (JmpsProcessed = 0) then
  2197. {no jump to this label has been processed yet}
  2198. begin
  2199. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2200. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2201. inc(JmpsProcessed);
  2202. end
  2203. else
  2204. begin
  2205. For tmpreg := RS_EAX to RS_EDI Do
  2206. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2207. curprop^.regs[tmpreg].WState) then
  2208. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2209. inc(JmpsProcessed);
  2210. end
  2211. {$ifdef AnalyzeLoops}
  2212. else
  2213. { backward jump, a loop for example}
  2214. { if (JmpsProcessed > 0) or
  2215. not(GetLastInstruction(taiObj, hp) and
  2216. (hp.typ = ait_labeled_instruction) and
  2217. (taicpu_labeled(hp).opcode = A_JMP))
  2218. then}
  2219. {instruction prior to label is not a jmp, or at least one jump to the label
  2220. has yet been processed}
  2221. begin
  2222. inc(JmpsProcessed);
  2223. For tmpreg := RS_EAX to RS_EDI Do
  2224. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2225. curprop^.regs[tmpreg].WState)
  2226. then
  2227. begin
  2228. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2229. Cnt := InstrNr;
  2230. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2231. begin
  2232. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2233. inc(Cnt);
  2234. end;
  2235. while (Cnt <= InstrCnt) Do
  2236. begin
  2237. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2238. inc(Cnt)
  2239. end
  2240. end;
  2241. end
  2242. { else }
  2243. {instruction prior to label is a jmp and no jumps to the label have yet been
  2244. processed}
  2245. { begin
  2246. inc(JmpsProcessed);
  2247. For tmpreg := RS_EAX to RS_EDI Do
  2248. begin
  2249. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2250. Cnt := InstrNr;
  2251. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2252. begin
  2253. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2254. inc(Cnt);
  2255. end;
  2256. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2257. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2258. begin
  2259. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2260. inc(Cnt);
  2261. end;
  2262. while (Cnt <= InstrCnt) Do
  2263. begin
  2264. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2265. inc(Cnt)
  2266. end
  2267. end
  2268. end}
  2269. {$endif AnalyzeLoops}
  2270. end;
  2271. {$endif JumpAnal}
  2272. end
  2273. else
  2274. begin
  2275. InstrProp := InsProp[taicpu(p).opcode];
  2276. case taicpu(p).opcode Of
  2277. A_MOV, A_MOVZX, A_MOVSX:
  2278. begin
  2279. case taicpu(p).oper[0]^.typ Of
  2280. top_ref, top_reg:
  2281. case taicpu(p).oper[1]^.typ Of
  2282. top_reg:
  2283. begin
  2284. {$ifdef statedebug}
  2285. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2286. insertllitem(list,p,p.next,hp);
  2287. {$endif statedebug}
  2288. readOp(curprop, taicpu(p).oper[0]^);
  2289. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2290. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2291. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2292. begin
  2293. with curprop^.regs[tmpsupreg] Do
  2294. begin
  2295. incState(wstate,1);
  2296. { also store how many instructions are part of the sequence in the first }
  2297. { instruction's ptaiprop, so it can be easily accessed from within }
  2298. { CheckSequence }
  2299. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2300. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2301. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2302. { Destroy the contents of the registers }
  2303. { that depended on the previous value of }
  2304. { this register }
  2305. invalidateDependingRegs(curprop,tmpsupreg);
  2306. curprop^.regs[tmpsupreg].memwrite := nil;
  2307. end;
  2308. end
  2309. else
  2310. begin
  2311. {$ifdef statedebug}
  2312. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2313. insertllitem(list,p,p.next,hp);
  2314. {$endif statedebug}
  2315. destroyReg(curprop, tmpsupreg, true);
  2316. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2317. with curprop^.regs[tmpsupreg] Do
  2318. begin
  2319. typ := con_ref;
  2320. startmod := p;
  2321. nrOfMods := 1;
  2322. end
  2323. end;
  2324. {$ifdef StateDebug}
  2325. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2326. insertllitem(list,p,p.next,hp);
  2327. {$endif StateDebug}
  2328. end;
  2329. top_ref:
  2330. begin
  2331. readref(curprop, taicpu(p).oper[1]^.ref);
  2332. if taicpu(p).oper[0]^.typ = top_reg then
  2333. begin
  2334. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2335. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2336. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2337. taicpu(p);
  2338. end
  2339. else
  2340. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2341. end;
  2342. end;
  2343. top_Const:
  2344. begin
  2345. case taicpu(p).oper[1]^.typ Of
  2346. top_reg:
  2347. begin
  2348. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2349. {$ifdef statedebug}
  2350. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2351. insertllitem(list,p,p.next,hp);
  2352. {$endif statedebug}
  2353. With curprop^.regs[tmpsupreg] Do
  2354. begin
  2355. DestroyReg(curprop, tmpsupreg, true);
  2356. typ := Con_Const;
  2357. StartMod := p;
  2358. nrOfMods := 1;
  2359. end
  2360. end;
  2361. top_ref:
  2362. begin
  2363. readref(curprop, taicpu(p).oper[1]^.ref);
  2364. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2365. end;
  2366. end;
  2367. end;
  2368. end;
  2369. end;
  2370. A_DIV, A_IDIV, A_MUL:
  2371. begin
  2372. ReadOp(curprop, taicpu(p).oper[0]^);
  2373. readreg(curprop,RS_EAX);
  2374. if (taicpu(p).OpCode = A_IDIV) or
  2375. (taicpu(p).OpCode = A_DIV) then
  2376. begin
  2377. readreg(curprop,RS_EDX);
  2378. end;
  2379. {$ifdef statedebug}
  2380. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2381. insertllitem(list,p,p.next,hp);
  2382. {$endif statedebug}
  2383. { DestroyReg(curprop, RS_EAX, true);}
  2384. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2385. taicpu(p), RS_EAX);
  2386. DestroyReg(curprop, RS_EDX, true);
  2387. LastFlagsChangeProp := curprop;
  2388. end;
  2389. A_IMUL:
  2390. begin
  2391. ReadOp(curprop,taicpu(p).oper[0]^);
  2392. if (taicpu(p).ops >= 2) then
  2393. ReadOp(curprop,taicpu(p).oper[1]^);
  2394. if (taicpu(p).ops <= 2) then
  2395. if (taicpu(p).ops=1) then
  2396. begin
  2397. readreg(curprop,RS_EAX);
  2398. {$ifdef statedebug}
  2399. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2400. insertllitem(list,p,p.next,hp);
  2401. {$endif statedebug}
  2402. { DestroyReg(curprop, RS_EAX, true); }
  2403. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2404. taicpu(p), RS_EAX);
  2405. DestroyReg(curprop,RS_EDX, true)
  2406. end
  2407. else
  2408. AddInstr2OpContents(
  2409. {$ifdef statedebug}list,{$endif}
  2410. taicpu(p), taicpu(p).oper[1]^)
  2411. else
  2412. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2413. taicpu(p), taicpu(p).oper[2]^);
  2414. LastFlagsChangeProp := curprop;
  2415. end;
  2416. A_LEA:
  2417. begin
  2418. readop(curprop,taicpu(p).oper[0]^);
  2419. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2420. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2421. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2422. else
  2423. begin
  2424. {$ifdef statedebug}
  2425. hp := tai_comment.Create(strpnew('destroying & initing'+
  2426. std_regname(taicpu(p).oper[1]^.reg)));
  2427. insertllitem(list,p,p.next,hp);
  2428. {$endif statedebug}
  2429. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2430. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2431. begin
  2432. typ := con_ref;
  2433. startmod := p;
  2434. nrOfMods := 1;
  2435. end
  2436. end;
  2437. end;
  2438. else
  2439. begin
  2440. Cnt := 1;
  2441. while (Cnt <= maxinschanges) and
  2442. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2443. begin
  2444. case InstrProp.Ch[Cnt] Of
  2445. Ch_REAX..Ch_REDI:
  2446. begin
  2447. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2448. readreg(curprop,tmpsupreg);
  2449. end;
  2450. Ch_WEAX..Ch_RWEDI:
  2451. begin
  2452. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2453. begin
  2454. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2455. readreg(curprop,tmpsupreg);
  2456. end;
  2457. {$ifdef statedebug}
  2458. hp := tai_comment.Create(strpnew('destroying '+
  2459. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2460. insertllitem(list,p,p.next,hp);
  2461. {$endif statedebug}
  2462. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2463. DestroyReg(curprop,tmpsupreg, true);
  2464. end;
  2465. Ch_MEAX..Ch_MEDI:
  2466. begin
  2467. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2468. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2469. taicpu(p),tmpsupreg);
  2470. end;
  2471. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2472. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2473. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2474. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2475. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2476. Ch_Wop1..Ch_RWop1:
  2477. begin
  2478. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2479. ReadOp(curprop, taicpu(p).oper[0]^);
  2480. DestroyOp(p, taicpu(p).oper[0]^);
  2481. end;
  2482. Ch_Mop1:
  2483. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2484. taicpu(p), taicpu(p).oper[0]^);
  2485. Ch_Wop2..Ch_RWop2:
  2486. begin
  2487. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2488. ReadOp(curprop, taicpu(p).oper[1]^);
  2489. DestroyOp(p, taicpu(p).oper[1]^);
  2490. end;
  2491. Ch_Mop2:
  2492. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2493. taicpu(p), taicpu(p).oper[1]^);
  2494. Ch_WOp3..Ch_RWOp3:
  2495. begin
  2496. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2497. ReadOp(curprop, taicpu(p).oper[2]^);
  2498. DestroyOp(p, taicpu(p).oper[2]^);
  2499. end;
  2500. Ch_Mop3:
  2501. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2502. taicpu(p), taicpu(p).oper[2]^);
  2503. Ch_WMemEDI:
  2504. begin
  2505. readreg(curprop, RS_EDI);
  2506. fillchar(tmpref, SizeOf(tmpref), 0);
  2507. tmpref.base := NR_EDI;
  2508. tmpref.index := NR_EDI;
  2509. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2510. end;
  2511. Ch_RFlags:
  2512. if assigned(LastFlagsChangeProp) then
  2513. LastFlagsChangeProp^.FlagsUsed := true;
  2514. Ch_WFlags:
  2515. LastFlagsChangeProp := curprop;
  2516. Ch_RWFlags:
  2517. begin
  2518. if assigned(LastFlagsChangeProp) then
  2519. LastFlagsChangeProp^.FlagsUsed := true;
  2520. LastFlagsChangeProp := curprop;
  2521. end;
  2522. Ch_FPU:;
  2523. else
  2524. begin
  2525. {$ifdef statedebug}
  2526. hp := tai_comment.Create(strpnew(
  2527. 'destroying all regs for prev instruction'));
  2528. insertllitem(list,p, p.next,hp);
  2529. {$endif statedebug}
  2530. DestroyAllRegs(curprop,true,true);
  2531. LastFlagsChangeProp := curprop;
  2532. end;
  2533. end;
  2534. inc(Cnt);
  2535. end
  2536. end;
  2537. end;
  2538. end;
  2539. end
  2540. else
  2541. begin
  2542. {$ifdef statedebug}
  2543. hp := tai_comment.Create(strpnew(
  2544. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2545. insertllitem(list,p, p.next,hp);
  2546. {$endif statedebug}
  2547. DestroyAllRegs(curprop,true,true);
  2548. end;
  2549. end;
  2550. inc(InstrCnt);
  2551. prev := p;
  2552. GetNextInstruction(p, p);
  2553. end;
  2554. end;
  2555. function tdfaobj.pass_generate_code: boolean;
  2556. begin
  2557. if initdfapass2 then
  2558. begin
  2559. dodfapass2;
  2560. pass_generate_code := true
  2561. end
  2562. else
  2563. pass_generate_code := false;
  2564. end;
  2565. {$push}
  2566. {$r-}
  2567. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2568. begin
  2569. if (sym.labelnr >= lolab) and
  2570. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2571. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2572. else
  2573. getlabelwithsym := nil;
  2574. end;
  2575. {$pop}
  2576. procedure tdfaobj.clear;
  2577. begin
  2578. if labdif <> 0 then
  2579. begin
  2580. freemem(labeltable);
  2581. labeltable := nil;
  2582. end;
  2583. if assigned(taipropblock) then
  2584. begin
  2585. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2586. taipropblock := nil;
  2587. end;
  2588. end;
  2589. end.