ncgmem.pas 49 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpuinfo,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgwithnode = class(twithnode)
  45. procedure pass_generate_code;override;
  46. end;
  47. tcgvecnode = class(tvecnode)
  48. function get_mul_size : aint;
  49. private
  50. procedure rangecheck_array;
  51. procedure rangecheck_string;
  52. protected
  53. {# This routine is used to calculate the address of the reference.
  54. On entry reg contains the index in the array,
  55. and l contains the size of each element in the array.
  56. This routine should update location.reference correctly,
  57. so it points to the correct address.
  58. }
  59. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  60. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  61. procedure update_reference_offset(var ref: treference; index, mulsize: aint); virtual;
  62. procedure second_wideansistring;virtual;
  63. procedure second_dynamicarray;virtual;
  64. function valid_index_size(size: tcgsize): boolean;virtual;
  65. public
  66. procedure pass_generate_code;override;
  67. end;
  68. implementation
  69. uses
  70. systems,
  71. cutils,cclasses,verbose,globals,constexp,
  72. symconst,symbase,symdef,symsym,symcpu,symtable,defutil,paramgr,
  73. aasmbase,aasmtai,aasmdata,
  74. procinfo,pass_2,parabase,
  75. pass_1,nld,ncon,nadd,ncnv,nutils,
  76. cgobj,hlcgobj,
  77. tgobj,ncgutil,objcgutl,
  78. defcmp
  79. ;
  80. {*****************************************************************************
  81. TCGLOADVMTADDRNODE
  82. *****************************************************************************}
  83. procedure tcgloadvmtaddrnode.pass_generate_code;
  84. var
  85. href : treference;
  86. pool : THashSet;
  87. entry : PHashSetItem;
  88. begin
  89. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  90. if (left.nodetype=typen) then
  91. begin
  92. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  93. if not is_objcclass(left.resultdef) then
  94. begin
  95. reference_reset_symbol(href,
  96. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  97. voidpointertype.size);
  98. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,resultdef,href,location.register);
  99. end
  100. else
  101. begin
  102. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  103. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  104. if (target_info.system in systems_objc_nfabi) then
  105. begin
  106. { find/add necessary classref/classname pool entries }
  107. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  108. end
  109. else
  110. begin
  111. { find/add necessary classref/classname pool entries }
  112. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  113. end;
  114. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  115. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,objc_idtype,objc_idtype,href,location.register);
  116. end;
  117. end
  118. else
  119. { should be handled in pass 1 }
  120. internalerror(2015052801);
  121. end;
  122. {*****************************************************************************
  123. TCGLOADPARENTFPNODE
  124. *****************************************************************************}
  125. procedure tcgloadparentfpnode.pass_generate_code;
  126. var
  127. currpi : tprocinfo;
  128. hsym : tparavarsym;
  129. href : treference;
  130. begin
  131. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  132. begin
  133. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  134. location.register:=current_procinfo.framepointer;
  135. end
  136. else
  137. begin
  138. currpi:=current_procinfo;
  139. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  140. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  141. { load framepointer of current proc }
  142. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  143. if not assigned(hsym) then
  144. internalerror(200309281);
  145. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  146. { walk parents }
  147. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  148. begin
  149. currpi:=currpi.parent;
  150. if not assigned(currpi) then
  151. internalerror(200311201);
  152. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  153. if not assigned(hsym) then
  154. internalerror(200309282);
  155. if hsym.localloc.loc<>LOC_REFERENCE then
  156. internalerror(200309283);
  157. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  158. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  159. end;
  160. end;
  161. end;
  162. {*****************************************************************************
  163. TCGADDRNODE
  164. *****************************************************************************}
  165. procedure tcgaddrnode.pass_generate_code;
  166. begin
  167. secondpass(left);
  168. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  169. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  170. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  171. { on x86_64-win64, array of chars can be returned in registers, however,
  172. when passing these arrays to other functions, the compiler wants to take
  173. the address of the array so when the addrnode has been created internally,
  174. we have to force the data into memory, see also tw14388.pp
  175. }
  176. if nf_internal in flags then
  177. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  178. else
  179. internalerror(2006111510);
  180. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  181. end;
  182. {*****************************************************************************
  183. TCGDEREFNODE
  184. *****************************************************************************}
  185. procedure tcgderefnode.pass_generate_code;
  186. var
  187. paraloc1 : tcgpara;
  188. pd : tprocdef;
  189. sym : tsym;
  190. st : tsymtable;
  191. hp : pnode;
  192. extraoffset : tcgint;
  193. begin
  194. sym:=nil;
  195. { assume natural alignment, except for packed records }
  196. if not(resultdef.typ in [recorddef,objectdef]) or
  197. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  198. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  199. else
  200. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  201. { can we fold an add/sub node into the offset of the deref node? }
  202. extraoffset:=0;
  203. hp:=actualtargetnode(@left);
  204. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  205. begin
  206. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  207. replacenode(hp^,taddnode(hp^).left);
  208. end
  209. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  210. begin
  211. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  212. replacenode(hp^,taddnode(hp^).left);
  213. end
  214. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  215. begin
  216. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  217. replacenode(hp^,taddnode(hp^).right);
  218. end;
  219. secondpass(left);
  220. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  221. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  222. case left.location.loc of
  223. LOC_CREGISTER,
  224. LOC_REGISTER:
  225. begin
  226. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  227. {$ifdef cpu_uses_separate_address_registers}
  228. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  229. begin
  230. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  231. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  232. location.reference.base);
  233. end
  234. else
  235. {$endif}
  236. location.reference.base := left.location.register;
  237. end;
  238. LOC_CREFERENCE,
  239. LOC_REFERENCE:
  240. begin
  241. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  242. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  243. end;
  244. LOC_CONSTANT:
  245. begin
  246. location.reference.offset:=left.location.value;
  247. end;
  248. else
  249. internalerror(200507031);
  250. end;
  251. location.reference.offset:=location.reference.offset+extraoffset;
  252. if (cs_use_heaptrc in current_settings.globalswitches) and
  253. (cs_checkpointer in current_settings.localswitches) and
  254. not(cs_compilesystem in current_settings.moduleswitches) and
  255. tpointerdef(left.resultdef).compatible_with_pointerdef_size(tpointerdef(voidpointertype)) and
  256. not(nf_no_checkpointer in flags) and
  257. { can be NR_NO in case of LOC_CONSTANT }
  258. (location.reference.base<>NR_NO) then
  259. begin
  260. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  261. (sym.typ<>procsym) then
  262. internalerror(2012010601);
  263. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  264. paraloc1.init;
  265. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  266. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  267. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  268. paraloc1.done;
  269. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  270. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  271. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  272. end;
  273. end;
  274. {*****************************************************************************
  275. TCGSUBSCRIPTNODE
  276. *****************************************************************************}
  277. function tcgsubscriptnode.handle_platform_subscript: boolean;
  278. begin
  279. result:=false;
  280. end;
  281. procedure tcgsubscriptnode.pass_generate_code;
  282. var
  283. asmsym: tasmsymbol;
  284. paraloc1 : tcgpara;
  285. tmpref: treference;
  286. sref: tsubsetreference;
  287. offsetcorrection : aint;
  288. pd : tprocdef;
  289. sym : tsym;
  290. st : tsymtable;
  291. begin
  292. sym:=nil;
  293. secondpass(left);
  294. if codegenerror then
  295. exit;
  296. paraloc1.init;
  297. { several object types must be dereferenced implicitly }
  298. if is_implicit_pointer_object_type(left.resultdef) then
  299. begin
  300. if (not is_managed_type(left.resultdef)) or
  301. (target_info.system in systems_garbage_collected_managed_types) then
  302. begin
  303. { the contents of a class are aligned to a sizeof(pointer) }
  304. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  305. case left.location.loc of
  306. LOC_CREGISTER,
  307. LOC_REGISTER:
  308. begin
  309. {$ifdef cpu_uses_separate_address_registers}
  310. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  311. begin
  312. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  313. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  314. left.location.register,location.reference.base);
  315. end
  316. else
  317. {$endif}
  318. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  319. end;
  320. LOC_CREFERENCE,
  321. LOC_REFERENCE,
  322. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  323. LOC_SUBSETREG,
  324. LOC_CSUBSETREG,
  325. LOC_SUBSETREF,
  326. LOC_CSUBSETREF:
  327. begin
  328. hlcg.reference_reset_base(location.reference,left.resultdef,
  329. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  330. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  331. end;
  332. LOC_CONSTANT:
  333. begin
  334. { can happen with @classtype(pointerconst).field }
  335. location.reference.offset:=left.location.value;
  336. end;
  337. else
  338. internalerror(2009092401);
  339. end;
  340. { implicit deferencing }
  341. if (cs_use_heaptrc in current_settings.globalswitches) and
  342. (cs_checkpointer in current_settings.localswitches) and
  343. not(cs_compilesystem in current_settings.moduleswitches) then
  344. begin
  345. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  346. (sym.typ<>procsym) then
  347. internalerror(2012010602);
  348. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  349. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  350. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  351. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  352. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  353. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  354. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  355. end;
  356. end
  357. else
  358. { reference-counted implicit pointer object types don't have
  359. fields -> cannot be subscripted (calls are handled via call
  360. nodes) }
  361. internalerror(2011011901);
  362. end
  363. else
  364. begin
  365. location_copy(location,left.location);
  366. { some abi's require that functions return (some) records in }
  367. { registers }
  368. case location.loc of
  369. LOC_REFERENCE,
  370. LOC_CREFERENCE:
  371. ;
  372. LOC_CONSTANT,
  373. LOC_REGISTER,
  374. LOC_CREGISTER,
  375. { if a floating point value is casted into a record, it
  376. can happen that we get here an fpu or mm register }
  377. LOC_MMREGISTER,
  378. LOC_FPUREGISTER,
  379. LOC_CMMREGISTER,
  380. LOC_CFPUREGISTER:
  381. begin
  382. { in case the result is not something that can be put
  383. into an integer register (e.g.
  384. function_returning_record().non_regable_field, or
  385. a function returning a value > sizeof(intreg))
  386. -> force to memory
  387. }
  388. if not tstoreddef(left.resultdef).is_intregable or
  389. not tstoreddef(resultdef).is_intregable or
  390. { if the field spans multiple registers, we must force the record into
  391. memory as well }
  392. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  393. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  394. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  395. { actually, we should be able to "subscript" a constant, but this would require some code
  396. which enables dumping and reading constants from a temporary memory buffer. This
  397. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  398. }
  399. LOC_CONSTANT]) then
  400. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  401. else
  402. begin
  403. if (left.location.loc = LOC_REGISTER) then
  404. location.loc := LOC_SUBSETREG
  405. else
  406. location.loc := LOC_CSUBSETREG;
  407. location.size:=def_cgsize(resultdef);
  408. offsetcorrection:=0;
  409. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  410. begin
  411. if (vs.fieldoffset>=sizeof(aword)) xor (target_info.endian=endian_big) then
  412. location.sreg.subsetreg := left.location.registerhi
  413. else
  414. location.sreg.subsetreg := left.location.register;
  415. if (vs.fieldoffset>=sizeof(aword)) then
  416. offsetcorrection:=sizeof(aword)*8;
  417. location.sreg.subsetregsize := OS_INT;
  418. end
  419. else
  420. begin
  421. location.sreg.subsetreg := left.location.register;
  422. location.sreg.subsetregsize := left.location.size;
  423. end;
  424. if not is_packed_record_or_object(left.resultdef) then
  425. begin
  426. if (target_info.endian = ENDIAN_BIG) then
  427. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  428. else
  429. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  430. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  431. end
  432. else
  433. begin
  434. location.sreg.bitlen := resultdef.packedbitsize;
  435. if (target_info.endian = ENDIAN_BIG) then
  436. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  437. else
  438. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  439. end;
  440. end;
  441. end;
  442. LOC_SUBSETREG,
  443. LOC_CSUBSETREG:
  444. begin
  445. location.size:=def_cgsize(resultdef);
  446. if not is_packed_record_or_object(left.resultdef) then
  447. begin
  448. if (target_info.endian = ENDIAN_BIG) then
  449. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  450. else
  451. inc(location.sreg.startbit, vs.fieldoffset * 8);
  452. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  453. end
  454. else
  455. begin
  456. location.sreg.bitlen := resultdef.packedbitsize;
  457. if (target_info.endian = ENDIAN_BIG) then
  458. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  459. else
  460. inc(location.sreg.startbit, vs.fieldoffset);
  461. end;
  462. end;
  463. else
  464. internalerror(2006031901);
  465. end;
  466. end;
  467. if is_objc_class_or_protocol(left.resultdef) and
  468. (target_info.system in systems_objc_nfabi) then
  469. begin
  470. if (location.loc<>LOC_REFERENCE) or
  471. (location.reference.index<>NR_NO) then
  472. internalerror(2009092402);
  473. { the actual field offset is stored in memory (to solve the
  474. "fragile base class" problem: this way the layout of base
  475. classes can be changed without breaking programs compiled against
  476. earlier versions)
  477. }
  478. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  479. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  480. hlcg.g_ptrtypecast_ref(current_asmdata.CurrAsmList,left.resultdef,cpointerdef.getreusable(resultdef),location.reference);
  481. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  482. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  483. { always packrecords C -> natural alignment }
  484. location.reference.alignment:=vs.vardef.alignment;
  485. end
  486. else if handle_platform_subscript then
  487. begin
  488. { done }
  489. end
  490. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  491. begin
  492. if not is_packed_record_or_object(left.resultdef) then
  493. begin
  494. inc(location.reference.offset,vs.fieldoffset);
  495. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  496. end
  497. else if (vs.fieldoffset mod 8 = 0) and
  498. (resultdef.packedbitsize mod 8 = 0) and
  499. { is different in case of e.g. packenum 2 and an enum }
  500. { which fits in 8 bits }
  501. (resultdef.size*8 = resultdef.packedbitsize) then
  502. begin
  503. inc(location.reference.offset,vs.fieldoffset div 8);
  504. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  505. end
  506. else
  507. begin
  508. sref.ref:=location.reference;
  509. sref.ref.alignment:=1;
  510. sref.bitindexreg:=NR_NO;
  511. inc(sref.ref.offset,vs.fieldoffset div 8);
  512. sref.startbit:=vs.fieldoffset mod 8;
  513. sref.bitlen:=resultdef.packedbitsize;
  514. if (left.location.loc=LOC_REFERENCE) then
  515. location.loc:=LOC_SUBSETREF
  516. else
  517. location.loc:=LOC_CSUBSETREF;
  518. location.sref:=sref;
  519. end;
  520. { also update the size of the location }
  521. location.size:=def_cgsize(resultdef);
  522. end;
  523. paraloc1.done;
  524. end;
  525. {*****************************************************************************
  526. TCGWITHNODE
  527. *****************************************************************************}
  528. procedure tcgwithnode.pass_generate_code;
  529. begin
  530. location_reset(location,LOC_VOID,OS_NO);
  531. if assigned(left) then
  532. secondpass(left);
  533. end;
  534. {*****************************************************************************
  535. TCGVECNODE
  536. *****************************************************************************}
  537. function tcgvecnode.get_mul_size : aint;
  538. begin
  539. if nf_memindex in flags then
  540. get_mul_size:=1
  541. else
  542. begin
  543. if (left.resultdef.typ=arraydef) then
  544. if not is_packed_array(left.resultdef) then
  545. get_mul_size:=tarraydef(left.resultdef).elesize
  546. else
  547. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  548. else
  549. get_mul_size:=resultdef.size;
  550. end
  551. end;
  552. { this routine must, like any other routine, not change the contents }
  553. { of base/index registers of references, as these may be regvars. }
  554. { The register allocator can coalesce one LOC_REGISTER being moved }
  555. { into another (as their live ranges won't overlap), but not a }
  556. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  557. { the live range of the LOC_CREGISTER will most likely overlap the }
  558. { the live range of the target LOC_(C)REGISTER) }
  559. { The passed register may be a LOC_CREGISTER as well. }
  560. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  561. var
  562. hreg: tregister;
  563. begin
  564. if l<>1 then
  565. begin
  566. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  567. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  568. maybe_const_reg:=hreg;
  569. end;
  570. if location.reference.base=NR_NO then
  571. location.reference.base:=maybe_const_reg
  572. else if location.reference.index=NR_NO then
  573. location.reference.index:=maybe_const_reg
  574. else
  575. begin
  576. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  577. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  578. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  579. { insert new index register }
  580. location.reference.index:=maybe_const_reg;
  581. end;
  582. { update alignment }
  583. if (location.reference.alignment=0) then
  584. internalerror(2009020704);
  585. location.reference.alignment:=newalignment(location.reference.alignment,l);
  586. end;
  587. { see remarks for tcgvecnode.update_reference_reg_mul above }
  588. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  589. var
  590. sref: tsubsetreference;
  591. offsetreg, hreg: tregister;
  592. alignpower: aint;
  593. temp : longint;
  594. begin
  595. { only orddefs are bitpacked. Even then we only need special code in }
  596. { case the bitpacked *byte size* is not a power of two, otherwise }
  597. { everything can be handled using the the regular array code. }
  598. if ((l mod 8) = 0) and
  599. (ispowerof2(l div 8,temp) or
  600. not is_ordinal(resultdef)
  601. {$ifndef cpu64bitalu}
  602. or is_64bitint(resultdef)
  603. {$endif not cpu64bitalu}
  604. ) then
  605. begin
  606. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  607. exit;
  608. end;
  609. if (l > 8*sizeof(aint)) then
  610. internalerror(200608051);
  611. sref.ref := location.reference;
  612. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  613. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_ADDR,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  614. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,hreg);
  615. { keep alignment for index }
  616. sref.ref.alignment := left.resultdef.alignment;
  617. if not ispowerof2(packedbitsloadsize(l),temp) then
  618. internalerror(2006081201);
  619. alignpower:=temp;
  620. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  621. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  622. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  623. if (sref.ref.base = NR_NO) then
  624. sref.ref.base := offsetreg
  625. else if (sref.ref.index = NR_NO) then
  626. sref.ref.index := offsetreg
  627. else
  628. begin
  629. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  630. sref.ref.base := offsetreg;
  631. end;
  632. { the if expression below is a constant evaluated at compile time, so disable the unreachable code
  633. warning }
  634. {$push}
  635. {$warn 6018 off}
  636. { we can reuse hreg only if OS_INT and OS_ADDR have the same size/type }
  637. if OS_INT<>OS_ADDR then
  638. begin
  639. sref.bitindexreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  640. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_INT,hreg,sref.bitindexreg);
  641. end
  642. else
  643. sref.bitindexreg:=hreg;
  644. {$pop}
  645. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,sref.bitindexreg);
  646. sref.startbit := 0;
  647. sref.bitlen := resultdef.packedbitsize;
  648. if (left.location.loc = LOC_REFERENCE) then
  649. location.loc := LOC_SUBSETREF
  650. else
  651. location.loc := LOC_CSUBSETREF;
  652. location.sref := sref;
  653. end;
  654. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: aint);
  655. begin
  656. inc(ref.offset,index*mulsize);
  657. end;
  658. procedure tcgvecnode.second_wideansistring;
  659. begin
  660. end;
  661. procedure tcgvecnode.second_dynamicarray;
  662. begin
  663. end;
  664. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  665. begin
  666. result:=
  667. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  668. end;
  669. procedure tcgvecnode.rangecheck_array;
  670. var
  671. hightree : tnode;
  672. poslabel,
  673. neglabel : tasmlabel;
  674. hreg : tregister;
  675. paraloc1,paraloc2 : tcgpara;
  676. pd : tprocdef;
  677. begin
  678. { omit range checking when this is an array access to a pointer which has been
  679. typecasted from an array }
  680. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  681. exit;
  682. paraloc1.init;
  683. paraloc2.init;
  684. if is_open_array(left.resultdef) or
  685. is_array_of_const(left.resultdef) then
  686. begin
  687. { cdecl functions don't have high() so we can not check the range }
  688. { (can't use current_procdef, since it may be a nested procedure) }
  689. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  690. begin
  691. { Get high value }
  692. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  693. { it must be available }
  694. if not assigned(hightree) then
  695. internalerror(200212201);
  696. firstpass(hightree);
  697. secondpass(hightree);
  698. { generate compares }
  699. {$ifndef cpuhighleveltarget}
  700. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  701. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  702. else
  703. {$endif not cpuhighleveltarget}
  704. begin
  705. hreg:=hlcg.getintregister(current_asmdata.CurrAsmList,ossinttype);
  706. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,ossinttype,right.location,hreg);
  707. end;
  708. current_asmdata.getjumplabel(neglabel);
  709. current_asmdata.getjumplabel(poslabel);
  710. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,ossinttype,OC_LT,0,hreg,poslabel);
  711. hlcg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,osuinttype,OC_BE,hightree.location,hreg,neglabel);
  712. hlcg.a_label(current_asmdata.CurrAsmList,poslabel);
  713. hlcg.g_call_system_proc(current_asmdata.CurrAsmList,'fpc_rangeerror',[],nil).resetiftemp;
  714. hlcg.a_label(current_asmdata.CurrAsmList,neglabel);
  715. { release hightree }
  716. hightree.free;
  717. end;
  718. end
  719. else
  720. if is_dynamic_array(left.resultdef) then
  721. begin
  722. pd:=search_system_proc('fpc_dynarray_rangecheck');
  723. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  724. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  725. if pd.is_pushleftright then
  726. begin
  727. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  728. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  729. end
  730. else
  731. begin
  732. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  733. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  734. end;
  735. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  736. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  737. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  738. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  739. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  740. end;
  741. { for regular arrays, we don't have to do anything because the index has been
  742. type converted to the index type, which already inserted a range check if
  743. necessary }
  744. paraloc1.done;
  745. paraloc2.done;
  746. end;
  747. procedure tcgvecnode.rangecheck_string;
  748. var
  749. paraloc1,
  750. paraloc2: tcgpara;
  751. helpername: TIDString;
  752. pd: tprocdef;
  753. begin
  754. paraloc1.init;
  755. paraloc2.init;
  756. case tstringdef(left.resultdef).stringtype of
  757. { it's the same for ansi- and wide strings }
  758. st_unicodestring,
  759. st_widestring,
  760. st_ansistring:
  761. begin
  762. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  763. pd:=search_system_proc(helpername);
  764. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  765. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  766. if pd.is_pushleftright then
  767. begin
  768. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  769. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  770. end
  771. else
  772. begin
  773. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  774. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  775. end;
  776. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  777. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  778. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  779. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  780. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  781. end;
  782. st_shortstring:
  783. begin
  784. {!!!!!!!!!!!!!!!!!}
  785. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  786. end;
  787. st_longstring:
  788. begin
  789. {!!!!!!!!!!!!!!!!!}
  790. end;
  791. end;
  792. paraloc1.done;
  793. paraloc2.done;
  794. end;
  795. procedure tcgvecnode.pass_generate_code;
  796. var
  797. offsetdec,
  798. extraoffset : aint;
  799. rightp : pnode;
  800. newsize : tcgsize;
  801. mulsize,
  802. bytemulsize,
  803. alignpow : aint;
  804. paraloc1,
  805. paraloc2 : tcgpara;
  806. subsetref : tsubsetreference;
  807. temp : longint;
  808. indexdef : tdef;
  809. begin
  810. paraloc1.init;
  811. paraloc2.init;
  812. mulsize:=get_mul_size;
  813. if not is_packed_array(left.resultdef) then
  814. bytemulsize:=mulsize
  815. else
  816. bytemulsize:=mulsize div 8;
  817. newsize:=def_cgsize(resultdef);
  818. secondpass(left);
  819. if left.location.loc=LOC_CREFERENCE then
  820. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  821. else
  822. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  823. { an ansistring needs to be dereferenced }
  824. if is_ansistring(left.resultdef) or
  825. is_wide_or_unicode_string(left.resultdef) then
  826. begin
  827. if nf_callunique in flags then
  828. internalerror(200304236);
  829. {DM!!!!!}
  830. case left.location.loc of
  831. LOC_REGISTER,
  832. LOC_CREGISTER :
  833. begin
  834. {$ifdef m68k}
  835. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  836. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  837. {$else m68k}
  838. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  839. {$endif m68k}
  840. end;
  841. LOC_CREFERENCE,
  842. LOC_REFERENCE :
  843. begin
  844. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  845. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  846. end;
  847. LOC_CONSTANT:
  848. begin
  849. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  850. end;
  851. else
  852. internalerror(2002032218);
  853. end;
  854. if is_ansistring(left.resultdef) then
  855. offsetdec:=1
  856. else
  857. offsetdec:=2;
  858. location.reference.alignment:=offsetdec;
  859. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  860. if not(cs_zerobasedstrings in current_settings.localswitches) then
  861. update_reference_offset(location.reference,-1,offsetdec);
  862. end
  863. else if is_dynamic_array(left.resultdef) then
  864. begin
  865. case left.location.loc of
  866. LOC_REGISTER,
  867. LOC_CREGISTER :
  868. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  869. LOC_REFERENCE,
  870. LOC_CREFERENCE :
  871. begin
  872. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  873. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  874. left.location.reference,location.reference.base);
  875. end;
  876. else
  877. internalerror(2002032219);
  878. end;
  879. { a dynarray points to the start of a memory block, which
  880. we assume to be always aligned to a multiple of the
  881. pointer size
  882. }
  883. location.reference.alignment:=voidpointertype.size;
  884. end
  885. else
  886. begin
  887. { may happen in case of function results }
  888. case left.location.loc of
  889. LOC_CSUBSETREG,
  890. LOC_CREGISTER,
  891. LOC_CMMREGISTER,
  892. LOC_SUBSETREG,
  893. LOC_REGISTER,
  894. LOC_MMREGISTER:
  895. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  896. end;
  897. location_copy(location,left.location);
  898. end;
  899. { location must be memory }
  900. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  901. internalerror(200411013);
  902. { offset can only differ from 0 if arraydef }
  903. if (left.resultdef.typ=arraydef) and
  904. not(is_dynamic_array(left.resultdef)) and
  905. (not(is_packed_array(left.resultdef)) or
  906. ((mulsize mod 8 = 0) and
  907. ispowerof2(mulsize div 8,temp)) or
  908. { only orddefs are bitpacked }
  909. not is_ordinal(resultdef)
  910. {$ifndef cpu64bitalu}
  911. or is_64bitint(resultdef)
  912. {$endif not cpu64bitalu}
  913. ) then
  914. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  915. if right.nodetype=ordconstn then
  916. begin
  917. { offset can only differ from 0 if arraydef }
  918. if cs_check_range in current_settings.localswitches then
  919. begin
  920. secondpass(right);
  921. case left.resultdef.typ of
  922. arraydef :
  923. rangecheck_array;
  924. stringdef :
  925. rangecheck_string;
  926. end;
  927. end;
  928. if not(is_packed_array(left.resultdef)) or
  929. ((mulsize mod 8 = 0) and
  930. (ispowerof2(mulsize div 8,temp) or
  931. { only orddefs are bitpacked }
  932. not is_ordinal(resultdef))) then
  933. begin
  934. extraoffset:=tordconstnode(right).value.svalue;
  935. update_reference_offset(location.reference,extraoffset,bytemulsize);
  936. { adjust alignment after this change }
  937. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  938. { don't do this for floats etc.; needed to properly set the }
  939. { size for bitpacked arrays (e.g. a bitpacked array of }
  940. { enums who are size 2 but fit in one byte -> in the array }
  941. { they will be one byte and have to be stored like that) }
  942. if is_packed_array(left.resultdef) and
  943. (tcgsize2size[newsize] <> bytemulsize) then
  944. newsize:=int_cgsize(bytemulsize);
  945. end
  946. else
  947. begin
  948. subsetref.ref := location.reference;
  949. subsetref.ref.alignment := left.resultdef.alignment;
  950. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  951. internalerror(2006081212);
  952. alignpow:=temp;
  953. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  954. subsetref.bitindexreg := NR_NO;
  955. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  956. subsetref.bitlen := resultdef.packedbitsize;
  957. if (left.location.loc = LOC_REFERENCE) then
  958. location.loc := LOC_SUBSETREF
  959. else
  960. location.loc := LOC_CSUBSETREF;
  961. location.sref := subsetref;
  962. end;
  963. end
  964. else
  965. { not nodetype=ordconstn }
  966. begin
  967. if (cs_opt_level1 in current_settings.optimizerswitches) and
  968. { if we do range checking, we don't }
  969. { need that fancy code (it would be }
  970. { buggy) }
  971. not(cs_check_range in current_settings.localswitches) and
  972. (left.resultdef.typ=arraydef) and
  973. not is_packed_array(left.resultdef) then
  974. begin
  975. extraoffset:=0;
  976. rightp:=actualtargetnode(@right);
  977. if rightp^.nodetype=addn then
  978. begin
  979. if taddnode(rightp^).right.nodetype=ordconstn then
  980. begin
  981. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  982. replacenode(rightp^,taddnode(rightp^).left);
  983. end
  984. else if taddnode(rightp^).left.nodetype=ordconstn then
  985. begin
  986. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  987. replacenode(rightp^,taddnode(rightp^).right);
  988. end;
  989. end
  990. else if rightp^.nodetype=subn then
  991. begin
  992. if taddnode(rightp^).right.nodetype=ordconstn then
  993. begin
  994. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  995. replacenode(rightp^,taddnode(rightp^).left);
  996. end;
  997. end;
  998. update_reference_offset(location.reference,extraoffset,mulsize);
  999. end;
  1000. { calculate from left to right }
  1001. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  1002. internalerror(200304237);
  1003. secondpass(right);
  1004. if (right.expectloc=LOC_JUMP)<>
  1005. (right.location.loc=LOC_JUMP) then
  1006. internalerror(2006010801);
  1007. { if mulsize = 1, we won't have to modify the index }
  1008. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  1009. not valid_index_size(right.location.size) then
  1010. begin
  1011. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  1012. indexdef:=ptruinttype
  1013. end
  1014. else
  1015. indexdef:=right.resultdef;
  1016. { produce possible range check code: }
  1017. if cs_check_range in current_settings.localswitches then
  1018. begin
  1019. if left.resultdef.typ=arraydef then
  1020. rangecheck_array
  1021. else if (left.resultdef.typ=stringdef) then
  1022. rangecheck_string;
  1023. end;
  1024. { insert the register and the multiplication factor in the
  1025. reference }
  1026. if not is_packed_array(left.resultdef) then
  1027. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  1028. else
  1029. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  1030. end;
  1031. location.size:=newsize;
  1032. paraloc1.done;
  1033. paraloc2.done;
  1034. end;
  1035. begin
  1036. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1037. cloadparentfpnode:=tcgloadparentfpnode;
  1038. caddrnode:=tcgaddrnode;
  1039. cderefnode:=tcgderefnode;
  1040. csubscriptnode:=tcgsubscriptnode;
  1041. cwithnode:=tcgwithnode;
  1042. cvecnode:=tcgvecnode;
  1043. end.