aoptcpu.pas 13 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses
  22. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. function GetNextInstructionUsingReg(Current: tai;
  26. var Next: tai; reg: TRegister): Boolean;
  27. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  28. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  29. function RegUsedAfterInstruction(reg: Tregister; p: tai;
  30. var AllUsedRegs: TAllUsedRegs): Boolean;
  31. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  32. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  33. End;
  34. Implementation
  35. uses
  36. globtype,globals,aasmcpu;
  37. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  38. begin
  39. result :=
  40. (instr.typ = ait_instruction) and
  41. (taicpu(instr).opcode = op);
  42. end;
  43. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  44. begin
  45. result:=(oper.typ=top_reg) and (oper.reg=reg);
  46. end;
  47. function IsSameReg(this,next: taicpu): boolean;
  48. begin
  49. result:=(next.ops=3) and
  50. (next.oper[2]^.typ=top_reg) and
  51. (next.oper[0]^.typ=top_reg) and
  52. (next.oper[2]^.reg=next.oper[0]^.reg) and
  53. (next.oper[2]^.reg=this.oper[2]^.reg);
  54. end;
  55. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  56. var
  57. p: taicpu;
  58. i: longint;
  59. begin
  60. result:=false;
  61. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  62. exit;
  63. p:=taicpu(hp);
  64. i:=0;
  65. while(i<p.ops) do
  66. begin
  67. case p.oper[I]^.typ of
  68. top_reg:
  69. result:=(p.oper[I]^.reg=reg) and (I<2);
  70. top_ref:
  71. result:=
  72. (p.oper[I]^.ref^.base=reg) or
  73. (p.oper[I]^.ref^.index=reg);
  74. end;
  75. if result then exit; {Bailout if we found something}
  76. Inc(I);
  77. end;
  78. end;
  79. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  80. var
  81. p: taicpu;
  82. begin
  83. p:=taicpu(hp);
  84. result:=false;
  85. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  86. exit;
  87. case p.opcode of
  88. { These instructions do not write into a register at all }
  89. A_NOP,
  90. A_FCMPs,A_FCMPd,A_FCMPq,A_CMP,
  91. A_BA,A_Bxx,A_FBA,A_FBxx,
  92. A_STB,A_STH,A_ST,A_STF,A_STDF:
  93. exit;
  94. end;
  95. result:=(p.ops>0) and (p.oper[p.ops-1]^.typ=top_reg) and
  96. (p.oper[p.ops-1]^.reg=reg);
  97. end;
  98. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  99. var Next: tai; reg: TRegister): Boolean;
  100. begin
  101. Next:=Current;
  102. repeat
  103. Result:=GetNextInstruction(Next,Next);
  104. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  105. (is_calljmp(taicpu(Next).opcode));
  106. if result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  107. begin
  108. result:=false;
  109. next:=nil;
  110. end;
  111. end;
  112. function TCpuAsmOptimizer.RegUsedAfterInstruction(reg: Tregister; p: tai;
  113. var AllUsedRegs: TAllUsedRegs): Boolean;
  114. begin
  115. AllUsedRegs[getregtype(reg)].Update(tai(p.Next),true);
  116. RegUsedAfterInstruction :=
  117. AllUsedRegs[getregtype(reg)].IsUsed(reg) and
  118. not(regLoadedWithNewValue(reg,p)) and
  119. (
  120. not(GetNextInstruction(p,p)) or
  121. instructionLoadsFromReg(reg,p) or
  122. not(regLoadedWithNewValue(reg,p))
  123. );
  124. end;
  125. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  126. var
  127. next,hp1: tai;
  128. alloc,dealloc: tai_regalloc;
  129. begin
  130. { Fold
  131. op ...,%reg1
  132. ...
  133. opcode %reg1,%reg2
  134. dealloc %reg1
  135. into
  136. op ...,%reg2
  137. opcode may be A_MOV, A_FMOVs, A_FMOVd, etc.
  138. }
  139. result:=false;
  140. if (taicpu(p).ops=3) and
  141. { don't mess with instructions using %g0 for destination }
  142. (taicpu(p).oper[2]^.reg<>NR_G0) and
  143. GetNextInstructionUsingReg(p,next,taicpu(p).oper[2]^.reg) and
  144. MatchInstruction(next,opcode) and
  145. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[2]^.reg) and
  146. { the destination register of mov cannot be used between p and next }
  147. (not RegUsedBetween(taicpu(next).oper[1]^.reg,p,next)) and
  148. { This is necessary so 'mov %reg1,%y' is not folded. Compiler should
  149. probably generate A_WRY opcode for this, not A_MOV. }
  150. (getregtype(taicpu(next).oper[1]^.reg)<>R_SPECIALREGISTER) then
  151. begin
  152. dealloc:=FindRegDealloc(taicpu(p).oper[2]^.reg,tai(next.Next));
  153. if assigned(dealloc) then
  154. begin
  155. { taicpu(p).oper[2]^.reg is not used anymore, try to find its allocation
  156. and remove it if possible }
  157. GetLastInstruction(p,hp1);
  158. asml.Remove(dealloc);
  159. alloc:=FindRegAlloc(taicpu(p).oper[2]^.reg,tai(hp1.Next));
  160. if assigned(alloc) then
  161. begin
  162. asml.Remove(alloc);
  163. alloc.free;
  164. dealloc.free;
  165. end
  166. else
  167. asml.InsertAfter(dealloc,p);
  168. { try to move the allocation of the target register }
  169. GetLastInstruction(next,hp1);
  170. alloc:=FindRegAlloc(taicpu(next).oper[1]^.reg,tai(hp1.Next));
  171. if assigned(alloc) then
  172. begin
  173. asml.Remove(alloc);
  174. asml.InsertBefore(alloc,p);
  175. { adjust used regs }
  176. IncludeRegInUsedRegs(taicpu(next).oper[1]^.reg,UsedRegs);
  177. end;
  178. { finally get rid of the mov }
  179. taicpu(p).loadreg(2,taicpu(next).oper[1]^.reg);
  180. asml.remove(next);
  181. next.free;
  182. end;
  183. end;
  184. end;
  185. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  186. var
  187. next,next2: tai;
  188. TmpUsedRegs: TAllUsedRegs;
  189. begin
  190. result:=false;
  191. case p.typ of
  192. ait_instruction:
  193. begin
  194. case taicpu(p).opcode of
  195. A_SLL:
  196. begin
  197. { if this is sign/zero extension... }
  198. if (taicpu(p).oper[1]^.typ=top_const) and
  199. GetNextInstruction(p,next) and
  200. (MatchInstruction(next,A_SRL) or MatchInstruction(next,A_SRA)) and
  201. IsSameReg(taicpu(p),taicpu(next)) and
  202. (taicpu(next).oper[1]^.typ=top_const) and
  203. (taicpu(next).oper[1]^.val=taicpu(p).oper[1]^.val) and
  204. (taicpu(next).oper[1]^.val=16) and
  205. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  206. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[2]^.reg) and
  207. MatchInstruction(next2,A_STH) and
  208. (taicpu(next2).oper[0]^.typ=top_reg) and
  209. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[2]^.reg) and
  210. { the initial register may not be reused }
  211. (not RegUsedBetween(taicpu(p).oper[0]^.reg,next,next2)) then
  212. begin
  213. CopyUsedRegs(TmpUsedRegs);
  214. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  215. UpdateUsedRegs(TmpUsedRegs, tai(next.next));
  216. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next2,TmpUsedRegs) then
  217. begin
  218. taicpu(next2).loadreg(0,taicpu(p).oper[0]^.reg);
  219. asml.remove(p);
  220. asml.remove(next);
  221. p.free;
  222. next.free;
  223. p:=next2;
  224. end;
  225. ReleaseUsedRegs(TmpUsedRegs);
  226. end
  227. else
  228. TryRemoveMov(p,A_MOV);
  229. end;
  230. A_SRL:
  231. begin
  232. { happens with a_load_const_ref(...,0), where %g0 is used instead of 0 }
  233. { TODO: override a_load_reg_ref_unaligned and don't generate such shifts }
  234. if (taicpu(p).oper[2]^.typ=top_reg) and
  235. (taicpu(p).oper[2]^.reg=NR_G0) then
  236. begin
  237. next:=tai(p.next);
  238. asml.remove(p);
  239. p.free;
  240. p:=next;
  241. end
  242. { kill zero extension after right shift (e.g. happens with "high(dword)")}
  243. else if (taicpu(p).oper[1]^.typ=top_const) and
  244. (taicpu(p).oper[1]^.val>=16) and
  245. GetNextInstruction(p,next) and
  246. MatchInstruction(next,A_SLL) and
  247. GetNextInstruction(next,next2) and
  248. MatchInstruction(next2,A_SRL) and
  249. IsSameReg(taicpu(p),taicpu(next)) and
  250. IsSameReg(taicpu(p),taicpu(next2)) and
  251. (taicpu(next).oper[1]^.typ=top_const) and
  252. (taicpu(next2).oper[1]^.typ=top_const) and
  253. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  254. (taicpu(next).oper[1]^.val=16) then
  255. begin
  256. asml.remove(next);
  257. asml.remove(next2);
  258. next.free;
  259. next2.free;
  260. end
  261. else
  262. TryRemoveMov(p,A_MOV);
  263. end;
  264. A_AND:
  265. begin
  266. { Remove sign extension after 'and' if bit 7 of const operand is clear }
  267. if (taicpu(p).oper[1]^.typ=top_const) and
  268. GetNextInstruction(p,next) and
  269. MatchInstruction(next,A_SLL) and
  270. GetNextInstruction(next,next2) and
  271. MatchInstruction(next2,A_SRA) and
  272. IsSameReg(taicpu(p),taicpu(next)) and
  273. IsSameReg(taicpu(p),taicpu(next2)) and
  274. (taicpu(next).oper[1]^.typ=top_const) and
  275. (taicpu(next2).oper[1]^.typ=top_const) and
  276. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  277. ({(
  278. (taicpu(p).oper[2]^.val<=$7fff) and
  279. (taicpu(next).oper[2]^.val=16)
  280. ) or }(
  281. (taicpu(p).oper[1]^.val<=$7f) and
  282. (taicpu(next).oper[1]^.val=24)
  283. )) then
  284. begin
  285. asml.remove(next);
  286. asml.remove(next2);
  287. next.free;
  288. next2.free;
  289. end
  290. else if (taicpu(p).oper[1]^.typ=top_const) and
  291. (taicpu(p).oper[1]^.val=255) and
  292. GetNextInstruction(p,next) and
  293. MatchInstruction(next,A_STB) and
  294. (taicpu(next).oper[0]^.typ=top_reg) and
  295. (taicpu(next).oper[0]^.reg=taicpu(p).oper[2]^.reg) then
  296. begin
  297. CopyUsedRegs(TmpUsedRegs);
  298. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  299. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next,TmpUsedRegs) then
  300. begin
  301. taicpu(next).loadreg(0,taicpu(p).oper[0]^.reg);
  302. asml.remove(p);
  303. p.free;
  304. p:=next;
  305. end;
  306. ReleaseUsedRegs(TmpUsedRegs);
  307. end
  308. else
  309. TryRemoveMov(p,A_MOV);
  310. end;
  311. A_ADD,A_ADDcc,A_ADDX,
  312. A_SUB,A_SUBcc,A_SUBX,
  313. A_SRA,
  314. A_ANDcc,A_OR,A_ORcc,A_XOR,A_XORcc:
  315. TryRemoveMov(p,A_MOV);
  316. A_FADDs, A_FSUBs, A_FMULs, A_FDIVs,
  317. A_FABSs, A_FNEGs, A_FSQRTs,
  318. A_FDTOs, A_FITOs, A_FQTOs:
  319. TryRemoveMov(p,A_FMOVs);
  320. A_FADDd, A_FSUBd, A_FMULd, A_FDIVd,
  321. A_FABSd, A_FNEGd, A_FSQRTd,
  322. A_FSTOd, A_FITOd, A_FQTOd:
  323. TryRemoveMov(p,A_FMOVd);
  324. end;
  325. end;
  326. end;
  327. end;
  328. begin
  329. casmoptimizer:=TCpuAsmOptimizer;
  330. end.