aoptcpu.pas 46 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. function InvertSkipInstruction(var p: tai): boolean;
  32. { uses the same constructor as TAopObj }
  33. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  34. procedure PeepHoleOptPass2;override;
  35. End;
  36. Implementation
  37. uses
  38. cutils,
  39. verbose,
  40. cpuinfo,
  41. aasmbase,aasmcpu,aasmdata,
  42. aoptutils,
  43. globals,globtype,
  44. cgutils;
  45. type
  46. TAsmOpSet = set of TAsmOp;
  47. function CanBeCond(p : tai) : boolean;
  48. begin
  49. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  50. end;
  51. function RefsEqual(const r1, r2: treference): boolean;
  52. begin
  53. refsequal :=
  54. (r1.offset = r2.offset) and
  55. (r1.base = r2.base) and
  56. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  57. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  58. (r1.relsymbol = r2.relsymbol) and
  59. (r1.addressmode = r2.addressmode) and
  60. (r1.volatility=[]) and
  61. (r2.volatility=[]);
  62. end;
  63. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  64. begin
  65. result:=oper1.typ=oper2.typ;
  66. if result then
  67. case oper1.typ of
  68. top_const:
  69. Result:=oper1.val = oper2.val;
  70. top_reg:
  71. Result:=oper1.reg = oper2.reg;
  72. top_ref:
  73. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  74. else Result:=false;
  75. end
  76. end;
  77. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  78. begin
  79. result := (oper.typ = top_reg) and (oper.reg = reg);
  80. end;
  81. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  82. begin
  83. result :=
  84. (instr.typ = ait_instruction) and
  85. (taicpu(instr).opcode = op);
  86. end;
  87. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  88. begin
  89. result :=
  90. (instr.typ = ait_instruction) and
  91. (taicpu(instr).opcode in ops);
  92. end;
  93. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  94. begin
  95. result :=
  96. (instr.typ = ait_instruction) and
  97. (taicpu(instr).opcode in ops) and
  98. (taicpu(instr).ops=opcount);
  99. end;
  100. {$ifdef DEBUG_AOPTCPU}
  101. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  102. begin
  103. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  104. end;
  105. {$else DEBUG_AOPTCPU}
  106. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  107. begin
  108. end;
  109. {$endif DEBUG_AOPTCPU}
  110. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  111. begin
  112. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  113. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  114. Result:=true
  115. else if (p1.typ = ait_instruction) and (taicpu(p1).opcode=A_MOVW) and
  116. ((TRegister(ord(taicpu(p1).oper[0]^.reg)+1)=reg) or (TRegister(ord(taicpu(p1).oper[1]^.reg)+1)=reg) or
  117. (taicpu(p1).oper[0]^.reg=reg) or (taicpu(p1).oper[1]^.reg=reg)) then
  118. Result:=true
  119. else
  120. Result:=inherited RegInInstruction(Reg, p1);
  121. end;
  122. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  123. var Next: tai; reg: TRegister): Boolean;
  124. begin
  125. Next:=Current;
  126. repeat
  127. Result:=GetNextInstruction(Next,Next);
  128. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  129. (is_calljmp(taicpu(Next).opcode));
  130. end;
  131. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  132. var
  133. p: taicpu;
  134. begin
  135. if not assigned(hp) or
  136. (hp.typ <> ait_instruction) then
  137. begin
  138. Result := false;
  139. exit;
  140. end;
  141. p := taicpu(hp);
  142. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  143. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  144. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  145. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  146. end;
  147. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  148. var
  149. p: taicpu;
  150. i: longint;
  151. begin
  152. Result := false;
  153. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  154. exit;
  155. p:=taicpu(hp);
  156. i:=0;
  157. { we do not care about the stack pointer }
  158. if p.opcode in [A_POP] then
  159. exit;
  160. { first operand only written?
  161. then skip it }
  162. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  163. i:=1;
  164. while i<p.ops do
  165. begin
  166. case p.oper[i]^.typ of
  167. top_reg:
  168. Result := (p.oper[i]^.reg = reg) or
  169. { MOVW }
  170. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  171. top_ref:
  172. Result :=
  173. (p.oper[i]^.ref^.base = reg) or
  174. (p.oper[i]^.ref^.index = reg);
  175. end;
  176. { Bailout if we found something }
  177. if Result then
  178. exit;
  179. Inc(i);
  180. end;
  181. end;
  182. {
  183. Turns
  184. sbis ?
  185. jmp .Lx
  186. op
  187. .Lx:
  188. Into
  189. sbic ?
  190. op
  191. For all types of skip instructions
  192. }
  193. function TCpuAsmOptimizer.InvertSkipInstruction(var p: tai): boolean;
  194. function GetNextInstructionWithoutLabel(p: tai; var next: tai): boolean;
  195. begin
  196. repeat
  197. result:=GetNextInstruction(p,next);
  198. p:=next;
  199. until
  200. (not result) or
  201. (not assigned(next)) or
  202. (next.typ in [ait_instruction]);
  203. result:=assigned(next) and (next.typ in [ait_instruction]);
  204. end;
  205. var
  206. hp1, hp2, hp3: tai;
  207. s: string;
  208. begin
  209. result:=false;
  210. if GetNextInstruction(taicpu(p),hp1) and
  211. (hp1.typ=ait_instruction) and
  212. (taicpu(hp1).opcode in [A_RJMP,A_JMP]) and
  213. (taicpu(hp1).ops=1) and
  214. (taicpu(hp1).oper[0]^.typ=top_ref) and
  215. (taicpu(hp1).oper[0]^.ref^.offset=0) and
  216. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  217. GetNextInstructionWithoutLabel(hp1,hp2) and
  218. (hp2.typ=ait_instruction) and
  219. (not taicpu(hp2).is_jmp) and
  220. GetNextInstruction(hp2,hp3) and
  221. FindLabel(TAsmLabel(taicpu(hp1).oper[0]^.ref^.symbol),hp3) then
  222. begin
  223. DebugMsg('SkipJump2InvertedSkip', p);
  224. case taicpu(p).opcode of
  225. A_SBIS: taicpu(p).opcode:=A_SBIC;
  226. A_SBIC: taicpu(p).opcode:=A_SBIS;
  227. A_SBRS: taicpu(p).opcode:=A_SBRC;
  228. A_SBRC: taicpu(p).opcode:=A_SBRS;
  229. end;
  230. TAsmLabel(taicpu(hp1).oper[0]^.ref^.symbol).decrefs;
  231. asml.remove(hp1);
  232. hp1.free;
  233. end;
  234. end;
  235. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  236. var
  237. hp1,hp2,hp3,hp4,hp5: tai;
  238. alloc, dealloc: tai_regalloc;
  239. i: integer;
  240. l: TAsmLabel;
  241. begin
  242. result := false;
  243. case p.typ of
  244. ait_instruction:
  245. begin
  246. {
  247. change
  248. <op> reg,x,y
  249. cp reg,r1
  250. into
  251. <op>s reg,x,y
  252. }
  253. { this optimization can applied only to the currently enabled operations because
  254. the other operations do not update all flags and FPC does not track flag usage }
  255. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  256. A_INC,A_LSL,A_LSR,
  257. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  258. GetNextInstruction(p, hp1) and
  259. ((MatchInstruction(hp1, A_CP) and
  260. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  261. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  262. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  263. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  264. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  265. A_LSL,A_LSR,
  266. A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
  267. (MatchInstruction(hp1, A_CPI) and
  268. (taicpu(p).opcode = A_ANDI) and
  269. (taicpu(p).oper[1]^.typ=top_const) and
  270. (taicpu(hp1).oper[1]^.typ=top_const) and
  271. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  272. GetNextInstruction(hp1, hp2) and
  273. { be careful here, following instructions could use other flags
  274. however after a jump fpc never depends on the value of flags }
  275. { All above instructions set Z and N according to the following
  276. Z := result = 0;
  277. N := result[31];
  278. EQ = Z=1; NE = Z=0;
  279. MI = N=1; PL = N=0; }
  280. MatchInstruction(hp2, A_BRxx) and
  281. ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
  282. { sub/sbc set all flags }
  283. (taicpu(p).opcode in [A_SUB,A_SBI])){ and
  284. no flag allocation tracking implemented yet on avr
  285. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  286. begin
  287. { move flag allocation if possible }
  288. { no flag allocation tracking implemented yet on avr
  289. GetLastInstruction(hp1, hp2);
  290. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  291. if assigned(hp2) then
  292. begin
  293. asml.Remove(hp2);
  294. asml.insertbefore(hp2, p);
  295. end;
  296. }
  297. // If we compare to the same value we are masking then invert the comparison
  298. if (taicpu(hp1).opcode=A_CPI) or
  299. { sub/sbc with reverted? }
  300. ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
  301. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  302. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  303. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  304. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  305. DebugMsg('Peephole OpCp2Op performed', p);
  306. asml.remove(hp1);
  307. hp1.free;
  308. Result:=true;
  309. end
  310. else
  311. case taicpu(p).opcode of
  312. A_LDI:
  313. begin
  314. { turn
  315. ldi reg0, imm
  316. cp/mov reg1, reg0
  317. dealloc reg0
  318. into
  319. cpi/ldi reg1, imm
  320. }
  321. if MatchOpType(taicpu(p),top_reg,top_const) and
  322. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  323. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  324. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  325. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  326. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  327. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  328. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  329. begin
  330. TransferUsedRegs(TmpUsedRegs);
  331. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  332. begin
  333. case taicpu(hp1).opcode of
  334. A_CP:
  335. taicpu(hp1).opcode:=A_CPI;
  336. A_MOV:
  337. taicpu(hp1).opcode:=A_LDI;
  338. else
  339. internalerror(2016111901);
  340. end;
  341. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  342. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  343. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  344. if assigned(alloc) and assigned(dealloc) then
  345. begin
  346. asml.Remove(alloc);
  347. alloc.Free;
  348. asml.Remove(dealloc);
  349. dealloc.Free;
  350. end;
  351. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  352. RemoveCurrentP(p);
  353. end;
  354. end;
  355. end;
  356. A_STS:
  357. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  358. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  359. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  360. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  361. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  362. (taicpu(p).oper[0]^.ref^.offset>=32) and
  363. (taicpu(p).oper[0]^.ref^.offset<=95) then
  364. begin
  365. DebugMsg('Peephole Sts2Out performed', p);
  366. taicpu(p).opcode:=A_OUT;
  367. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  368. end;
  369. A_LDS:
  370. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  371. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  372. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  373. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  374. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  375. (taicpu(p).oper[1]^.ref^.offset>=32) and
  376. (taicpu(p).oper[1]^.ref^.offset<=95) then
  377. begin
  378. DebugMsg('Peephole Lds2In performed', p);
  379. taicpu(p).opcode:=A_IN;
  380. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  381. end;
  382. A_IN:
  383. if GetNextInstruction(p,hp1) then
  384. begin
  385. {
  386. in rX,Y
  387. ori rX,n
  388. out Y,rX
  389. into
  390. sbi rX,lg(n)
  391. }
  392. if (taicpu(p).oper[1]^.val<=31) and
  393. MatchInstruction(hp1,A_ORI) and
  394. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  395. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  396. GetNextInstruction(hp1,hp2) and
  397. MatchInstruction(hp2,A_OUT) and
  398. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  399. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  400. begin
  401. DebugMsg('Peephole InOriOut2Sbi performed', p);
  402. taicpu(p).opcode:=A_SBI;
  403. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  404. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  405. asml.Remove(hp1);
  406. hp1.Free;
  407. asml.Remove(hp2);
  408. hp2.Free;
  409. result:=true;
  410. end
  411. {
  412. in rX,Y
  413. andi rX,not(n)
  414. out Y,rX
  415. into
  416. cbi rX,lg(n)
  417. }
  418. else if (taicpu(p).oper[1]^.val<=31) and
  419. MatchInstruction(hp1,A_ANDI) and
  420. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  421. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  422. GetNextInstruction(hp1,hp2) and
  423. MatchInstruction(hp2,A_OUT) and
  424. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  425. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  426. begin
  427. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  428. taicpu(p).opcode:=A_CBI;
  429. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  430. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  431. asml.Remove(hp1);
  432. hp1.Free;
  433. asml.Remove(hp2);
  434. hp2.Free;
  435. result:=true;
  436. end
  437. {
  438. in rX,Y
  439. andi rX,n
  440. breq/brne L1
  441. into
  442. sbis/sbic Y,lg(n)
  443. jmp L1
  444. .Ltemp:
  445. }
  446. else if (taicpu(p).oper[1]^.val<=31) and
  447. MatchInstruction(hp1,A_ANDI) and
  448. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  449. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  450. GetNextInstruction(hp1,hp2) and
  451. MatchInstruction(hp2,A_BRxx) and
  452. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  453. begin
  454. if taicpu(hp2).condition=C_EQ then
  455. taicpu(p).opcode:=A_SBIS
  456. else
  457. taicpu(p).opcode:=A_SBIC;
  458. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  459. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  460. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  461. asml.Remove(hp1);
  462. hp1.Free;
  463. taicpu(hp2).condition:=C_None;
  464. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  465. taicpu(hp2).opcode:=A_JMP
  466. else
  467. taicpu(hp2).opcode:=A_RJMP;
  468. current_asmdata.getjumplabel(l);
  469. l.increfs;
  470. asml.InsertAfter(tai_label.create(l), hp2);
  471. result:=true;
  472. end;
  473. end;
  474. A_SBRS,
  475. A_SBRC:
  476. begin
  477. {
  478. Turn
  479. in rx, y
  480. sbr* rx, z
  481. Into
  482. sbi* y, z
  483. }
  484. if (taicpu(p).ops=2) and
  485. (taicpu(p).oper[0]^.typ=top_reg) and
  486. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  487. GetLastInstruction(p,hp1) and
  488. (hp1.typ=ait_instruction) and
  489. (taicpu(hp1).opcode=A_IN) and
  490. (taicpu(hp1).ops=2) and
  491. (taicpu(hp1).oper[1]^.typ=top_const) and
  492. (taicpu(hp1).oper[1]^.val in [0..31]) and
  493. MatchOperand(taicpu(hp1).oper[0]^,taicpu(p).oper[0]^.reg) and
  494. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, hp1, p)) then
  495. begin
  496. if taicpu(p).opcode=A_SBRS then
  497. taicpu(p).opcode:=A_SBIS
  498. else
  499. taicpu(p).opcode:=A_SBIC;
  500. taicpu(p).loadconst(0, taicpu(hp1).oper[1]^.val);
  501. DebugMsg('Peephole InSbrx2Sbix performed', p);
  502. asml.Remove(hp1);
  503. hp1.free;
  504. result:=true;
  505. end;
  506. if InvertSkipInstruction(p) then
  507. result:=true;
  508. end;
  509. A_ANDI:
  510. begin
  511. {
  512. Turn
  513. andi rx, #pow2
  514. brne l
  515. <op>
  516. l:
  517. Into
  518. sbrs rx, #(1 shl imm)
  519. <op>
  520. l:
  521. }
  522. if (taicpu(p).ops=2) and
  523. (taicpu(p).oper[1]^.typ=top_const) and
  524. ispowerof2(taicpu(p).oper[1]^.val,i) and
  525. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  526. GetNextInstruction(p,hp1) and
  527. (hp1.typ=ait_instruction) and
  528. (taicpu(hp1).opcode=A_BRxx) and
  529. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  530. (taicpu(hp1).ops>0) and
  531. (taicpu(hp1).oper[0]^.typ = top_ref) and
  532. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  533. GetNextInstruction(hp1,hp2) and
  534. (hp2.typ=ait_instruction) and
  535. GetNextInstruction(hp2,hp3) and
  536. (hp3.typ=ait_label) and
  537. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  538. begin
  539. DebugMsg('Peephole AndiBr2Sbr performed', p);
  540. taicpu(p).oper[1]^.val:=i;
  541. if taicpu(hp1).condition=C_NE then
  542. taicpu(p).opcode:=A_SBRS
  543. else
  544. taicpu(p).opcode:=A_SBRC;
  545. asml.Remove(hp1);
  546. hp1.free;
  547. result:=true;
  548. end
  549. {
  550. Remove
  551. andi rx, #y
  552. dealloc rx
  553. }
  554. else if (taicpu(p).ops=2) and
  555. (taicpu(p).oper[0]^.typ=top_reg) and
  556. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  557. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  558. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  559. begin
  560. DebugMsg('Redundant Andi removed', p);
  561. result:=RemoveCurrentP(p);
  562. end;
  563. end;
  564. A_ADD:
  565. begin
  566. if (taicpu(p).oper[1]^.reg=NR_R1) and
  567. GetNextInstruction(p, hp1) and
  568. MatchInstruction(hp1,A_ADC) then
  569. begin
  570. DebugMsg('Peephole AddAdc2Add performed', p);
  571. result:=RemoveCurrentP(p);
  572. end;
  573. end;
  574. A_SUB:
  575. begin
  576. if (taicpu(p).oper[1]^.reg=NR_R1) and
  577. GetNextInstruction(p, hp1) and
  578. MatchInstruction(hp1,A_SBC) then
  579. begin
  580. DebugMsg('Peephole SubSbc2Sub performed', p);
  581. taicpu(hp1).opcode:=A_SUB;
  582. result:=RemoveCurrentP(p);
  583. end;
  584. end;
  585. A_CLR:
  586. begin
  587. { turn the common
  588. clr rX
  589. mov/ld rX, rY
  590. into
  591. mov/ld rX, rY
  592. }
  593. if (taicpu(p).ops=1) and
  594. (taicpu(p).oper[0]^.typ=top_reg) and
  595. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  596. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  597. (hp1.typ=ait_instruction) and
  598. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  599. (taicpu(hp1).ops>0) and
  600. (taicpu(hp1).oper[0]^.typ=top_reg) and
  601. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  602. begin
  603. DebugMsg('Peephole ClrMov2Mov performed', p);
  604. result:=RemoveCurrentP(p);
  605. end
  606. { turn
  607. clr rX
  608. ...
  609. adc rY, rX
  610. into
  611. ...
  612. adc rY, r1
  613. }
  614. else if (taicpu(p).ops=1) and
  615. (taicpu(p).oper[0]^.typ=top_reg) and
  616. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  617. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  618. (hp1.typ=ait_instruction) and
  619. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  620. (taicpu(hp1).ops=2) and
  621. (taicpu(hp1).oper[1]^.typ=top_reg) and
  622. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  623. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  624. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  625. begin
  626. DebugMsg('Peephole ClrAdc2Adc performed', p);
  627. taicpu(hp1).oper[1]^.reg:=NR_R1;
  628. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  629. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  630. if assigned(alloc) and assigned(dealloc) then
  631. begin
  632. asml.Remove(alloc);
  633. alloc.Free;
  634. asml.Remove(dealloc);
  635. dealloc.Free;
  636. end;
  637. result:=RemoveCurrentP(p);
  638. end;
  639. end;
  640. A_PUSH:
  641. begin
  642. { turn
  643. push reg0
  644. push reg1
  645. pop reg3
  646. pop reg2
  647. into
  648. movw reg2,reg0
  649. or
  650. mov reg3,reg1
  651. mov reg2,reg0
  652. }
  653. if GetNextInstruction(p,hp1) and
  654. MatchInstruction(hp1,A_PUSH) and
  655. GetNextInstruction(hp1,hp2) and
  656. MatchInstruction(hp2,A_POP) and
  657. GetNextInstruction(hp2,hp3) and
  658. MatchInstruction(hp3,A_POP) then
  659. begin
  660. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  661. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  662. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  663. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  664. begin
  665. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  666. taicpu(hp3).ops:=2;
  667. taicpu(hp3).opcode:=A_MOVW;
  668. taicpu(hp3).loadreg(1, taicpu(p).oper[0]^.reg);
  669. RemoveCurrentP(p);
  670. RemoveCurrentP(p);
  671. result:=RemoveCurrentP(p);
  672. end
  673. else
  674. begin
  675. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  676. taicpu(p).ops:=2;
  677. taicpu(p).opcode:=A_MOV;
  678. taicpu(hp1).ops:=2;
  679. taicpu(hp1).opcode:=A_MOV;
  680. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  681. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  682. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  683. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  684. { life range of reg2 and reg3 is increased, fix register allocation entries }
  685. TransferUsedRegs(TmpUsedRegs);
  686. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  687. AllocRegBetween(taicpu(hp2).oper[0]^.reg,hp1,hp2,TmpUsedRegs);
  688. TransferUsedRegs(TmpUsedRegs);
  689. AllocRegBetween(taicpu(hp3).oper[0]^.reg,p,hp3,TmpUsedRegs);
  690. IncludeRegInUsedRegs(taicpu(hp3).oper[0]^.reg,UsedRegs);
  691. UpdateUsedRegs(tai(p.Next));
  692. asml.Remove(hp2);
  693. hp2.Free;
  694. asml.Remove(hp3);
  695. hp3.Free;
  696. result:=true;
  697. end
  698. end;
  699. end;
  700. A_CALL:
  701. if (cs_opt_level4 in current_settings.optimizerswitches) and
  702. GetNextInstruction(p,hp1) and
  703. MatchInstruction(hp1,A_RET) then
  704. begin
  705. DebugMsg('Peephole CallReg2Jmp performed', p);
  706. taicpu(p).opcode:=A_JMP;
  707. asml.Remove(hp1);
  708. hp1.Free;
  709. result:=true;
  710. end;
  711. A_RCALL:
  712. if (cs_opt_level4 in current_settings.optimizerswitches) and
  713. GetNextInstruction(p,hp1) and
  714. MatchInstruction(hp1,A_RET) then
  715. begin
  716. DebugMsg('Peephole RCallReg2RJmp performed', p);
  717. taicpu(p).opcode:=A_RJMP;
  718. asml.Remove(hp1);
  719. hp1.Free;
  720. result:=true;
  721. end;
  722. A_MOV:
  723. begin
  724. { change
  725. mov reg0, reg1
  726. dealloc reg0
  727. into
  728. dealloc reg0
  729. }
  730. if MatchOpType(taicpu(p),top_reg,top_reg) then
  731. begin
  732. TransferUsedRegs(TmpUsedRegs);
  733. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  734. if not(RegInUsedRegs(taicpu(p).oper[0]^.reg,TmpUsedRegs)) and
  735. { reg. allocation information before calls is not perfect, so don't do this before
  736. calls/icalls }
  737. GetNextInstruction(p,hp1) and
  738. not(MatchInstruction(hp1,[A_CALL,A_RCALL])) then
  739. begin
  740. DebugMsg('Peephole Mov2Nop performed', p);
  741. result:=RemoveCurrentP(p);
  742. exit;
  743. end;
  744. end;
  745. { turn
  746. mov reg0, reg1
  747. <op> reg2,reg0
  748. dealloc reg0
  749. into
  750. <op> reg2,reg1
  751. }
  752. if MatchOpType(taicpu(p),top_reg,top_reg) and
  753. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  754. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  755. (MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  756. A_OUT,A_IN]) or
  757. { the reference register of ST/STD cannot be replaced }
  758. (MatchInstruction(hp1,[A_STD,A_ST,A_STS]) and (MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)))) and
  759. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  760. {(taicpu(hp1).ops=1) and
  761. (taicpu(hp1).oper[0]^.typ = top_reg) and
  762. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  763. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  764. begin
  765. DebugMsg('Peephole MovOp2Op performed', p);
  766. for i := 0 to taicpu(hp1).ops-1 do
  767. if taicpu(hp1).oper[i]^.typ=top_reg then
  768. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  769. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  770. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  771. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  772. if assigned(alloc) and assigned(dealloc) then
  773. begin
  774. asml.Remove(alloc);
  775. alloc.Free;
  776. asml.Remove(dealloc);
  777. dealloc.Free;
  778. end;
  779. { life range of reg1 is increased }
  780. AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,usedregs);
  781. { p will be removed, update used register as we continue
  782. with the next instruction after p }
  783. result:=RemoveCurrentP(p);
  784. end
  785. { remove
  786. mov reg0,reg0
  787. }
  788. else if (taicpu(p).ops=2) and
  789. (taicpu(p).oper[0]^.typ = top_reg) and
  790. (taicpu(p).oper[1]^.typ = top_reg) and
  791. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  792. begin
  793. DebugMsg('Peephole RedundantMov performed', p);
  794. result:=RemoveCurrentP(p);
  795. end
  796. {
  797. Turn
  798. mov rx,ry
  799. op rx,rz
  800. mov ry, rx
  801. Into
  802. op ry,rz
  803. }
  804. else if (taicpu(p).ops=2) and
  805. MatchOpType(taicpu(p),top_reg,top_reg) and
  806. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  807. (hp1.typ=ait_instruction) and
  808. (taicpu(hp1).ops >= 1) and
  809. (taicpu(hp1).oper[0]^.typ = top_reg) and
  810. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  811. MatchInstruction(hp2,A_MOV) and
  812. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  813. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  814. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  815. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  816. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  817. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  818. A_INC,A_DEC,
  819. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  820. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  821. begin
  822. DebugMsg('Peephole MovOpMov2Op performed', p);
  823. if (taicpu(hp1).ops=2) and
  824. (taicpu(hp1).oper[1]^.typ=top_reg) and
  825. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  826. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  827. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  828. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  829. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  830. if assigned(alloc) and assigned(dealloc) then
  831. begin
  832. asml.Remove(alloc);
  833. alloc.Free;
  834. asml.Remove(dealloc);
  835. dealloc.Free;
  836. end;
  837. asml.remove(hp2);
  838. hp2.free;
  839. result:=RemoveCurrentP(p);
  840. end
  841. {
  842. Turn
  843. mov rx,ry
  844. op rx,rw
  845. mov rw,rx
  846. Into
  847. op rw,ry
  848. }
  849. else if (taicpu(p).ops=2) and
  850. MatchOpType(taicpu(p),top_reg,top_reg) and
  851. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  852. (hp1.typ=ait_instruction) and
  853. (taicpu(hp1).ops = 2) and
  854. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  855. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  856. (hp2.typ=ait_instruction) and
  857. (taicpu(hp2).opcode=A_MOV) and
  858. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  859. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  860. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  861. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  862. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  863. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  864. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  865. begin
  866. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  867. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  868. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  869. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  870. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  871. if assigned(alloc) and assigned(dealloc) then
  872. begin
  873. asml.Remove(alloc);
  874. alloc.Free;
  875. asml.Remove(dealloc);
  876. dealloc.Free;
  877. end;
  878. result:=RemoveCurrentP(p);
  879. asml.remove(hp2);
  880. hp2.free;
  881. end
  882. { fold
  883. mov reg2,reg0
  884. mov reg3,reg1
  885. to
  886. movw reg2,reg0
  887. }
  888. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  889. (taicpu(p).ops=2) and
  890. (taicpu(p).oper[0]^.typ = top_reg) and
  891. (taicpu(p).oper[1]^.typ = top_reg) and
  892. getnextinstruction(p,hp1) and
  893. (hp1.typ = ait_instruction) and
  894. (taicpu(hp1).opcode = A_MOV) and
  895. (taicpu(hp1).ops=2) and
  896. (taicpu(hp1).oper[0]^.typ = top_reg) and
  897. (taicpu(hp1).oper[1]^.typ = top_reg) and
  898. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  899. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  900. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  901. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  902. begin
  903. DebugMsg('Peephole MovMov2Movw performed', p);
  904. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  905. if assigned(alloc) then
  906. begin
  907. asml.Remove(alloc);
  908. asml.InsertBefore(alloc,p);
  909. { proper book keeping of currently used registers }
  910. IncludeRegInUsedRegs(taicpu(hp1).oper[0]^.reg,UsedRegs);
  911. end;
  912. taicpu(p).opcode:=A_MOVW;
  913. asml.remove(hp1);
  914. hp1.free;
  915. result:=true;
  916. end
  917. {
  918. This removes the first mov from
  919. mov rX,...
  920. mov rX,...
  921. }
  922. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  923. while MatchInstruction(hp1,A_MOV) and
  924. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  925. { don't remove the first mov if the second is a mov rX,rX }
  926. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  927. begin
  928. DebugMsg('Peephole MovMov2Mov performed', p);
  929. result:=RemoveCurrentP(p);
  930. GetNextInstruction(hp1,hp1);
  931. if not assigned(hp1) then
  932. break;
  933. end;
  934. end;
  935. A_SBIC,
  936. A_SBIS:
  937. begin
  938. {
  939. Turn
  940. sbic/sbis X, y
  941. jmp .L1
  942. op
  943. .L1:
  944. into
  945. sbis/sbic X,y
  946. op
  947. .L1:
  948. }
  949. if InvertSkipInstruction(p) then
  950. result:=true
  951. {
  952. Turn
  953. sbiX X, y
  954. jmp .L1
  955. jmp .L2
  956. .L1:
  957. op
  958. .L2:
  959. into
  960. sbiX X,y
  961. .L1:
  962. op
  963. .L2:
  964. }
  965. else if GetNextInstruction(p, hp1) and
  966. (hp1.typ=ait_instruction) and
  967. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  968. (taicpu(hp1).ops>0) and
  969. (taicpu(hp1).oper[0]^.typ = top_ref) and
  970. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  971. GetNextInstruction(hp1, hp2) and
  972. (hp2.typ=ait_instruction) and
  973. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  974. (taicpu(hp2).ops>0) and
  975. (taicpu(hp2).oper[0]^.typ = top_ref) and
  976. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  977. GetNextInstruction(hp2, hp3) and
  978. (hp3.typ=ait_label) and
  979. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  980. GetNextInstruction(hp3, hp4) and
  981. (hp4.typ=ait_instruction) and
  982. GetNextInstruction(hp4, hp5) and
  983. (hp3.typ=ait_label) and
  984. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  985. begin
  986. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  987. tai_label(hp3).labsym.decrefs;
  988. tai_label(hp5).labsym.decrefs;
  989. AsmL.remove(hp1);
  990. taicpu(hp1).Free;
  991. AsmL.remove(hp2);
  992. taicpu(hp2).Free;
  993. result:=true;
  994. end;
  995. end;
  996. end;
  997. end;
  998. end;
  999. end;
  1000. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  1001. begin
  1002. end;
  1003. begin
  1004. casmoptimizer:=TCpuAsmOptimizer;
  1005. End.