aoptcpu.pas 16 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses
  23. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai;
  24. Type
  25. TCpuAsmOptimizer = class(TAsmOptimizer)
  26. function GetNextInstructionUsingReg(Current: tai;
  27. var Next: tai; reg: TRegister): Boolean;
  28. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  29. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  30. function RegUsedAfterInstruction(reg: Tregister; p: tai;
  31. var AllUsedRegs: TAllUsedRegs): Boolean;
  32. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  33. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  34. procedure DebugMsg(const s : string;p : tai);
  35. End;
  36. Implementation
  37. uses
  38. globtype,globals,aasmcpu;
  39. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  40. begin
  41. result :=
  42. (instr.typ = ait_instruction) and
  43. (taicpu(instr).opcode = op);
  44. end;
  45. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  46. begin
  47. result:=(oper.typ=top_reg) and (oper.reg=reg);
  48. end;
  49. function IsSameReg(this,next: taicpu): boolean;
  50. begin
  51. result:=(next.ops=3) and
  52. (next.oper[2]^.typ=top_reg) and
  53. (next.oper[0]^.typ=top_reg) and
  54. (next.oper[2]^.reg=next.oper[0]^.reg) and
  55. (next.oper[2]^.reg=this.oper[2]^.reg);
  56. end;
  57. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  58. var
  59. p: taicpu;
  60. i: longint;
  61. begin
  62. result:=false;
  63. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  64. exit;
  65. p:=taicpu(hp);
  66. i:=0;
  67. while(i<p.ops) do
  68. begin
  69. case p.oper[I]^.typ of
  70. top_reg:
  71. result:=(p.oper[I]^.reg=reg) and (I<2);
  72. top_ref:
  73. result:=
  74. (p.oper[I]^.ref^.base=reg) or
  75. (p.oper[I]^.ref^.index=reg);
  76. else
  77. ;
  78. end;
  79. if result then exit; {Bailout if we found something}
  80. Inc(I);
  81. end;
  82. end;
  83. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  84. var
  85. p: taicpu;
  86. begin
  87. p:=taicpu(hp);
  88. result:=false;
  89. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  90. exit;
  91. case p.opcode of
  92. { These instructions do not write into a register at all }
  93. A_NOP,
  94. A_FCMPs,A_FCMPd,A_FCMPq,A_CMP,
  95. A_BA,A_Bxx,A_FBA,A_FBxx,
  96. A_STB,A_STH,A_ST,A_STF,A_STDF,
  97. A_STX:
  98. exit;
  99. else
  100. ;
  101. end;
  102. result:=(p.ops>0) and (p.oper[p.ops-1]^.typ=top_reg) and
  103. (p.oper[p.ops-1]^.reg=reg);
  104. end;
  105. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  106. var Next: tai; reg: TRegister): Boolean;
  107. begin
  108. Next:=Current;
  109. repeat
  110. Result:=GetNextInstruction(Next,Next);
  111. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  112. (is_calljmp(taicpu(Next).opcode));
  113. if result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  114. begin
  115. result:=false;
  116. next:=nil;
  117. end;
  118. end;
  119. function TCpuAsmOptimizer.RegUsedAfterInstruction(reg: Tregister; p: tai;
  120. var AllUsedRegs: TAllUsedRegs): Boolean;
  121. begin
  122. AllUsedRegs[getregtype(reg)].Update(tai(p.Next),true);
  123. RegUsedAfterInstruction :=
  124. AllUsedRegs[getregtype(reg)].IsUsed(reg) and
  125. not(regLoadedWithNewValue(reg,p)) and
  126. (
  127. not(GetNextInstruction(p,p)) or
  128. instructionLoadsFromReg(reg,p) or
  129. not(regLoadedWithNewValue(reg,p))
  130. );
  131. end;
  132. {$ifdef DEBUG_AOPTCPU}
  133. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  134. begin
  135. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  136. end;
  137. {$else DEBUG_AOPTCPU}
  138. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  139. begin
  140. end;
  141. {$endif DEBUG_AOPTCPU}
  142. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  143. var
  144. next,hp1: tai;
  145. alloc,dealloc: tai_regalloc;
  146. begin
  147. { Fold
  148. op ...,%reg1
  149. ...
  150. opcode %reg1,%reg2
  151. dealloc %reg1
  152. into
  153. op ...,%reg2
  154. opcode may be A_MOV, A_FMOVs, A_FMOVd, etc.
  155. }
  156. result:=false;
  157. if (taicpu(p).ops=3) and
  158. { don't mess with instructions using %g0 for destination }
  159. (taicpu(p).oper[2]^.reg<>NR_G0) and
  160. GetNextInstructionUsingReg(p,next,taicpu(p).oper[2]^.reg) and
  161. MatchInstruction(next,opcode) and
  162. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[2]^.reg) and
  163. { the destination register of mov cannot be used between p and next }
  164. (not RegUsedBetween(taicpu(next).oper[1]^.reg,p,next)) and
  165. { This is necessary so 'mov %reg1,%y' is not folded. Compiler should
  166. probably generate A_WRY opcode for this, not A_MOV. }
  167. (getregtype(taicpu(next).oper[1]^.reg)<>R_SPECIALREGISTER) then
  168. begin
  169. dealloc:=FindRegDealloc(taicpu(p).oper[2]^.reg,tai(next.Next));
  170. if assigned(dealloc) then
  171. begin
  172. { taicpu(p).oper[2]^.reg is not used anymore, try to find its allocation
  173. and remove it if possible }
  174. GetLastInstruction(p,hp1);
  175. asml.Remove(dealloc);
  176. alloc:=FindRegAlloc(taicpu(p).oper[2]^.reg,tai(hp1.Next));
  177. if assigned(alloc) then
  178. begin
  179. asml.Remove(alloc);
  180. alloc.free;
  181. dealloc.free;
  182. end
  183. else
  184. asml.InsertAfter(dealloc,p);
  185. { try to move the allocation of the target register }
  186. GetLastInstruction(next,hp1);
  187. alloc:=FindRegAlloc(taicpu(next).oper[1]^.reg,tai(hp1.Next));
  188. if assigned(alloc) then
  189. begin
  190. asml.Remove(alloc);
  191. asml.InsertBefore(alloc,p);
  192. { adjust used regs }
  193. IncludeRegInUsedRegs(taicpu(next).oper[1]^.reg,UsedRegs);
  194. end;
  195. { finally get rid of the mov }
  196. taicpu(p).loadreg(2,taicpu(next).oper[1]^.reg);
  197. DebugMsg('Peephole OpMov2Op done',p);
  198. asml.remove(next);
  199. next.free;
  200. end;
  201. end;
  202. end;
  203. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  204. var
  205. next,next2: tai;
  206. begin
  207. result:=false;
  208. case p.typ of
  209. ait_instruction:
  210. begin
  211. case taicpu(p).opcode of
  212. A_SLL:
  213. begin
  214. { if this is sign/zero extension... }
  215. if (taicpu(p).oper[1]^.typ=top_const) and
  216. GetNextInstruction(p,next) and
  217. (MatchInstruction(next,A_SRL) or MatchInstruction(next,A_SRA)) and
  218. IsSameReg(taicpu(p),taicpu(next)) and
  219. (taicpu(next).oper[1]^.typ=top_const) and
  220. (taicpu(next).oper[1]^.val=taicpu(p).oper[1]^.val) and
  221. (taicpu(next).oper[1]^.val=16) and
  222. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  223. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[2]^.reg) and
  224. MatchInstruction(next2,A_STH) and
  225. (taicpu(next2).oper[0]^.typ=top_reg) and
  226. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[2]^.reg) and
  227. { the initial register may not be reused }
  228. (not RegUsedBetween(taicpu(p).oper[0]^.reg,next,next2)) then
  229. begin
  230. TransferUsedRegs(TmpUsedRegs);
  231. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  232. UpdateUsedRegs(TmpUsedRegs, tai(next.next));
  233. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next2,TmpUsedRegs) then
  234. begin
  235. taicpu(next2).loadreg(0,taicpu(p).oper[0]^.reg);
  236. DebugMsg('Peephole SLLSRxSTH2STH done',next2);
  237. asml.remove(p);
  238. asml.remove(next);
  239. p.free;
  240. next.free;
  241. p:=next2;
  242. end;
  243. end
  244. else
  245. TryRemoveMov(p,A_MOV);
  246. end;
  247. {$ifdef SPARC64}
  248. A_SLLX:
  249. begin
  250. { if this is sign/zero extension... }
  251. if (taicpu(p).oper[1]^.typ=top_const) and
  252. GetNextInstruction(p,next) and
  253. (MatchInstruction(next,A_SRLX) or MatchInstruction(next,A_SRAX)) and
  254. IsSameReg(taicpu(p),taicpu(next)) and
  255. (taicpu(next).oper[1]^.typ=top_const) and
  256. (taicpu(next).oper[1]^.val=taicpu(p).oper[1]^.val) and
  257. (taicpu(next).oper[1]^.val=32) and
  258. { ...followed by 32-bit store (possibly with PIC simplification, etc. in between) }
  259. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[2]^.reg) and
  260. MatchInstruction(next2,A_ST) and
  261. (taicpu(next2).oper[0]^.typ=top_reg) and
  262. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[2]^.reg) and
  263. { the initial register may not be reused }
  264. (not RegUsedBetween(taicpu(p).oper[0]^.reg,next,next2)) then
  265. begin
  266. TransferUsedRegs(TmpUsedRegs);
  267. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  268. UpdateUsedRegs(TmpUsedRegs, tai(next.next));
  269. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next2,TmpUsedRegs) then
  270. begin
  271. taicpu(next2).loadreg(0,taicpu(p).oper[0]^.reg);
  272. DebugMsg('Peephole SLLXSRxXST2ST done',next2);
  273. asml.remove(p);
  274. asml.remove(next);
  275. p.free;
  276. next.free;
  277. p:=next2;
  278. end;
  279. end
  280. else
  281. TryRemoveMov(p,A_MOV);
  282. end;
  283. {$endif SPARC64}
  284. A_SRL:
  285. begin
  286. { happens with a_load_const_ref(...,0), where %g0 is used instead of 0 }
  287. { TODO: override a_load_reg_ref_unaligned and don't generate such shifts }
  288. if (taicpu(p).oper[2]^.typ=top_reg) and
  289. (taicpu(p).oper[2]^.reg=NR_G0) then
  290. begin
  291. next:=tai(p.next);
  292. asml.remove(p);
  293. p.free;
  294. p:=next;
  295. end
  296. { kill zero extension after right shift (e.g. happens with "high(dword)")}
  297. else if (taicpu(p).oper[1]^.typ=top_const) and
  298. (taicpu(p).oper[1]^.val>=16) and
  299. GetNextInstruction(p,next) and
  300. MatchInstruction(next,A_SLL) and
  301. GetNextInstruction(next,next2) and
  302. MatchInstruction(next2,A_SRL) and
  303. IsSameReg(taicpu(p),taicpu(next)) and
  304. IsSameReg(taicpu(p),taicpu(next2)) and
  305. (taicpu(next).oper[1]^.typ=top_const) and
  306. (taicpu(next2).oper[1]^.typ=top_const) and
  307. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  308. (taicpu(next).oper[1]^.val=16) then
  309. begin
  310. asml.remove(next);
  311. asml.remove(next2);
  312. next.free;
  313. next2.free;
  314. end
  315. else
  316. TryRemoveMov(p,A_MOV);
  317. end;
  318. A_AND:
  319. begin
  320. { Remove sign extension after 'and' if bit 7 of const operand is clear }
  321. if (taicpu(p).oper[1]^.typ=top_const) and
  322. GetNextInstruction(p,next) and
  323. MatchInstruction(next,A_SLL) and
  324. GetNextInstruction(next,next2) and
  325. MatchInstruction(next2,A_SRA) and
  326. IsSameReg(taicpu(p),taicpu(next)) and
  327. IsSameReg(taicpu(p),taicpu(next2)) and
  328. (taicpu(next).oper[1]^.typ=top_const) and
  329. (taicpu(next2).oper[1]^.typ=top_const) and
  330. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  331. ({(
  332. (taicpu(p).oper[2]^.val<=$7fff) and
  333. (taicpu(next).oper[2]^.val=16)
  334. ) or }(
  335. (taicpu(p).oper[1]^.val<=$7f) and
  336. (taicpu(next).oper[1]^.val=24)
  337. )) then
  338. begin
  339. asml.remove(next);
  340. asml.remove(next2);
  341. next.free;
  342. next2.free;
  343. end
  344. else if (taicpu(p).oper[1]^.typ=top_const) and
  345. (taicpu(p).oper[1]^.val=255) and
  346. GetNextInstruction(p,next) and
  347. MatchInstruction(next,A_STB) and
  348. (taicpu(next).oper[0]^.typ=top_reg) and
  349. (taicpu(next).oper[0]^.reg=taicpu(p).oper[2]^.reg) then
  350. begin
  351. TransferUsedRegs(TmpUsedRegs);
  352. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  353. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next,TmpUsedRegs) then
  354. begin
  355. taicpu(next).loadreg(0,taicpu(p).oper[0]^.reg);
  356. asml.remove(p);
  357. p.free;
  358. p:=next;
  359. end;
  360. end
  361. else
  362. TryRemoveMov(p,A_MOV);
  363. end;
  364. A_ADD,A_ADDcc,A_ADDX,
  365. A_SUB,A_SUBcc,A_SUBX,
  366. A_SRA,A_SRAX,A_MULX,
  367. A_ANDcc,A_OR,A_ORcc,A_XOR,A_XORcc:
  368. TryRemoveMov(p,A_MOV);
  369. A_FADDs, A_FSUBs, A_FMULs, A_FDIVs,
  370. A_FABSs, A_FNEGs, A_FSQRTs,
  371. A_FDTOs, A_FITOs, A_FQTOs:
  372. TryRemoveMov(p,A_FMOVs);
  373. A_FADDd, A_FSUBd, A_FMULd, A_FDIVd,
  374. A_FABSd, A_FNEGd, A_FSQRTd,
  375. A_FSTOd, A_FITOd, A_FQTOd:
  376. TryRemoveMov(p,A_FMOVd);
  377. else
  378. ;
  379. end;
  380. end;
  381. else
  382. ;
  383. end;
  384. end;
  385. begin
  386. casmoptimizer:=TCpuAsmOptimizer;
  387. end.