daopt386.pas 94 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO);
  48. {********************************* Types *********************************}
  49. type
  50. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  51. TRegSet = Set of RS_EAX..RS_ESP;
  52. toptreginfo = Record
  53. NewRegsEncountered, OldRegsEncountered: TRegSet;
  54. RegsLoadedForRef: TRegSet;
  55. lastReload: array[RS_EAX..RS_ESP] of tai;
  56. New2OldReg: TRegArray;
  57. end;
  58. {possible actions on an operand: read, write or modify (= read & write)}
  59. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  60. {the possible states of a flag}
  61. TFlagContents = (F_Unknown, F_notSet, F_Set);
  62. TContent = Packed Record
  63. {start and end of block instructions that defines the
  64. content of this register.}
  65. StartMod: tai;
  66. MemWrite: taicpu;
  67. {how many instructions starting with StarMod does the block consist of}
  68. NrOfMods: Word;
  69. {the type of the content of the register: unknown, memory, constant}
  70. Typ: Byte;
  71. case byte of
  72. {starts at 0, gets increased everytime the register is written to}
  73. 1: (WState: Byte;
  74. {starts at 0, gets increased everytime the register is read from}
  75. RState: Byte);
  76. { to compare both states in one operation }
  77. 2: (state: word);
  78. end;
  79. {Contents of the integer registers}
  80. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  81. {contents of the FPU registers}
  82. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  83. {$ifdef tempOpts}
  84. { linked list which allows searching/deleting based on value, no extra frills}
  85. PSearchLinkedListItem = ^TSearchLinkedListItem;
  86. TSearchLinkedListItem = object(TLinkedList_Item)
  87. constructor init;
  88. function equals(p: PSearchLinkedListItem): boolean; virtual;
  89. end;
  90. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  91. TSearchDoubleIntItem = object(TLinkedList_Item)
  92. constructor init(_int1,_int2: longint);
  93. function equals(p: PSearchLinkedListItem): boolean; virtual;
  94. private
  95. int1, int2: longint;
  96. end;
  97. PSearchLinkedList = ^TSearchLinkedList;
  98. TSearchLinkedList = object(TLinkedList)
  99. function searchByValue(p: PSearchLinkedListItem): boolean;
  100. procedure removeByValue(p: PSearchLinkedListItem);
  101. end;
  102. {$endif tempOpts}
  103. {information record with the contents of every register. Every tai object
  104. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  105. TtaiProp = Record
  106. Regs: TRegContent;
  107. { FPURegs: TRegFPUContent;} {currently not yet used}
  108. { allocated Registers }
  109. UsedRegs: TRegSet;
  110. { status of the direction flag }
  111. DirFlag: TFlagContents;
  112. {$ifdef tempOpts}
  113. { currently used temps }
  114. tempAllocs: PSearchLinkedList;
  115. {$endif tempOpts}
  116. { can this instruction be removed? }
  117. CanBeRemoved: Boolean;
  118. { are the resultflags set by this instruction used? }
  119. FlagsUsed: Boolean;
  120. end;
  121. ptaiprop = ^TtaiProp;
  122. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  123. PtaiPropBlock = ^TtaiPropBlock;
  124. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  125. TLabelTableItem = Record
  126. taiObj: tai;
  127. {$ifDef JumpAnal}
  128. InstrNr: Longint;
  129. RefsFound: Word;
  130. JmpsProcessed: Word
  131. {$endif JumpAnal}
  132. end;
  133. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  134. PLabelTable = ^TLabelTable;
  135. {*********************** procedures and functions ************************}
  136. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  137. function RefsEqual(const R1, R2: TReference): Boolean;
  138. function isgp32reg(supreg: tsuperregister): Boolean;
  139. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  140. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  141. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  142. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function reginop(supreg: tsuperregister; const o:toper): boolean;
  144. function instrWritesFlags(p: tai): boolean;
  145. function instrReadsFlags(p: tai): boolean;
  146. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  147. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  148. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  149. const c: tcontent): boolean;
  150. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  151. const c: tcontent; var memwritedestroyed: boolean): boolean;
  152. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  153. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  154. procedure SkipHead(var p: tai);
  155. function labelCanBeSkipped(p: tai_label): boolean;
  156. procedure RemoveLastDeallocForFuncRes(asmL: TAAsmOutput; p: tai);
  157. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  158. hp: tai): boolean;
  159. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  160. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  161. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  162. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  163. function sizescompatible(loadsize,newsize: topsize): boolean;
  164. function OpsEqual(const o1,o2:toper): Boolean;
  165. type
  166. tdfaobj = class
  167. constructor create(_list: taasmoutput); virtual;
  168. function pass_1(_blockstart: tai): tai;
  169. function pass_2: boolean;
  170. procedure clear;
  171. function getlabelwithsym(sym: tasmlabel): tai;
  172. private
  173. { Walks through the list to find the lowest and highest label number, inits the }
  174. { labeltable and fixes/optimizes some regallocs }
  175. procedure initlabeltable;
  176. function initdfapass2: boolean;
  177. procedure dodfapass2;
  178. { asm list we're working on }
  179. list: taasmoutput;
  180. { current part of the asm list }
  181. blockstart, blockend: tai;
  182. { the amount of taiObjects in the current part of the assembler list }
  183. nroftaiobjs: longint;
  184. { Array which holds all TtaiProps }
  185. taipropblock: ptaipropblock;
  186. { all labels in the current block: their value mapped to their location }
  187. lolab, hilab, labdif: longint;
  188. labeltable: plabeltable;
  189. end;
  190. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  191. procedure incState(var S: Byte; amount: longint);
  192. {******************************* Variables *******************************}
  193. var
  194. dfa: tdfaobj;
  195. {*********************** end of Interface section ************************}
  196. Implementation
  197. Uses
  198. {$ifdef csdebug}
  199. cutils,
  200. {$else}
  201. {$ifdef statedebug}
  202. cutils,
  203. {$else}
  204. {$ifdef allocregdebug}
  205. cutils,
  206. {$endif}
  207. {$endif}
  208. {$endif}
  209. globals, systems, verbose, symconst, cgobj,procinfo;
  210. Type
  211. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  212. var
  213. {How many instructions are between the current instruction and the last one
  214. that modified the register}
  215. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  216. {$ifdef tempOpts}
  217. constructor TSearchLinkedListItem.init;
  218. begin
  219. end;
  220. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  221. begin
  222. equals := false;
  223. end;
  224. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  225. begin
  226. int1 := _int1;
  227. int2 := _int2;
  228. end;
  229. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  230. begin
  231. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  232. (TSearchDoubleIntItem(p).int2 = int2);
  233. end;
  234. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  235. var temp: PSearchLinkedListItem;
  236. begin
  237. temp := first;
  238. while (temp <> last.next) and
  239. not(temp.equals(p)) do
  240. temp := temp.next;
  241. searchByValue := temp <> last.next;
  242. end;
  243. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  244. begin
  245. temp := first;
  246. while (temp <> last.next) and
  247. not(temp.equals(p)) do
  248. temp := temp.next;
  249. if temp <> last.next then
  250. begin
  251. remove(temp);
  252. dispose(temp,done);
  253. end;
  254. end;
  255. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  256. {updates UsedRegs with the RegAlloc Information coming after p}
  257. begin
  258. repeat
  259. while assigned(p) and
  260. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  261. ((p.typ = ait_label) and
  262. labelCanBeSkipped(tai_label(current)))) Do
  263. p := tai(p.next);
  264. while assigned(p) and
  265. (p.typ=ait_RegAlloc) Do
  266. begin
  267. case tai_regalloc(p).ratype of
  268. ra_alloc :
  269. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  270. ra_dealloc :
  271. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  272. end;
  273. p := tai(p.next);
  274. end;
  275. until not(assigned(p)) or
  276. (not(p.typ in SkipInstr) and
  277. not((p.typ = ait_label) and
  278. labelCanBeSkipped(tai_label(current))));
  279. end;
  280. {$endif tempOpts}
  281. {************************ Create the Label table ************************}
  282. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  283. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  284. { starting with Starttai and ending with the next "real" instruction }
  285. begin
  286. findregalloc := false;
  287. repeat
  288. while assigned(starttai) and
  289. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  290. ((starttai.typ = ait_label) and
  291. labelcanbeskipped(tai_label(starttai)))) do
  292. starttai := tai(starttai.next);
  293. if assigned(starttai) and
  294. (starttai.typ = ait_regalloc) then
  295. begin
  296. if (tai_regalloc(Starttai).ratype = ratyp) and
  297. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  298. begin
  299. findregalloc:=true;
  300. break;
  301. end;
  302. starttai := tai(starttai.next);
  303. end
  304. else
  305. break;
  306. until false;
  307. end;
  308. procedure RemoveLastDeallocForFuncRes(asml: taasmoutput; p: tai);
  309. procedure DoRemoveLastDeallocForFuncRes(asml: taasmoutput; supreg: tsuperregister);
  310. var
  311. hp2: tai;
  312. begin
  313. hp2 := p;
  314. repeat
  315. hp2 := tai(hp2.previous);
  316. if assigned(hp2) and
  317. (hp2.typ = ait_regalloc) and
  318. (tai_regalloc(hp2).ratype=ra_dealloc) and
  319. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  320. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  321. begin
  322. asml.remove(hp2);
  323. hp2.free;
  324. break;
  325. end;
  326. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  327. end;
  328. begin
  329. case current_procinfo.procdef.rettype.def.deftype of
  330. arraydef,recorddef,pointerdef,
  331. stringdef,enumdef,procdef,objectdef,errordef,
  332. filedef,setdef,procvardef,
  333. classrefdef,forwarddef:
  334. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  335. orddef:
  336. if current_procinfo.procdef.rettype.def.size <> 0 then
  337. begin
  338. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  339. { for int64/qword }
  340. if current_procinfo.procdef.rettype.def.size = 8 then
  341. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  342. end;
  343. end;
  344. end;
  345. procedure getNoDeallocRegs(var regs: tregset);
  346. var
  347. regCounter: TSuperRegister;
  348. begin
  349. regs := [];
  350. case current_procinfo.procdef.rettype.def.deftype of
  351. arraydef,recorddef,pointerdef,
  352. stringdef,enumdef,procdef,objectdef,errordef,
  353. filedef,setdef,procvardef,
  354. classrefdef,forwarddef:
  355. regs := [RS_EAX];
  356. orddef:
  357. if current_procinfo.procdef.rettype.def.size <> 0 then
  358. begin
  359. regs := [RS_EAX];
  360. { for int64/qword }
  361. if current_procinfo.procdef.rettype.def.size = 8 then
  362. regs := regs + [RS_EDX];
  363. end;
  364. end;
  365. for regCounter := RS_EAX to RS_EBX do
  366. { if not(regCounter in rg.usableregsint) then}
  367. include(regs,regcounter);
  368. end;
  369. procedure AddRegDeallocFor(asml: taasmoutput; reg: tregister; p: tai);
  370. var
  371. hp1: tai;
  372. funcResRegs: tregset;
  373. funcResReg: boolean;
  374. begin
  375. { if not(supreg in rg.usableregsint) then
  376. exit;}
  377. { if not(supreg in [RS_EDI]) then
  378. exit;}
  379. getNoDeallocRegs(funcresregs);
  380. { funcResRegs := funcResRegs - rg.usableregsint;}
  381. { funcResRegs := funcResRegs - [RS_EDI];}
  382. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  383. funcResReg := getsupreg(reg) in funcresregs;
  384. hp1 := p;
  385. {
  386. while not(funcResReg and
  387. (p.typ = ait_instruction) and
  388. (taicpu(p).opcode = A_JMP) and
  389. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  390. getLastInstruction(p, p) and
  391. not(regInInstruction(supreg, p)) do
  392. hp1 := p;
  393. }
  394. { don't insert a dealloc for registers which contain the function result }
  395. { if they are followed by a jump to the exit label (for exit(...)) }
  396. { if not(funcResReg) or
  397. not((hp1.typ = ait_instruction) and
  398. (taicpu(hp1).opcode = A_JMP) and
  399. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  400. begin
  401. p := tai_regalloc.deAlloc(reg,nil);
  402. insertLLItem(AsmL, hp1.previous, hp1, p);
  403. end;
  404. end;
  405. {************************ Search the Label table ************************}
  406. function findlabel(l: tasmlabel; var hp: tai): boolean;
  407. {searches for the specified label starting from hp as long as the
  408. encountered instructions are labels, to be able to optimize constructs like
  409. jne l2 jmp l2
  410. jmp l3 and l1:
  411. l1: l2:
  412. l2:}
  413. var
  414. p: tai;
  415. begin
  416. p := hp;
  417. while assigned(p) and
  418. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  419. if (p.typ <> ait_Label) or
  420. (tai_label(p).l <> l) then
  421. GetNextInstruction(p, p)
  422. else
  423. begin
  424. hp := p;
  425. findlabel := true;
  426. exit
  427. end;
  428. findlabel := false;
  429. end;
  430. {************************ Some general functions ************************}
  431. function tch2reg(ch: tinschange): tsuperregister;
  432. {converts a TChange variable to a TRegister}
  433. const
  434. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  435. begin
  436. if (ch <= CH_REDI) then
  437. tch2reg := ch2reg[ch]
  438. else if (ch <= CH_WEDI) then
  439. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  440. else if (ch <= CH_RWEDI) then
  441. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  442. else if (ch <= CH_MEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  444. else
  445. InternalError($db)
  446. end;
  447. { inserts new_one between prev and foll }
  448. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  449. begin
  450. if assigned(prev) then
  451. if assigned(foll) then
  452. begin
  453. if assigned(new_one) then
  454. begin
  455. new_one.previous := prev;
  456. new_one.next := foll;
  457. prev.next := new_one;
  458. foll.previous := new_one;
  459. { shgould we update line information }
  460. if (not (tai(new_one).typ in SkipLineInfo)) and
  461. (not (tai(foll).typ in SkipLineInfo)) then
  462. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  463. end;
  464. end
  465. else
  466. asml.Concat(new_one)
  467. else
  468. if assigned(foll) then
  469. asml.Insert(new_one)
  470. end;
  471. {********************* Compare parts of tai objects *********************}
  472. function regssamesize(reg1, reg2: tregister): boolean;
  473. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  474. 8bit, 16bit or 32bit)}
  475. begin
  476. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  477. internalerror(2003111602);
  478. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  479. end;
  480. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  481. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  482. OldReg and NewReg have the same size (has to be chcked in advance with
  483. RegsSameSize) and that neither equals RS_INVALID}
  484. var
  485. newsupreg, oldsupreg: tsuperregister;
  486. begin
  487. if (newreg = NR_NO) or (oldreg = NR_NO) then
  488. internalerror(2003111601);
  489. newsupreg := getsupreg(newreg);
  490. oldsupreg := getsupreg(oldreg);
  491. with RegInfo Do
  492. begin
  493. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  494. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  495. New2OldReg[newsupreg] := oldsupreg;
  496. end;
  497. end;
  498. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  499. begin
  500. case o.typ Of
  501. top_reg:
  502. if (o.reg <> NR_NO) then
  503. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  504. top_ref:
  505. begin
  506. if o.ref^.base <> NR_NO then
  507. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  508. if o.ref^.index <> NR_NO then
  509. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  510. end;
  511. end;
  512. end;
  513. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  514. begin
  515. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  516. if RegsSameSize(oldreg, newreg) then
  517. with reginfo do
  518. {here we always check for the 32 bit component, because it is possible that
  519. the 8 bit component has not been set, event though NewReg already has been
  520. processed. This happens if it has been compared with a register that doesn't
  521. have an 8 bit component (such as EDI). in that case the 8 bit component is
  522. still set to RS_NO and the comparison in the else-part will fail}
  523. if (getsupreg(oldReg) in OldRegsEncountered) then
  524. if (getsupreg(NewReg) in NewRegsEncountered) then
  525. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  526. { if we haven't encountered the new register yet, but we have encountered the
  527. old one already, the new one can only be correct if it's being written to
  528. (and consequently the old one is also being written to), otherwise
  529. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  530. movl (%eax), %eax movl (%edx), %edx
  531. are considered equivalent}
  532. else
  533. if (opact = opact_write) then
  534. begin
  535. AddReg2RegInfo(oldreg, newreg, reginfo);
  536. RegsEquivalent := true
  537. end
  538. else
  539. Regsequivalent := false
  540. else
  541. if not(getsupreg(newreg) in NewRegsEncountered) and
  542. ((opact = opact_write) or
  543. ((newreg = oldreg) and
  544. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  545. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  546. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  547. begin
  548. AddReg2RegInfo(oldreg, newreg, reginfo);
  549. RegsEquivalent := true
  550. end
  551. else
  552. RegsEquivalent := false
  553. else
  554. RegsEquivalent := false
  555. else
  556. RegsEquivalent := oldreg = newreg
  557. end;
  558. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  559. begin
  560. RefsEquivalent :=
  561. (r1.offset = r2.offset) and
  562. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  563. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  564. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  565. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  566. (r1.relsymbol = r2.relsymbol);
  567. end;
  568. function refsequal(const r1, r2: treference): boolean;
  569. begin
  570. refsequal :=
  571. (r1.offset = r2.offset) and
  572. (r1.segment = r2.segment) and (r1.base = r2.base) and
  573. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  574. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  575. (r1.relsymbol = r2.relsymbol);
  576. end;
  577. {$ifdef q+}
  578. {$q-}
  579. {$define overflowon}
  580. {$endif q+}
  581. // checks whether a write to r2 of size "size" contains address r1
  582. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  583. var
  584. realsize1, realsize2: aint;
  585. begin
  586. realsize1 := tcgsize2size[size1];
  587. realsize2 := tcgsize2size[size2];
  588. refsoverlapping :=
  589. (r2.offset <= r1.offset+realsize1) and
  590. (r1.offset <= r2.offset+realsize2) and
  591. (r1.segment = r2.segment) and (r1.base = r2.base) and
  592. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  593. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  594. (r1.relsymbol = r2.relsymbol);
  595. end;
  596. {$ifdef overflowon}
  597. {$q+}
  598. {$undef overflowon}
  599. {$endif overflowon}
  600. function isgp32reg(supreg: tsuperregister): boolean;
  601. {Checks if the register is a 32 bit general purpose register}
  602. begin
  603. isgp32reg := false;
  604. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  605. isgp32reg := true
  606. end;
  607. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  608. begin {checks whether ref contains a reference to reg}
  609. reginref :=
  610. ((ref.base <> NR_NO) and
  611. (getsupreg(ref.base) = supreg)) or
  612. ((ref.index <> NR_NO) and
  613. (getsupreg(ref.index) = supreg))
  614. end;
  615. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  616. var
  617. p: taicpu;
  618. opcount: longint;
  619. begin
  620. RegReadByInstruction := false;
  621. if hp.typ <> ait_instruction then
  622. exit;
  623. p := taicpu(hp);
  624. case p.opcode of
  625. A_CALL:
  626. regreadbyinstruction := true;
  627. A_IMUL:
  628. case p.ops of
  629. 1:
  630. regReadByInstruction :=
  631. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  632. 2,3:
  633. regReadByInstruction :=
  634. reginop(supreg,p.oper[0]^) or
  635. reginop(supreg,p.oper[1]^);
  636. end;
  637. A_IDIV,A_DIV,A_MUL:
  638. begin
  639. regReadByInstruction :=
  640. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  641. end;
  642. else
  643. begin
  644. for opcount := 0 to p.ops-1 do
  645. if (p.oper[opCount]^.typ = top_ref) and
  646. reginref(supreg,p.oper[opcount]^.ref^) then
  647. begin
  648. RegReadByInstruction := true;
  649. exit
  650. end;
  651. for opcount := 1 to maxinschanges do
  652. case insprop[p.opcode].ch[opcount] of
  653. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  654. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  655. begin
  656. RegReadByInstruction := true;
  657. exit
  658. end;
  659. CH_RWOP1,CH_ROP1,CH_MOP1:
  660. if //(p.oper[0]^.typ = top_reg) and
  661. reginop(supreg,p.oper[0]^) then
  662. begin
  663. RegReadByInstruction := true;
  664. exit
  665. end;
  666. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  667. if //(p.oper[1]^.typ = top_reg) and
  668. reginop(supreg,p.oper[1]^) then
  669. begin
  670. RegReadByInstruction := true;
  671. exit
  672. end;
  673. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  674. if //(p.oper[2]^.typ = top_reg) and
  675. reginop(supreg,p.oper[2]^) then
  676. begin
  677. RegReadByInstruction := true;
  678. exit
  679. end;
  680. end;
  681. end;
  682. end;
  683. end;
  684. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  685. { Checks if reg is used by the instruction p1 }
  686. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  687. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  688. var
  689. p: taicpu;
  690. opcount: Word;
  691. begin
  692. regInInstruction := false;
  693. if p1.typ <> ait_instruction then
  694. exit;
  695. p := taicpu(p1);
  696. case p.opcode of
  697. A_CALL:
  698. regininstruction := true;
  699. A_IMUL:
  700. case p.ops of
  701. 1:
  702. regInInstruction :=
  703. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  704. 2,3:
  705. regInInstruction :=
  706. reginop(supreg,p.oper[0]^) or
  707. reginop(supreg,p.oper[1]^) or
  708. (assigned(p.oper[2]) and
  709. reginop(supreg,p.oper[2]^));
  710. end;
  711. A_IDIV,A_DIV,A_MUL:
  712. regInInstruction :=
  713. reginop(supreg,p.oper[0]^) or
  714. (supreg in [RS_EAX,RS_EDX])
  715. else
  716. begin
  717. for opcount := 1 to maxinschanges do
  718. case insprop[p.opcode].Ch[opCount] of
  719. CH_REAX..CH_MEDI:
  720. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  721. begin
  722. regInInstruction := true;
  723. exit;
  724. end;
  725. CH_ROp1..CH_MOp1:
  726. if reginop(supreg,p.oper[0]^) then
  727. begin
  728. regInInstruction := true;
  729. exit
  730. end;
  731. Ch_ROp2..Ch_MOp2:
  732. if reginop(supreg,p.oper[1]^) then
  733. begin
  734. regInInstruction := true;
  735. exit
  736. end;
  737. Ch_ROp3..Ch_MOp3:
  738. if reginop(supreg,p.oper[2]^) then
  739. begin
  740. regInInstruction := true;
  741. exit
  742. end;
  743. end;
  744. end;
  745. end;
  746. end;
  747. function reginop(supreg: tsuperregister; const o:toper): boolean;
  748. begin
  749. reginop := false;
  750. case o.typ Of
  751. top_reg:
  752. reginop :=
  753. (getregtype(o.reg) = R_INTREGISTER) and
  754. (supreg = getsupreg(o.reg));
  755. top_ref:
  756. reginop :=
  757. ((o.ref^.base <> NR_NO) and
  758. (supreg = getsupreg(o.ref^.base))) or
  759. ((o.ref^.index <> NR_NO) and
  760. (supreg = getsupreg(o.ref^.index)));
  761. end;
  762. end;
  763. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  764. var
  765. InstrProp: TInsProp;
  766. TmpResult: Boolean;
  767. Cnt: Word;
  768. begin
  769. TmpResult := False;
  770. if supreg = RS_INVALID then
  771. exit;
  772. if (p1.typ = ait_instruction) then
  773. case taicpu(p1).opcode of
  774. A_IMUL:
  775. With taicpu(p1) Do
  776. TmpResult :=
  777. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  778. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  779. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  780. A_DIV, A_IDIV, A_MUL:
  781. With taicpu(p1) Do
  782. TmpResult :=
  783. (supreg in [RS_EAX,RS_EDX]);
  784. else
  785. begin
  786. Cnt := 1;
  787. InstrProp := InsProp[taicpu(p1).OpCode];
  788. while (Cnt <= maxinschanges) and
  789. (InstrProp.Ch[Cnt] <> Ch_None) and
  790. not(TmpResult) Do
  791. begin
  792. case InstrProp.Ch[Cnt] Of
  793. Ch_WEAX..Ch_MEDI:
  794. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  795. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  796. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  797. reginop(supreg,taicpu(p1).oper[0]^);
  798. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  799. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  800. reginop(supreg,taicpu(p1).oper[1]^);
  801. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  802. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  803. reginop(supreg,taicpu(p1).oper[2]^);
  804. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  805. Ch_ALL: TmpResult := true;
  806. end;
  807. inc(Cnt)
  808. end
  809. end
  810. end;
  811. RegModifiedByInstruction := TmpResult
  812. end;
  813. function instrWritesFlags(p: tai): boolean;
  814. var
  815. l: longint;
  816. begin
  817. instrWritesFlags := true;
  818. case p.typ of
  819. ait_instruction:
  820. begin
  821. for l := 1 to maxinschanges do
  822. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  823. exit;
  824. end;
  825. ait_label:
  826. exit;
  827. end;
  828. instrWritesFlags := false;
  829. end;
  830. function instrReadsFlags(p: tai): boolean;
  831. var
  832. l: longint;
  833. begin
  834. instrReadsFlags := true;
  835. case p.typ of
  836. ait_instruction:
  837. begin
  838. for l := 1 to maxinschanges do
  839. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  840. exit;
  841. end;
  842. ait_label:
  843. exit;
  844. end;
  845. instrReadsFlags := false;
  846. end;
  847. {********************* GetNext and GetLastInstruction *********************}
  848. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  849. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  850. { next tai object in Next. Returns false if there isn't any }
  851. begin
  852. repeat
  853. if (Current.typ = ait_marker) and
  854. (tai_Marker(current).Kind = AsmBlockStart) then
  855. begin
  856. GetNextInstruction := False;
  857. Next := Nil;
  858. Exit
  859. end;
  860. Current := tai(current.Next);
  861. while assigned(Current) and
  862. ((current.typ in skipInstr) or
  863. ((current.typ = ait_label) and
  864. labelCanBeSkipped(tai_label(current)))) do
  865. Current := tai(current.Next);
  866. { if assigned(Current) and
  867. (current.typ = ait_Marker) and
  868. (tai_Marker(current).Kind = NoPropInfoStart) then
  869. begin
  870. while assigned(Current) and
  871. ((current.typ <> ait_Marker) or
  872. (tai_Marker(current).Kind <> NoPropInfoend)) Do
  873. Current := tai(current.Next);
  874. end;}
  875. until not(assigned(Current)) or
  876. (current.typ <> ait_Marker) or
  877. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  878. Next := Current;
  879. if assigned(Current) and
  880. not((current.typ in SkipInstr) or
  881. ((current.typ = ait_label) and
  882. labelCanBeSkipped(tai_label(current))))
  883. then
  884. GetNextInstruction :=
  885. not((current.typ = ait_marker) and
  886. (tai_marker(current).kind = asmBlockStart))
  887. else
  888. begin
  889. GetNextInstruction := False;
  890. Next := nil;
  891. end;
  892. end;
  893. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  894. {skips the ait-types in SkipInstr puts the previous tai object in
  895. Last. Returns false if there isn't any}
  896. begin
  897. repeat
  898. Current := tai(current.previous);
  899. while assigned(Current) and
  900. (((current.typ = ait_Marker) and
  901. not(tai_Marker(current).Kind in [AsmBlockend{,NoPropInfoend}])) or
  902. (current.typ in SkipInstr) or
  903. ((current.typ = ait_label) and
  904. labelCanBeSkipped(tai_label(current)))) Do
  905. Current := tai(current.previous);
  906. { if assigned(Current) and
  907. (current.typ = ait_Marker) and
  908. (tai_Marker(current).Kind = NoPropInfoend) then
  909. begin
  910. while assigned(Current) and
  911. ((current.typ <> ait_Marker) or
  912. (tai_Marker(current).Kind <> NoPropInfoStart)) Do
  913. Current := tai(current.previous);
  914. end;}
  915. until not(assigned(Current)) or
  916. (current.typ <> ait_Marker) or
  917. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  918. if not(assigned(Current)) or
  919. (current.typ in SkipInstr) or
  920. ((current.typ = ait_label) and
  921. labelCanBeSkipped(tai_label(current))) or
  922. ((current.typ = ait_Marker) and
  923. (tai_Marker(current).Kind = AsmBlockend))
  924. then
  925. begin
  926. Last := nil;
  927. GetLastInstruction := False
  928. end
  929. else
  930. begin
  931. Last := Current;
  932. GetLastInstruction := True;
  933. end;
  934. end;
  935. procedure SkipHead(var p: tai);
  936. var
  937. oldp: tai;
  938. begin
  939. repeat
  940. oldp := p;
  941. if (p.typ in SkipInstr) or
  942. ((p.typ = ait_marker) and
  943. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend])) then
  944. GetNextInstruction(p,p)
  945. else if ((p.Typ = Ait_Marker) and
  946. (tai_Marker(p).Kind = nopropinfostart)) then
  947. {a marker of the NoPropInfoStart can't be the first instruction of a
  948. TAAsmoutput list}
  949. GetNextInstruction(tai(p.previous),p);
  950. until p = oldp
  951. end;
  952. function labelCanBeSkipped(p: tai_label): boolean;
  953. begin
  954. labelCanBeSkipped := not(p.l.is_used) or p.l.is_addr;
  955. end;
  956. {******************* The Data Flow Analyzer functions ********************}
  957. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  958. hp: tai): boolean;
  959. { assumes reg is a 32bit register }
  960. var
  961. p: taicpu;
  962. begin
  963. if not assigned(hp) or
  964. (hp.typ <> ait_instruction) then
  965. begin
  966. regLoadedWithNewValue := false;
  967. exit;
  968. end;
  969. p := taicpu(hp);
  970. regLoadedWithNewValue :=
  971. (((p.opcode = A_MOV) or
  972. (p.opcode = A_MOVZX) or
  973. (p.opcode = A_MOVSX) or
  974. (p.opcode = A_LEA)) and
  975. (p.oper[1]^.typ = top_reg) and
  976. (getsupreg(p.oper[1]^.reg) = supreg) and
  977. (canDependOnPrevValue or
  978. (p.oper[0]^.typ <> top_ref) or
  979. not regInRef(supreg,p.oper[0]^.ref^)) or
  980. ((p.opcode = A_POP) and
  981. (getsupreg(p.oper[0]^.reg) = supreg)));
  982. end;
  983. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  984. {updates UsedRegs with the RegAlloc Information coming after p}
  985. begin
  986. repeat
  987. while assigned(p) and
  988. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  989. ((p.typ = ait_label) and
  990. labelCanBeSkipped(tai_label(p)))) Do
  991. p := tai(p.next);
  992. while assigned(p) and
  993. (p.typ=ait_RegAlloc) Do
  994. begin
  995. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  996. begin
  997. case tai_regalloc(p).ratype of
  998. ra_alloc :
  999. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1000. ra_dealloc :
  1001. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1002. end;
  1003. end;
  1004. p := tai(p.next);
  1005. end;
  1006. until not(assigned(p)) or
  1007. (not(p.typ in SkipInstr) and
  1008. not((p.typ = ait_label) and
  1009. labelCanBeSkipped(tai_label(p))));
  1010. end;
  1011. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1012. { allocates register reg between (and including) instructions p1 and p2 }
  1013. { the type of p1 and p2 must not be in SkipInstr }
  1014. { note that this routine is both called from the peephole optimizer }
  1015. { where optinfo is not yet initialised) and from the cse (where it is) }
  1016. var
  1017. hp: tai;
  1018. lastRemovedWasDealloc: boolean;
  1019. supreg: tsuperregister;
  1020. begin
  1021. {$ifdef EXTDEBUG}
  1022. if assigned(p1.optinfo) and
  1023. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1024. internalerror(2004101010);
  1025. {$endif EXTDEBUG}
  1026. supreg := getsupreg(reg);
  1027. { if not(supreg in rg.usableregsint+[RS_EDI,RS_ESI]) or
  1028. not(assigned(p1)) then}
  1029. if not(supreg in [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_EDI,RS_ESI]) or
  1030. not(assigned(p1)) then
  1031. { this happens with registers which are loaded implicitely, outside the }
  1032. { current block (e.g. esi with self) }
  1033. exit;
  1034. { make sure we allocate it for this instruction }
  1035. getnextinstruction(p2,p2);
  1036. lastRemovedWasDealloc := false;
  1037. {$ifdef allocregdebug}
  1038. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1039. ' from here...'));
  1040. insertllitem(asml,p1.previous,p1,hp);
  1041. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1042. ' till here...'));
  1043. insertllitem(asml,p2,p1.next,hp);
  1044. {$endif allocregdebug}
  1045. if not(supreg in initialusedregs) then
  1046. begin
  1047. hp := tai_regalloc.alloc(reg,nil);
  1048. insertllItem(asmL,p1.previous,p1,hp);
  1049. end;
  1050. while assigned(p1) and
  1051. (p1 <> p2) do
  1052. begin
  1053. if assigned(p1.optinfo) then
  1054. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1055. p1 := tai(p1.next);
  1056. repeat
  1057. while assigned(p1) and
  1058. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1059. p1 := tai(p1.next);
  1060. { remove all allocation/deallocation info about the register in between }
  1061. if assigned(p1) and
  1062. (p1.typ = ait_regalloc) then
  1063. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1064. begin
  1065. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1066. hp := tai(p1.Next);
  1067. asml.Remove(p1);
  1068. p1.free;
  1069. p1 := hp;
  1070. end
  1071. else p1 := tai(p1.next);
  1072. until not(assigned(p1)) or
  1073. not(p1.typ in SkipInstr);
  1074. end;
  1075. if assigned(p1) then
  1076. begin
  1077. if lastRemovedWasDealloc then
  1078. begin
  1079. hp := tai_regalloc.DeAlloc(reg,nil);
  1080. insertLLItem(asmL,p1.previous,p1,hp);
  1081. end;
  1082. end;
  1083. end;
  1084. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1085. var
  1086. hp: tai;
  1087. first: boolean;
  1088. begin
  1089. findregdealloc := false;
  1090. first := true;
  1091. while assigned(p.previous) and
  1092. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1093. ((tai(p.previous).typ = ait_label) and
  1094. labelCanBeSkipped(tai_label(p.previous)))) do
  1095. begin
  1096. p := tai(p.previous);
  1097. if (p.typ = ait_regalloc) and
  1098. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1099. if (tai_regalloc(p).ratype=ra_dealloc) then
  1100. if first then
  1101. begin
  1102. findregdealloc := true;
  1103. break;
  1104. end
  1105. else
  1106. begin
  1107. findRegDealloc :=
  1108. getNextInstruction(p,hp) and
  1109. regLoadedWithNewValue(supreg,false,hp);
  1110. break
  1111. end
  1112. else
  1113. first := false;
  1114. end
  1115. end;
  1116. procedure incState(var S: Byte; amount: longint);
  1117. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1118. errors}
  1119. begin
  1120. if (s <= $ff - amount) then
  1121. inc(s, amount)
  1122. else s := longint(s) + amount - $ff;
  1123. end;
  1124. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1125. { Content is the sequence of instructions that describes the contents of }
  1126. { seqReg. reg is being overwritten by the current instruction. if the }
  1127. { content of seqReg depends on reg (ie. because of a }
  1128. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1129. var
  1130. p: tai;
  1131. Counter: Word;
  1132. TmpResult: Boolean;
  1133. RegsChecked: TRegSet;
  1134. begin
  1135. RegsChecked := [];
  1136. p := Content.StartMod;
  1137. TmpResult := False;
  1138. Counter := 1;
  1139. while not(TmpResult) and
  1140. (Counter <= Content.NrOfMods) Do
  1141. begin
  1142. if (p.typ = ait_instruction) and
  1143. ((taicpu(p).opcode = A_MOV) or
  1144. (taicpu(p).opcode = A_MOVZX) or
  1145. (taicpu(p).opcode = A_MOVSX) or
  1146. (taicpu(p).opcode = A_LEA)) and
  1147. (taicpu(p).oper[0]^.typ = top_ref) then
  1148. With taicpu(p).oper[0]^.ref^ Do
  1149. if ((base = current_procinfo.FramePointer) or
  1150. (assigned(symbol) and (base = NR_NO))) and
  1151. (index = NR_NO) then
  1152. begin
  1153. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1154. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1155. break;
  1156. end
  1157. else
  1158. tmpResult :=
  1159. regReadByInstruction(supreg,p) and
  1160. regModifiedByInstruction(seqReg,p)
  1161. else
  1162. tmpResult :=
  1163. regReadByInstruction(supreg,p) and
  1164. regModifiedByInstruction(seqReg,p);
  1165. inc(Counter);
  1166. GetNextInstruction(p,p)
  1167. end;
  1168. sequenceDependsonReg := TmpResult
  1169. end;
  1170. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1171. var
  1172. counter: tsuperregister;
  1173. begin
  1174. for counter := RS_EAX to RS_EDI do
  1175. if counter <> supreg then
  1176. with p1^.regs[counter] Do
  1177. begin
  1178. if (typ in [con_ref,con_noRemoveRef]) and
  1179. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1180. if typ in [con_ref, con_invalid] then
  1181. typ := con_invalid
  1182. { con_noRemoveRef = con_unknown }
  1183. else
  1184. typ := con_unknown;
  1185. if assigned(memwrite) and
  1186. regInRef(counter,memwrite.oper[1]^.ref^) then
  1187. memwrite := nil;
  1188. end;
  1189. end;
  1190. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1191. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1192. contents of registers are loaded with a memory location based on reg.
  1193. doincState is false when this register has to be destroyed not because
  1194. it's contents are directly modified/overwritten, but because of an indirect
  1195. action (e.g. this register holds the contents of a variable and the value
  1196. of the variable in memory is changed) }
  1197. begin
  1198. { the following happens for fpu registers }
  1199. if (supreg < low(NrOfInstrSinceLastMod)) or
  1200. (supreg > high(NrOfInstrSinceLastMod)) then
  1201. exit;
  1202. NrOfInstrSinceLastMod[supreg] := 0;
  1203. with p1^.regs[supreg] do
  1204. begin
  1205. if doincState then
  1206. begin
  1207. incState(wstate,1);
  1208. typ := con_unknown;
  1209. startmod := nil;
  1210. end
  1211. else
  1212. if typ in [con_ref,con_const,con_invalid] then
  1213. typ := con_invalid
  1214. { con_noRemoveRef = con_unknown }
  1215. else
  1216. typ := con_unknown;
  1217. memwrite := nil;
  1218. end;
  1219. invalidateDependingRegs(p1,supreg);
  1220. end;
  1221. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1222. begin
  1223. if (p.typ = ait_instruction) then
  1224. begin
  1225. case taicpu(p).oper[0]^.typ Of
  1226. top_reg:
  1227. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1228. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1229. top_ref:
  1230. With TReference(taicpu(p).oper[0]^) Do
  1231. begin
  1232. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1233. then RegSet := RegSet + [base];
  1234. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1235. then RegSet := RegSet + [index];
  1236. end;
  1237. end;
  1238. case taicpu(p).oper[1]^.typ Of
  1239. top_reg:
  1240. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1241. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1242. top_ref:
  1243. With TReference(taicpu(p).oper[1]^) Do
  1244. begin
  1245. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1246. then RegSet := RegSet + [base];
  1247. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1248. then RegSet := RegSet + [index];
  1249. end;
  1250. end;
  1251. end;
  1252. end;}
  1253. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1254. begin {checks whether the two ops are equivalent}
  1255. OpsEquivalent := False;
  1256. if o1.typ=o2.typ then
  1257. case o1.typ Of
  1258. top_reg:
  1259. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1260. top_ref:
  1261. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1262. Top_Const:
  1263. OpsEquivalent := o1.val = o2.val;
  1264. Top_None:
  1265. OpsEquivalent := True
  1266. end;
  1267. end;
  1268. function OpsEqual(const o1,o2:toper): Boolean;
  1269. begin {checks whether the two ops are equal}
  1270. OpsEqual := False;
  1271. if o1.typ=o2.typ then
  1272. case o1.typ Of
  1273. top_reg :
  1274. OpsEqual:=o1.reg=o2.reg;
  1275. top_ref :
  1276. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1277. Top_Const :
  1278. OpsEqual:=o1.val=o2.val;
  1279. Top_None :
  1280. OpsEqual := True
  1281. end;
  1282. end;
  1283. function sizescompatible(loadsize,newsize: topsize): boolean;
  1284. begin
  1285. case loadsize of
  1286. S_B,S_BW,S_BL:
  1287. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1288. S_W,S_WL:
  1289. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1290. else
  1291. sizescompatible := newsize = S_L;
  1292. end;
  1293. end;
  1294. function opscompatible(p1,p2: taicpu): boolean;
  1295. begin
  1296. case p1.opcode of
  1297. A_MOVZX,A_MOVSX:
  1298. opscompatible :=
  1299. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1300. sizescompatible(p1.opsize,p2.opsize);
  1301. else
  1302. opscompatible :=
  1303. (p1.opcode = p2.opcode) and
  1304. (p1.ops = p2.ops) and
  1305. (p1.opsize = p2.opsize);
  1306. end;
  1307. end;
  1308. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1309. {$ifdef csdebug}
  1310. var
  1311. hp: tai;
  1312. {$endif csdebug}
  1313. begin {checks whether two taicpu instructions are equal}
  1314. if assigned(p1) and assigned(p2) and
  1315. (tai(p1).typ = ait_instruction) and
  1316. (tai(p2).typ = ait_instruction) and
  1317. opscompatible(taicpu(p1),taicpu(p2)) and
  1318. (not(assigned(taicpu(p1).oper[0])) or
  1319. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1320. (not(assigned(taicpu(p1).oper[1])) or
  1321. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1322. (not(assigned(taicpu(p1).oper[2])) or
  1323. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1324. {both instructions have the same structure:
  1325. "<operator> <operand of type1>, <operand of type 2>"}
  1326. if ((taicpu(p1).opcode = A_MOV) or
  1327. (taicpu(p1).opcode = A_MOVZX) or
  1328. (taicpu(p1).opcode = A_MOVSX) or
  1329. (taicpu(p1).opcode = A_LEA)) and
  1330. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1331. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1332. {the "old" instruction is a load of a register with a new value, not with
  1333. a value based on the contents of this register (so no "mov (reg), reg")}
  1334. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1335. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1336. {the "new" instruction is also a load of a register with a new value, and
  1337. this value is fetched from the same memory location}
  1338. begin
  1339. With taicpu(p2).oper[0]^.ref^ Do
  1340. begin
  1341. if (base <> NR_NO) and
  1342. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1343. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1344. if (index <> NR_NO) and
  1345. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1346. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1347. end;
  1348. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1349. from the reference are the same in the old and in the new instruction
  1350. sequence}
  1351. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1352. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1353. InstructionsEquivalent :=
  1354. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1355. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1356. end
  1357. {the registers are loaded with values from different memory locations. if
  1358. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1359. would be considered equivalent}
  1360. else
  1361. InstructionsEquivalent := False
  1362. else
  1363. {load register with a value based on the current value of this register}
  1364. begin
  1365. With taicpu(p2).oper[0]^.ref^ Do
  1366. begin
  1367. if (base <> NR_NO) and
  1368. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1369. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1370. {it won't do any harm if the register is already in RegsLoadedForRef}
  1371. begin
  1372. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1373. {$ifdef csdebug}
  1374. Writeln(std_regname(base), ' added');
  1375. {$endif csdebug}
  1376. end;
  1377. if (index <> NR_NO) and
  1378. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1379. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1380. begin
  1381. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1382. {$ifdef csdebug}
  1383. Writeln(std_regname(index), ' added');
  1384. {$endif csdebug}
  1385. end;
  1386. end;
  1387. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1388. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1389. begin
  1390. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1391. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1392. {$ifdef csdebug}
  1393. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1394. {$endif csdebug}
  1395. end;
  1396. InstructionsEquivalent :=
  1397. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1398. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1399. end
  1400. else
  1401. {an instruction <> mov, movzx, movsx}
  1402. begin
  1403. {$ifdef csdebug}
  1404. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1405. hp.previous := p2;
  1406. hp.next := p2.next;
  1407. p2.next.previous := hp;
  1408. p2.next := hp;
  1409. {$endif csdebug}
  1410. InstructionsEquivalent :=
  1411. (not(assigned(taicpu(p1).oper[0])) or
  1412. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1413. (not(assigned(taicpu(p1).oper[1])) or
  1414. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1415. (not(assigned(taicpu(p1).oper[2])) or
  1416. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1417. end
  1418. {the instructions haven't even got the same structure, so they're certainly
  1419. not equivalent}
  1420. else
  1421. begin
  1422. {$ifdef csdebug}
  1423. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1424. hp.previous := p2;
  1425. hp.next := p2.next;
  1426. p2.next.previous := hp;
  1427. p2.next := hp;
  1428. {$endif csdebug}
  1429. InstructionsEquivalent := False;
  1430. end;
  1431. {$ifdef csdebug}
  1432. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1433. hp.previous := p2;
  1434. hp.next := p2.next;
  1435. p2.next.previous := hp;
  1436. p2.next := hp;
  1437. {$endif csdebug}
  1438. end;
  1439. (*
  1440. function InstructionsEqual(p1, p2: tai): Boolean;
  1441. begin {checks whether two taicpu instructions are equal}
  1442. InstructionsEqual :=
  1443. assigned(p1) and assigned(p2) and
  1444. ((tai(p1).typ = ait_instruction) and
  1445. (tai(p1).typ = ait_instruction) and
  1446. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1447. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1448. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1449. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1450. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1451. end;
  1452. *)
  1453. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1454. begin
  1455. if supreg in [RS_EAX..RS_EDI] then
  1456. incState(p^.regs[supreg].rstate,1)
  1457. end;
  1458. procedure readref(p: ptaiprop; const ref: preference);
  1459. begin
  1460. if ref^.base <> NR_NO then
  1461. readreg(p, getsupreg(ref^.base));
  1462. if ref^.index <> NR_NO then
  1463. readreg(p, getsupreg(ref^.index));
  1464. end;
  1465. procedure ReadOp(p: ptaiprop;const o:toper);
  1466. begin
  1467. case o.typ Of
  1468. top_reg: readreg(p, getsupreg(o.reg));
  1469. top_ref: readref(p, o.ref);
  1470. end;
  1471. end;
  1472. function RefInInstruction(const ref: TReference; p: tai;
  1473. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1474. {checks whehter ref is used in p}
  1475. var
  1476. mysize: tcgsize;
  1477. TmpResult: Boolean;
  1478. begin
  1479. TmpResult := False;
  1480. if (p.typ = ait_instruction) then
  1481. begin
  1482. mysize := topsize2tcgsize[taicpu(p).opsize];
  1483. if (taicpu(p).ops >= 1) and
  1484. (taicpu(p).oper[0]^.typ = top_ref) then
  1485. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1486. if not(TmpResult) and
  1487. (taicpu(p).ops >= 2) and
  1488. (taicpu(p).oper[1]^.typ = top_ref) then
  1489. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1490. if not(TmpResult) and
  1491. (taicpu(p).ops >= 3) and
  1492. (taicpu(p).oper[2]^.typ = top_ref) then
  1493. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1494. end;
  1495. RefInInstruction := TmpResult;
  1496. end;
  1497. function RefInSequence(const ref: TReference; Content: TContent;
  1498. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1499. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1500. tai objects) to see whether ref is used somewhere}
  1501. var p: tai;
  1502. Counter: Word;
  1503. TmpResult: Boolean;
  1504. begin
  1505. p := Content.StartMod;
  1506. TmpResult := False;
  1507. Counter := 1;
  1508. while not(TmpResult) and
  1509. (Counter <= Content.NrOfMods) Do
  1510. begin
  1511. if (p.typ = ait_instruction) and
  1512. RefInInstruction(ref, p, RefsEq, size)
  1513. then TmpResult := True;
  1514. inc(Counter);
  1515. GetNextInstruction(p,p)
  1516. end;
  1517. RefInSequence := TmpResult
  1518. end;
  1519. {$ifdef q+}
  1520. {$q-}
  1521. {$define overflowon}
  1522. {$endif q+}
  1523. // checks whether a write to r2 of size "size" contains address r1
  1524. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1525. var
  1526. realsize1, realsize2: aint;
  1527. begin
  1528. realsize1 := tcgsize2size[size1];
  1529. realsize2 := tcgsize2size[size2];
  1530. arrayrefsoverlapping :=
  1531. (r2.offset <= r1.offset+realsize1) and
  1532. (r1.offset <= r2.offset+realsize2) and
  1533. (r1.segment = r2.segment) and
  1534. (r1.symbol=r2.symbol) and
  1535. (r1.base = r2.base)
  1536. end;
  1537. {$ifdef overflowon}
  1538. {$q+}
  1539. {$undef overflowon}
  1540. {$endif overflowon}
  1541. function isSimpleRef(const ref: treference): boolean;
  1542. { returns true if ref is reference to a local or global variable, to a }
  1543. { parameter or to an object field (this includes arrays). Returns false }
  1544. { otherwise. }
  1545. begin
  1546. isSimpleRef :=
  1547. assigned(ref.symbol) or
  1548. (ref.base = current_procinfo.framepointer);
  1549. end;
  1550. function containsPointerRef(p: tai): boolean;
  1551. { checks if an instruction contains a reference which is a pointer location }
  1552. var
  1553. hp: taicpu;
  1554. count: longint;
  1555. begin
  1556. containsPointerRef := false;
  1557. if p.typ <> ait_instruction then
  1558. exit;
  1559. hp := taicpu(p);
  1560. for count := 0 to hp.ops-1 do
  1561. begin
  1562. case hp.oper[count]^.typ of
  1563. top_ref:
  1564. if not isSimpleRef(hp.oper[count]^.ref^) then
  1565. begin
  1566. containsPointerRef := true;
  1567. exit;
  1568. end;
  1569. top_none:
  1570. exit;
  1571. end;
  1572. end;
  1573. end;
  1574. function containsPointerLoad(c: tcontent): boolean;
  1575. { checks whether the contents of a register contain a pointer reference }
  1576. var
  1577. p: tai;
  1578. count: longint;
  1579. begin
  1580. containsPointerLoad := false;
  1581. p := c.startmod;
  1582. for count := c.nrOfMods downto 1 do
  1583. begin
  1584. if containsPointerRef(p) then
  1585. begin
  1586. containsPointerLoad := true;
  1587. exit;
  1588. end;
  1589. getnextinstruction(p,p);
  1590. end;
  1591. end;
  1592. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1593. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1594. { returns whether the contents c of reg are invalid after regWritten is }
  1595. { is written to ref }
  1596. var
  1597. refsEq: trefCompare;
  1598. begin
  1599. if isSimpleRef(ref) then
  1600. begin
  1601. if (ref.index <> NR_NO) or
  1602. (assigned(ref.symbol) and
  1603. (ref.base <> NR_NO)) then
  1604. { local/global variable or parameter which is an array }
  1605. refsEq := {$ifdef fpc}@{$endif}arrayRefsOverlapping
  1606. else
  1607. { local/global variable or parameter which is not an array }
  1608. refsEq := {$ifdef fpc}@{$endif}refsOverlapping;
  1609. invalsmemwrite :=
  1610. assigned(c.memwrite) and
  1611. ((not(cs_uncertainOpts in aktglobalswitches) and
  1612. containsPointerRef(c.memwrite)) or
  1613. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1614. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1615. begin
  1616. writeToMemDestroysContents := false;
  1617. exit;
  1618. end;
  1619. { write something to a parameter, a local or global variable, so }
  1620. { * with uncertain optimizations on: }
  1621. { - destroy the contents of registers whose contents have somewhere a }
  1622. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1623. { are being written to memory) is not destroyed if it's StartMod is }
  1624. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1625. { expression based on ref) }
  1626. { * with uncertain optimizations off: }
  1627. { - also destroy registers that contain any pointer }
  1628. with c do
  1629. writeToMemDestroysContents :=
  1630. (typ in [con_ref,con_noRemoveRef]) and
  1631. ((not(cs_uncertainOpts in aktglobalswitches) and
  1632. containsPointerLoad(c)
  1633. ) or
  1634. (refInSequence(ref,c,refsEq,size) and
  1635. ((supreg <> regWritten) or
  1636. not((nrOfMods = 1) and
  1637. {StarMod is always of the type ait_instruction}
  1638. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1639. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1640. )
  1641. )
  1642. )
  1643. );
  1644. end
  1645. else
  1646. { write something to a pointer location, so }
  1647. { * with uncertain optimzations on: }
  1648. { - do not destroy registers which contain a local/global variable or }
  1649. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1650. { * with uncertain optimzations off: }
  1651. { - destroy every register which contains a memory location }
  1652. begin
  1653. invalsmemwrite :=
  1654. assigned(c.memwrite) and
  1655. (not(cs_UncertainOpts in aktglobalswitches) or
  1656. containsPointerRef(c.memwrite));
  1657. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1658. begin
  1659. writeToMemDestroysContents := false;
  1660. exit;
  1661. end;
  1662. with c do
  1663. writeToMemDestroysContents :=
  1664. (typ in [con_ref,con_noRemoveRef]) and
  1665. (not(cs_UncertainOpts in aktglobalswitches) or
  1666. { for movsl }
  1667. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1668. { don't destroy if reg contains a parameter, local or global variable }
  1669. containsPointerLoad(c)
  1670. );
  1671. end;
  1672. end;
  1673. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1674. const c: tcontent): boolean;
  1675. { returns whether the contents c of reg are invalid after destReg is }
  1676. { modified }
  1677. begin
  1678. writeToRegDestroysContents :=
  1679. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1680. sequenceDependsOnReg(c,supreg,destReg);
  1681. end;
  1682. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1683. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1684. { returns whether the contents c of reg are invalid after regWritten is }
  1685. { is written to op }
  1686. begin
  1687. memwritedestroyed := false;
  1688. case op.typ of
  1689. top_reg:
  1690. writeDestroysContents :=
  1691. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1692. top_ref:
  1693. writeDestroysContents :=
  1694. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1695. else
  1696. writeDestroysContents := false;
  1697. end;
  1698. end;
  1699. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1700. { destroys all registers which possibly contain a reference to ref, regWritten }
  1701. { is the register whose contents are being written to memory (if this proc }
  1702. { is called because of a "mov?? %reg, (mem)" instruction) }
  1703. var
  1704. counter: tsuperregister;
  1705. destroymemwrite: boolean;
  1706. begin
  1707. for counter := RS_EAX to RS_EDI Do
  1708. begin
  1709. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1710. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1711. destroyReg(ptaiprop(p.optInfo), counter, false)
  1712. else if destroymemwrite then
  1713. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1714. end;
  1715. end;
  1716. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1717. var Counter: tsuperregister;
  1718. begin {initializes/desrtoys all registers}
  1719. For Counter := RS_EAX To RS_EDI Do
  1720. begin
  1721. if read then
  1722. readreg(p, Counter);
  1723. DestroyReg(p, Counter, written);
  1724. p^.regs[counter].MemWrite := nil;
  1725. end;
  1726. p^.DirFlag := F_Unknown;
  1727. end;
  1728. procedure DestroyOp(taiObj: tai; const o:Toper);
  1729. {$ifdef statedebug}
  1730. var
  1731. hp: tai;
  1732. {$endif statedebug}
  1733. begin
  1734. case o.typ Of
  1735. top_reg:
  1736. begin
  1737. {$ifdef statedebug}
  1738. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1739. hp.next := taiobj.next;
  1740. hp.previous := taiobj;
  1741. taiobj.next := hp;
  1742. if assigned(hp.next) then
  1743. hp.next.previous := hp;
  1744. {$endif statedebug}
  1745. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1746. end;
  1747. top_ref:
  1748. begin
  1749. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1750. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1751. end;
  1752. end;
  1753. end;
  1754. procedure AddInstr2RegContents({$ifdef statedebug} asml: taasmoutput; {$endif}
  1755. p: taicpu; supreg: tsuperregister);
  1756. {$ifdef statedebug}
  1757. var
  1758. hp: tai;
  1759. {$endif statedebug}
  1760. begin
  1761. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1762. if (typ in [con_ref,con_noRemoveRef]) then
  1763. begin
  1764. incState(wstate,1);
  1765. { also store how many instructions are part of the sequence in the first }
  1766. { instructions ptaiprop, so it can be easily accessed from within }
  1767. { CheckSequence}
  1768. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1769. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1770. NrOfInstrSinceLastMod[supreg] := 0;
  1771. invalidateDependingRegs(p.optinfo,supreg);
  1772. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1773. {$ifdef StateDebug}
  1774. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1775. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1776. InsertLLItem(AsmL, p, p.next, hp);
  1777. {$endif StateDebug}
  1778. end
  1779. else
  1780. begin
  1781. {$ifdef statedebug}
  1782. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1783. insertllitem(asml,p,p.next,hp);
  1784. {$endif statedebug}
  1785. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1786. {$ifdef StateDebug}
  1787. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1788. InsertLLItem(AsmL, p, p.next, hp);
  1789. {$endif StateDebug}
  1790. end
  1791. end;
  1792. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAAsmoutput; {$endif}
  1793. p: taicpu; const oper: TOper);
  1794. begin
  1795. if oper.typ = top_reg then
  1796. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1797. else
  1798. begin
  1799. ReadOp(ptaiprop(p.optinfo), oper);
  1800. DestroyOp(p, oper);
  1801. end
  1802. end;
  1803. {*************************************************************************************}
  1804. {************************************** TDFAOBJ **************************************}
  1805. {*************************************************************************************}
  1806. constructor tdfaobj.create(_list: taasmoutput);
  1807. begin
  1808. list := _list;
  1809. blockstart := nil;
  1810. blockend := nil;
  1811. nroftaiobjs := 0;
  1812. taipropblock := nil;
  1813. lolab := 0;
  1814. hilab := 0;
  1815. labdif := 0;
  1816. labeltable := nil;
  1817. end;
  1818. procedure tdfaobj.initlabeltable;
  1819. var
  1820. labelfound: boolean;
  1821. p, prev: tai;
  1822. hp1, hp2: tai;
  1823. {$ifdef i386}
  1824. regcounter,
  1825. supreg : tsuperregister;
  1826. {$endif i386}
  1827. usedregs, nodeallocregs: tregset;
  1828. begin
  1829. labelfound := false;
  1830. lolab := maxlongint;
  1831. hilab := 0;
  1832. p := blockstart;
  1833. prev := p;
  1834. while assigned(p) do
  1835. begin
  1836. if (tai(p).typ = ait_label) then
  1837. if not labelcanbeskipped(tai_label(p)) then
  1838. begin
  1839. labelfound := true;
  1840. if (tai_Label(p).l.labelnr < lolab) then
  1841. lolab := tai_label(p).l.labelnr;
  1842. if (tai_Label(p).l.labelnr > hilab) then
  1843. hilab := tai_label(p).l.labelnr;
  1844. end;
  1845. prev := p;
  1846. getnextinstruction(p, p);
  1847. end;
  1848. if (prev.typ = ait_marker) and
  1849. (tai_marker(prev).kind = asmblockstart) then
  1850. blockend := prev
  1851. else blockend := nil;
  1852. if labelfound then
  1853. labdif := hilab+1-lolab
  1854. else labdif := 0;
  1855. usedregs := [];
  1856. if (labdif <> 0) then
  1857. begin
  1858. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1859. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1860. end;
  1861. p := blockstart;
  1862. prev := p;
  1863. while (p <> blockend) do
  1864. begin
  1865. case p.typ of
  1866. ait_label:
  1867. if not labelcanbeskipped(tai_label(p)) then
  1868. labeltable^[tai_label(p).l.labelnr-lolab].taiobj := p;
  1869. {$ifdef i386}
  1870. ait_regalloc:
  1871. begin
  1872. supreg:=getsupreg(tai_regalloc(p).reg);
  1873. case tai_regalloc(p).ratype of
  1874. ra_alloc :
  1875. begin
  1876. if not(supreg in usedregs) then
  1877. include(usedregs, supreg)
  1878. else
  1879. begin
  1880. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1881. hp1 := tai(p.previous);
  1882. list.remove(p);
  1883. p.free;
  1884. p := hp1;
  1885. end;
  1886. end;
  1887. ra_dealloc :
  1888. begin
  1889. exclude(usedregs, supreg);
  1890. hp1 := p;
  1891. hp2 := nil;
  1892. while not(findregalloc(getsupreg(tai_regalloc(p).reg), tai(hp1.next),ra_alloc)) and
  1893. getnextinstruction(hp1, hp1) and
  1894. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1895. hp2 := hp1;
  1896. if hp2 <> nil then
  1897. begin
  1898. hp1 := tai(p.previous);
  1899. list.remove(p);
  1900. insertllitem(list, hp2, tai(hp2.next), p);
  1901. p := hp1;
  1902. end
  1903. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1904. and getnextinstruction(p,hp1) then
  1905. begin
  1906. hp1 := tai(p.previous);
  1907. list.remove(p);
  1908. p.free;
  1909. p := hp1;
  1910. include(usedregs,supreg);
  1911. end;
  1912. end;
  1913. end;
  1914. end;
  1915. {$endif i386}
  1916. end;
  1917. repeat
  1918. prev := p;
  1919. p := tai(p.next);
  1920. until not(assigned(p)) or
  1921. (p = blockend) or
  1922. not(p.typ in (skipinstr - [ait_regalloc]));
  1923. end;
  1924. {$ifdef i386}
  1925. { don't add deallocation for function result variable or for regvars}
  1926. getNoDeallocRegs(noDeallocRegs);
  1927. usedRegs := usedRegs - noDeallocRegs;
  1928. for regCounter := RS_EAX to RS_EDI do
  1929. if regCounter in usedRegs then
  1930. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1931. {$endif i386}
  1932. end;
  1933. function tdfaobj.pass_1(_blockstart: tai): tai;
  1934. begin
  1935. blockstart := _blockstart;
  1936. initlabeltable;
  1937. pass_1 := blockend;
  1938. end;
  1939. function tdfaobj.initdfapass2: boolean;
  1940. {reserves memory for the PtaiProps in one big memory block when not using
  1941. TP, returns False if not enough memory is available for the optimizer in all
  1942. cases}
  1943. var
  1944. p: tai;
  1945. count: Longint;
  1946. { TmpStr: String; }
  1947. begin
  1948. p := blockstart;
  1949. skiphead(p);
  1950. nroftaiobjs := 0;
  1951. while (p <> blockend) do
  1952. begin
  1953. {$ifDef JumpAnal}
  1954. case p.typ of
  1955. ait_label:
  1956. begin
  1957. if not labelcanbeskipped(tai_label(p)) then
  1958. labeltable^[tai_label(p).l.labelnr-lolab].instrnr := nroftaiobjs
  1959. end;
  1960. ait_instruction:
  1961. begin
  1962. if taicpu(p).is_jmp then
  1963. begin
  1964. if (tasmlabel(taicpu(p).oper[0]^.sym).labelnr >= lolab) and
  1965. (tasmlabel(taicpu(p).oper[0]^.sym).labelnr <= hilab) then
  1966. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-lolab].refsfound);
  1967. end;
  1968. end;
  1969. { ait_instruction:
  1970. begin
  1971. if (taicpu(p).opcode = A_PUSH) and
  1972. (taicpu(p).oper[0]^.typ = top_symbol) and
  1973. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1974. begin
  1975. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  1976. if}
  1977. end;
  1978. {$endif JumpAnal}
  1979. inc(NrOftaiObjs);
  1980. getnextinstruction(p,p);
  1981. end;
  1982. if nroftaiobjs <> 0 then
  1983. begin
  1984. initdfapass2 := True;
  1985. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  1986. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  1987. p := blockstart;
  1988. skiphead(p);
  1989. for count := 1 To nroftaiobjs do
  1990. begin
  1991. ptaiprop(p.optinfo) := @taipropblock^[count];
  1992. getnextinstruction(p, p);
  1993. end;
  1994. end
  1995. else
  1996. initdfapass2 := false;
  1997. end;
  1998. procedure tdfaobj.dodfapass2;
  1999. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2000. contents for the instructions starting with p. Returns the last tai which has
  2001. been processed}
  2002. var
  2003. curprop, LastFlagsChangeProp: ptaiprop;
  2004. Cnt, InstrCnt : Longint;
  2005. InstrProp: TInsProp;
  2006. UsedRegs: TRegSet;
  2007. prev,p : tai;
  2008. tmpref: TReference;
  2009. tmpsupreg: tsuperregister;
  2010. {$ifdef statedebug}
  2011. hp : tai;
  2012. {$endif}
  2013. {$ifdef AnalyzeLoops}
  2014. hp : tai;
  2015. TmpState: Byte;
  2016. {$endif AnalyzeLoops}
  2017. begin
  2018. p := BlockStart;
  2019. LastFlagsChangeProp := nil;
  2020. prev := nil;
  2021. UsedRegs := [];
  2022. UpdateUsedregs(UsedRegs, p);
  2023. SkipHead(p);
  2024. BlockStart := p;
  2025. InstrCnt := 1;
  2026. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2027. while (p <> Blockend) Do
  2028. begin
  2029. curprop := @taiPropBlock^[InstrCnt];
  2030. if assigned(prev)
  2031. then
  2032. begin
  2033. {$ifdef JumpAnal}
  2034. if (p.Typ <> ait_label) then
  2035. {$endif JumpAnal}
  2036. begin
  2037. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2038. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2039. curprop^.FlagsUsed := false;
  2040. end
  2041. end
  2042. else
  2043. begin
  2044. fillchar(curprop^, SizeOf(curprop^), 0);
  2045. { For tmpreg := RS_EAX to RS_EDI Do
  2046. curprop^.regs[tmpreg].WState := 1;}
  2047. end;
  2048. curprop^.UsedRegs := UsedRegs;
  2049. curprop^.CanBeRemoved := False;
  2050. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2051. For tmpsupreg := RS_EAX To RS_EDI Do
  2052. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2053. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2054. else
  2055. begin
  2056. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2057. curprop^.regs[tmpsupreg].typ := con_unknown;
  2058. end;
  2059. case p.typ Of
  2060. ait_marker:;
  2061. ait_label:
  2062. {$ifndef JumpAnal}
  2063. if not labelCanBeSkipped(tai_label(p)) then
  2064. DestroyAllRegs(curprop,false,false);
  2065. {$else JumpAnal}
  2066. begin
  2067. if not labelCanBeSkipped(tai_label(p)) then
  2068. With LTable^[tai_Label(p).l^.labelnr-LoLab] Do
  2069. {$ifDef AnalyzeLoops}
  2070. if (RefsFound = tai_Label(p).l^.RefCount)
  2071. {$else AnalyzeLoops}
  2072. if (JmpsProcessed = tai_Label(p).l^.RefCount)
  2073. {$endif AnalyzeLoops}
  2074. then
  2075. {all jumps to this label have been found}
  2076. {$ifDef AnalyzeLoops}
  2077. if (JmpsProcessed > 0)
  2078. then
  2079. {$endif AnalyzeLoops}
  2080. {we've processed at least one jump to this label}
  2081. begin
  2082. if (GetLastInstruction(p, hp) and
  2083. not(((hp.typ = ait_instruction)) and
  2084. (taicpu_labeled(hp).is_jmp))
  2085. then
  2086. {previous instruction not a JMP -> the contents of the registers after the
  2087. previous intruction has been executed have to be taken into account as well}
  2088. For tmpsupreg := RS_EAX to RS_EDI Do
  2089. begin
  2090. if (curprop^.regs[tmpsupreg].WState <>
  2091. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2092. then DestroyReg(curprop, tmpsupreg, true)
  2093. end
  2094. end
  2095. {$ifDef AnalyzeLoops}
  2096. else
  2097. {a label from a backward jump (e.g. a loop), no jump to this label has
  2098. already been processed}
  2099. if GetLastInstruction(p, hp) and
  2100. not(hp.typ = ait_instruction) and
  2101. (taicpu_labeled(hp).opcode = A_JMP))
  2102. then
  2103. {previous instruction not a jmp, so keep all the registers' contents from the
  2104. previous instruction}
  2105. begin
  2106. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2107. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2108. end
  2109. else
  2110. {previous instruction a jmp and no jump to this label processed yet}
  2111. begin
  2112. hp := p;
  2113. Cnt := InstrCnt;
  2114. {continue until we find a jump to the label or a label which has already
  2115. been processed}
  2116. while GetNextInstruction(hp, hp) and
  2117. not((hp.typ = ait_instruction) and
  2118. (taicpu(hp).is_jmp) and
  2119. (tasmlabel(taicpu(hp).oper[0]^.sym).labelnr = tai_Label(p).l^.labelnr)) and
  2120. not((hp.typ = ait_label) and
  2121. (LTable^[tai_Label(hp).l^.labelnr-LoLab].RefsFound
  2122. = tai_Label(hp).l^.RefCount) and
  2123. (LTable^[tai_Label(hp).l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2124. inc(Cnt);
  2125. if (hp.typ = ait_label)
  2126. then
  2127. {there's a processed label after the current one}
  2128. begin
  2129. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2130. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2131. end
  2132. else
  2133. {there's no label anymore after the current one, or they haven't been
  2134. processed yet}
  2135. begin
  2136. GetLastInstruction(p, hp);
  2137. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2138. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2139. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2140. end
  2141. end
  2142. {$endif AnalyzeLoops}
  2143. else
  2144. {not all references to this label have been found, so destroy all registers}
  2145. begin
  2146. GetLastInstruction(p, hp);
  2147. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2148. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2149. DestroyAllRegs(curprop,true,true)
  2150. end;
  2151. end;
  2152. {$endif JumpAnal}
  2153. {$ifdef GDB}
  2154. ait_stabs, ait_stabn, ait_stab_function_name:;
  2155. {$endif GDB}
  2156. ait_align: ; { may destroy flags !!! }
  2157. ait_instruction:
  2158. begin
  2159. if taicpu(p).is_jmp or
  2160. (taicpu(p).opcode = A_JMP) then
  2161. begin
  2162. {$ifNDef JumpAnal}
  2163. for tmpsupreg := RS_EAX to RS_EDI do
  2164. with curprop^.regs[tmpsupreg] do
  2165. case typ of
  2166. con_ref: typ := con_noRemoveRef;
  2167. con_const: typ := con_noRemoveConst;
  2168. con_invalid: typ := con_unknown;
  2169. end;
  2170. {$else JumpAnal}
  2171. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-LoLab] Do
  2172. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2173. begin
  2174. if (InstrCnt < InstrNr)
  2175. then
  2176. {forward jump}
  2177. if (JmpsProcessed = 0) then
  2178. {no jump to this label has been processed yet}
  2179. begin
  2180. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2181. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2182. inc(JmpsProcessed);
  2183. end
  2184. else
  2185. begin
  2186. For tmpreg := RS_EAX to RS_EDI Do
  2187. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2188. curprop^.regs[tmpreg].WState) then
  2189. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2190. inc(JmpsProcessed);
  2191. end
  2192. {$ifdef AnalyzeLoops}
  2193. else
  2194. { backward jump, a loop for example}
  2195. { if (JmpsProcessed > 0) or
  2196. not(GetLastInstruction(taiObj, hp) and
  2197. (hp.typ = ait_labeled_instruction) and
  2198. (taicpu_labeled(hp).opcode = A_JMP))
  2199. then}
  2200. {instruction prior to label is not a jmp, or at least one jump to the label
  2201. has yet been processed}
  2202. begin
  2203. inc(JmpsProcessed);
  2204. For tmpreg := RS_EAX to RS_EDI Do
  2205. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2206. curprop^.regs[tmpreg].WState)
  2207. then
  2208. begin
  2209. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2210. Cnt := InstrNr;
  2211. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2212. begin
  2213. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2214. inc(Cnt);
  2215. end;
  2216. while (Cnt <= InstrCnt) Do
  2217. begin
  2218. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2219. inc(Cnt)
  2220. end
  2221. end;
  2222. end
  2223. { else }
  2224. {instruction prior to label is a jmp and no jumps to the label have yet been
  2225. processed}
  2226. { begin
  2227. inc(JmpsProcessed);
  2228. For tmpreg := RS_EAX to RS_EDI Do
  2229. begin
  2230. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2231. Cnt := InstrNr;
  2232. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2233. begin
  2234. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2235. inc(Cnt);
  2236. end;
  2237. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2238. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2239. begin
  2240. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2241. inc(Cnt);
  2242. end;
  2243. while (Cnt <= InstrCnt) Do
  2244. begin
  2245. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2246. inc(Cnt)
  2247. end
  2248. end
  2249. end}
  2250. {$endif AnalyzeLoops}
  2251. end;
  2252. {$endif JumpAnal}
  2253. end
  2254. else
  2255. begin
  2256. InstrProp := InsProp[taicpu(p).opcode];
  2257. case taicpu(p).opcode Of
  2258. A_MOV, A_MOVZX, A_MOVSX:
  2259. begin
  2260. case taicpu(p).oper[0]^.typ Of
  2261. top_ref, top_reg:
  2262. case taicpu(p).oper[1]^.typ Of
  2263. top_reg:
  2264. begin
  2265. {$ifdef statedebug}
  2266. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2267. insertllitem(list,p,p.next,hp);
  2268. {$endif statedebug}
  2269. readOp(curprop, taicpu(p).oper[0]^);
  2270. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2271. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2272. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2273. begin
  2274. with curprop^.regs[tmpsupreg] Do
  2275. begin
  2276. incState(wstate,1);
  2277. { also store how many instructions are part of the sequence in the first }
  2278. { instruction's ptaiprop, so it can be easily accessed from within }
  2279. { CheckSequence }
  2280. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2281. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2282. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2283. { Destroy the contents of the registers }
  2284. { that depended on the previous value of }
  2285. { this register }
  2286. invalidateDependingRegs(curprop,tmpsupreg);
  2287. curprop^.regs[tmpsupreg].memwrite := nil;
  2288. end;
  2289. end
  2290. else
  2291. begin
  2292. {$ifdef statedebug}
  2293. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2294. insertllitem(list,p,p.next,hp);
  2295. {$endif statedebug}
  2296. destroyReg(curprop, tmpsupreg, true);
  2297. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2298. with curprop^.regs[tmpsupreg] Do
  2299. begin
  2300. typ := con_ref;
  2301. startmod := p;
  2302. nrOfMods := 1;
  2303. end
  2304. end;
  2305. {$ifdef StateDebug}
  2306. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2307. insertllitem(list,p,p.next,hp);
  2308. {$endif StateDebug}
  2309. end;
  2310. top_ref:
  2311. begin
  2312. readref(curprop, taicpu(p).oper[1]^.ref);
  2313. if taicpu(p).oper[0]^.typ = top_reg then
  2314. begin
  2315. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2316. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2317. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2318. taicpu(p);
  2319. end
  2320. else
  2321. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2322. end;
  2323. end;
  2324. top_Const:
  2325. begin
  2326. case taicpu(p).oper[1]^.typ Of
  2327. top_reg:
  2328. begin
  2329. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2330. {$ifdef statedebug}
  2331. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2332. insertllitem(list,p,p.next,hp);
  2333. {$endif statedebug}
  2334. With curprop^.regs[tmpsupreg] Do
  2335. begin
  2336. DestroyReg(curprop, tmpsupreg, true);
  2337. typ := Con_Const;
  2338. StartMod := p;
  2339. end
  2340. end;
  2341. top_ref:
  2342. begin
  2343. readref(curprop, taicpu(p).oper[1]^.ref);
  2344. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2345. end;
  2346. end;
  2347. end;
  2348. end;
  2349. end;
  2350. A_DIV, A_IDIV, A_MUL:
  2351. begin
  2352. ReadOp(curprop, taicpu(p).oper[0]^);
  2353. readreg(curprop,RS_EAX);
  2354. if (taicpu(p).OpCode = A_IDIV) or
  2355. (taicpu(p).OpCode = A_DIV) then
  2356. begin
  2357. readreg(curprop,RS_EDX);
  2358. end;
  2359. {$ifdef statedebug}
  2360. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2361. insertllitem(list,p,p.next,hp);
  2362. {$endif statedebug}
  2363. { DestroyReg(curprop, RS_EAX, true);}
  2364. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2365. taicpu(p), RS_EAX);
  2366. DestroyReg(curprop, RS_EDX, true);
  2367. LastFlagsChangeProp := curprop;
  2368. end;
  2369. A_IMUL:
  2370. begin
  2371. ReadOp(curprop,taicpu(p).oper[0]^);
  2372. if (taicpu(p).ops >= 2) then
  2373. ReadOp(curprop,taicpu(p).oper[1]^);
  2374. if (taicpu(p).ops <= 2) then
  2375. if (taicpu(p).oper[1]^.typ = top_none) then
  2376. begin
  2377. readreg(curprop,RS_EAX);
  2378. {$ifdef statedebug}
  2379. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2380. insertllitem(list,p,p.next,hp);
  2381. {$endif statedebug}
  2382. { DestroyReg(curprop, RS_EAX, true); }
  2383. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2384. taicpu(p), RS_EAX);
  2385. DestroyReg(curprop,RS_EDX, true)
  2386. end
  2387. else
  2388. AddInstr2OpContents(
  2389. {$ifdef statedebug}list,{$endif}
  2390. taicpu(p), taicpu(p).oper[1]^)
  2391. else
  2392. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2393. taicpu(p), taicpu(p).oper[2]^);
  2394. LastFlagsChangeProp := curprop;
  2395. end;
  2396. A_LEA:
  2397. begin
  2398. readop(curprop,taicpu(p).oper[0]^);
  2399. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2400. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2401. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2402. else
  2403. begin
  2404. {$ifdef statedebug}
  2405. hp := tai_comment.Create(strpnew('destroying & initing'+
  2406. std_regname(taicpu(p).oper[1]^.reg)));
  2407. insertllitem(list,p,p.next,hp);
  2408. {$endif statedebug}
  2409. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2410. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2411. begin
  2412. typ := con_ref;
  2413. startmod := p;
  2414. nrOfMods := 1;
  2415. end
  2416. end;
  2417. end;
  2418. else
  2419. begin
  2420. Cnt := 1;
  2421. while (Cnt <= maxinschanges) and
  2422. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2423. begin
  2424. case InstrProp.Ch[Cnt] Of
  2425. Ch_REAX..Ch_REDI:
  2426. begin
  2427. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2428. readreg(curprop,tmpsupreg);
  2429. end;
  2430. Ch_WEAX..Ch_RWEDI:
  2431. begin
  2432. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2433. begin
  2434. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2435. readreg(curprop,tmpsupreg);
  2436. end;
  2437. {$ifdef statedebug}
  2438. hp := tai_comment.Create(strpnew('destroying '+
  2439. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2440. insertllitem(list,p,p.next,hp);
  2441. {$endif statedebug}
  2442. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2443. DestroyReg(curprop,tmpsupreg, true);
  2444. end;
  2445. Ch_MEAX..Ch_MEDI:
  2446. begin
  2447. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2448. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2449. taicpu(p),tmpsupreg);
  2450. end;
  2451. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2452. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2453. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2454. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2455. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2456. Ch_Wop1..Ch_RWop1:
  2457. begin
  2458. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2459. ReadOp(curprop, taicpu(p).oper[0]^);
  2460. DestroyOp(p, taicpu(p).oper[0]^);
  2461. end;
  2462. Ch_Mop1:
  2463. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2464. taicpu(p), taicpu(p).oper[0]^);
  2465. Ch_Wop2..Ch_RWop2:
  2466. begin
  2467. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2468. ReadOp(curprop, taicpu(p).oper[1]^);
  2469. DestroyOp(p, taicpu(p).oper[1]^);
  2470. end;
  2471. Ch_Mop2:
  2472. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2473. taicpu(p), taicpu(p).oper[1]^);
  2474. Ch_WOp3..Ch_RWOp3:
  2475. begin
  2476. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2477. ReadOp(curprop, taicpu(p).oper[2]^);
  2478. DestroyOp(p, taicpu(p).oper[2]^);
  2479. end;
  2480. Ch_Mop3:
  2481. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2482. taicpu(p), taicpu(p).oper[2]^);
  2483. Ch_WMemEDI:
  2484. begin
  2485. readreg(curprop, RS_EDI);
  2486. fillchar(tmpref, SizeOf(tmpref), 0);
  2487. tmpref.base := NR_EDI;
  2488. tmpref.index := NR_EDI;
  2489. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2490. end;
  2491. Ch_RFlags:
  2492. if assigned(LastFlagsChangeProp) then
  2493. LastFlagsChangeProp^.FlagsUsed := true;
  2494. Ch_WFlags:
  2495. LastFlagsChangeProp := curprop;
  2496. Ch_RWFlags:
  2497. begin
  2498. if assigned(LastFlagsChangeProp) then
  2499. LastFlagsChangeProp^.FlagsUsed := true;
  2500. LastFlagsChangeProp := curprop;
  2501. end;
  2502. Ch_FPU:;
  2503. else
  2504. begin
  2505. {$ifdef statedebug}
  2506. hp := tai_comment.Create(strpnew(
  2507. 'destroying all regs for prev instruction'));
  2508. insertllitem(list,p, p.next,hp);
  2509. {$endif statedebug}
  2510. DestroyAllRegs(curprop,true,true);
  2511. LastFlagsChangeProp := curprop;
  2512. end;
  2513. end;
  2514. inc(Cnt);
  2515. end
  2516. end;
  2517. end;
  2518. end;
  2519. end
  2520. else
  2521. begin
  2522. {$ifdef statedebug}
  2523. hp := tai_comment.Create(strpnew(
  2524. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2525. insertllitem(list,p, p.next,hp);
  2526. {$endif statedebug}
  2527. DestroyAllRegs(curprop,true,true);
  2528. end;
  2529. end;
  2530. inc(InstrCnt);
  2531. prev := p;
  2532. GetNextInstruction(p, p);
  2533. end;
  2534. end;
  2535. function tdfaobj.pass_2: boolean;
  2536. begin
  2537. if initdfapass2 then
  2538. begin
  2539. dodfapass2;
  2540. pass_2 := true
  2541. end
  2542. else
  2543. pass_2 := false;
  2544. end;
  2545. {$ifopt r+}
  2546. {$define rangewason}
  2547. {$r-}
  2548. {$endif}
  2549. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2550. begin
  2551. if (sym.labelnr >= lolab) and
  2552. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2553. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2554. else
  2555. getlabelwithsym := nil;
  2556. end;
  2557. {$ifdef rangewason}
  2558. {$r+}
  2559. {$undef rangewason}
  2560. {$endif}
  2561. procedure tdfaobj.clear;
  2562. begin
  2563. if labdif <> 0 then
  2564. begin
  2565. freemem(labeltable);
  2566. labeltable := nil;
  2567. end;
  2568. if assigned(taipropblock) then
  2569. begin
  2570. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2571. taipropblock := nil;
  2572. end;
  2573. end;
  2574. end.