ncgmem.pas 49 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpuinfo,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgwithnode = class(twithnode)
  45. procedure pass_generate_code;override;
  46. end;
  47. tcgvecnode = class(tvecnode)
  48. function get_mul_size : aint;
  49. private
  50. procedure rangecheck_array;
  51. procedure rangecheck_string;
  52. protected
  53. {# This routine is used to calculate the address of the reference.
  54. On entry reg contains the index in the array,
  55. and l contains the size of each element in the array.
  56. This routine should update location.reference correctly,
  57. so it points to the correct address.
  58. }
  59. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  60. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  61. procedure update_reference_offset(var ref: treference; index, mulsize: aint); virtual;
  62. procedure second_wideansistring;virtual;
  63. procedure second_dynamicarray;virtual;
  64. public
  65. procedure pass_generate_code;override;
  66. end;
  67. implementation
  68. uses
  69. systems,
  70. cutils,cclasses,verbose,globals,constexp,
  71. symconst,symbase,symdef,symsym,symcpu,symtable,defutil,paramgr,
  72. aasmbase,aasmtai,aasmdata,
  73. procinfo,pass_2,parabase,
  74. pass_1,nld,ncon,nadd,ncnv,nutils,
  75. cgobj,hlcgobj,
  76. tgobj,ncgutil,objcgutl,
  77. defcmp
  78. ;
  79. {*****************************************************************************
  80. TCGLOADVMTADDRNODE
  81. *****************************************************************************}
  82. procedure tcgloadvmtaddrnode.pass_generate_code;
  83. var
  84. href : treference;
  85. pool : THashSet;
  86. entry : PHashSetItem;
  87. begin
  88. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  89. if (left.nodetype=typen) then
  90. begin
  91. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  92. if not is_objcclass(left.resultdef) then
  93. begin
  94. reference_reset_symbol(href,
  95. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  96. voidpointertype.size);
  97. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  98. end
  99. else
  100. begin
  101. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  102. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  103. if (target_info.system in systems_objc_nfabi) then
  104. begin
  105. { find/add necessary classref/classname pool entries }
  106. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  107. end
  108. else
  109. begin
  110. { find/add necessary classref/classname pool entries }
  111. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  112. end;
  113. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  114. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  115. end;
  116. end
  117. else
  118. begin
  119. { left contains self, load vmt from self }
  120. secondpass(left);
  121. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  122. end;
  123. end;
  124. {*****************************************************************************
  125. TCGLOADPARENTFPNODE
  126. *****************************************************************************}
  127. procedure tcgloadparentfpnode.pass_generate_code;
  128. var
  129. currpi : tprocinfo;
  130. hsym : tparavarsym;
  131. href : treference;
  132. begin
  133. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  134. begin
  135. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  136. location.register:=current_procinfo.framepointer;
  137. end
  138. else
  139. begin
  140. currpi:=current_procinfo;
  141. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  142. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  143. { load framepointer of current proc }
  144. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  145. if not assigned(hsym) then
  146. internalerror(200309281);
  147. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  148. { walk parents }
  149. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  150. begin
  151. currpi:=currpi.parent;
  152. if not assigned(currpi) then
  153. internalerror(200311201);
  154. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  155. if not assigned(hsym) then
  156. internalerror(200309282);
  157. if hsym.localloc.loc<>LOC_REFERENCE then
  158. internalerror(200309283);
  159. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  160. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  161. end;
  162. end;
  163. end;
  164. {*****************************************************************************
  165. TCGADDRNODE
  166. *****************************************************************************}
  167. procedure tcgaddrnode.pass_generate_code;
  168. begin
  169. secondpass(left);
  170. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  171. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  172. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  173. { on x86_64-win64, array of chars can be returned in registers, however,
  174. when passing these arrays to other functions, the compiler wants to take
  175. the address of the array so when the addrnode has been created internally,
  176. we have to force the data into memory, see also tw14388.pp
  177. }
  178. if nf_internal in flags then
  179. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  180. else
  181. internalerror(2006111510);
  182. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  183. end;
  184. {*****************************************************************************
  185. TCGDEREFNODE
  186. *****************************************************************************}
  187. procedure tcgderefnode.pass_generate_code;
  188. var
  189. paraloc1 : tcgpara;
  190. pd : tprocdef;
  191. sym : tsym;
  192. st : tsymtable;
  193. hp : pnode;
  194. hp2 : tnode;
  195. extraoffset : tcgint;
  196. begin
  197. sym:=nil;
  198. { assume natural alignment, except for packed records }
  199. if not(resultdef.typ in [recorddef,objectdef]) or
  200. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  201. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  202. else
  203. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  204. { can we fold an add/sub node into the offset of the deref node? }
  205. extraoffset:=0;
  206. hp:=actualtargetnode(@left);
  207. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  208. begin
  209. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  210. replacenode(hp^,taddnode(hp^).left);
  211. end
  212. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  213. begin
  214. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  215. replacenode(hp^,taddnode(hp^).left);
  216. end
  217. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  218. begin
  219. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  220. replacenode(hp^,taddnode(hp^).right);
  221. end;
  222. secondpass(left);
  223. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  224. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  225. case left.location.loc of
  226. LOC_CREGISTER,
  227. LOC_REGISTER:
  228. begin
  229. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  230. {$ifdef cpu_uses_separate_address_registers}
  231. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  232. begin
  233. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  234. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  235. location.reference.base);
  236. end
  237. else
  238. {$endif}
  239. location.reference.base := left.location.register;
  240. end;
  241. LOC_CREFERENCE,
  242. LOC_REFERENCE:
  243. begin
  244. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  245. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  246. end;
  247. LOC_CONSTANT:
  248. begin
  249. location.reference.offset:=left.location.value;
  250. end;
  251. else
  252. internalerror(200507031);
  253. end;
  254. location.reference.offset:=location.reference.offset+extraoffset;
  255. if (cs_use_heaptrc in current_settings.globalswitches) and
  256. (cs_checkpointer in current_settings.localswitches) and
  257. not(cs_compilesystem in current_settings.moduleswitches) and
  258. {$ifdef x86}
  259. (tcpupointerdef(left.resultdef).x86pointertyp = tcpupointerdefclass(cpointerdef).default_x86_data_pointer_type) and
  260. {$endif x86}
  261. not(nf_no_checkpointer in flags) and
  262. { can be NR_NO in case of LOC_CONSTANT }
  263. (location.reference.base<>NR_NO) then
  264. begin
  265. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  266. (sym.typ<>procsym) then
  267. internalerror(2012010601);
  268. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  269. paraloc1.init;
  270. paramanager.getintparaloc(pd,1,paraloc1);
  271. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,resultdef,location.reference.base,paraloc1);
  272. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  273. paraloc1.done;
  274. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  275. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  276. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  277. end;
  278. end;
  279. {*****************************************************************************
  280. TCGSUBSCRIPTNODE
  281. *****************************************************************************}
  282. function tcgsubscriptnode.handle_platform_subscript: boolean;
  283. begin
  284. result:=false;
  285. end;
  286. procedure tcgsubscriptnode.pass_generate_code;
  287. var
  288. asmsym: tasmsymbol;
  289. paraloc1 : tcgpara;
  290. tmpref: treference;
  291. sref: tsubsetreference;
  292. offsetcorrection : aint;
  293. pd : tprocdef;
  294. sym : tsym;
  295. st : tsymtable;
  296. begin
  297. sym:=nil;
  298. secondpass(left);
  299. if codegenerror then
  300. exit;
  301. paraloc1.init;
  302. { several object types must be dereferenced implicitly }
  303. if is_implicit_pointer_object_type(left.resultdef) then
  304. begin
  305. if (not is_managed_type(left.resultdef)) or
  306. (target_info.system in systems_garbage_collected_managed_types) then
  307. begin
  308. { the contents of a class are aligned to a sizeof(pointer) }
  309. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  310. case left.location.loc of
  311. LOC_CREGISTER,
  312. LOC_REGISTER:
  313. begin
  314. {$ifdef cpu_uses_separate_address_registers}
  315. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  316. begin
  317. location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
  318. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  319. left.location.register,location.reference.base);
  320. end
  321. else
  322. {$endif}
  323. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  324. end;
  325. LOC_CREFERENCE,
  326. LOC_REFERENCE,
  327. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  328. LOC_SUBSETREG,
  329. LOC_CSUBSETREG,
  330. LOC_SUBSETREF,
  331. LOC_CSUBSETREF:
  332. begin
  333. hlcg.reference_reset_base(location.reference,left.resultdef,
  334. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  335. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  336. end;
  337. LOC_CONSTANT:
  338. begin
  339. { can happen with @classtype(pointerconst).field }
  340. location.reference.offset:=left.location.value;
  341. end;
  342. else
  343. internalerror(2009092401);
  344. end;
  345. { implicit deferencing }
  346. if (cs_use_heaptrc in current_settings.globalswitches) and
  347. (cs_checkpointer in current_settings.localswitches) and
  348. not(cs_compilesystem in current_settings.moduleswitches) then
  349. begin
  350. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  351. (sym.typ<>procsym) then
  352. internalerror(2012010602);
  353. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  354. paramanager.getintparaloc(pd,1,paraloc1);
  355. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,resultdef,location.reference.base,paraloc1);
  356. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  357. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  358. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  359. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  360. end;
  361. end
  362. else
  363. { reference-counted implicit pointer object types don't have
  364. fields -> cannot be subscripted (calls are handled via call
  365. nodes) }
  366. internalerror(2011011901);
  367. end
  368. else
  369. begin
  370. location_copy(location,left.location);
  371. { some abi's require that functions return (some) records in }
  372. { registers }
  373. case location.loc of
  374. LOC_REFERENCE,
  375. LOC_CREFERENCE:
  376. ;
  377. LOC_CONSTANT,
  378. LOC_REGISTER,
  379. LOC_CREGISTER,
  380. { if a floating point value is casted into a record, it
  381. can happen that we get here an fpu or mm register }
  382. LOC_MMREGISTER,
  383. LOC_FPUREGISTER,
  384. LOC_CMMREGISTER,
  385. LOC_CFPUREGISTER:
  386. begin
  387. { in case the result is not something that can be put
  388. into an integer register (e.g.
  389. function_returning_record().non_regable_field, or
  390. a function returning a value > sizeof(intreg))
  391. -> force to memory
  392. }
  393. if not tstoreddef(left.resultdef).is_intregable or
  394. not tstoreddef(resultdef).is_intregable or
  395. { if the field spans multiple registers, we must force the record into
  396. memory as well }
  397. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  398. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  399. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  400. { actually, we should be able to "subscript" a constant, but this would require some code
  401. which enables dumping and reading constants from a temporary memory buffer. This
  402. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  403. }
  404. LOC_CONSTANT]) then
  405. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  406. else
  407. begin
  408. if (left.location.loc = LOC_REGISTER) then
  409. location.loc := LOC_SUBSETREG
  410. else
  411. location.loc := LOC_CSUBSETREG;
  412. location.size:=def_cgsize(resultdef);
  413. offsetcorrection:=0;
  414. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  415. begin
  416. if (vs.fieldoffset>=sizeof(aword)) then
  417. begin
  418. location.sreg.subsetreg := left.location.registerhi;
  419. offsetcorrection:=sizeof(aword)*8;
  420. end
  421. else
  422. location.sreg.subsetreg := left.location.register;
  423. location.sreg.subsetregsize := OS_INT;
  424. end
  425. else
  426. begin
  427. location.sreg.subsetreg := left.location.register;
  428. location.sreg.subsetregsize := left.location.size;
  429. end;
  430. if not is_packed_record_or_object(left.resultdef) then
  431. begin
  432. if (target_info.endian = ENDIAN_BIG) then
  433. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  434. else
  435. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  436. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  437. end
  438. else
  439. begin
  440. location.sreg.bitlen := resultdef.packedbitsize;
  441. if (target_info.endian = ENDIAN_BIG) then
  442. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  443. else
  444. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  445. end;
  446. end;
  447. end;
  448. LOC_SUBSETREG,
  449. LOC_CSUBSETREG:
  450. begin
  451. location.size:=def_cgsize(resultdef);
  452. if not is_packed_record_or_object(left.resultdef) then
  453. begin
  454. if (target_info.endian = ENDIAN_BIG) then
  455. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  456. else
  457. inc(location.sreg.startbit, vs.fieldoffset * 8);
  458. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  459. end
  460. else
  461. begin
  462. location.sreg.bitlen := resultdef.packedbitsize;
  463. if (target_info.endian = ENDIAN_BIG) then
  464. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  465. else
  466. inc(location.sreg.startbit, vs.fieldoffset);
  467. end;
  468. end;
  469. else
  470. internalerror(2006031901);
  471. end;
  472. end;
  473. if is_objc_class_or_protocol(left.resultdef) and
  474. (target_info.system in systems_objc_nfabi) then
  475. begin
  476. if (location.loc<>LOC_REFERENCE) or
  477. (location.reference.index<>NR_NO) then
  478. internalerror(2009092402);
  479. { the actual field offset is stored in memory (to solve the
  480. "fragile base class" problem: this way the layout of base
  481. classes can be changed without breaking programs compiled against
  482. earlier versions)
  483. }
  484. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  485. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  486. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  487. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  488. { always packrecords C -> natural alignment }
  489. location.reference.alignment:=vs.vardef.alignment;
  490. end
  491. else if handle_platform_subscript then
  492. begin
  493. { done }
  494. end
  495. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  496. begin
  497. if not is_packed_record_or_object(left.resultdef) then
  498. begin
  499. inc(location.reference.offset,vs.fieldoffset);
  500. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  501. end
  502. else if (vs.fieldoffset mod 8 = 0) and
  503. (resultdef.packedbitsize mod 8 = 0) and
  504. { is different in case of e.g. packenum 2 and an enum }
  505. { which fits in 8 bits }
  506. (resultdef.size*8 = resultdef.packedbitsize) then
  507. begin
  508. inc(location.reference.offset,vs.fieldoffset div 8);
  509. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  510. end
  511. else
  512. begin
  513. sref.ref:=location.reference;
  514. sref.ref.alignment:=1;
  515. sref.bitindexreg:=NR_NO;
  516. inc(sref.ref.offset,vs.fieldoffset div 8);
  517. sref.startbit:=vs.fieldoffset mod 8;
  518. sref.bitlen:=resultdef.packedbitsize;
  519. if (left.location.loc=LOC_REFERENCE) then
  520. location.loc:=LOC_SUBSETREF
  521. else
  522. location.loc:=LOC_CSUBSETREF;
  523. location.sref:=sref;
  524. end;
  525. { also update the size of the location }
  526. location.size:=def_cgsize(resultdef);
  527. end;
  528. paraloc1.done;
  529. end;
  530. {*****************************************************************************
  531. TCGWITHNODE
  532. *****************************************************************************}
  533. procedure tcgwithnode.pass_generate_code;
  534. begin
  535. location_reset(location,LOC_VOID,OS_NO);
  536. if assigned(left) then
  537. secondpass(left);
  538. end;
  539. {*****************************************************************************
  540. TCGVECNODE
  541. *****************************************************************************}
  542. function tcgvecnode.get_mul_size : aint;
  543. begin
  544. if nf_memindex in flags then
  545. get_mul_size:=1
  546. else
  547. begin
  548. if (left.resultdef.typ=arraydef) then
  549. if not is_packed_array(left.resultdef) then
  550. get_mul_size:=tarraydef(left.resultdef).elesize
  551. else
  552. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  553. else
  554. get_mul_size:=resultdef.size;
  555. end
  556. end;
  557. { this routine must, like any other routine, not change the contents }
  558. { of base/index registers of references, as these may be regvars. }
  559. { The register allocator can coalesce one LOC_REGISTER being moved }
  560. { into another (as their live ranges won't overlap), but not a }
  561. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  562. { the live range of the LOC_CREGISTER will most likely overlap the }
  563. { the live range of the target LOC_(C)REGISTER) }
  564. { The passed register may be a LOC_CREGISTER as well. }
  565. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  566. var
  567. hreg: tregister;
  568. begin
  569. if l<>1 then
  570. begin
  571. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  572. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  573. maybe_const_reg:=hreg;
  574. end;
  575. if location.reference.base=NR_NO then
  576. location.reference.base:=maybe_const_reg
  577. else if location.reference.index=NR_NO then
  578. location.reference.index:=maybe_const_reg
  579. else
  580. begin
  581. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  582. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  583. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  584. { insert new index register }
  585. location.reference.index:=maybe_const_reg;
  586. end;
  587. { update alignment }
  588. if (location.reference.alignment=0) then
  589. internalerror(2009020704);
  590. location.reference.alignment:=newalignment(location.reference.alignment,l);
  591. end;
  592. { see remarks for tcgvecnode.update_reference_reg_mul above }
  593. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  594. var
  595. sref: tsubsetreference;
  596. offsetreg, hreg: tregister;
  597. alignpower: aint;
  598. temp : longint;
  599. begin
  600. { only orddefs are bitpacked. Even then we only need special code in }
  601. { case the bitpacked *byte size* is not a power of two, otherwise }
  602. { everything can be handled using the the regular array code. }
  603. if ((l mod 8) = 0) and
  604. (ispowerof2(l div 8,temp) or
  605. not is_ordinal(resultdef)
  606. {$ifndef cpu64bitalu}
  607. or is_64bitint(resultdef)
  608. {$endif not cpu64bitalu}
  609. ) then
  610. begin
  611. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  612. exit;
  613. end;
  614. if (l > 8*sizeof(aint)) then
  615. internalerror(200608051);
  616. sref.ref := location.reference;
  617. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  618. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  619. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  620. { keep alignment for index }
  621. sref.ref.alignment := left.resultdef.alignment;
  622. if not ispowerof2(packedbitsloadsize(l),temp) then
  623. internalerror(2006081201);
  624. alignpower:=temp;
  625. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  626. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  627. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  628. if (sref.ref.base = NR_NO) then
  629. sref.ref.base := offsetreg
  630. else if (sref.ref.index = NR_NO) then
  631. sref.ref.index := offsetreg
  632. else
  633. begin
  634. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  635. sref.ref.base := offsetreg;
  636. end;
  637. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  638. sref.bitindexreg := hreg;
  639. sref.startbit := 0;
  640. sref.bitlen := resultdef.packedbitsize;
  641. if (left.location.loc = LOC_REFERENCE) then
  642. location.loc := LOC_SUBSETREF
  643. else
  644. location.loc := LOC_CSUBSETREF;
  645. location.sref := sref;
  646. end;
  647. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: aint);
  648. begin
  649. inc(ref.offset,index*mulsize);
  650. end;
  651. procedure tcgvecnode.second_wideansistring;
  652. begin
  653. end;
  654. procedure tcgvecnode.second_dynamicarray;
  655. begin
  656. end;
  657. procedure tcgvecnode.rangecheck_array;
  658. var
  659. hightree : tnode;
  660. poslabel,
  661. neglabel : tasmlabel;
  662. hreg : tregister;
  663. paraloc1,paraloc2 : tcgpara;
  664. pd : tprocdef;
  665. begin
  666. { omit range checking when this is an array access to a pointer which has been
  667. typecasted from an array }
  668. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  669. exit;
  670. paraloc1.init;
  671. paraloc2.init;
  672. if is_open_array(left.resultdef) or
  673. is_array_of_const(left.resultdef) then
  674. begin
  675. { cdecl functions don't have high() so we can not check the range }
  676. { (can't use current_procdef, since it may be a nested procedure) }
  677. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  678. begin
  679. { Get high value }
  680. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  681. { it must be available }
  682. if not assigned(hightree) then
  683. internalerror(200212201);
  684. firstpass(hightree);
  685. secondpass(hightree);
  686. { generate compares }
  687. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  688. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  689. else
  690. begin
  691. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  692. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  693. end;
  694. current_asmdata.getjumplabel(neglabel);
  695. current_asmdata.getjumplabel(poslabel);
  696. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  697. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  698. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  699. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  700. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  701. { release hightree }
  702. hightree.free;
  703. end;
  704. end
  705. else
  706. if is_dynamic_array(left.resultdef) then
  707. begin
  708. pd:=search_system_proc('fpc_dynarray_rangecheck');
  709. paramanager.getintparaloc(pd,1,paraloc1);
  710. paramanager.getintparaloc(pd,2,paraloc2);
  711. if pd.is_pushleftright then
  712. begin
  713. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  714. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  715. end
  716. else
  717. begin
  718. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  719. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  720. end;
  721. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  722. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  723. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  724. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  725. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  726. end;
  727. { for regular arrays, we don't have to do anything because the index has been
  728. type converted to the index type, which already inserted a range check if
  729. necessary }
  730. paraloc1.done;
  731. paraloc2.done;
  732. end;
  733. procedure tcgvecnode.rangecheck_string;
  734. var
  735. paraloc1,
  736. paraloc2: tcgpara;
  737. helpername: TIDString;
  738. pd: tprocdef;
  739. begin
  740. paraloc1.init;
  741. paraloc2.init;
  742. case tstringdef(left.resultdef).stringtype of
  743. { it's the same for ansi- and wide strings }
  744. st_unicodestring,
  745. st_widestring,
  746. st_ansistring:
  747. begin
  748. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  749. pd:=search_system_proc(helpername);
  750. paramanager.getintparaloc(pd,1,paraloc1);
  751. paramanager.getintparaloc(pd,2,paraloc2);
  752. if pd.is_pushleftright then
  753. begin
  754. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  755. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  756. end
  757. else
  758. begin
  759. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  760. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  761. end;
  762. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  763. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  764. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  765. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  766. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  767. end;
  768. st_shortstring:
  769. begin
  770. {!!!!!!!!!!!!!!!!!}
  771. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  772. end;
  773. st_longstring:
  774. begin
  775. {!!!!!!!!!!!!!!!!!}
  776. end;
  777. end;
  778. paraloc1.done;
  779. paraloc2.done;
  780. end;
  781. procedure tcgvecnode.pass_generate_code;
  782. var
  783. offsetdec,
  784. extraoffset : aint;
  785. rightp : pnode;
  786. otl,ofl : tasmlabel;
  787. newsize : tcgsize;
  788. mulsize,
  789. bytemulsize,
  790. alignpow : aint;
  791. isjump : boolean;
  792. paraloc1,
  793. paraloc2 : tcgpara;
  794. subsetref : tsubsetreference;
  795. temp : longint;
  796. begin
  797. paraloc1.init;
  798. paraloc2.init;
  799. mulsize:=get_mul_size;
  800. if not is_packed_array(left.resultdef) then
  801. bytemulsize:=mulsize
  802. else
  803. bytemulsize:=mulsize div 8;
  804. newsize:=def_cgsize(resultdef);
  805. secondpass(left);
  806. if left.location.loc=LOC_CREFERENCE then
  807. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  808. else
  809. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  810. { an ansistring needs to be dereferenced }
  811. if is_ansistring(left.resultdef) or
  812. is_wide_or_unicode_string(left.resultdef) then
  813. begin
  814. if nf_callunique in flags then
  815. internalerror(200304236);
  816. {DM!!!!!}
  817. case left.location.loc of
  818. LOC_REGISTER,
  819. LOC_CREGISTER :
  820. begin
  821. {$ifdef m68k}
  822. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  823. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  824. {$else m68k}
  825. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  826. {$endif m68k}
  827. end;
  828. LOC_CREFERENCE,
  829. LOC_REFERENCE :
  830. begin
  831. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  832. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  833. end;
  834. LOC_CONSTANT:
  835. begin
  836. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  837. end;
  838. else
  839. internalerror(2002032218);
  840. end;
  841. if is_ansistring(left.resultdef) then
  842. offsetdec:=1
  843. else
  844. offsetdec:=2;
  845. location.reference.alignment:=offsetdec;
  846. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  847. if not(cs_zerobasedstrings in current_settings.localswitches) then
  848. update_reference_offset(location.reference,-1,offsetdec);
  849. end
  850. else if is_dynamic_array(left.resultdef) then
  851. begin
  852. case left.location.loc of
  853. LOC_REGISTER,
  854. LOC_CREGISTER :
  855. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  856. LOC_REFERENCE,
  857. LOC_CREFERENCE :
  858. begin
  859. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  860. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  861. left.location.reference,location.reference.base);
  862. end;
  863. else
  864. internalerror(2002032219);
  865. end;
  866. { a dynarray points to the start of a memory block, which
  867. we assume to be always aligned to a multiple of the
  868. pointer size
  869. }
  870. location.reference.alignment:=voidpointertype.size;
  871. end
  872. else
  873. begin
  874. { may happen in case of function results }
  875. case left.location.loc of
  876. LOC_CREGISTER,
  877. LOC_CMMREGISTER,
  878. LOC_REGISTER,
  879. LOC_MMREGISTER:
  880. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  881. end;
  882. location_copy(location,left.location);
  883. end;
  884. { location must be memory }
  885. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  886. internalerror(200411013);
  887. { offset can only differ from 0 if arraydef }
  888. if (left.resultdef.typ=arraydef) and
  889. not(is_dynamic_array(left.resultdef)) and
  890. (not(is_packed_array(left.resultdef)) or
  891. ((mulsize mod 8 = 0) and
  892. ispowerof2(mulsize div 8,temp)) or
  893. { only orddefs are bitpacked }
  894. not is_ordinal(resultdef)
  895. {$ifndef cpu64bitalu}
  896. or is_64bitint(resultdef)
  897. {$endif not cpu64bitalu}
  898. ) then
  899. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  900. if right.nodetype=ordconstn then
  901. begin
  902. { offset can only differ from 0 if arraydef }
  903. if cs_check_range in current_settings.localswitches then
  904. begin
  905. secondpass(right);
  906. case left.resultdef.typ of
  907. arraydef :
  908. rangecheck_array;
  909. stringdef :
  910. rangecheck_string;
  911. end;
  912. end;
  913. if not(is_packed_array(left.resultdef)) or
  914. ((mulsize mod 8 = 0) and
  915. (ispowerof2(mulsize div 8,temp) or
  916. { only orddefs are bitpacked }
  917. not is_ordinal(resultdef))) then
  918. begin
  919. extraoffset:=tordconstnode(right).value.svalue;
  920. update_reference_offset(location.reference,extraoffset,bytemulsize);
  921. { adjust alignment after this change }
  922. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  923. { don't do this for floats etc.; needed to properly set the }
  924. { size for bitpacked arrays (e.g. a bitpacked array of }
  925. { enums who are size 2 but fit in one byte -> in the array }
  926. { they will be one byte and have to be stored like that) }
  927. if is_packed_array(left.resultdef) and
  928. (tcgsize2size[newsize] <> bytemulsize) then
  929. newsize:=int_cgsize(bytemulsize);
  930. end
  931. else
  932. begin
  933. subsetref.ref := location.reference;
  934. subsetref.ref.alignment := left.resultdef.alignment;
  935. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  936. internalerror(2006081212);
  937. alignpow:=temp;
  938. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  939. subsetref.bitindexreg := NR_NO;
  940. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  941. subsetref.bitlen := resultdef.packedbitsize;
  942. if (left.location.loc = LOC_REFERENCE) then
  943. location.loc := LOC_SUBSETREF
  944. else
  945. location.loc := LOC_CSUBSETREF;
  946. location.sref := subsetref;
  947. end;
  948. end
  949. else
  950. { not nodetype=ordconstn }
  951. begin
  952. if (cs_opt_level1 in current_settings.optimizerswitches) and
  953. { if we do range checking, we don't }
  954. { need that fancy code (it would be }
  955. { buggy) }
  956. not(cs_check_range in current_settings.localswitches) and
  957. (left.resultdef.typ=arraydef) and
  958. not is_packed_array(left.resultdef) then
  959. begin
  960. extraoffset:=0;
  961. rightp:=actualtargetnode(@right);
  962. if rightp^.nodetype=addn then
  963. begin
  964. if taddnode(rightp^).right.nodetype=ordconstn then
  965. begin
  966. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  967. replacenode(rightp^,taddnode(rightp^).left);
  968. end
  969. else if taddnode(rightp^).left.nodetype=ordconstn then
  970. begin
  971. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  972. replacenode(rightp^,taddnode(rightp^).right);
  973. end;
  974. end
  975. else if rightp^.nodetype=subn then
  976. begin
  977. if taddnode(rightp^).right.nodetype=ordconstn then
  978. begin
  979. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  980. replacenode(rightp^,taddnode(rightp^).left);
  981. end;
  982. end;
  983. update_reference_offset(location.reference,extraoffset,mulsize);
  984. end;
  985. { calculate from left to right }
  986. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  987. internalerror(200304237);
  988. isjump:=(right.expectloc=LOC_JUMP);
  989. otl:=nil;
  990. ofl:=nil;
  991. if isjump then
  992. begin
  993. otl:=current_procinfo.CurrTrueLabel;
  994. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  995. ofl:=current_procinfo.CurrFalseLabel;
  996. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  997. end;
  998. secondpass(right);
  999. { if mulsize = 1, we won't have to modify the index }
  1000. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or (right.location.size<>OS_ADDR) then
  1001. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  1002. if isjump then
  1003. begin
  1004. current_procinfo.CurrTrueLabel:=otl;
  1005. current_procinfo.CurrFalseLabel:=ofl;
  1006. end
  1007. else if (right.location.loc = LOC_JUMP) then
  1008. internalerror(2006010801);
  1009. { produce possible range check code: }
  1010. if cs_check_range in current_settings.localswitches then
  1011. begin
  1012. if left.resultdef.typ=arraydef then
  1013. rangecheck_array
  1014. else if (left.resultdef.typ=stringdef) then
  1015. rangecheck_string;
  1016. end;
  1017. { insert the register and the multiplication factor in the
  1018. reference }
  1019. if not is_packed_array(left.resultdef) then
  1020. update_reference_reg_mul(right.location.register,right.resultdef,mulsize)
  1021. else
  1022. update_reference_reg_packed(right.location.register,right.resultdef,mulsize);
  1023. end;
  1024. location.size:=newsize;
  1025. paraloc1.done;
  1026. paraloc2.done;
  1027. end;
  1028. begin
  1029. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1030. cloadparentfpnode:=tcgloadparentfpnode;
  1031. caddrnode:=tcgaddrnode;
  1032. cderefnode:=tcgderefnode;
  1033. csubscriptnode:=tcgsubscriptnode;
  1034. cwithnode:=tcgwithnode;
  1035. cvecnode:=tcgvecnode;
  1036. end.