ncgset.pas 65 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic assembler for in set/case labels
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgset;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,globals,constexp,symtype,
  22. node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
  23. type
  24. tcgsetelementnode = class(tsetelementnode)
  25. procedure pass_generate_code;override;
  26. end;
  27. Tsetpart=record
  28. range : boolean; {Part is a range.}
  29. start,stop : byte; {Start/stop when range; Stop=element when an element.}
  30. end;
  31. Tsetparts=array[1..8] of Tsetpart;
  32. { tcginnode }
  33. tcginnode = class(tinnode)
  34. procedure in_smallset(opdef: tdef; setbase: aint); virtual;
  35. function pass_1: tnode;override;
  36. procedure pass_generate_code;override;
  37. protected
  38. function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
  39. function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
  40. end;
  41. tcgcasenode = class(tcasenode)
  42. {
  43. Emits the case node statement. Contrary to the intel
  44. 80x86 version, this version does not emit jump tables,
  45. because of portability problems.
  46. }
  47. procedure pass_generate_code;override;
  48. protected
  49. with_sign : boolean;
  50. opsize : tdef;
  51. jmp_gt,jmp_lt,jmp_le : topcmp;
  52. { register with case expression }
  53. hregister,hregister2 : tregister;
  54. endlabel,elselabel : tasmlabel;
  55. { true, if we can omit the range check of the jump table }
  56. jumptable_no_range : boolean;
  57. { has the implementation jumptable support }
  58. min_label : tconstexprint;
  59. function GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  60. function blocklabel(id:longint):tasmlabel;
  61. procedure optimizevalues(var max_linear_list:int64;var max_dist:qword);virtual;
  62. function has_jumptable : boolean;virtual;
  63. procedure genjumptable(hp : pcaselabel;min_,max_ : int64); virtual;
  64. procedure genlinearlist(hp : pcaselabel); virtual;
  65. procedure genlinearcmplist(hp : pcaselabel); virtual;
  66. procedure genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt); virtual;
  67. procedure genjmptree(root : pcaselabel); virtual;
  68. end;
  69. implementation
  70. uses
  71. verbose,
  72. cutils,
  73. symconst,symdef,symsym,defutil,
  74. pass_2,tgobj,
  75. nbas,ncon,ncgflw,
  76. ncgutil,hlcgobj;
  77. {*****************************************************************************
  78. TCGSETELEMENTNODE
  79. *****************************************************************************}
  80. procedure tcgsetelementnode.pass_generate_code;
  81. begin
  82. { load the set element's value }
  83. secondpass(left);
  84. { also a second value ? }
  85. if assigned(right) then
  86. internalerror(2015111106);
  87. { we don't modify the left side, we only check the location type; our
  88. parent node (an add-node) will use the resulting location to perform
  89. the set operation without creating an intermediate set }
  90. location_copy(location,left.location);
  91. end;
  92. {*****************************************************************************
  93. *****************************************************************************}
  94. function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
  95. var
  96. compares,maxcompares:word;
  97. i:byte;
  98. begin
  99. analizeset:=false;
  100. fillchar(setparts,sizeof(setparts),0);
  101. numparts:=0;
  102. compares:=0;
  103. { Lots of comparisions take a lot of time, so do not allow
  104. too much comparisions. 8 comparisions are, however, still
  105. smalller than emitting the set }
  106. if cs_opt_size in current_settings.optimizerswitches then
  107. maxcompares:=8
  108. else
  109. maxcompares:=5;
  110. { when smallset is possible allow only 3 compares the smallset
  111. code is for littlesize also smaller when more compares are used }
  112. if is_small then
  113. maxcompares:=3;
  114. for i:=0 to 255 do
  115. if i in Aset then
  116. begin
  117. if (numparts=0) or (i<>setparts[numparts].stop+1) then
  118. begin
  119. {Set element is a separate element.}
  120. inc(compares);
  121. if compares>maxcompares then
  122. exit;
  123. inc(numparts);
  124. setparts[numparts].range:=false;
  125. setparts[numparts].stop:=i;
  126. end
  127. else
  128. {Set element is part of a range.}
  129. if not setparts[numparts].range then
  130. begin
  131. {Transform an element into a range.}
  132. setparts[numparts].range:=true;
  133. setparts[numparts].start:=setparts[numparts].stop;
  134. setparts[numparts].stop:=i;
  135. { there's only one compare per range anymore. Only a }
  136. { sub is added, but that's much faster than a }
  137. { cmp/jcc combo so neglect its effect }
  138. { inc(compares);
  139. if compares>maxcompares then
  140. exit; }
  141. end
  142. else
  143. begin
  144. {Extend a range.}
  145. setparts[numparts].stop:=i;
  146. end;
  147. end;
  148. analizeset:=true;
  149. end;
  150. procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
  151. begin
  152. { location is always LOC_REGISTER }
  153. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  154. { allocate a register for the result }
  155. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
  156. {**************************** SMALL SET **********************}
  157. if left.location.loc=LOC_CONSTANT then
  158. begin
  159. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
  160. right.resultdef, resultdef,
  161. left.location.value-setbase, right.location,
  162. location.register);
  163. end
  164. else
  165. begin
  166. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
  167. left.resultdef, opdef, true);
  168. register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef, left.location,
  169. setbase);
  170. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, opdef,
  171. right.resultdef, resultdef, left.location.register, right.location,
  172. location.register);
  173. end;
  174. end;
  175. function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
  176. begin
  177. { check if we can use smallset operation using btl which is limited
  178. to 32 bits, the left side may also not contain higher values !! }
  179. use_small:=is_smallset(right.resultdef) and
  180. not is_signed(left.resultdef) and
  181. ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
  182. (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
  183. { Can we generate jumps? Possible for all types of sets }
  184. checkgenjumps:=(right.nodetype=setconstn) and
  185. analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
  186. end;
  187. function tcginnode.pass_1: tnode;
  188. var
  189. setparts: Tsetparts;
  190. numparts: byte;
  191. use_small: boolean;
  192. begin
  193. result := inherited pass_1;
  194. if not(assigned(result)) and
  195. checkgenjumps(setparts,numparts,use_small) then
  196. expectloc := LOC_JUMP;
  197. end;
  198. procedure tcginnode.pass_generate_code;
  199. var
  200. adjustment,
  201. setbase : {$ifdef CPU8BITALU}smallint{$else}aint{$endif};
  202. l, l2 : tasmlabel;
  203. hr,
  204. pleftreg : tregister;
  205. setparts : Tsetparts;
  206. opsize : tcgsize;
  207. opdef : tdef;
  208. uopsize : tcgsize;
  209. uopdef : tdef;
  210. orgopsize : tcgsize;
  211. genjumps,
  212. use_small : boolean;
  213. i,numparts : byte;
  214. needslabel : Boolean;
  215. begin
  216. l2:=nil;
  217. { We check first if we can generate jumps, this can be done
  218. because the resultdef is already set in firstpass }
  219. genjumps := checkgenjumps(setparts,numparts,use_small);
  220. orgopsize := def_cgsize(left.resultdef);
  221. {$if defined(cpu8bitalu)}
  222. if (tsetdef(right.resultdef).setbase>=-128) and
  223. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=256) then
  224. begin
  225. uopsize := OS_8;
  226. uopdef := u8inttype;
  227. if is_signed(left.resultdef) then
  228. begin
  229. opsize := OS_S8;
  230. opdef := s8inttype;
  231. end
  232. else
  233. begin
  234. opsize := uopsize;
  235. opdef := uopdef;
  236. end;
  237. end
  238. {$endif defined(cpu8bitalu)}
  239. {$if defined(cpu8bitalu)}
  240. { this should be also enabled for 16 bit CPUs, however, I have no proper testing facility for 16 bit, my
  241. testing results using Dosbox are no reliable }
  242. { $if defined(cpu8bitalu) or defined(cpu16bitalu)}
  243. else if (tsetdef(right.resultdef).setbase>=-32768) and
  244. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=65536) then
  245. begin
  246. uopsize := OS_16;
  247. uopdef := u16inttype;
  248. if is_signed(left.resultdef) then
  249. begin
  250. opsize := OS_S16;
  251. opdef := s16inttype;
  252. end
  253. else
  254. begin
  255. opsize := uopsize;
  256. opdef := uopdef;
  257. end;
  258. end
  259. else
  260. {$endif defined(cpu8bitalu)}
  261. begin
  262. uopsize := OS_32;
  263. uopdef := u32inttype;
  264. if is_signed(left.resultdef) then
  265. begin
  266. opsize := OS_S32;
  267. opdef := s32inttype;
  268. end
  269. else
  270. begin
  271. opsize := uopsize;
  272. opdef := uopdef;
  273. end;
  274. end;
  275. needslabel := false;
  276. if not genjumps then
  277. { calculate both operators }
  278. { the complex one first }
  279. { not in case of genjumps, because then we don't secondpass }
  280. { right at all (so we have to make sure that "right" really is }
  281. { "right" and not "swapped left" in that case) }
  282. firstcomplex(self);
  283. secondpass(left);
  284. if (left.expectloc=LOC_JUMP)<>
  285. (left.location.loc=LOC_JUMP) then
  286. internalerror(2007070101);
  287. { Only process the right if we are not generating jumps }
  288. if not genjumps then
  289. secondpass(right);
  290. if codegenerror then
  291. exit;
  292. { ofcourse not commutative }
  293. if nf_swapped in flags then
  294. swapleftright;
  295. setbase:=tsetdef(right.resultdef).setbase;
  296. if genjumps then
  297. begin
  298. { location is always LOC_JUMP }
  299. current_asmdata.getjumplabel(l);
  300. current_asmdata.getjumplabel(l2);
  301. location_reset_jump(location,l,l2);
  302. { If register is used, use only lower 8 bits }
  303. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
  304. pleftreg := left.location.register;
  305. { how much have we already substracted from the x in the }
  306. { "x in [y..z]" expression }
  307. adjustment := 0;
  308. hr:=NR_NO;
  309. for i:=1 to numparts do
  310. if setparts[i].range then
  311. { use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
  312. begin
  313. { is the range different from all legal values? }
  314. if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
  315. begin
  316. { yes, is the lower bound <> 0? }
  317. if (setparts[i].start <> 0) then
  318. { we're going to substract from the left register, }
  319. { so in case of a LOC_CREGISTER first move the value }
  320. { to edi (not done before because now we can do the }
  321. { move and substract in one instruction with LEA) }
  322. if (left.location.loc = LOC_CREGISTER) and
  323. (hr<>pleftreg) then
  324. begin
  325. { don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
  326. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
  327. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
  328. pleftreg:=hr;
  329. end
  330. else
  331. begin
  332. { otherwise, the value is already in a register }
  333. { that can be modified }
  334. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
  335. setparts[i].start-adjustment,pleftreg)
  336. end;
  337. { new total value substracted from x: }
  338. { adjustment + (setparts[i].start - adjustment) }
  339. adjustment := setparts[i].start;
  340. { check if result < b-a+1 (not "result <= b-a", since }
  341. { we need a carry in case the element is in the range }
  342. { (this will never overflow since we check at the }
  343. { beginning whether stop-start <> 255) }
  344. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
  345. setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
  346. end
  347. else
  348. { if setparts[i].start = 0 and setparts[i].stop = 255, }
  349. { it's always true since "in" is only allowed for bytes }
  350. begin
  351. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  352. end;
  353. end
  354. else
  355. begin
  356. { Emit code to check if left is an element }
  357. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
  358. setparts[i].stop-adjustment,pleftreg,location.truelabel);
  359. end;
  360. { To compensate for not doing a second pass }
  361. right.location.reference.symbol:=nil;
  362. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  363. end
  364. else
  365. {*****************************************************************}
  366. { NO JUMP TABLE GENERATION }
  367. {*****************************************************************}
  368. begin
  369. { We will now generated code to check the set itself, no jmps,
  370. handle smallsets separate, because it allows faster checks }
  371. if use_small then
  372. begin
  373. in_smallset(opdef, setbase);
  374. end
  375. else
  376. {************************** NOT SMALL SET ********************}
  377. begin
  378. { location is always LOC_REGISTER }
  379. location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
  380. { allocate a register for the result }
  381. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  382. if right.location.loc=LOC_CONSTANT then
  383. begin
  384. { can it actually occur currently? CEC }
  385. { yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
  386. { note: this code assumes that left in [0..255], which is a valid }
  387. { assumption (other cases will be caught by range checking) (JM) }
  388. { load left in register }
  389. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
  390. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,uopdef,left.location,setbase);
  391. { emit bit test operation -- warning: do not use
  392. location_force_reg() to force a set into a register, except
  393. to a register of the same size as the set. The reason is
  394. that on big endian systems, this would require moving the
  395. set to the most significant part of the new register,
  396. and location_force_register can't do that (it does not
  397. know the type).
  398. a_bit_test_reg_loc_reg() properly takes into account the
  399. size of the set to adjust the register index to test }
  400. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
  401. uopdef,right.resultdef,uopdef,
  402. left.location.register,right.location,location.register);
  403. { now zero the result if left > nr_of_bits_in_right_register }
  404. hr := hlcg.getintregister(current_asmdata.CurrAsmList,uopdef);
  405. { if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
  406. { (left.location.size = location.size at this point) }
  407. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef, tcgsize2size[opsize]*8, left.location.register, hr);
  408. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size[opsize]*8)-1, hr);
  409. { if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
  410. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr, location.register);
  411. end { of right.location.loc=LOC_CONSTANT }
  412. { do search in a normal set which could have >32 elements
  413. but also used if the left side contains higher values > 32 }
  414. else if (left.location.loc=LOC_CONSTANT) then
  415. begin
  416. if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
  417. {should be caught earlier }
  418. internalerror(2007020402);
  419. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
  420. right.location,location.register);
  421. end
  422. else
  423. begin
  424. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
  425. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
  426. pleftreg := left.location.register;
  427. if (opsize >= OS_S8) or { = if signed }
  428. ((left.resultdef.typ=orddef) and
  429. ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
  430. (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
  431. ((left.resultdef.typ=enumdef) and
  432. ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
  433. (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
  434. begin
  435. current_asmdata.getjumplabel(l);
  436. current_asmdata.getjumplabel(l2);
  437. needslabel := True;
  438. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
  439. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  440. hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
  441. hlcg.a_label(current_asmdata.CurrAsmList, l);
  442. end;
  443. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
  444. pleftreg,right.location,location.register);
  445. if needslabel then
  446. hlcg.a_label(current_asmdata.CurrAsmList, l2);
  447. end;
  448. {$ifndef cpuhighleveltarget}
  449. location.size := def_cgsize(resultdef);
  450. location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
  451. {$else not cpuhighleveltarget}
  452. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  453. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
  454. location.register:=hr;
  455. location.size := def_cgsize(resultdef);
  456. {$endif not cpuhighleveltarget}
  457. end;
  458. end;
  459. location_freetemp(current_asmdata.CurrAsmList, right.location);
  460. end;
  461. {*****************************************************************************
  462. TCGCASENODE
  463. *****************************************************************************}
  464. { Analyse the nodes following the else label - if empty, change to end label }
  465. function tcgcasenode.GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  466. var
  467. LabelSym: TLabelSym;
  468. begin
  469. Result := True;
  470. if not Assigned(Block) then
  471. begin
  472. { Block doesn't exist / is empty }
  473. _Label := endlabel;
  474. Exit;
  475. end;
  476. { These optimisations aren't particularly debugger friendly }
  477. if not (cs_opt_level2 in current_settings.optimizerswitches) then
  478. begin
  479. Result := False;
  480. current_asmdata.getjumplabel(_Label);
  481. Exit;
  482. end;
  483. while Assigned(Block) do
  484. begin
  485. case Block.nodetype of
  486. nothingn:
  487. begin
  488. _Label := endlabel;
  489. Exit;
  490. end;
  491. goton:
  492. begin
  493. LabelSym := TCGGotoNode(Block).labelsym;
  494. if not Assigned(LabelSym) then
  495. InternalError(2018121131);
  496. _Label := TCGLabelNode(TCGGotoNode(Block).labelnode).getasmlabel;
  497. if Assigned(_Label) then
  498. { Keep tabs on the fact that an actual 'goto' was used }
  499. Include(flowcontrol,fc_gotolabel)
  500. else
  501. Break;
  502. Exit;
  503. end;
  504. blockn:
  505. begin
  506. Block := TBlockNode(Block).Left;
  507. Continue;
  508. end;
  509. statementn:
  510. begin
  511. { If the right node is assigned, then it's a compound block
  512. that can't be simplified, so fall through, set Result to
  513. False and make a new label }
  514. if Assigned(TStatementNode(Block).right) then
  515. Break;
  516. Block := TStatementNode(Block).Left;
  517. Continue;
  518. end;
  519. else
  520. ;
  521. end;
  522. Break;
  523. end;
  524. { Create unique label }
  525. Result := False;
  526. current_asmdata.getjumplabel(_Label);
  527. end;
  528. function tcgcasenode.blocklabel(id:longint):tasmlabel;
  529. begin
  530. if not assigned(blocks[id]) then
  531. internalerror(200411301);
  532. result:=pcaseblock(blocks[id])^.blocklabel;
  533. end;
  534. procedure tcgcasenode.optimizevalues(var max_linear_list:int64;var max_dist:qword);
  535. begin
  536. { no changes by default }
  537. end;
  538. function tcgcasenode.has_jumptable : boolean;
  539. begin
  540. { No jumptable support in the default implementation }
  541. has_jumptable:=false;
  542. end;
  543. procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : int64);
  544. begin
  545. internalerror(200209161);
  546. end;
  547. procedure tcgcasenode.genlinearlist(hp : pcaselabel);
  548. var
  549. first : boolean;
  550. last : TConstExprInt;
  551. scratch_reg: tregister;
  552. newsize: tcgsize;
  553. newdef: tdef;
  554. procedure gensub(value:tcgint);
  555. begin
  556. { here, since the sub and cmp are separate we need
  557. to move the result before subtract to help
  558. the register allocator
  559. }
  560. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
  561. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
  562. end;
  563. procedure genitem(t : pcaselabel);
  564. begin
  565. if assigned(t^.less) then
  566. genitem(t^.less);
  567. { do we need to test the first value? }
  568. if first and (t^._low>get_min_value(left.resultdef)) then
  569. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
  570. if t^._low=t^._high then
  571. begin
  572. if t^._low-last=0 then
  573. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
  574. else
  575. begin
  576. gensub(tcgint(t^._low.svalue-last.svalue));
  577. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
  578. OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
  579. end;
  580. last:=t^._low;
  581. end
  582. else
  583. begin
  584. { it begins with the smallest label, if the value }
  585. { is even smaller then jump immediately to the }
  586. { ELSE-label }
  587. if first then
  588. begin
  589. { have we to ajust the first value ? }
  590. if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
  591. gensub(tcgint(t^._low.svalue));
  592. end
  593. else
  594. begin
  595. { if there is no unused label between the last and the }
  596. { present label then the lower limit can be checked }
  597. { immediately. else check the range in between: }
  598. gensub(tcgint(t^._low.svalue-last.svalue));
  599. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
  600. end;
  601. gensub(tcgint(t^._high.svalue-t^._low.svalue));
  602. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
  603. last:=t^._high;
  604. end;
  605. first:=false;
  606. if assigned(t^.greater) then
  607. genitem(t^.greater);
  608. end;
  609. begin
  610. { do we need to generate cmps? }
  611. if (with_sign and (min_label<0)) then
  612. genlinearcmplist(hp)
  613. else
  614. begin
  615. { sign/zero extend the value to a full register before starting to
  616. subtract values, so that on platforms that don't have
  617. subregisters of the same size as the value we don't generate
  618. sign/zero-extensions after every subtraction
  619. make newsize always signed, since we only do this if the size in
  620. bytes of the register is larger than the original opsize, so
  621. the value can always be represented by a larger signed type }
  622. newsize:=tcgsize2signed[reg_cgsize(hregister)];
  623. if tcgsize2size[newsize]>opsize.size then
  624. begin
  625. newdef:=cgsize_orddef(newsize);
  626. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
  627. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
  628. hregister:=scratch_reg;
  629. opsize:=newdef;
  630. end;
  631. if (labelcnt>1) or not(cs_opt_level1 in current_settings.optimizerswitches) then
  632. begin
  633. last:=0;
  634. first:=true;
  635. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  636. genitem(hp);
  637. end
  638. else
  639. begin
  640. { If only one label exists, we can greatly simplify the checks to a simple comparison }
  641. if hp^._low=hp^._high then
  642. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  643. else
  644. begin
  645. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  646. gensub(tcgint(hp^._low.svalue));
  647. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_BE, tcgint(hp^._high.svalue-hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  648. end;
  649. end;
  650. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  651. end;
  652. end;
  653. procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
  654. var
  655. last : TConstExprInt;
  656. lastwasrange: boolean;
  657. procedure genitem(t : pcaselabel);
  658. {$if not defined(cpu64bitalu) and not defined(cpuhighleveltarget)}
  659. var
  660. l1 : tasmlabel;
  661. {$endif not cpu64bitalu and not cpuhighleveltarget}
  662. begin
  663. if assigned(t^.less) then
  664. genitem(t^.less);
  665. if t^._low=t^._high then
  666. begin
  667. {$ifndef cpuhighleveltarget}
  668. {$if defined(cpu32bitalu)}
  669. if def_cgsize(opsize) in [OS_S64,OS_64] then
  670. begin
  671. current_asmdata.getjumplabel(l1);
  672. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
  673. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  674. cg.a_label(current_asmdata.CurrAsmList,l1);
  675. end
  676. else
  677. {$elseif defined(cpu16bitalu)}
  678. if def_cgsize(opsize) in [OS_S64,OS_64] then
  679. begin
  680. current_asmdata.getjumplabel(l1);
  681. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),cg.GetNextReg(hregister2),l1);
  682. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
  683. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  684. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  685. cg.a_label(current_asmdata.CurrAsmList,l1);
  686. end
  687. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  688. begin
  689. current_asmdata.getjumplabel(l1);
  690. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  691. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  692. cg.a_label(current_asmdata.CurrAsmList,l1);
  693. end
  694. else
  695. {$elseif defined(cpu8bitalu)}
  696. if def_cgsize(opsize) in [OS_S64,OS_64] then
  697. begin
  698. current_asmdata.getjumplabel(l1);
  699. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  700. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  701. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  702. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  703. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  704. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  705. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  706. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
  707. cg.a_label(current_asmdata.CurrAsmList,l1);
  708. end
  709. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  710. begin
  711. current_asmdata.getjumplabel(l1);
  712. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  713. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  714. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  715. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  716. cg.a_label(current_asmdata.CurrAsmList,l1);
  717. end
  718. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  719. begin
  720. current_asmdata.getjumplabel(l1);
  721. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  722. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  723. cg.a_label(current_asmdata.CurrAsmList,l1);
  724. end
  725. else
  726. {$endif}
  727. {$endif cpuhighleveltarget}
  728. begin
  729. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(t^._low.svalue),hregister, blocklabel(t^.blockid));
  730. end;
  731. { Reset last here, because we've only checked for one value and need to compare
  732. for the next range both the lower and upper bound }
  733. lastwasrange := false;
  734. end
  735. else
  736. begin
  737. { it begins with the smallest label, if the value }
  738. { is even smaller then jump immediately to the }
  739. { ELSE-label }
  740. if not lastwasrange or (t^._low-last>1) then
  741. begin
  742. {$ifndef cpuhighleveltarget}
  743. {$if defined(cpu32bitalu)}
  744. if def_cgsize(opsize) in [OS_64,OS_S64] then
  745. begin
  746. current_asmdata.getjumplabel(l1);
  747. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
  748. hregister2, elselabel);
  749. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
  750. hregister2, l1);
  751. { the comparisation of the low dword must be always unsigned! }
  752. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
  753. cg.a_label(current_asmdata.CurrAsmList,l1);
  754. end
  755. else
  756. {$elseif defined(cpu16bitalu)}
  757. if def_cgsize(opsize) in [OS_64,OS_S64] then
  758. begin
  759. current_asmdata.getjumplabel(l1);
  760. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
  761. cg.GetNextReg(hregister2), elselabel);
  762. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
  763. cg.GetNextReg(hregister2), l1);
  764. { the comparison of the low words must be always unsigned! }
  765. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
  766. hregister2, elselabel);
  767. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
  768. hregister2, l1);
  769. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
  770. cg.GetNextReg(hregister), elselabel);
  771. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
  772. cg.GetNextReg(hregister), l1);
  773. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
  774. cg.a_label(current_asmdata.CurrAsmList,l1);
  775. end
  776. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  777. begin
  778. current_asmdata.getjumplabel(l1);
  779. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
  780. cg.GetNextReg(hregister), elselabel);
  781. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
  782. cg.GetNextReg(hregister), l1);
  783. { the comparisation of the low dword must be always unsigned! }
  784. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
  785. cg.a_label(current_asmdata.CurrAsmList,l1);
  786. end
  787. else
  788. {$elseif defined(cpu8bitalu)}
  789. if def_cgsize(opsize) in [OS_64,OS_S64] then
  790. begin
  791. current_asmdata.getjumplabel(l1);
  792. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),elselabel);
  793. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  794. { the comparison of the low words must be always unsigned! }
  795. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),elselabel);
  796. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  797. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),elselabel);
  798. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  799. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
  800. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  801. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  802. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  803. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  804. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  805. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),elselabel);
  806. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  807. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
  808. cg.a_label(current_asmdata.CurrAsmList,l1);
  809. end
  810. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  811. begin
  812. current_asmdata.getjumplabel(l1);
  813. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  814. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  815. { the comparison of the low words must be always unsigned! }
  816. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  817. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  818. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),elselabel);
  819. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  820. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
  821. cg.a_label(current_asmdata.CurrAsmList,l1);
  822. end
  823. else if def_cgsize(opsize) in [OS_16,OS_S16] then
  824. begin
  825. current_asmdata.getjumplabel(l1);
  826. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),elselabel);
  827. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  828. { the comparisation of the low dword must be always unsigned! }
  829. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
  830. cg.a_label(current_asmdata.CurrAsmList,l1);
  831. end
  832. else
  833. {$endif}
  834. {$endif cpuhighleveltarget}
  835. begin
  836. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, tcgint(t^._low.svalue), hregister,
  837. elselabel);
  838. end;
  839. end;
  840. {$ifndef cpuhighleveltarget}
  841. {$if defined(cpu32bitalu)}
  842. if def_cgsize(opsize) in [OS_S64,OS_64] then
  843. begin
  844. current_asmdata.getjumplabel(l1);
  845. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
  846. blocklabel(t^.blockid));
  847. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
  848. l1);
  849. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  850. cg.a_label(current_asmdata.CurrAsmList,l1);
  851. end
  852. else
  853. {$elseif defined(cpu16bitalu)}
  854. if def_cgsize(opsize) in [OS_S64,OS_64] then
  855. begin
  856. current_asmdata.getjumplabel(l1);
  857. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  858. blocklabel(t^.blockid));
  859. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  860. l1);
  861. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  862. blocklabel(t^.blockid));
  863. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  864. l1);
  865. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  866. blocklabel(t^.blockid));
  867. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  868. l1);
  869. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
  870. cg.a_label(current_asmdata.CurrAsmList,l1);
  871. end
  872. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  873. begin
  874. current_asmdata.getjumplabel(l1);
  875. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  876. blocklabel(t^.blockid));
  877. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  878. l1);
  879. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  880. cg.a_label(current_asmdata.CurrAsmList,l1);
  881. end
  882. else
  883. {$elseif defined(cpu8bitalu)}
  884. if def_cgsize(opsize) in [OS_S64,OS_64] then
  885. begin
  886. current_asmdata.getjumplabel(l1);
  887. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),blocklabel(t^.blockid));
  888. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  889. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),blocklabel(t^.blockid));
  890. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  891. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),blocklabel(t^.blockid));
  892. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),l1);
  893. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
  894. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
  895. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  896. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  897. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  898. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  899. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  900. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),l1);
  901. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
  902. cg.a_label(current_asmdata.CurrAsmList,l1);
  903. end
  904. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  905. begin
  906. current_asmdata.getjumplabel(l1);
  907. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  908. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  909. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  910. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  911. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  912. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),l1);
  913. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
  914. cg.a_label(current_asmdata.CurrAsmList,l1);
  915. end
  916. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  917. begin
  918. current_asmdata.getjumplabel(l1);
  919. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  920. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),l1);
  921. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
  922. cg.a_label(current_asmdata.CurrAsmList,l1);
  923. end
  924. else
  925. {$endif}
  926. {$endif cpuhighleveltarget}
  927. begin
  928. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, tcgint(t^._high.svalue), hregister, blocklabel(t^.blockid));
  929. end;
  930. last:=t^._high;
  931. lastwasrange := true;
  932. end;
  933. if assigned(t^.greater) then
  934. genitem(t^.greater);
  935. end;
  936. begin
  937. last:=0;
  938. lastwasrange:=false;
  939. genitem(hp);
  940. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  941. end;
  942. procedure tcgcasenode.genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt);
  943. var
  944. lesslabel,greaterlabel : tasmlabel;
  945. begin
  946. current_asmdata.CurrAsmList.concat(cai_align.Create(current_settings.alignment.jumpalign));
  947. cg.a_label(current_asmdata.CurrAsmList,p^.labellabel);
  948. { calculate labels for left and right }
  949. if p^.less=nil then
  950. lesslabel:=elselabel
  951. else
  952. lesslabel:=p^.less^.labellabel;
  953. if p^.greater=nil then
  954. greaterlabel:=elselabel
  955. else
  956. greaterlabel:=p^.greater^.labellabel;
  957. { calculate labels for left and right }
  958. { no range label: }
  959. if p^._low=p^._high then
  960. begin
  961. if greaterlabel=lesslabel then
  962. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_NE,p^._low,hregister, lesslabel)
  963. else
  964. begin
  965. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_lt,p^._low,hregister, lesslabel);
  966. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_gt,p^._low,hregister, greaterlabel);
  967. end;
  968. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  969. end
  970. else
  971. begin
  972. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,p^._low, hregister, lesslabel);
  973. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_gt,p^._high,hregister, greaterlabel);
  974. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  975. end;
  976. if assigned(p^.less) then
  977. genjmptreeentry(p^.less,p^._low);
  978. if assigned(p^.greater) then
  979. genjmptreeentry(p^.greater,p^._high);
  980. end;
  981. procedure tcgcasenode.genjmptree(root : pcaselabel);
  982. type
  983. tlabelarrayentry = record
  984. caselabel : pcaselabel;
  985. asmlabel : TAsmLabel;
  986. end;
  987. tlabelarray = array of tlabelarrayentry;
  988. var
  989. labelarray : tlabelarray;
  990. var
  991. nextarrayentry : int64;
  992. i : longint;
  993. procedure addarrayentry(entry : pcaselabel);
  994. begin
  995. if assigned(entry^.less) then
  996. addarrayentry(entry^.less);
  997. with labelarray[nextarrayentry] do
  998. begin
  999. caselabel:=entry;
  1000. current_asmdata.getjumplabel(asmlabel);
  1001. end;
  1002. inc(nextarrayentry);
  1003. if assigned(entry^.greater) then
  1004. addarrayentry(entry^.greater);
  1005. end;
  1006. { rebuild the label tree balanced }
  1007. procedure rebuild(first,last : int64;var p : pcaselabel);
  1008. var
  1009. current : int64;
  1010. begin
  1011. current:=(first+last) div 2;
  1012. p:=labelarray[current].caselabel;
  1013. if first<current then
  1014. rebuild(first,current-1,p^.less)
  1015. else
  1016. p^.less:=nil;
  1017. if last>current then
  1018. rebuild(current+1,last,p^.greater)
  1019. else
  1020. p^.greater:=nil;
  1021. end;
  1022. begin
  1023. labelarray:=nil;
  1024. SetLength(labelarray,labelcnt);
  1025. nextarrayentry:=0;
  1026. addarrayentry(root);
  1027. rebuild(0,high(labelarray),root);
  1028. for i:=0 to high(labelarray) do
  1029. current_asmdata.getjumplabel(labelarray[i].caselabel^.labellabel);
  1030. genjmptreeentry(root,root^._high+10);
  1031. end;
  1032. procedure tcgcasenode.pass_generate_code;
  1033. var
  1034. oldflowcontrol: tflowcontrol;
  1035. i : longint;
  1036. dist : asizeuint;
  1037. distv,
  1038. lv,hv,
  1039. max_label: tconstexprint;
  1040. max_linear_list : int64;
  1041. max_dist : qword;
  1042. ShortcutElse: Boolean;
  1043. begin
  1044. location_reset(location,LOC_VOID,OS_NO);
  1045. oldflowcontrol := flowcontrol;
  1046. include(flowcontrol,fc_inflowcontrol);
  1047. { Allocate labels }
  1048. current_asmdata.getjumplabel(endlabel);
  1049. { Do some optimisation to deal with empty else blocks }
  1050. ShortcutElse := GetBranchLabel(elseblock, elselabel);
  1051. for i:=0 to blocks.count-1 do
  1052. with pcaseblock(blocks[i])^ do
  1053. shortcut := GetBranchLabel(statement, blocklabel);
  1054. with_sign:=is_signed(left.resultdef);
  1055. if with_sign then
  1056. begin
  1057. jmp_gt:=OC_GT;
  1058. jmp_lt:=OC_LT;
  1059. jmp_le:=OC_LTE;
  1060. end
  1061. else
  1062. begin
  1063. jmp_gt:=OC_A;
  1064. jmp_lt:=OC_B;
  1065. jmp_le:=OC_BE;
  1066. end;
  1067. secondpass(left);
  1068. if (left.expectloc=LOC_JUMP)<>
  1069. (left.location.loc=LOC_JUMP) then
  1070. internalerror(2006050501);
  1071. { determines the size of the operand }
  1072. opsize:=left.resultdef;
  1073. { copy the case expression to a register }
  1074. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
  1075. {$if not defined(cpu64bitalu)}
  1076. if def_cgsize(opsize) in [OS_S64,OS_64] then
  1077. begin
  1078. hregister:=left.location.register64.reglo;
  1079. hregister2:=left.location.register64.reghi;
  1080. end
  1081. else
  1082. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1083. hregister:=left.location.register;
  1084. { we need the min_label always to choose between }
  1085. { cmps and subs/decs }
  1086. min_label:=case_get_min(labels);
  1087. { Generate the jumps }
  1088. {$ifdef OLDREGVARS}
  1089. load_all_regvars(current_asmdata.CurrAsmList);
  1090. {$endif OLDREGVARS}
  1091. {$if not defined(cpu64bitalu)}
  1092. if def_cgsize(opsize) in [OS_64,OS_S64] then
  1093. genlinearcmplist(labels)
  1094. else
  1095. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1096. begin
  1097. if cs_opt_level1 in current_settings.optimizerswitches then
  1098. begin
  1099. { procedures are empirically passed on }
  1100. { consumption can also be calculated }
  1101. { but does it pay on the different }
  1102. { processors? }
  1103. { moreover can the size only be appro- }
  1104. { ximated as it is not known if rel8, }
  1105. { rel16 or rel32 jumps are used }
  1106. max_label := case_get_max(labels);
  1107. { can we omit the range check of the jump table ? }
  1108. getrange(left.resultdef,lv,hv);
  1109. jumptable_no_range:=(lv=min_label) and (hv=max_label);
  1110. distv:=max_label-min_label;
  1111. if distv>=0 then
  1112. dist:=distv.uvalue
  1113. else
  1114. dist:=asizeuint(-distv.svalue);
  1115. { optimize for size ? }
  1116. if cs_opt_size in current_settings.optimizerswitches then
  1117. begin
  1118. if has_jumptable and
  1119. (min_label>=int64(low(aint))) and
  1120. (max_label<=high(aint)) and
  1121. not((labelcnt<=2) or
  1122. (distv.svalue<0) or
  1123. (dist>3*labelcnt)) then
  1124. begin
  1125. { if the labels less or more a continuum then }
  1126. genjumptable(labels,min_label.svalue,max_label.svalue);
  1127. end
  1128. else
  1129. begin
  1130. { a linear list is always smaller than a jump tree }
  1131. genlinearlist(labels);
  1132. end;
  1133. end
  1134. else
  1135. begin
  1136. max_dist:=4*labelcoverage;
  1137. { Don't allow jump tables to get too large }
  1138. if max_dist>4*labelcnt then
  1139. max_dist:=min(max_dist,2048);
  1140. if jumptable_no_range then
  1141. max_linear_list:=4
  1142. else
  1143. max_linear_list:=2;
  1144. { allow processor specific values }
  1145. optimizevalues(max_linear_list,max_dist);
  1146. if (labelcnt<=max_linear_list) then
  1147. genlinearlist(labels)
  1148. else
  1149. begin
  1150. if (has_jumptable) and
  1151. (dist<max_dist) and
  1152. (min_label>=int64(low(aint))) and
  1153. (max_label<=high(aint)) then
  1154. genjumptable(labels,min_label.svalue,max_label.svalue)
  1155. { value has been determined on an i7-4770 using a random case with random values
  1156. if more values are known, this can be handled depending on the target CPU
  1157. Testing on a Core 2 Duo E6850 as well as on a Raspi3 showed also, that 64 is
  1158. a good value }
  1159. else if labelcnt>=64 then
  1160. genjmptree(labels)
  1161. else
  1162. genlinearlist(labels);
  1163. end;
  1164. end;
  1165. end
  1166. else
  1167. { it's always not bad }
  1168. genlinearlist(labels);
  1169. end;
  1170. { generate the instruction blocks }
  1171. for i:=0 to blocks.count-1 do with pcaseblock(blocks[i])^ do
  1172. begin
  1173. { If the labels are not equal, then the block label has been shortcut to point elsewhere,
  1174. so there's no need to implement it }
  1175. if not shortcut then
  1176. begin
  1177. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1178. cg.a_label(current_asmdata.CurrAsmList,blocklabel);
  1179. secondpass(statement);
  1180. { don't come back to case line }
  1181. current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
  1182. {$ifdef OLDREGVARS}
  1183. load_all_regvars(current_asmdata.CurrAsmList);
  1184. {$endif OLDREGVARS}
  1185. hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
  1186. end;
  1187. end;
  1188. { ...and the else block }
  1189. if not ShortcutElse then
  1190. begin
  1191. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1192. hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
  1193. end;
  1194. if Assigned(elseblock) then
  1195. begin
  1196. secondpass(elseblock);
  1197. {$ifdef OLDREGVARS}
  1198. load_all_regvars(current_asmdata.CurrAsmList);
  1199. {$endif OLDREGVARS}
  1200. end;
  1201. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1202. hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
  1203. { Reset labels }
  1204. for i:=0 to blocks.count-1 do
  1205. pcaseblock(blocks[i])^.blocklabel:=nil;
  1206. flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
  1207. end;
  1208. begin
  1209. csetelementnode:=tcgsetelementnode;
  1210. cinnode:=tcginnode;
  1211. ccasenode:=tcgcasenode;
  1212. end.