cgcpu.pas 63 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823
  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  40. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  41. procedure a_call_ref(list : TAsmList;ref: treference);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { fpu move instructions }
  50. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  51. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  52. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  53. { comparison operations }
  54. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  55. l : tasmlabel);override;
  56. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  57. procedure a_jmp_name(list : TAsmList;const s : string); override;
  58. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  59. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  60. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  61. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  62. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  63. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  64. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);override;
  65. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  66. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  67. procedure g_save_registers(list : TAsmList);override;
  68. procedure g_restore_registers(list : TAsmList);override;
  69. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  70. procedure fixref(list : TAsmList;var ref : treference);
  71. function normalize_ref(list : TAsmList;ref : treference;
  72. tmpreg : tregister) : treference;
  73. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  74. procedure g_stackpointer_alloc(list : TAsmList;size : longint);override;
  75. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  76. procedure a_adjust_sp(list: TAsmList; value: longint);
  77. function GetLoad(const ref : treference) : tasmop;
  78. function GetStore(const ref: treference): tasmop;
  79. procedure a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: TCGSize; src, dst: TRegister); override;
  80. protected
  81. procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  82. procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
  83. end;
  84. tcg64favr = class(tcg64f32)
  85. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  86. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  87. end;
  88. procedure create_codegen;
  89. const
  90. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  91. A_NONE,A_MUL,A_MULS,A_NEG,A_COM,A_OR,
  92. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  93. implementation
  94. uses
  95. globals,verbose,systems,cutils,
  96. fmodule,
  97. symconst,symsym,symtable,
  98. tgobj,rgobj,
  99. procinfo,cpupi,
  100. paramgr;
  101. procedure tcgavr.init_register_allocators;
  102. begin
  103. inherited init_register_allocators;
  104. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  105. [RS_R8,RS_R9,
  106. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  107. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  108. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7],first_int_imreg,[]);
  109. { rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  110. [RS_R26,RS_R30],first_int_imreg,[]); }
  111. end;
  112. procedure tcgavr.done_register_allocators;
  113. begin
  114. rg[R_INTREGISTER].free;
  115. // rg[R_ADDRESSREGISTER].free;
  116. inherited done_register_allocators;
  117. end;
  118. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  119. var
  120. tmp1,tmp2,tmp3 : TRegister;
  121. begin
  122. case size of
  123. OS_8,OS_S8:
  124. Result:=inherited getintregister(list, size);
  125. OS_16,OS_S16:
  126. begin
  127. Result:=inherited getintregister(list, OS_8);
  128. { ensure that the high register can be retrieved by
  129. GetNextReg
  130. }
  131. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  132. internalerror(2011021331);
  133. end;
  134. OS_32,OS_S32:
  135. begin
  136. Result:=inherited getintregister(list, OS_8);
  137. tmp1:=inherited getintregister(list, OS_8);
  138. { ensure that the high register can be retrieved by
  139. GetNextReg
  140. }
  141. if tmp1<>GetNextReg(Result) then
  142. internalerror(2011021332);
  143. tmp2:=inherited getintregister(list, OS_8);
  144. { ensure that the upper register can be retrieved by
  145. GetNextReg
  146. }
  147. if tmp2<>GetNextReg(tmp1) then
  148. internalerror(2011021333);
  149. tmp3:=inherited getintregister(list, OS_8);
  150. { ensure that the upper register can be retrieved by
  151. GetNextReg
  152. }
  153. if tmp3<>GetNextReg(tmp2) then
  154. internalerror(2011021334);
  155. end;
  156. else
  157. internalerror(2011021330);
  158. end;
  159. end;
  160. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  161. begin
  162. Result:=getintregister(list,OS_ADDR);
  163. end;
  164. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);
  165. var
  166. ref: treference;
  167. begin
  168. paraloc.check_simple_location;
  169. paramanager.allocparaloc(list,paraloc.location);
  170. case paraloc.location^.loc of
  171. LOC_REGISTER,LOC_CREGISTER:
  172. a_load_const_reg(list,size,a,paraloc.location^.register);
  173. LOC_REFERENCE:
  174. begin
  175. reference_reset(ref,paraloc.alignment);
  176. ref.base:=paraloc.location^.reference.index;
  177. ref.offset:=paraloc.location^.reference.offset;
  178. a_load_const_ref(list,size,a,ref);
  179. end;
  180. else
  181. internalerror(2002081101);
  182. end;
  183. end;
  184. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  185. var
  186. tmpref, ref: treference;
  187. location: pcgparalocation;
  188. sizeleft: tcgint;
  189. begin
  190. location := paraloc.location;
  191. tmpref := r;
  192. sizeleft := paraloc.intsize;
  193. while assigned(location) do
  194. begin
  195. paramanager.allocparaloc(list,location);
  196. case location^.loc of
  197. LOC_REGISTER,LOC_CREGISTER:
  198. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  199. LOC_REFERENCE:
  200. begin
  201. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  202. { doubles in softemu mode have a strange order of registers and references }
  203. if location^.size=OS_32 then
  204. g_concatcopy(list,tmpref,ref,4)
  205. else
  206. begin
  207. g_concatcopy(list,tmpref,ref,sizeleft);
  208. if assigned(location^.next) then
  209. internalerror(2005010710);
  210. end;
  211. end;
  212. LOC_VOID:
  213. begin
  214. // nothing to do
  215. end;
  216. else
  217. internalerror(2002081103);
  218. end;
  219. inc(tmpref.offset,tcgsize2size[location^.size]);
  220. dec(sizeleft,tcgsize2size[location^.size]);
  221. location := location^.next;
  222. end;
  223. end;
  224. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  225. var
  226. ref: treference;
  227. tmpreg: tregister;
  228. begin
  229. paraloc.check_simple_location;
  230. paramanager.allocparaloc(list,paraloc.location);
  231. case paraloc.location^.loc of
  232. LOC_REGISTER,LOC_CREGISTER:
  233. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  234. LOC_REFERENCE:
  235. begin
  236. reference_reset(ref,paraloc.alignment);
  237. ref.base := paraloc.location^.reference.index;
  238. ref.offset := paraloc.location^.reference.offset;
  239. tmpreg := getintregister(list,OS_ADDR);
  240. a_loadaddr_ref_reg(list,r,tmpreg);
  241. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  242. end;
  243. else
  244. internalerror(2002080701);
  245. end;
  246. end;
  247. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  248. begin
  249. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  250. {
  251. the compiler does not properly set this flag anymore in pass 1, and
  252. for now we only need it after pass 2 (I hope) (JM)
  253. if not(pi_do_call in current_procinfo.flags) then
  254. internalerror(2003060703);
  255. }
  256. include(current_procinfo.flags,pi_do_call);
  257. end;
  258. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  259. begin
  260. a_reg_alloc(list,NR_ZLO);
  261. a_reg_alloc(list,NR_ZHI);
  262. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  263. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  264. list.concat(taicpu.op_none(A_ICALL));
  265. a_reg_dealloc(list,NR_ZLO);
  266. a_reg_dealloc(list,NR_ZHI);
  267. include(current_procinfo.flags,pi_do_call);
  268. end;
  269. procedure tcgavr.a_call_ref(list : TAsmList;ref: treference);
  270. begin
  271. a_reg_alloc(list,NR_ZLO);
  272. a_reg_alloc(list,NR_ZHI);
  273. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,NR_ZLO);
  274. list.concat(taicpu.op_none(A_ICALL));
  275. a_reg_dealloc(list,NR_ZLO);
  276. a_reg_dealloc(list,NR_ZHI);
  277. include(current_procinfo.flags,pi_do_call);
  278. end;
  279. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
  280. begin
  281. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  282. internalerror(2012102403);
  283. a_op_const_reg_internal(list,Op,size,a,reg,NR_NO);
  284. end;
  285. procedure tcgavr.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister);
  286. begin
  287. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  288. internalerror(2012102401);
  289. a_op_reg_reg_internal(list,Op,size,src,NR_NO,dst,NR_NO);
  290. end;
  291. procedure tcgavr.a_op_reg_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  292. var
  293. countreg,
  294. tmpreg: tregister;
  295. i : integer;
  296. instr : taicpu;
  297. paraloc1,paraloc2,paraloc3 : TCGPara;
  298. l1,l2 : tasmlabel;
  299. pd : tprocdef;
  300. procedure NextSrcDst;
  301. begin
  302. if i=5 then
  303. begin
  304. dst:=dsthi;
  305. src:=srchi;
  306. end
  307. else
  308. begin
  309. dst:=GetNextReg(dst);
  310. src:=GetNextReg(src);
  311. end;
  312. end;
  313. { iterates TmpReg through all registers of dst }
  314. procedure NextTmp;
  315. begin
  316. if i=5 then
  317. tmpreg:=dsthi
  318. else
  319. tmpreg:=GetNextReg(tmpreg);
  320. end;
  321. begin
  322. case op of
  323. OP_ADD:
  324. begin
  325. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  326. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  327. begin
  328. for i:=2 to tcgsize2size[size] do
  329. begin
  330. NextSrcDst;
  331. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  332. end;
  333. end;
  334. end;
  335. OP_SUB:
  336. begin
  337. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  338. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  339. begin
  340. for i:=2 to tcgsize2size[size] do
  341. begin
  342. NextSrcDst;
  343. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  344. end;
  345. end;
  346. end;
  347. OP_NEG:
  348. begin
  349. if src<>dst then
  350. a_load_reg_reg(list,size,size,src,dst);
  351. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  352. begin
  353. tmpreg:=GetNextReg(dst);
  354. for i:=2 to tcgsize2size[size] do
  355. begin
  356. list.concat(taicpu.op_reg(A_COM,tmpreg));
  357. NextTmp;
  358. end;
  359. list.concat(taicpu.op_reg(A_NEG,dst));
  360. tmpreg:=GetNextReg(dst);
  361. for i:=2 to tcgsize2size[size] do
  362. begin
  363. list.concat(taicpu.op_reg_const(A_SBCI,dst,-1));
  364. NextTmp;
  365. end;
  366. end;
  367. end;
  368. OP_NOT:
  369. begin
  370. for i:=1 to tcgsize2size[size] do
  371. begin
  372. if src<>dst then
  373. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  374. list.concat(taicpu.op_reg(A_COM,dst));
  375. NextSrcDst;
  376. end;
  377. end;
  378. OP_MUL,OP_IMUL:
  379. begin
  380. if size in [OS_8,OS_S8] then
  381. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src))
  382. else if size=OS_16 then
  383. begin
  384. pd:=search_system_proc('fpc_mul_word');
  385. paraloc1.init;
  386. paraloc2.init;
  387. paraloc3.init;
  388. paramanager.getintparaloc(pd,1,paraloc1);
  389. paramanager.getintparaloc(pd,2,paraloc2);
  390. paramanager.getintparaloc(pd,3,paraloc3);
  391. a_load_const_cgpara(list,OS_8,0,paraloc3);
  392. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  393. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  394. paramanager.freecgpara(list,paraloc3);
  395. paramanager.freecgpara(list,paraloc2);
  396. paramanager.freecgpara(list,paraloc1);
  397. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  398. a_call_name(list,'FPC_MUL_WORD',false);
  399. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  400. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  401. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  402. paraloc3.done;
  403. paraloc2.done;
  404. paraloc1.done;
  405. end
  406. else
  407. internalerror(2011022002);
  408. end;
  409. OP_DIV,OP_IDIV:
  410. { special stuff, needs separate handling inside code }
  411. { generator }
  412. internalerror(2011022001);
  413. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  414. begin
  415. current_asmdata.getjumplabel(l1);
  416. current_asmdata.getjumplabel(l2);
  417. countreg:=getintregister(list,OS_8);
  418. a_load_reg_reg(list,size,OS_8,src,countreg);
  419. list.concat(taicpu.op_reg_const(A_CP,countreg,0));
  420. a_jmp_flags(list,F_EQ,l2);
  421. cg.a_label(list,l1);
  422. case op of
  423. OP_SHR:
  424. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  425. OP_SHL:
  426. list.concat(taicpu.op_reg(A_LSL,dst));
  427. OP_SAR:
  428. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  429. OP_ROR:
  430. begin
  431. { load carry? }
  432. if not(size in [OS_8,OS_S8]) then
  433. begin
  434. list.concat(taicpu.op_none(A_CLC));
  435. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  436. list.concat(taicpu.op_none(A_SEC));
  437. end;
  438. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  439. end;
  440. OP_ROL:
  441. begin
  442. { load carry? }
  443. if not(size in [OS_8,OS_S8]) then
  444. begin
  445. list.concat(taicpu.op_none(A_CLC));
  446. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1),7));
  447. list.concat(taicpu.op_none(A_SEC));
  448. end;
  449. list.concat(taicpu.op_reg(A_ROL,dst))
  450. end;
  451. else
  452. internalerror(2011030901);
  453. end;
  454. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  455. begin
  456. for i:=2 to tcgsize2size[size] do
  457. begin
  458. case op of
  459. OP_ROR,
  460. OP_SHR:
  461. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  462. OP_ROL,
  463. OP_SHL:
  464. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg64(dst,dsthi,i-1)));
  465. OP_SAR:
  466. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  467. else
  468. internalerror(2011030902);
  469. end;
  470. end;
  471. end;
  472. a_op_const_reg(list,OP_SUB,OS_8,1,countreg);
  473. a_jmp_flags(list,F_NE,l1);
  474. // keep registers alive
  475. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  476. cg.a_label(list,l2);
  477. end;
  478. OP_AND,OP_OR,OP_XOR:
  479. begin
  480. for i:=1 to tcgsize2size[size] do
  481. begin
  482. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  483. NextSrcDst;
  484. end;
  485. end;
  486. else
  487. internalerror(2011022004);
  488. end;
  489. end;
  490. procedure tcgavr.a_op_const_reg_internal(list: TAsmList; Op: TOpCG;
  491. size: TCGSize; a: tcgint; reg, reghi: TRegister);
  492. var
  493. mask : qword;
  494. shift : byte;
  495. i : byte;
  496. tmpreg : tregister;
  497. tmpreg64 : tregister64;
  498. procedure NextReg;
  499. begin
  500. if i=5 then
  501. reg:=reghi
  502. else
  503. reg:=GetNextReg(reg);
  504. end;
  505. begin
  506. mask:=$ff;
  507. shift:=0;
  508. case op of
  509. OP_OR:
  510. begin
  511. for i:=1 to tcgsize2size[size] do
  512. begin
  513. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  514. NextReg;
  515. mask:=mask shl 8;
  516. inc(shift,8);
  517. end;
  518. end;
  519. OP_AND:
  520. begin
  521. for i:=1 to tcgsize2size[size] do
  522. begin
  523. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  524. NextReg;
  525. mask:=mask shl 8;
  526. inc(shift,8);
  527. end;
  528. end;
  529. OP_SUB:
  530. begin
  531. list.concat(taicpu.op_reg_const(A_SUBI,reg,a));
  532. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  533. begin
  534. for i:=2 to tcgsize2size[size] do
  535. begin
  536. NextReg;
  537. mask:=mask shl 8;
  538. inc(shift,8);
  539. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  540. end;
  541. end;
  542. end;
  543. else
  544. begin
  545. if size in [OS_64,OS_S64] then
  546. begin
  547. tmpreg64.reglo:=getintregister(list,OS_32);
  548. tmpreg64.reghi:=getintregister(list,OS_32);
  549. cg64.a_load64_const_reg(list,a,tmpreg64);
  550. cg64.a_op64_reg_reg(list,op,size,tmpreg64,joinreg64(reg,reghi));
  551. end
  552. else
  553. begin
  554. tmpreg:=getintregister(list,size);
  555. a_load_const_reg(list,size,a,tmpreg);
  556. a_op_reg_reg(list,op,size,tmpreg,reg);
  557. end;
  558. end;
  559. end;
  560. end;
  561. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);
  562. var
  563. mask : qword;
  564. shift : byte;
  565. i : byte;
  566. begin
  567. mask:=$ff;
  568. shift:=0;
  569. for i:=1 to tcgsize2size[size] do
  570. begin
  571. if ((qword(a) and mask) shr shift)=0 then
  572. emit_mov(list,reg,NR_R1)
  573. else
  574. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  575. mask:=mask shl 8;
  576. inc(shift,8);
  577. reg:=GetNextReg(reg);
  578. end;
  579. end;
  580. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  581. procedure maybegetcpuregister(list:tasmlist;reg : tregister);
  582. begin
  583. { allocate the register only, if a cpu register is passed }
  584. if getsupreg(reg)<first_int_imreg then
  585. getcpuregister(list,reg);
  586. end;
  587. var
  588. tmpref : treference;
  589. l : tasmlabel;
  590. begin
  591. Result:=ref;
  592. if ref.addressmode<>AM_UNCHANGED then
  593. internalerror(2011021701);
  594. { Be sure to have a base register }
  595. if (ref.base=NR_NO) then
  596. begin
  597. { only symbol+offset? }
  598. if ref.index=NR_NO then
  599. exit;
  600. ref.base:=ref.index;
  601. ref.index:=NR_NO;
  602. end;
  603. if assigned(ref.symbol) or (ref.offset<>0) then
  604. begin
  605. reference_reset(tmpref,0);
  606. tmpref.symbol:=ref.symbol;
  607. tmpref.offset:=ref.offset;
  608. tmpref.refaddr:=addr_lo8;
  609. maybegetcpuregister(list,tmpreg);
  610. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  611. tmpref.refaddr:=addr_hi8;
  612. maybegetcpuregister(list,GetNextReg(tmpreg));
  613. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  614. if (ref.base<>NR_NO) then
  615. begin
  616. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  617. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  618. end;
  619. if (ref.index<>NR_NO) then
  620. begin
  621. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  622. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  623. end;
  624. ref.symbol:=nil;
  625. ref.offset:=0;
  626. ref.base:=tmpreg;
  627. ref.index:=NR_NO;
  628. end
  629. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  630. begin
  631. maybegetcpuregister(list,tmpreg);
  632. emit_mov(list,tmpreg,ref.index);
  633. maybegetcpuregister(list,GetNextReg(tmpreg));
  634. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  635. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  636. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  637. ref.base:=tmpreg;
  638. ref.index:=NR_NO;
  639. end
  640. else if (ref.base<>NR_NO) then
  641. begin
  642. maybegetcpuregister(list,tmpreg);
  643. emit_mov(list,tmpreg,ref.base);
  644. maybegetcpuregister(list,GetNextReg(tmpreg));
  645. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  646. ref.base:=tmpreg;
  647. ref.index:=NR_NO;
  648. end
  649. else if (ref.index<>NR_NO) then
  650. begin
  651. maybegetcpuregister(list,tmpreg);
  652. emit_mov(list,tmpreg,ref.index);
  653. maybegetcpuregister(list,GetNextReg(tmpreg));
  654. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  655. ref.base:=tmpreg;
  656. ref.index:=NR_NO;
  657. end;
  658. Result:=ref;
  659. end;
  660. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  661. var
  662. href : treference;
  663. conv_done: boolean;
  664. tmpreg : tregister;
  665. i : integer;
  666. QuickRef : Boolean;
  667. begin
  668. QuickRef:=false;
  669. if not((Ref.addressmode=AM_UNCHANGED) and
  670. (Ref.symbol=nil) and
  671. ((Ref.base=NR_R28) or
  672. (Ref.base=NR_R29)) and
  673. (Ref.Index=NR_No) and
  674. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  675. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  676. href:=normalize_ref(list,Ref,NR_R30)
  677. else
  678. begin
  679. QuickRef:=true;
  680. href:=Ref;
  681. end;
  682. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  683. internalerror(2011021307);
  684. conv_done:=false;
  685. if tosize<>fromsize then
  686. begin
  687. conv_done:=true;
  688. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  689. fromsize:=tosize;
  690. case fromsize of
  691. OS_8:
  692. begin
  693. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  694. href.addressmode:=AM_POSTINCREMENT;
  695. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  696. for i:=2 to tcgsize2size[tosize] do
  697. begin
  698. if QuickRef then
  699. inc(href.offset);
  700. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  701. href.addressmode:=AM_POSTINCREMENT
  702. else
  703. href.addressmode:=AM_UNCHANGED;
  704. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  705. end;
  706. end;
  707. OS_S8:
  708. begin
  709. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  710. href.addressmode:=AM_POSTINCREMENT;
  711. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  712. if tcgsize2size[tosize]>1 then
  713. begin
  714. tmpreg:=getintregister(list,OS_8);
  715. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  716. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  717. list.concat(taicpu.op_reg(A_COM,tmpreg));
  718. for i:=2 to tcgsize2size[tosize] do
  719. begin
  720. if QuickRef then
  721. inc(href.offset);
  722. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  723. href.addressmode:=AM_POSTINCREMENT
  724. else
  725. href.addressmode:=AM_UNCHANGED;
  726. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  727. end;
  728. end;
  729. end;
  730. OS_16:
  731. begin
  732. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  733. href.addressmode:=AM_POSTINCREMENT;
  734. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  735. if QuickRef then
  736. inc(href.offset)
  737. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  738. href.addressmode:=AM_POSTINCREMENT
  739. else
  740. href.addressmode:=AM_UNCHANGED;
  741. reg:=GetNextReg(reg);
  742. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  743. for i:=3 to tcgsize2size[tosize] do
  744. begin
  745. if QuickRef then
  746. inc(href.offset);
  747. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  748. href.addressmode:=AM_POSTINCREMENT
  749. else
  750. href.addressmode:=AM_UNCHANGED;
  751. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  752. end;
  753. end;
  754. OS_S16:
  755. begin
  756. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  757. href.addressmode:=AM_POSTINCREMENT;
  758. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  759. if QuickRef then
  760. inc(href.offset)
  761. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  762. href.addressmode:=AM_POSTINCREMENT
  763. else
  764. href.addressmode:=AM_UNCHANGED;
  765. reg:=GetNextReg(reg);
  766. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  767. if tcgsize2size[tosize]>2 then
  768. begin
  769. tmpreg:=getintregister(list,OS_8);
  770. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  771. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  772. list.concat(taicpu.op_reg(A_COM,tmpreg));
  773. for i:=3 to tcgsize2size[tosize] do
  774. begin
  775. if QuickRef then
  776. inc(href.offset);
  777. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  778. href.addressmode:=AM_POSTINCREMENT
  779. else
  780. href.addressmode:=AM_UNCHANGED;
  781. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  782. end;
  783. end;
  784. end;
  785. else
  786. conv_done:=false;
  787. end;
  788. end;
  789. if not conv_done then
  790. begin
  791. for i:=1 to tcgsize2size[fromsize] do
  792. begin
  793. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  794. href.addressmode:=AM_POSTINCREMENT
  795. else
  796. href.addressmode:=AM_UNCHANGED;
  797. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  798. if QuickRef then
  799. inc(href.offset);
  800. reg:=GetNextReg(reg);
  801. end;
  802. end;
  803. if not(QuickRef) then
  804. begin
  805. ungetcpuregister(list,href.base);
  806. ungetcpuregister(list,GetNextReg(href.base));
  807. end;
  808. end;
  809. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  810. const Ref : treference;reg : tregister);
  811. var
  812. href : treference;
  813. conv_done: boolean;
  814. tmpreg : tregister;
  815. i : integer;
  816. QuickRef : boolean;
  817. begin
  818. QuickRef:=false;
  819. if not((Ref.addressmode=AM_UNCHANGED) and
  820. (Ref.symbol=nil) and
  821. ((Ref.base=NR_R28) or
  822. (Ref.base=NR_R29)) and
  823. (Ref.Index=NR_No) and
  824. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  825. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  826. href:=normalize_ref(list,Ref,NR_R30)
  827. else
  828. begin
  829. QuickRef:=true;
  830. href:=Ref;
  831. end;
  832. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  833. internalerror(2011021307);
  834. conv_done:=false;
  835. if tosize<>fromsize then
  836. begin
  837. conv_done:=true;
  838. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  839. fromsize:=tosize;
  840. case fromsize of
  841. OS_8:
  842. begin
  843. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  844. for i:=2 to tcgsize2size[tosize] do
  845. begin
  846. reg:=GetNextReg(reg);
  847. list.concat(taicpu.op_reg(A_CLR,reg));
  848. end;
  849. end;
  850. OS_S8:
  851. begin
  852. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  853. tmpreg:=reg;
  854. if tcgsize2size[tosize]>1 then
  855. begin
  856. reg:=GetNextReg(reg);
  857. list.concat(taicpu.op_reg(A_CLR,reg));
  858. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  859. list.concat(taicpu.op_reg(A_COM,reg));
  860. tmpreg:=reg;
  861. for i:=3 to tcgsize2size[tosize] do
  862. begin
  863. reg:=GetNextReg(reg);
  864. emit_mov(list,reg,tmpreg);
  865. end;
  866. end;
  867. end;
  868. OS_16:
  869. begin
  870. if not(QuickRef) then
  871. href.addressmode:=AM_POSTINCREMENT;
  872. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  873. if QuickRef then
  874. inc(href.offset);
  875. href.addressmode:=AM_UNCHANGED;
  876. reg:=GetNextReg(reg);
  877. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  878. for i:=3 to tcgsize2size[tosize] do
  879. begin
  880. reg:=GetNextReg(reg);
  881. list.concat(taicpu.op_reg(A_CLR,reg));
  882. end;
  883. end;
  884. OS_S16:
  885. begin
  886. if not(QuickRef) then
  887. href.addressmode:=AM_POSTINCREMENT;
  888. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  889. if QuickRef then
  890. inc(href.offset);
  891. href.addressmode:=AM_UNCHANGED;
  892. reg:=GetNextReg(reg);
  893. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  894. tmpreg:=reg;
  895. reg:=GetNextReg(reg);
  896. list.concat(taicpu.op_reg(A_CLR,reg));
  897. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  898. list.concat(taicpu.op_reg(A_COM,reg));
  899. tmpreg:=reg;
  900. for i:=4 to tcgsize2size[tosize] do
  901. begin
  902. reg:=GetNextReg(reg);
  903. emit_mov(list,reg,tmpreg);
  904. end;
  905. end;
  906. else
  907. conv_done:=false;
  908. end;
  909. end;
  910. if not conv_done then
  911. begin
  912. for i:=1 to tcgsize2size[fromsize] do
  913. begin
  914. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  915. href.addressmode:=AM_POSTINCREMENT
  916. else
  917. href.addressmode:=AM_UNCHANGED;
  918. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  919. if QuickRef then
  920. inc(href.offset);
  921. reg:=GetNextReg(reg);
  922. end;
  923. end;
  924. if not(QuickRef) then
  925. begin
  926. ungetcpuregister(list,href.base);
  927. ungetcpuregister(list,GetNextReg(href.base));
  928. end;
  929. end;
  930. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  931. var
  932. conv_done: boolean;
  933. tmpreg : tregister;
  934. i : integer;
  935. begin
  936. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  937. internalerror(2011021310);
  938. conv_done:=false;
  939. if tosize<>fromsize then
  940. begin
  941. conv_done:=true;
  942. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  943. fromsize:=tosize;
  944. case fromsize of
  945. OS_8:
  946. begin
  947. emit_mov(list,reg2,reg1);
  948. for i:=2 to tcgsize2size[tosize] do
  949. begin
  950. reg2:=GetNextReg(reg2);
  951. list.concat(taicpu.op_reg(A_CLR,reg2));
  952. end;
  953. end;
  954. OS_S8:
  955. begin
  956. emit_mov(list,reg2,reg1);
  957. if tcgsize2size[tosize]>1 then
  958. begin
  959. reg2:=GetNextReg(reg2);
  960. list.concat(taicpu.op_reg(A_CLR,reg2));
  961. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  962. list.concat(taicpu.op_reg(A_COM,reg2));
  963. tmpreg:=reg2;
  964. for i:=3 to tcgsize2size[tosize] do
  965. begin
  966. reg2:=GetNextReg(reg2);
  967. emit_mov(list,reg2,tmpreg);
  968. end;
  969. end;
  970. end;
  971. OS_16:
  972. begin
  973. emit_mov(list,reg2,reg1);
  974. reg1:=GetNextReg(reg1);
  975. reg2:=GetNextReg(reg2);
  976. emit_mov(list,reg2,reg1);
  977. for i:=3 to tcgsize2size[tosize] do
  978. begin
  979. reg2:=GetNextReg(reg2);
  980. list.concat(taicpu.op_reg(A_CLR,reg2));
  981. end;
  982. end;
  983. OS_S16:
  984. begin
  985. emit_mov(list,reg2,reg1);
  986. reg1:=GetNextReg(reg1);
  987. reg2:=GetNextReg(reg2);
  988. emit_mov(list,reg2,reg1);
  989. if tcgsize2size[tosize]>2 then
  990. begin
  991. reg2:=GetNextReg(reg2);
  992. list.concat(taicpu.op_reg(A_CLR,reg2));
  993. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  994. list.concat(taicpu.op_reg(A_COM,reg2));
  995. tmpreg:=reg2;
  996. for i:=4 to tcgsize2size[tosize] do
  997. begin
  998. reg2:=GetNextReg(reg2);
  999. emit_mov(list,reg2,tmpreg);
  1000. end;
  1001. end;
  1002. end;
  1003. else
  1004. conv_done:=false;
  1005. end;
  1006. end;
  1007. if not conv_done and (reg1<>reg2) then
  1008. begin
  1009. for i:=1 to tcgsize2size[fromsize] do
  1010. begin
  1011. emit_mov(list,reg2,reg1);
  1012. reg1:=GetNextReg(reg1);
  1013. reg2:=GetNextReg(reg2);
  1014. end;
  1015. end;
  1016. end;
  1017. procedure tcgavr.a_loadfpu_reg_reg(list: TAsmList; fromsize,tosize: tcgsize; reg1, reg2: tregister);
  1018. begin
  1019. internalerror(2012010702);
  1020. end;
  1021. procedure tcgavr.a_loadfpu_ref_reg(list: TAsmList; fromsize,tosize: tcgsize; const ref: treference; reg: tregister);
  1022. begin
  1023. internalerror(2012010703);
  1024. end;
  1025. procedure tcgavr.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  1026. begin
  1027. internalerror(2012010704);
  1028. end;
  1029. { comparison operations }
  1030. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  1031. cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
  1032. var
  1033. swapped : boolean;
  1034. tmpreg : tregister;
  1035. i : byte;
  1036. begin
  1037. if a=0 then
  1038. begin
  1039. { swap parameters? }
  1040. case cmp_op of
  1041. OC_GT:
  1042. begin
  1043. swapped:=true;
  1044. cmp_op:=OC_LT;
  1045. end;
  1046. OC_LTE:
  1047. begin
  1048. swapped:=true;
  1049. cmp_op:=OC_GTE;
  1050. end;
  1051. OC_BE:
  1052. begin
  1053. swapped:=true;
  1054. cmp_op:=OC_AE;
  1055. end;
  1056. OC_A:
  1057. begin
  1058. swapped:=true;
  1059. cmp_op:=OC_A;
  1060. end;
  1061. else
  1062. internalerror(2013113006);
  1063. end;
  1064. if swapped then
  1065. list.concat(taicpu.op_reg_reg(A_CP,reg,NR_R1))
  1066. else
  1067. list.concat(taicpu.op_reg_reg(A_CP,NR_R1,reg));
  1068. for i:=2 to tcgsize2size[size] do
  1069. begin
  1070. reg:=GetNextReg(reg);
  1071. if swapped then
  1072. list.concat(taicpu.op_reg_reg(A_CPC,reg,NR_R1))
  1073. else
  1074. list.concat(taicpu.op_reg_reg(A_CPC,NR_R1,reg));
  1075. end;
  1076. a_jmp_cond(list,cmp_op,l);
  1077. end
  1078. else
  1079. inherited a_cmp_const_reg_label(list,size,cmp_op,a,reg,l);
  1080. end;
  1081. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  1082. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  1083. var
  1084. swapped : boolean;
  1085. tmpreg : tregister;
  1086. i : byte;
  1087. begin
  1088. { swap parameters? }
  1089. case cmp_op of
  1090. OC_GT:
  1091. begin
  1092. swapped:=true;
  1093. cmp_op:=OC_LT;
  1094. end;
  1095. OC_LTE:
  1096. begin
  1097. swapped:=true;
  1098. cmp_op:=OC_GTE;
  1099. end;
  1100. OC_BE:
  1101. begin
  1102. swapped:=true;
  1103. cmp_op:=OC_AE;
  1104. end;
  1105. OC_A:
  1106. begin
  1107. swapped:=true;
  1108. cmp_op:=OC_A;
  1109. end;
  1110. else
  1111. internalerror(2013113007);
  1112. end;
  1113. if swapped then
  1114. begin
  1115. tmpreg:=reg1;
  1116. reg1:=reg2;
  1117. reg2:=tmpreg;
  1118. end;
  1119. list.concat(taicpu.op_reg_reg(A_CP,reg1,reg2));
  1120. for i:=2 to tcgsize2size[size] do
  1121. begin
  1122. reg1:=GetNextReg(reg1);
  1123. reg2:=GetNextReg(reg2);
  1124. list.concat(taicpu.op_reg_reg(A_CPC,reg1,reg2));
  1125. end;
  1126. a_jmp_cond(list,cmp_op,l);
  1127. end;
  1128. procedure tcgavr.a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: TCGSize; src, dst: TRegister);
  1129. begin
  1130. Comment(V_Error,'tcgarm.a_bit_scan_reg_reg method not implemented');
  1131. end;
  1132. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  1133. var
  1134. ai : taicpu;
  1135. begin
  1136. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s));
  1137. ai.is_jmp:=true;
  1138. list.concat(ai);
  1139. end;
  1140. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  1141. var
  1142. ai : taicpu;
  1143. begin
  1144. ai:=taicpu.op_sym(A_JMP,l);
  1145. ai.is_jmp:=true;
  1146. list.concat(ai);
  1147. end;
  1148. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  1149. var
  1150. ai : taicpu;
  1151. begin
  1152. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  1153. ai.is_jmp:=true;
  1154. list.concat(ai);
  1155. end;
  1156. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  1157. var
  1158. l : TAsmLabel;
  1159. tmpflags : TResFlags;
  1160. begin
  1161. current_asmdata.getjumplabel(l);
  1162. {
  1163. if flags_to_cond(f) then
  1164. begin
  1165. tmpflags:=f;
  1166. inverse_flags(tmpflags);
  1167. list.concat(taicpu.op_reg(A_CLR,reg));
  1168. a_jmp_flags(list,tmpflags,l);
  1169. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1170. end
  1171. else
  1172. }
  1173. begin
  1174. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1175. a_jmp_flags(list,f,l);
  1176. list.concat(taicpu.op_reg(A_CLR,reg));
  1177. end;
  1178. cg.a_label(list,l);
  1179. end;
  1180. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  1181. var
  1182. i : integer;
  1183. begin
  1184. case value of
  1185. 0:
  1186. ;
  1187. -14..-1:
  1188. begin
  1189. if ((-value) mod 2)<>0 then
  1190. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1191. for i:=1 to (-value) div 2 do
  1192. list.concat(taicpu.op_const(A_RCALL,0));
  1193. end;
  1194. 1..7:
  1195. begin
  1196. for i:=1 to value do
  1197. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1198. end;
  1199. else
  1200. begin
  1201. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1202. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1203. // get SREG
  1204. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1205. // block interrupts
  1206. list.concat(taicpu.op_none(A_CLI));
  1207. // write high SP
  1208. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1209. // release interrupts
  1210. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1211. // write low SP
  1212. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1213. end;
  1214. end;
  1215. end;
  1216. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1217. begin
  1218. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1219. result:=A_LDS
  1220. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1221. result:=A_LDD
  1222. else
  1223. result:=A_LD;
  1224. end;
  1225. function tcgavr.GetStore(const ref: treference) : tasmop;
  1226. begin
  1227. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1228. result:=A_STS
  1229. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1230. result:=A_STD
  1231. else
  1232. result:=A_ST;
  1233. end;
  1234. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1235. var
  1236. regs : tcpuregisterset;
  1237. reg : tsuperregister;
  1238. begin
  1239. if not(nostackframe) then
  1240. begin
  1241. { save int registers }
  1242. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1243. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1244. regs:=regs+[RS_R28,RS_R29];
  1245. for reg:=RS_R31 downto RS_R0 do
  1246. if reg in regs then
  1247. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1248. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1249. begin
  1250. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1251. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1252. end
  1253. else
  1254. { the framepointer cannot be omitted on avr because sp
  1255. is not a register but part of the i/o map
  1256. }
  1257. internalerror(2011021901);
  1258. a_adjust_sp(list,-localsize);
  1259. end;
  1260. end;
  1261. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1262. var
  1263. regs : tcpuregisterset;
  1264. reg : TSuperRegister;
  1265. LocalSize : longint;
  1266. begin
  1267. if not(nostackframe) then
  1268. begin
  1269. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1270. begin
  1271. LocalSize:=current_procinfo.calc_stackframe_size;
  1272. a_adjust_sp(list,LocalSize);
  1273. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1274. for reg:=RS_R0 to RS_R31 do
  1275. if reg in regs then
  1276. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1277. end
  1278. else
  1279. { the framepointer cannot be omitted on avr because sp
  1280. is not a register but part of the i/o map
  1281. }
  1282. internalerror(2011021902);
  1283. end;
  1284. list.concat(taicpu.op_none(A_RET));
  1285. end;
  1286. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1287. var
  1288. tmpref : treference;
  1289. begin
  1290. if ref.addressmode<>AM_UNCHANGED then
  1291. internalerror(2011021701);
  1292. if assigned(ref.symbol) or (ref.offset<>0) then
  1293. begin
  1294. reference_reset(tmpref,0);
  1295. tmpref.symbol:=ref.symbol;
  1296. tmpref.offset:=ref.offset;
  1297. tmpref.refaddr:=addr_lo8;
  1298. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1299. tmpref.refaddr:=addr_hi8;
  1300. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1301. if (ref.base<>NR_NO) then
  1302. begin
  1303. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1304. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1305. end;
  1306. if (ref.index<>NR_NO) then
  1307. begin
  1308. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1309. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1310. end;
  1311. end
  1312. else if (ref.base<>NR_NO)then
  1313. begin
  1314. emit_mov(list,r,ref.base);
  1315. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1316. if (ref.index<>NR_NO) then
  1317. begin
  1318. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1319. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1320. end;
  1321. end
  1322. else if (ref.index<>NR_NO) then
  1323. begin
  1324. emit_mov(list,r,ref.index);
  1325. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1326. end;
  1327. end;
  1328. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1329. begin
  1330. internalerror(2011021320);
  1331. end;
  1332. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  1333. var
  1334. paraloc1,paraloc2,paraloc3 : TCGPara;
  1335. pd : tprocdef;
  1336. begin
  1337. pd:=search_system_proc('MOVE');
  1338. paraloc1.init;
  1339. paraloc2.init;
  1340. paraloc3.init;
  1341. paramanager.getintparaloc(pd,1,paraloc1);
  1342. paramanager.getintparaloc(pd,2,paraloc2);
  1343. paramanager.getintparaloc(pd,3,paraloc3);
  1344. a_load_const_cgpara(list,OS_SINT,len,paraloc3);
  1345. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1346. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1347. paramanager.freecgpara(list,paraloc3);
  1348. paramanager.freecgpara(list,paraloc2);
  1349. paramanager.freecgpara(list,paraloc1);
  1350. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1351. a_call_name_static(list,'FPC_MOVE');
  1352. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1353. paraloc3.done;
  1354. paraloc2.done;
  1355. paraloc1.done;
  1356. end;
  1357. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
  1358. var
  1359. countreg,tmpreg : tregister;
  1360. srcref,dstref : treference;
  1361. copysize,countregsize : tcgsize;
  1362. l : TAsmLabel;
  1363. i : longint;
  1364. SrcQuickRef, DestQuickRef : Boolean;
  1365. begin
  1366. if len>16 then
  1367. begin
  1368. current_asmdata.getjumplabel(l);
  1369. reference_reset(srcref,0);
  1370. reference_reset(dstref,0);
  1371. srcref.base:=NR_R30;
  1372. srcref.addressmode:=AM_POSTINCREMENT;
  1373. dstref.base:=NR_R26;
  1374. dstref.addressmode:=AM_POSTINCREMENT;
  1375. copysize:=OS_8;
  1376. if len<256 then
  1377. countregsize:=OS_8
  1378. else if len<65536 then
  1379. countregsize:=OS_16
  1380. else
  1381. internalerror(2011022007);
  1382. countreg:=getintregister(list,countregsize);
  1383. a_load_const_reg(list,countregsize,len,countreg);
  1384. a_loadaddr_ref_reg(list,source,NR_R30);
  1385. tmpreg:=getaddressregister(list);
  1386. a_loadaddr_ref_reg(list,dest,tmpreg);
  1387. { X is used for spilling code so we can load it
  1388. only by a push/pop sequence, this can be
  1389. optimized later on by the peephole optimizer
  1390. }
  1391. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1392. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1393. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1394. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1395. cg.a_label(list,l);
  1396. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1397. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1398. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1399. a_jmp_flags(list,F_NE,l);
  1400. // keep registers alive
  1401. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1402. end
  1403. else
  1404. begin
  1405. SrcQuickRef:=false;
  1406. DestQuickRef:=false;
  1407. if not((source.addressmode=AM_UNCHANGED) and
  1408. (source.symbol=nil) and
  1409. ((source.base=NR_R28) or
  1410. (source.base=NR_R29)) and
  1411. (source.Index=NR_NO) and
  1412. (source.Offset in [0..64-len])) and
  1413. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1414. srcref:=normalize_ref(list,source,NR_R30)
  1415. else
  1416. begin
  1417. SrcQuickRef:=true;
  1418. srcref:=source;
  1419. end;
  1420. if not((dest.addressmode=AM_UNCHANGED) and
  1421. (dest.symbol=nil) and
  1422. ((dest.base=NR_R28) or
  1423. (dest.base=NR_R29)) and
  1424. (dest.Index=NR_No) and
  1425. (dest.Offset in [0..64-len])) and
  1426. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1427. begin
  1428. if not(SrcQuickRef) then
  1429. begin
  1430. tmpreg:=getaddressregister(list);
  1431. dstref:=normalize_ref(list,dest,tmpreg);
  1432. { X is used for spilling code so we can load it
  1433. only by a push/pop sequence, this can be
  1434. optimized later on by the peephole optimizer
  1435. }
  1436. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1437. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1438. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1439. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1440. dstref.base:=NR_R26;
  1441. end
  1442. else
  1443. dstref:=normalize_ref(list,dest,NR_R30);
  1444. end
  1445. else
  1446. begin
  1447. DestQuickRef:=true;
  1448. dstref:=dest;
  1449. end;
  1450. for i:=1 to len do
  1451. begin
  1452. if not(SrcQuickRef) and (i<len) then
  1453. srcref.addressmode:=AM_POSTINCREMENT
  1454. else
  1455. srcref.addressmode:=AM_UNCHANGED;
  1456. if not(DestQuickRef) and (i<len) then
  1457. dstref.addressmode:=AM_POSTINCREMENT
  1458. else
  1459. dstref.addressmode:=AM_UNCHANGED;
  1460. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1461. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1462. if SrcQuickRef then
  1463. inc(srcref.offset);
  1464. if DestQuickRef then
  1465. inc(dstref.offset);
  1466. end;
  1467. if not(SrcQuickRef) then
  1468. begin
  1469. ungetcpuregister(list,srcref.base);
  1470. ungetcpuregister(list,GetNextReg(srcref.base));
  1471. end;
  1472. end;
  1473. end;
  1474. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1475. var
  1476. hl : tasmlabel;
  1477. ai : taicpu;
  1478. cond : TAsmCond;
  1479. begin
  1480. if not(cs_check_overflow in current_settings.localswitches) then
  1481. exit;
  1482. current_asmdata.getjumplabel(hl);
  1483. if not ((def.typ=pointerdef) or
  1484. ((def.typ=orddef) and
  1485. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  1486. pasbool8,pasbool16,pasbool32,pasbool64]))) then
  1487. cond:=C_VC
  1488. else
  1489. cond:=C_CC;
  1490. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1491. ai.SetCondition(cond);
  1492. ai.is_jmp:=true;
  1493. list.concat(ai);
  1494. a_call_name(list,'FPC_OVERFLOW',false);
  1495. a_label(list,hl);
  1496. end;
  1497. procedure tcgavr.g_save_registers(list: TAsmList);
  1498. begin
  1499. { this is done by the entry code }
  1500. end;
  1501. procedure tcgavr.g_restore_registers(list: TAsmList);
  1502. begin
  1503. { this is done by the exit code }
  1504. end;
  1505. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1506. var
  1507. ai1,ai2 : taicpu;
  1508. hl : TAsmLabel;
  1509. begin
  1510. ai1:=Taicpu.Op_sym(A_BRxx,l);
  1511. ai1.is_jmp:=true;
  1512. hl:=nil;
  1513. case cond of
  1514. OC_EQ:
  1515. ai1.SetCondition(C_EQ);
  1516. OC_GT:
  1517. begin
  1518. { emulate GT }
  1519. current_asmdata.getjumplabel(hl);
  1520. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1521. ai2.SetCondition(C_EQ);
  1522. ai2.is_jmp:=true;
  1523. list.concat(ai2);
  1524. ai1.SetCondition(C_GE);
  1525. end;
  1526. OC_LT:
  1527. ai1.SetCondition(C_LT);
  1528. OC_GTE:
  1529. ai1.SetCondition(C_GE);
  1530. OC_LTE:
  1531. begin
  1532. { emulate LTE }
  1533. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1534. ai2.SetCondition(C_EQ);
  1535. ai2.is_jmp:=true;
  1536. list.concat(ai2);
  1537. ai1.SetCondition(C_LT);
  1538. end;
  1539. OC_NE:
  1540. ai1.SetCondition(C_NE);
  1541. OC_BE:
  1542. begin
  1543. { emulate BE }
  1544. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1545. ai2.SetCondition(C_EQ);
  1546. ai2.is_jmp:=true;
  1547. list.concat(ai2);
  1548. ai1.SetCondition(C_LO);
  1549. end;
  1550. OC_B:
  1551. ai1.SetCondition(C_LO);
  1552. OC_AE:
  1553. ai1.SetCondition(C_SH);
  1554. OC_A:
  1555. begin
  1556. { emulate A (unsigned GT) }
  1557. current_asmdata.getjumplabel(hl);
  1558. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1559. ai2.SetCondition(C_EQ);
  1560. ai2.is_jmp:=true;
  1561. list.concat(ai2);
  1562. ai1.SetCondition(C_SH);
  1563. end;
  1564. else
  1565. internalerror(2011082501);
  1566. end;
  1567. list.concat(ai1);
  1568. if assigned(hl) then
  1569. a_label(list,hl);
  1570. end;
  1571. procedure tcgavr.g_stackpointer_alloc(list: TAsmList; size: longint);
  1572. begin
  1573. internalerror(201201071);
  1574. end;
  1575. procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  1576. begin
  1577. internalerror(2011021324);
  1578. end;
  1579. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1580. var
  1581. instr: taicpu;
  1582. begin
  1583. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1584. list.Concat(instr);
  1585. { Notify the register allocator that we have written a move instruction so
  1586. it can try to eliminate it. }
  1587. add_move_instruction(instr);
  1588. end;
  1589. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1590. begin
  1591. if not(size in [OS_S64,OS_64]) then
  1592. internalerror(2012102402);
  1593. tcgavr(cg).a_op_reg_reg_internal(list,Op,size,regsrc.reglo,regsrc.reghi,regdst.reglo,regdst.reghi);
  1594. end;
  1595. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1596. begin
  1597. tcgavr(cg).a_op_const_reg_internal(list,Op,size,value,reg.reglo,reg.reghi);
  1598. end;
  1599. procedure create_codegen;
  1600. begin
  1601. cg:=tcgavr.create;
  1602. cg64:=tcg64favr.create;
  1603. end;
  1604. end.