ncgmem.pas 47 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cpuinfo,cpubase,
  23. node,nmem;
  24. type
  25. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  26. procedure pass_generate_code;override;
  27. end;
  28. tcgloadparentfpnode = class(tloadparentfpnode)
  29. procedure pass_generate_code;override;
  30. end;
  31. tcgaddrnode = class(taddrnode)
  32. procedure pass_generate_code;override;
  33. end;
  34. tcgderefnode = class(tderefnode)
  35. procedure pass_generate_code;override;
  36. end;
  37. tcgsubscriptnode = class(tsubscriptnode)
  38. procedure pass_generate_code;override;
  39. end;
  40. tcgwithnode = class(twithnode)
  41. procedure pass_generate_code;override;
  42. end;
  43. tcgvecnode = class(tvecnode)
  44. function get_mul_size : aint;
  45. private
  46. procedure rangecheck_array;
  47. procedure rangecheck_string;
  48. protected
  49. {# This routine is used to calculate the address of the reference.
  50. On entry reg contains the index in the array,
  51. and l contains the size of each element in the array.
  52. This routine should update location.reference correctly,
  53. so it points to the correct address.
  54. }
  55. procedure update_reference_reg_mul(maybe_const_reg:tregister;l:aint);virtual;
  56. procedure update_reference_reg_packed(maybe_const_reg:tregister;l:aint);virtual;
  57. procedure second_wideansistring;virtual;
  58. procedure second_dynamicarray;virtual;
  59. public
  60. procedure pass_generate_code;override;
  61. end;
  62. implementation
  63. uses
  64. systems,
  65. cutils,cclasses,verbose,globals,constexp,
  66. symconst,symbase,symtype,symdef,symsym,symtable,defutil,paramgr,
  67. aasmbase,aasmtai,aasmdata,
  68. procinfo,pass_2,parabase,
  69. pass_1,nld,ncon,nadd,ncnv,nutils,
  70. cgutils,cgobj,hlcgobj,
  71. tgobj,ncgutil,objcgutl,
  72. defcmp
  73. ;
  74. {*****************************************************************************
  75. TCGLOADVMTADDRNODE
  76. *****************************************************************************}
  77. procedure tcgloadvmtaddrnode.pass_generate_code;
  78. var
  79. href : treference;
  80. pool : THashSet;
  81. entry : PHashSetItem;
  82. begin
  83. location_reset(location,LOC_REGISTER,OS_ADDR);
  84. if (left.nodetype=typen) then
  85. begin
  86. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  87. if not is_objcclass(left.resultdef) then
  88. begin
  89. reference_reset_symbol(href,
  90. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  91. sizeof(pint));
  92. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,location.register);
  93. end
  94. else
  95. begin
  96. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  97. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  98. if (target_info.system in systems_objc_nfabi) then
  99. begin
  100. { find/add necessary classref/classname pool entries }
  101. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  102. end
  103. else
  104. begin
  105. { find/add necessary classref/classname pool entries }
  106. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  107. end;
  108. reference_reset_symbol(href,tasmlabel(entry^.Data),0,sizeof(pint));
  109. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  110. end;
  111. end
  112. else
  113. begin
  114. { left contains self, load vmt from self }
  115. secondpass(left);
  116. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  117. end;
  118. end;
  119. {*****************************************************************************
  120. TCGLOADPARENTFPNODE
  121. *****************************************************************************}
  122. procedure tcgloadparentfpnode.pass_generate_code;
  123. var
  124. currpi : tprocinfo;
  125. hsym : tparavarsym;
  126. href : treference;
  127. begin
  128. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  129. begin
  130. location_reset(location,LOC_REGISTER,OS_ADDR);
  131. location.register:=current_procinfo.framepointer;
  132. end
  133. else
  134. begin
  135. currpi:=current_procinfo;
  136. location_reset(location,LOC_REGISTER,OS_ADDR);
  137. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  138. { load framepointer of current proc }
  139. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  140. if not assigned(hsym) then
  141. internalerror(200309281);
  142. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,hsym.localloc,location.register);
  143. { walk parents }
  144. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  145. begin
  146. currpi:=currpi.parent;
  147. if not assigned(currpi) then
  148. internalerror(200311201);
  149. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  150. if not assigned(hsym) then
  151. internalerror(200309282);
  152. if hsym.localloc.loc<>LOC_REFERENCE then
  153. internalerror(200309283);
  154. reference_reset_base(href,location.register,hsym.localloc.reference.offset,sizeof(pint));
  155. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  156. end;
  157. end;
  158. end;
  159. {*****************************************************************************
  160. TCGADDRNODE
  161. *****************************************************************************}
  162. procedure tcgaddrnode.pass_generate_code;
  163. begin
  164. secondpass(left);
  165. location_reset(location,LOC_REGISTER,OS_ADDR);
  166. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  167. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  168. { on x86_64-win64, array of chars can be returned in registers, however,
  169. when passing these arrays to other functions, the compiler wants to take
  170. the address of the array so when the addrnode has been created internally,
  171. we have to force the data into memory, see also tw14388.pp
  172. }
  173. if nf_internal in flags then
  174. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  175. else
  176. internalerror(2006111510);
  177. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
  178. end;
  179. {*****************************************************************************
  180. TCGDEREFNODE
  181. *****************************************************************************}
  182. procedure tcgderefnode.pass_generate_code;
  183. var
  184. paraloc1 : tcgpara;
  185. pd : tprocdef;
  186. sym : tsym;
  187. st : tsymtable;
  188. hp : pnode;
  189. hp2 : tnode;
  190. extraoffset : tcgint;
  191. begin
  192. sym:=nil;
  193. { assume natural alignment, except for packed records }
  194. if not(resultdef.typ in [recorddef,objectdef]) or
  195. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  196. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  197. else
  198. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  199. { can we fold an add/sub node into the offset of the deref node? }
  200. extraoffset:=0;
  201. hp:=actualtargetnode(@left);
  202. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  203. begin
  204. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  205. replacenode(hp^,taddnode(hp^).left);
  206. end
  207. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  208. begin
  209. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  210. replacenode(hp^,taddnode(hp^).left);
  211. end
  212. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  213. begin
  214. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  215. replacenode(hp^,taddnode(hp^).right);
  216. end;
  217. secondpass(left);
  218. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  219. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  220. case left.location.loc of
  221. LOC_CREGISTER,
  222. LOC_REGISTER:
  223. begin
  224. maybechangeloadnodereg(current_asmdata.CurrAsmList,left,true);
  225. {$ifdef cpu_uses_separate_address_registers}
  226. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  227. begin
  228. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  229. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  230. location.reference.base);
  231. end
  232. else
  233. {$endif}
  234. location.reference.base := left.location.register;
  235. end;
  236. LOC_CREFERENCE,
  237. LOC_REFERENCE:
  238. begin
  239. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  240. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  241. end;
  242. LOC_CONSTANT:
  243. begin
  244. location.reference.offset:=left.location.value;
  245. end;
  246. else
  247. internalerror(200507031);
  248. end;
  249. location.reference.offset:=location.reference.offset+extraoffset;
  250. if (cs_use_heaptrc in current_settings.globalswitches) and
  251. (cs_checkpointer in current_settings.localswitches) and
  252. not(cs_compilesystem in current_settings.moduleswitches) and
  253. {$ifdef x86}
  254. (tpointerdef(left.resultdef).x86pointertyp = default_x86_data_pointer_type) and
  255. {$endif x86}
  256. not(nf_no_checkpointer in flags) and
  257. { can be NR_NO in case of LOC_CONSTANT }
  258. (location.reference.base<>NR_NO) then
  259. begin
  260. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  261. (sym.typ<>procsym) then
  262. internalerror(2012010601);
  263. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  264. paraloc1.init;
  265. paramanager.getintparaloc(pd,1,paraloc1);
  266. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,resultdef,location.reference.base,paraloc1);
  267. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  268. paraloc1.done;
  269. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  270. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  271. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  272. end;
  273. end;
  274. {*****************************************************************************
  275. TCGSUBSCRIPTNODE
  276. *****************************************************************************}
  277. procedure tcgsubscriptnode.pass_generate_code;
  278. var
  279. asmsym: tasmsymbol;
  280. paraloc1 : tcgpara;
  281. tmpref: treference;
  282. sref: tsubsetreference;
  283. offsetcorrection : aint;
  284. pd : tprocdef;
  285. sym : tsym;
  286. st : tsymtable;
  287. begin
  288. sym:=nil;
  289. secondpass(left);
  290. if codegenerror then
  291. exit;
  292. paraloc1.init;
  293. { several object types must be dereferenced implicitly }
  294. if is_implicit_pointer_object_type(left.resultdef) then
  295. begin
  296. if (not is_managed_type(left.resultdef)) or
  297. (target_info.system in systems_garbage_collected_managed_types) then
  298. begin
  299. { the contents of a class are aligned to a sizeof(pointer) }
  300. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),sizeof(pint));
  301. case left.location.loc of
  302. LOC_CREGISTER,
  303. LOC_REGISTER:
  304. begin
  305. {$ifdef cpu_uses_separate_address_registers}
  306. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  307. begin
  308. location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
  309. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  310. left.location.register,location.reference.base);
  311. end
  312. else
  313. {$endif}
  314. location.reference.base := left.location.register;
  315. end;
  316. LOC_CREFERENCE,
  317. LOC_REFERENCE,
  318. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  319. LOC_SUBSETREG,
  320. LOC_CSUBSETREG,
  321. LOC_SUBSETREF,
  322. LOC_CSUBSETREF:
  323. begin
  324. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  325. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  326. end;
  327. LOC_CONSTANT:
  328. begin
  329. { can happen with @classtype(pointerconst).field }
  330. location.reference.offset:=left.location.value;
  331. end;
  332. else
  333. internalerror(2009092401);
  334. end;
  335. { implicit deferencing }
  336. if (cs_use_heaptrc in current_settings.globalswitches) and
  337. (cs_checkpointer in current_settings.localswitches) and
  338. not(cs_compilesystem in current_settings.moduleswitches) then
  339. begin
  340. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  341. (sym.typ<>procsym) then
  342. internalerror(2012010602);
  343. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  344. paramanager.getintparaloc(pd,1,paraloc1);
  345. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,resultdef,location.reference.base,paraloc1);
  346. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  347. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  348. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  349. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  350. end;
  351. end
  352. else
  353. { reference-counted implicit pointer object types don't have
  354. fields -> cannot be subscripted (calls are handled via call
  355. nodes) }
  356. internalerror(2011011901);
  357. end
  358. else
  359. begin
  360. location_copy(location,left.location);
  361. { some abi's require that functions return (some) records in }
  362. { registers }
  363. case location.loc of
  364. LOC_REFERENCE,
  365. LOC_CREFERENCE:
  366. ;
  367. LOC_REGISTER,
  368. LOC_CREGISTER,
  369. LOC_MMREGISTER,
  370. LOC_FPUREGISTER:
  371. begin
  372. { in case the result is not something that can be put
  373. into an integer register (e.g.
  374. function_returning_record().non_regable_field, or
  375. a function returning a value > sizeof(intreg))
  376. -> force to memory
  377. }
  378. if not tstoreddef(left.resultdef).is_intregable or
  379. not tstoreddef(resultdef).is_intregable or
  380. { if the field spans multiple registers, we must force the record into
  381. memory as well }
  382. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  383. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  384. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER]) then
  385. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  386. else
  387. begin
  388. if (left.location.loc = LOC_REGISTER) then
  389. location.loc := LOC_SUBSETREG
  390. else
  391. location.loc := LOC_CSUBSETREG;
  392. location.size:=def_cgsize(resultdef);
  393. offsetcorrection:=0;
  394. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  395. begin
  396. if (vs.fieldoffset>=sizeof(aword)) then
  397. begin
  398. location.sreg.subsetreg := left.location.registerhi;
  399. offsetcorrection:=sizeof(aword)*8;
  400. end
  401. else
  402. location.sreg.subsetreg := left.location.register;
  403. location.sreg.subsetregsize := OS_INT;
  404. end
  405. else
  406. begin
  407. location.sreg.subsetreg := left.location.register;
  408. location.sreg.subsetregsize := left.location.size;
  409. end;
  410. if not is_packed_record_or_object(left.resultdef) then
  411. begin
  412. if (target_info.endian = ENDIAN_BIG) then
  413. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  414. else
  415. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  416. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  417. end
  418. else
  419. begin
  420. location.sreg.bitlen := resultdef.packedbitsize;
  421. if (target_info.endian = ENDIAN_BIG) then
  422. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  423. else
  424. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  425. end;
  426. end;
  427. end;
  428. LOC_SUBSETREG,
  429. LOC_CSUBSETREG:
  430. begin
  431. location.size:=def_cgsize(resultdef);
  432. if not is_packed_record_or_object(left.resultdef) then
  433. begin
  434. if (target_info.endian = ENDIAN_BIG) then
  435. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  436. else
  437. inc(location.sreg.startbit, vs.fieldoffset * 8);
  438. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  439. end
  440. else
  441. begin
  442. location.sreg.bitlen := resultdef.packedbitsize;
  443. if (target_info.endian = ENDIAN_BIG) then
  444. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  445. else
  446. inc(location.sreg.startbit, vs.fieldoffset);
  447. end;
  448. end;
  449. else
  450. internalerror(2006031901);
  451. end;
  452. end;
  453. if is_objc_class_or_protocol(left.resultdef) and
  454. (target_info.system in systems_objc_nfabi) then
  455. begin
  456. if (location.loc<>LOC_REFERENCE) or
  457. (location.reference.index<>NR_NO) then
  458. internalerror(2009092402);
  459. { the actual field offset is stored in memory (to solve the
  460. "fragile base class" problem: this way the layout of base
  461. classes can be changed without breaking programs compiled against
  462. earlier versions)
  463. }
  464. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  465. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  466. location.reference.index:=cg.getaddressregister(current_asmdata.CurrAsmList);
  467. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,tmpref,location.reference.index);
  468. { always packrecords C -> natural alignment }
  469. location.reference.alignment:=vs.vardef.alignment;
  470. end
  471. else if is_java_class_or_interface(left.resultdef) or
  472. ((target_info.system in systems_jvm) and
  473. (left.resultdef.typ=recorddef)) then
  474. begin
  475. if (location.loc<>LOC_REFERENCE) or
  476. (location.reference.index<>NR_NO) or
  477. assigned(location.reference.symbol) then
  478. internalerror(2011011301);
  479. location.reference.symbol:=current_asmdata.RefAsmSymbol(vs.mangledname);
  480. end
  481. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  482. begin
  483. if not is_packed_record_or_object(left.resultdef) then
  484. begin
  485. inc(location.reference.offset,vs.fieldoffset);
  486. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  487. end
  488. else if (vs.fieldoffset mod 8 = 0) and
  489. (resultdef.packedbitsize mod 8 = 0) and
  490. { is different in case of e.g. packenum 2 and an enum }
  491. { which fits in 8 bits }
  492. (resultdef.size*8 = resultdef.packedbitsize) then
  493. begin
  494. inc(location.reference.offset,vs.fieldoffset div 8);
  495. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  496. end
  497. else
  498. begin
  499. sref.ref:=location.reference;
  500. sref.ref.alignment:=1;
  501. sref.bitindexreg:=NR_NO;
  502. inc(sref.ref.offset,vs.fieldoffset div 8);
  503. sref.startbit:=vs.fieldoffset mod 8;
  504. sref.bitlen:=resultdef.packedbitsize;
  505. if (left.location.loc=LOC_REFERENCE) then
  506. location.loc:=LOC_SUBSETREF
  507. else
  508. location.loc:=LOC_CSUBSETREF;
  509. location.sref:=sref;
  510. end;
  511. { also update the size of the location }
  512. location.size:=def_cgsize(resultdef);
  513. end;
  514. paraloc1.done;
  515. end;
  516. {*****************************************************************************
  517. TCGWITHNODE
  518. *****************************************************************************}
  519. procedure tcgwithnode.pass_generate_code;
  520. begin
  521. location_reset(location,LOC_VOID,OS_NO);
  522. if assigned(left) then
  523. secondpass(left);
  524. end;
  525. {*****************************************************************************
  526. TCGVECNODE
  527. *****************************************************************************}
  528. function tcgvecnode.get_mul_size : aint;
  529. begin
  530. if nf_memindex in flags then
  531. get_mul_size:=1
  532. else
  533. begin
  534. if (left.resultdef.typ=arraydef) then
  535. if not is_packed_array(left.resultdef) then
  536. get_mul_size:=tarraydef(left.resultdef).elesize
  537. else
  538. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  539. else
  540. get_mul_size:=resultdef.size;
  541. end
  542. end;
  543. { this routine must, like any other routine, not change the contents }
  544. { of base/index registers of references, as these may be regvars. }
  545. { The register allocator can coalesce one LOC_REGISTER being moved }
  546. { into another (as their live ranges won't overlap), but not a }
  547. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  548. { the live range of the LOC_CREGISTER will most likely overlap the }
  549. { the live range of the target LOC_(C)REGISTER) }
  550. { The passed register may be a LOC_CREGISTER as well. }
  551. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg:tregister;l:aint);
  552. var
  553. hreg: tregister;
  554. begin
  555. if l<>1 then
  556. begin
  557. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  558. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  559. maybe_const_reg:=hreg;
  560. end;
  561. if location.reference.base=NR_NO then
  562. location.reference.base:=maybe_const_reg
  563. else if location.reference.index=NR_NO then
  564. location.reference.index:=maybe_const_reg
  565. else
  566. begin
  567. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  568. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  569. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  570. { insert new index register }
  571. location.reference.index:=maybe_const_reg;
  572. end;
  573. { update alignment }
  574. if (location.reference.alignment=0) then
  575. internalerror(2009020704);
  576. location.reference.alignment:=newalignment(location.reference.alignment,l);
  577. end;
  578. { see remarks for tcgvecnode.update_reference_reg_mul above }
  579. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg:tregister;l:aint);
  580. var
  581. sref: tsubsetreference;
  582. offsetreg, hreg: tregister;
  583. alignpower: aint;
  584. temp : longint;
  585. begin
  586. { only orddefs are bitpacked. Even then we only need special code in }
  587. { case the bitpacked *byte size* is not a power of two, otherwise }
  588. { everything can be handled using the the regular array code. }
  589. if ((l mod 8) = 0) and
  590. (ispowerof2(l div 8,temp) or
  591. not is_ordinal(resultdef)
  592. {$ifndef cpu64bitalu}
  593. or is_64bitint(resultdef)
  594. {$endif not cpu64bitalu}
  595. ) then
  596. begin
  597. update_reference_reg_mul(maybe_const_reg,l div 8);
  598. exit;
  599. end;
  600. if (l > 8*sizeof(aint)) then
  601. internalerror(200608051);
  602. sref.ref := location.reference;
  603. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  604. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  605. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  606. { keep alignment for index }
  607. sref.ref.alignment := left.resultdef.alignment;
  608. if not ispowerof2(sref.ref.alignment,temp) then
  609. internalerror(2006081201);
  610. alignpower:=temp;
  611. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  612. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  613. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  614. if (sref.ref.base = NR_NO) then
  615. sref.ref.base := offsetreg
  616. else if (sref.ref.index = NR_NO) then
  617. sref.ref.index := offsetreg
  618. else
  619. begin
  620. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  621. sref.ref.base := offsetreg;
  622. end;
  623. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  624. sref.bitindexreg := hreg;
  625. sref.startbit := 0;
  626. sref.bitlen := resultdef.packedbitsize;
  627. if (left.location.loc = LOC_REFERENCE) then
  628. location.loc := LOC_SUBSETREF
  629. else
  630. location.loc := LOC_CSUBSETREF;
  631. location.sref := sref;
  632. end;
  633. procedure tcgvecnode.second_wideansistring;
  634. begin
  635. end;
  636. procedure tcgvecnode.second_dynamicarray;
  637. begin
  638. end;
  639. procedure tcgvecnode.rangecheck_array;
  640. var
  641. hightree : tnode;
  642. poslabel,
  643. neglabel : tasmlabel;
  644. hreg : tregister;
  645. paraloc1,paraloc2 : tcgpara;
  646. pd : tprocdef;
  647. begin
  648. { omit range checking when this is an array access to a pointer which has been
  649. typecasted from an array }
  650. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  651. exit;
  652. paraloc1.init;
  653. paraloc2.init;
  654. if is_open_array(left.resultdef) or
  655. is_array_of_const(left.resultdef) then
  656. begin
  657. { cdecl functions don't have high() so we can not check the range }
  658. { (can't use current_procdef, since it may be a nested procedure) }
  659. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(left).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  660. begin
  661. { Get high value }
  662. hightree:=load_high_value_node(tparavarsym(tloadnode(left).symtableentry));
  663. { it must be available }
  664. if not assigned(hightree) then
  665. internalerror(200212201);
  666. firstpass(hightree);
  667. secondpass(hightree);
  668. { generate compares }
  669. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  670. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  671. else
  672. begin
  673. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  674. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  675. end;
  676. current_asmdata.getjumplabel(neglabel);
  677. current_asmdata.getjumplabel(poslabel);
  678. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  679. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  680. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  681. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  682. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  683. { release hightree }
  684. hightree.free;
  685. end;
  686. end
  687. else
  688. if is_dynamic_array(left.resultdef) then
  689. begin
  690. pd:=search_system_proc('fpc_dynarray_rangecheck');
  691. paramanager.getintparaloc(pd,1,paraloc1);
  692. paramanager.getintparaloc(pd,2,paraloc2);
  693. if pd.is_pushleftright then
  694. begin
  695. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  696. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  697. end
  698. else
  699. begin
  700. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  701. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  702. end;
  703. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  704. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  705. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  706. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  707. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  708. end;
  709. { for regular arrays, we don't have to do anything because the index has been
  710. type converted to the index type, which already inserted a range check if
  711. necessary }
  712. paraloc1.done;
  713. paraloc2.done;
  714. end;
  715. procedure tcgvecnode.rangecheck_string;
  716. var
  717. paraloc1,
  718. paraloc2: tcgpara;
  719. helpername: TIDString;
  720. pd: tprocdef;
  721. begin
  722. paraloc1.init;
  723. paraloc2.init;
  724. case tstringdef(left.resultdef).stringtype of
  725. { it's the same for ansi- and wide strings }
  726. st_unicodestring,
  727. st_widestring,
  728. st_ansistring:
  729. begin
  730. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  731. pd:=search_system_proc(helpername);
  732. paramanager.getintparaloc(pd,1,paraloc1);
  733. paramanager.getintparaloc(pd,2,paraloc2);
  734. if pd.is_pushleftright then
  735. begin
  736. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  737. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  738. end
  739. else
  740. begin
  741. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  742. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  743. end;
  744. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  745. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  746. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  747. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  748. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  749. end;
  750. st_shortstring:
  751. begin
  752. {!!!!!!!!!!!!!!!!!}
  753. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  754. end;
  755. st_longstring:
  756. begin
  757. {!!!!!!!!!!!!!!!!!}
  758. end;
  759. end;
  760. paraloc1.done;
  761. paraloc2.done;
  762. end;
  763. procedure tcgvecnode.pass_generate_code;
  764. var
  765. offsetdec,
  766. extraoffset : aint;
  767. rightp : pnode;
  768. otl,ofl : tasmlabel;
  769. newsize : tcgsize;
  770. mulsize,
  771. bytemulsize,
  772. alignpow : aint;
  773. isjump : boolean;
  774. paraloc1,
  775. paraloc2 : tcgpara;
  776. subsetref : tsubsetreference;
  777. temp : longint;
  778. begin
  779. paraloc1.init;
  780. paraloc2.init;
  781. mulsize:=get_mul_size;
  782. if not is_packed_array(left.resultdef) then
  783. bytemulsize:=mulsize
  784. else
  785. bytemulsize:=mulsize div 8;
  786. newsize:=def_cgsize(resultdef);
  787. secondpass(left);
  788. if left.location.loc=LOC_CREFERENCE then
  789. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  790. else
  791. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  792. { an ansistring needs to be dereferenced }
  793. if is_ansistring(left.resultdef) or
  794. is_wide_or_unicode_string(left.resultdef) then
  795. begin
  796. if nf_callunique in flags then
  797. internalerror(200304236);
  798. {DM!!!!!}
  799. case left.location.loc of
  800. LOC_REGISTER,
  801. LOC_CREGISTER :
  802. begin
  803. {$ifdef m68k}
  804. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  805. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  806. {$else m68k}
  807. location.reference.base:=left.location.register;
  808. {$endif m68k}
  809. end;
  810. LOC_CREFERENCE,
  811. LOC_REFERENCE :
  812. begin
  813. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  814. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.reference,location.reference.base);
  815. end;
  816. else
  817. internalerror(2002032218);
  818. end;
  819. if is_ansistring(left.resultdef) then
  820. offsetdec:=1
  821. else
  822. offsetdec:=2;
  823. location.reference.alignment:=offsetdec;
  824. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  825. if not(cs_zerobasedstrings in current_settings.localswitches) then
  826. dec(location.reference.offset,offsetdec);
  827. end
  828. else if is_dynamic_array(left.resultdef) then
  829. begin
  830. case left.location.loc of
  831. LOC_REGISTER,
  832. LOC_CREGISTER :
  833. location.reference.base:=left.location.register;
  834. LOC_REFERENCE,
  835. LOC_CREFERENCE :
  836. begin
  837. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  838. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,
  839. left.location.reference,location.reference.base);
  840. end;
  841. else
  842. internalerror(2002032219);
  843. end;
  844. { a dynarray points to the start of a memory block, which
  845. we assume to be always aligned to a multiple of the
  846. pointer size
  847. }
  848. location.reference.alignment:=sizeof(pint);
  849. end
  850. else
  851. begin
  852. { may happen in case of function results }
  853. case left.location.loc of
  854. LOC_CREGISTER,
  855. LOC_CMMREGISTER,
  856. LOC_REGISTER,
  857. LOC_MMREGISTER:
  858. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  859. end;
  860. location_copy(location,left.location);
  861. end;
  862. { location must be memory }
  863. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  864. internalerror(200411013);
  865. { offset can only differ from 0 if arraydef }
  866. if (left.resultdef.typ=arraydef) and
  867. not(is_dynamic_array(left.resultdef)) and
  868. (not(is_packed_array(left.resultdef)) or
  869. ((mulsize mod 8 = 0) and
  870. ispowerof2(mulsize div 8,temp)) or
  871. { only orddefs are bitpacked }
  872. not is_ordinal(resultdef)
  873. {$ifndef cpu64bitalu}
  874. or is_64bitint(resultdef)
  875. {$endif not cpu64bitalu}
  876. ) then
  877. dec(location.reference.offset,bytemulsize*tarraydef(left.resultdef).lowrange);
  878. if right.nodetype=ordconstn then
  879. begin
  880. { offset can only differ from 0 if arraydef }
  881. if cs_check_range in current_settings.localswitches then
  882. begin
  883. secondpass(right);
  884. case left.resultdef.typ of
  885. arraydef :
  886. rangecheck_array;
  887. stringdef :
  888. rangecheck_string;
  889. end;
  890. end;
  891. if not(is_packed_array(left.resultdef)) or
  892. ((mulsize mod 8 = 0) and
  893. (ispowerof2(mulsize div 8,temp) or
  894. { only orddefs are bitpacked }
  895. not is_ordinal(resultdef))) then
  896. begin
  897. extraoffset:=bytemulsize*tordconstnode(right).value.svalue;
  898. inc(location.reference.offset,extraoffset);
  899. { adjust alignment after to this change }
  900. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset);
  901. { don't do this for floats etc.; needed to properly set the }
  902. { size for bitpacked arrays (e.g. a bitpacked array of }
  903. { enums who are size 2 but fit in one byte -> in the array }
  904. { they will be one byte and have to be stored like that) }
  905. if is_packed_array(left.resultdef) and
  906. (tcgsize2size[newsize] <> bytemulsize) then
  907. newsize:=int_cgsize(bytemulsize);
  908. end
  909. else
  910. begin
  911. subsetref.ref := location.reference;
  912. subsetref.ref.alignment := left.resultdef.alignment;
  913. if not ispowerof2(subsetref.ref.alignment,temp) then
  914. internalerror(2006081212);
  915. alignpow:=temp;
  916. inc(subsetref.ref.offset,((mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow)) shl alignpow);
  917. subsetref.bitindexreg := NR_NO;
  918. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  919. subsetref.bitlen := resultdef.packedbitsize;
  920. if (left.location.loc = LOC_REFERENCE) then
  921. location.loc := LOC_SUBSETREF
  922. else
  923. location.loc := LOC_CSUBSETREF;
  924. location.sref := subsetref;
  925. end;
  926. end
  927. else
  928. { not nodetype=ordconstn }
  929. begin
  930. if (cs_opt_level1 in current_settings.optimizerswitches) and
  931. { if we do range checking, we don't }
  932. { need that fancy code (it would be }
  933. { buggy) }
  934. not(cs_check_range in current_settings.localswitches) and
  935. (left.resultdef.typ=arraydef) and
  936. not is_packed_array(left.resultdef) then
  937. begin
  938. extraoffset:=0;
  939. rightp:=actualtargetnode(@right);
  940. if rightp^.nodetype=addn then
  941. begin
  942. if taddnode(rightp^).right.nodetype=ordconstn then
  943. begin
  944. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  945. replacenode(rightp^,taddnode(rightp^).left);
  946. end
  947. else if taddnode(rightp^).left.nodetype=ordconstn then
  948. begin
  949. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  950. replacenode(rightp^,taddnode(rightp^).right);
  951. end;
  952. end
  953. else if rightp^.nodetype=subn then
  954. begin
  955. if taddnode(rightp^).right.nodetype=ordconstn then
  956. begin
  957. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  958. replacenode(rightp^,taddnode(rightp^).left);
  959. end;
  960. end;
  961. inc(location.reference.offset,
  962. mulsize*extraoffset);
  963. end;
  964. { calculate from left to right }
  965. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  966. internalerror(200304237);
  967. isjump:=(right.expectloc=LOC_JUMP);
  968. otl:=nil;
  969. ofl:=nil;
  970. if isjump then
  971. begin
  972. otl:=current_procinfo.CurrTrueLabel;
  973. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  974. ofl:=current_procinfo.CurrFalseLabel;
  975. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  976. end;
  977. secondpass(right);
  978. { if mulsize = 1, we won't have to modify the index }
  979. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  980. if isjump then
  981. begin
  982. current_procinfo.CurrTrueLabel:=otl;
  983. current_procinfo.CurrFalseLabel:=ofl;
  984. end
  985. else if (right.location.loc = LOC_JUMP) then
  986. internalerror(2006010801);
  987. { produce possible range check code: }
  988. if cs_check_range in current_settings.localswitches then
  989. begin
  990. if left.resultdef.typ=arraydef then
  991. rangecheck_array
  992. else if (left.resultdef.typ=stringdef) then
  993. rangecheck_string;
  994. end;
  995. { insert the register and the multiplication factor in the
  996. reference }
  997. if not is_packed_array(left.resultdef) then
  998. update_reference_reg_mul(right.location.register,mulsize)
  999. else
  1000. update_reference_reg_packed(right.location.register,mulsize);
  1001. end;
  1002. location.size:=newsize;
  1003. paraloc1.done;
  1004. paraloc2.done;
  1005. end;
  1006. begin
  1007. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1008. cloadparentfpnode:=tcgloadparentfpnode;
  1009. caddrnode:=tcgaddrnode;
  1010. cderefnode:=tcgderefnode;
  1011. csubscriptnode:=tcgsubscriptnode;
  1012. cwithnode:=tcgwithnode;
  1013. cvecnode:=tcgvecnode;
  1014. end.