ncgmem.pas 49 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpuinfo,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgwithnode = class(twithnode)
  45. procedure pass_generate_code;override;
  46. end;
  47. tcgvecnode = class(tvecnode)
  48. function get_mul_size : aint;
  49. private
  50. procedure rangecheck_array;
  51. procedure rangecheck_string;
  52. protected
  53. {# This routine is used to calculate the address of the reference.
  54. On entry reg contains the index in the array,
  55. and l contains the size of each element in the array.
  56. This routine should update location.reference correctly,
  57. so it points to the correct address.
  58. }
  59. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  60. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  61. procedure update_reference_offset(var ref: treference; index, mulsize: aint); virtual;
  62. procedure second_wideansistring;virtual;
  63. procedure second_dynamicarray;virtual;
  64. function valid_index_size(size: tcgsize): boolean;virtual;
  65. public
  66. procedure pass_generate_code;override;
  67. end;
  68. implementation
  69. uses
  70. systems,
  71. cutils,cclasses,verbose,globals,constexp,
  72. symconst,symbase,symdef,symsym,symcpu,symtable,defutil,paramgr,
  73. aasmbase,aasmtai,aasmdata,
  74. procinfo,pass_2,parabase,
  75. pass_1,nld,ncon,nadd,ncnv,nutils,
  76. cgobj,hlcgobj,
  77. tgobj,ncgutil,objcgutl,
  78. defcmp
  79. ;
  80. {*****************************************************************************
  81. TCGLOADVMTADDRNODE
  82. *****************************************************************************}
  83. procedure tcgloadvmtaddrnode.pass_generate_code;
  84. var
  85. href : treference;
  86. pool : THashSet;
  87. entry : PHashSetItem;
  88. begin
  89. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  90. if (left.nodetype=typen) then
  91. begin
  92. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  93. if not is_objcclass(left.resultdef) then
  94. begin
  95. reference_reset_symbol(href,
  96. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  97. voidpointertype.size);
  98. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,resultdef,href,location.register);
  99. end
  100. else
  101. begin
  102. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  103. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  104. if (target_info.system in systems_objc_nfabi) then
  105. begin
  106. { find/add necessary classref/classname pool entries }
  107. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  108. end
  109. else
  110. begin
  111. { find/add necessary classref/classname pool entries }
  112. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  113. end;
  114. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  115. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  116. end;
  117. end
  118. else
  119. { should be handled in pass 1 }
  120. internalerror(2015052801);
  121. end;
  122. {*****************************************************************************
  123. TCGLOADPARENTFPNODE
  124. *****************************************************************************}
  125. procedure tcgloadparentfpnode.pass_generate_code;
  126. var
  127. currpi : tprocinfo;
  128. hsym : tparavarsym;
  129. href : treference;
  130. begin
  131. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  132. begin
  133. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  134. location.register:=current_procinfo.framepointer;
  135. end
  136. else
  137. begin
  138. currpi:=current_procinfo;
  139. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  140. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  141. { load framepointer of current proc }
  142. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  143. if not assigned(hsym) then
  144. internalerror(200309281);
  145. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  146. { walk parents }
  147. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  148. begin
  149. currpi:=currpi.parent;
  150. if not assigned(currpi) then
  151. internalerror(200311201);
  152. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  153. if not assigned(hsym) then
  154. internalerror(200309282);
  155. if hsym.localloc.loc<>LOC_REFERENCE then
  156. internalerror(200309283);
  157. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  158. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  159. end;
  160. end;
  161. end;
  162. {*****************************************************************************
  163. TCGADDRNODE
  164. *****************************************************************************}
  165. procedure tcgaddrnode.pass_generate_code;
  166. begin
  167. secondpass(left);
  168. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  169. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  170. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  171. { on x86_64-win64, array of chars can be returned in registers, however,
  172. when passing these arrays to other functions, the compiler wants to take
  173. the address of the array so when the addrnode has been created internally,
  174. we have to force the data into memory, see also tw14388.pp
  175. }
  176. if nf_internal in flags then
  177. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  178. else
  179. internalerror(2006111510);
  180. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  181. end;
  182. {*****************************************************************************
  183. TCGDEREFNODE
  184. *****************************************************************************}
  185. procedure tcgderefnode.pass_generate_code;
  186. var
  187. paraloc1 : tcgpara;
  188. pd : tprocdef;
  189. sym : tsym;
  190. st : tsymtable;
  191. hp : pnode;
  192. extraoffset : tcgint;
  193. begin
  194. sym:=nil;
  195. { assume natural alignment, except for packed records }
  196. if not(resultdef.typ in [recorddef,objectdef]) or
  197. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  198. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  199. else
  200. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  201. { can we fold an add/sub node into the offset of the deref node? }
  202. extraoffset:=0;
  203. hp:=actualtargetnode(@left);
  204. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  205. begin
  206. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  207. replacenode(hp^,taddnode(hp^).left);
  208. end
  209. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  210. begin
  211. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  212. replacenode(hp^,taddnode(hp^).left);
  213. end
  214. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  215. begin
  216. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  217. replacenode(hp^,taddnode(hp^).right);
  218. end;
  219. secondpass(left);
  220. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  221. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  222. case left.location.loc of
  223. LOC_CREGISTER,
  224. LOC_REGISTER:
  225. begin
  226. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  227. {$ifdef cpu_uses_separate_address_registers}
  228. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  229. begin
  230. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  231. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  232. location.reference.base);
  233. end
  234. else
  235. {$endif}
  236. location.reference.base := left.location.register;
  237. end;
  238. LOC_CREFERENCE,
  239. LOC_REFERENCE:
  240. begin
  241. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  242. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  243. end;
  244. LOC_CONSTANT:
  245. begin
  246. location.reference.offset:=left.location.value;
  247. end;
  248. else
  249. internalerror(200507031);
  250. end;
  251. location.reference.offset:=location.reference.offset+extraoffset;
  252. if (cs_use_heaptrc in current_settings.globalswitches) and
  253. (cs_checkpointer in current_settings.localswitches) and
  254. not(cs_compilesystem in current_settings.moduleswitches) and
  255. {$ifdef x86}
  256. (tcpupointerdef(left.resultdef).x86pointertyp = tcpupointerdefclass(cpointerdef).default_x86_data_pointer_type) and
  257. {$endif x86}
  258. not(nf_no_checkpointer in flags) and
  259. { can be NR_NO in case of LOC_CONSTANT }
  260. (location.reference.base<>NR_NO) then
  261. begin
  262. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  263. (sym.typ<>procsym) then
  264. internalerror(2012010601);
  265. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  266. paraloc1.init;
  267. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  268. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  269. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  270. paraloc1.done;
  271. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  272. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  273. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  274. end;
  275. end;
  276. {*****************************************************************************
  277. TCGSUBSCRIPTNODE
  278. *****************************************************************************}
  279. function tcgsubscriptnode.handle_platform_subscript: boolean;
  280. begin
  281. result:=false;
  282. end;
  283. procedure tcgsubscriptnode.pass_generate_code;
  284. var
  285. asmsym: tasmsymbol;
  286. paraloc1 : tcgpara;
  287. tmpref: treference;
  288. sref: tsubsetreference;
  289. offsetcorrection : aint;
  290. pd : tprocdef;
  291. sym : tsym;
  292. st : tsymtable;
  293. begin
  294. sym:=nil;
  295. secondpass(left);
  296. if codegenerror then
  297. exit;
  298. paraloc1.init;
  299. { several object types must be dereferenced implicitly }
  300. if is_implicit_pointer_object_type(left.resultdef) then
  301. begin
  302. if (not is_managed_type(left.resultdef)) or
  303. (target_info.system in systems_garbage_collected_managed_types) then
  304. begin
  305. { the contents of a class are aligned to a sizeof(pointer) }
  306. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  307. case left.location.loc of
  308. LOC_CREGISTER,
  309. LOC_REGISTER:
  310. begin
  311. {$ifdef cpu_uses_separate_address_registers}
  312. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  313. begin
  314. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  315. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  316. left.location.register,location.reference.base);
  317. end
  318. else
  319. {$endif}
  320. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  321. end;
  322. LOC_CREFERENCE,
  323. LOC_REFERENCE,
  324. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  325. LOC_SUBSETREG,
  326. LOC_CSUBSETREG,
  327. LOC_SUBSETREF,
  328. LOC_CSUBSETREF:
  329. begin
  330. hlcg.reference_reset_base(location.reference,left.resultdef,
  331. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  332. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  333. end;
  334. LOC_CONSTANT:
  335. begin
  336. { can happen with @classtype(pointerconst).field }
  337. location.reference.offset:=left.location.value;
  338. end;
  339. else
  340. internalerror(2009092401);
  341. end;
  342. { implicit deferencing }
  343. if (cs_use_heaptrc in current_settings.globalswitches) and
  344. (cs_checkpointer in current_settings.localswitches) and
  345. not(cs_compilesystem in current_settings.moduleswitches) then
  346. begin
  347. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  348. (sym.typ<>procsym) then
  349. internalerror(2012010602);
  350. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  351. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  352. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  353. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  354. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  355. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  356. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  357. end;
  358. end
  359. else
  360. { reference-counted implicit pointer object types don't have
  361. fields -> cannot be subscripted (calls are handled via call
  362. nodes) }
  363. internalerror(2011011901);
  364. end
  365. else
  366. begin
  367. location_copy(location,left.location);
  368. { some abi's require that functions return (some) records in }
  369. { registers }
  370. case location.loc of
  371. LOC_REFERENCE,
  372. LOC_CREFERENCE:
  373. ;
  374. LOC_CONSTANT,
  375. LOC_REGISTER,
  376. LOC_CREGISTER,
  377. { if a floating point value is casted into a record, it
  378. can happen that we get here an fpu or mm register }
  379. LOC_MMREGISTER,
  380. LOC_FPUREGISTER,
  381. LOC_CMMREGISTER,
  382. LOC_CFPUREGISTER:
  383. begin
  384. { in case the result is not something that can be put
  385. into an integer register (e.g.
  386. function_returning_record().non_regable_field, or
  387. a function returning a value > sizeof(intreg))
  388. -> force to memory
  389. }
  390. if not tstoreddef(left.resultdef).is_intregable or
  391. not tstoreddef(resultdef).is_intregable or
  392. { if the field spans multiple registers, we must force the record into
  393. memory as well }
  394. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  395. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  396. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  397. { actually, we should be able to "subscript" a constant, but this would require some code
  398. which enables dumping and reading constants from a temporary memory buffer. This
  399. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  400. }
  401. LOC_CONSTANT]) then
  402. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  403. else
  404. begin
  405. if (left.location.loc = LOC_REGISTER) then
  406. location.loc := LOC_SUBSETREG
  407. else
  408. location.loc := LOC_CSUBSETREG;
  409. location.size:=def_cgsize(resultdef);
  410. offsetcorrection:=0;
  411. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  412. begin
  413. if (vs.fieldoffset>=sizeof(aword)) xor (target_info.endian=endian_big) then
  414. location.sreg.subsetreg := left.location.registerhi
  415. else
  416. location.sreg.subsetreg := left.location.register;
  417. if (vs.fieldoffset>=sizeof(aword)) then
  418. offsetcorrection:=sizeof(aword)*8;
  419. location.sreg.subsetregsize := OS_INT;
  420. end
  421. else
  422. begin
  423. location.sreg.subsetreg := left.location.register;
  424. location.sreg.subsetregsize := left.location.size;
  425. end;
  426. if not is_packed_record_or_object(left.resultdef) then
  427. begin
  428. if (target_info.endian = ENDIAN_BIG) then
  429. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  430. else
  431. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  432. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  433. end
  434. else
  435. begin
  436. location.sreg.bitlen := resultdef.packedbitsize;
  437. if (target_info.endian = ENDIAN_BIG) then
  438. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  439. else
  440. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  441. end;
  442. end;
  443. end;
  444. LOC_SUBSETREG,
  445. LOC_CSUBSETREG:
  446. begin
  447. location.size:=def_cgsize(resultdef);
  448. if not is_packed_record_or_object(left.resultdef) then
  449. begin
  450. if (target_info.endian = ENDIAN_BIG) then
  451. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  452. else
  453. inc(location.sreg.startbit, vs.fieldoffset * 8);
  454. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  455. end
  456. else
  457. begin
  458. location.sreg.bitlen := resultdef.packedbitsize;
  459. if (target_info.endian = ENDIAN_BIG) then
  460. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  461. else
  462. inc(location.sreg.startbit, vs.fieldoffset);
  463. end;
  464. end;
  465. else
  466. internalerror(2006031901);
  467. end;
  468. end;
  469. if is_objc_class_or_protocol(left.resultdef) and
  470. (target_info.system in systems_objc_nfabi) then
  471. begin
  472. if (location.loc<>LOC_REFERENCE) or
  473. (location.reference.index<>NR_NO) then
  474. internalerror(2009092402);
  475. { the actual field offset is stored in memory (to solve the
  476. "fragile base class" problem: this way the layout of base
  477. classes can be changed without breaking programs compiled against
  478. earlier versions)
  479. }
  480. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  481. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  482. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  483. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  484. { always packrecords C -> natural alignment }
  485. location.reference.alignment:=vs.vardef.alignment;
  486. end
  487. else if handle_platform_subscript then
  488. begin
  489. { done }
  490. end
  491. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  492. begin
  493. if not is_packed_record_or_object(left.resultdef) then
  494. begin
  495. inc(location.reference.offset,vs.fieldoffset);
  496. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  497. end
  498. else if (vs.fieldoffset mod 8 = 0) and
  499. (resultdef.packedbitsize mod 8 = 0) and
  500. { is different in case of e.g. packenum 2 and an enum }
  501. { which fits in 8 bits }
  502. (resultdef.size*8 = resultdef.packedbitsize) then
  503. begin
  504. inc(location.reference.offset,vs.fieldoffset div 8);
  505. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  506. end
  507. else
  508. begin
  509. sref.ref:=location.reference;
  510. sref.ref.alignment:=1;
  511. sref.bitindexreg:=NR_NO;
  512. inc(sref.ref.offset,vs.fieldoffset div 8);
  513. sref.startbit:=vs.fieldoffset mod 8;
  514. sref.bitlen:=resultdef.packedbitsize;
  515. if (left.location.loc=LOC_REFERENCE) then
  516. location.loc:=LOC_SUBSETREF
  517. else
  518. location.loc:=LOC_CSUBSETREF;
  519. location.sref:=sref;
  520. end;
  521. { also update the size of the location }
  522. location.size:=def_cgsize(resultdef);
  523. end;
  524. paraloc1.done;
  525. end;
  526. {*****************************************************************************
  527. TCGWITHNODE
  528. *****************************************************************************}
  529. procedure tcgwithnode.pass_generate_code;
  530. begin
  531. location_reset(location,LOC_VOID,OS_NO);
  532. if assigned(left) then
  533. secondpass(left);
  534. end;
  535. {*****************************************************************************
  536. TCGVECNODE
  537. *****************************************************************************}
  538. function tcgvecnode.get_mul_size : aint;
  539. begin
  540. if nf_memindex in flags then
  541. get_mul_size:=1
  542. else
  543. begin
  544. if (left.resultdef.typ=arraydef) then
  545. if not is_packed_array(left.resultdef) then
  546. get_mul_size:=tarraydef(left.resultdef).elesize
  547. else
  548. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  549. else
  550. get_mul_size:=resultdef.size;
  551. end
  552. end;
  553. { this routine must, like any other routine, not change the contents }
  554. { of base/index registers of references, as these may be regvars. }
  555. { The register allocator can coalesce one LOC_REGISTER being moved }
  556. { into another (as their live ranges won't overlap), but not a }
  557. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  558. { the live range of the LOC_CREGISTER will most likely overlap the }
  559. { the live range of the target LOC_(C)REGISTER) }
  560. { The passed register may be a LOC_CREGISTER as well. }
  561. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  562. var
  563. hreg: tregister;
  564. begin
  565. if l<>1 then
  566. begin
  567. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  568. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  569. maybe_const_reg:=hreg;
  570. end;
  571. if location.reference.base=NR_NO then
  572. location.reference.base:=maybe_const_reg
  573. else if location.reference.index=NR_NO then
  574. location.reference.index:=maybe_const_reg
  575. else
  576. begin
  577. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  578. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  579. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  580. { insert new index register }
  581. location.reference.index:=maybe_const_reg;
  582. end;
  583. { update alignment }
  584. if (location.reference.alignment=0) then
  585. internalerror(2009020704);
  586. location.reference.alignment:=newalignment(location.reference.alignment,l);
  587. end;
  588. { see remarks for tcgvecnode.update_reference_reg_mul above }
  589. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  590. var
  591. sref: tsubsetreference;
  592. offsetreg, hreg: tregister;
  593. alignpower: aint;
  594. temp : longint;
  595. begin
  596. { only orddefs are bitpacked. Even then we only need special code in }
  597. { case the bitpacked *byte size* is not a power of two, otherwise }
  598. { everything can be handled using the the regular array code. }
  599. if ((l mod 8) = 0) and
  600. (ispowerof2(l div 8,temp) or
  601. not is_ordinal(resultdef)
  602. {$ifndef cpu64bitalu}
  603. or is_64bitint(resultdef)
  604. {$endif not cpu64bitalu}
  605. ) then
  606. begin
  607. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  608. exit;
  609. end;
  610. if (l > 8*sizeof(aint)) then
  611. internalerror(200608051);
  612. sref.ref := location.reference;
  613. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  614. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_ADDR,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  615. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,hreg);
  616. { keep alignment for index }
  617. sref.ref.alignment := left.resultdef.alignment;
  618. if not ispowerof2(packedbitsloadsize(l),temp) then
  619. internalerror(2006081201);
  620. alignpower:=temp;
  621. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  622. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  623. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  624. if (sref.ref.base = NR_NO) then
  625. sref.ref.base := offsetreg
  626. else if (sref.ref.index = NR_NO) then
  627. sref.ref.index := offsetreg
  628. else
  629. begin
  630. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  631. sref.ref.base := offsetreg;
  632. end;
  633. { the if expression below is a constant evaluated at compile time, so disable the unreachable code
  634. warning }
  635. {$push}
  636. {$warn 6018 off}
  637. { we can reuse hreg only if OS_INT and OS_ADDR have the same size/type }
  638. if OS_INT<>OS_ADDR then
  639. begin
  640. sref.bitindexreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  641. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_INT,hreg,sref.bitindexreg);
  642. end
  643. else
  644. sref.bitindexreg:=hreg;
  645. {$pop}
  646. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,sref.bitindexreg);
  647. sref.startbit := 0;
  648. sref.bitlen := resultdef.packedbitsize;
  649. if (left.location.loc = LOC_REFERENCE) then
  650. location.loc := LOC_SUBSETREF
  651. else
  652. location.loc := LOC_CSUBSETREF;
  653. location.sref := sref;
  654. end;
  655. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: aint);
  656. begin
  657. inc(ref.offset,index*mulsize);
  658. end;
  659. procedure tcgvecnode.second_wideansistring;
  660. begin
  661. end;
  662. procedure tcgvecnode.second_dynamicarray;
  663. begin
  664. end;
  665. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  666. begin
  667. result:=
  668. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  669. end;
  670. procedure tcgvecnode.rangecheck_array;
  671. var
  672. hightree : tnode;
  673. poslabel,
  674. neglabel : tasmlabel;
  675. hreg : tregister;
  676. paraloc1,paraloc2 : tcgpara;
  677. pd : tprocdef;
  678. begin
  679. { omit range checking when this is an array access to a pointer which has been
  680. typecasted from an array }
  681. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  682. exit;
  683. paraloc1.init;
  684. paraloc2.init;
  685. if is_open_array(left.resultdef) or
  686. is_array_of_const(left.resultdef) then
  687. begin
  688. { cdecl functions don't have high() so we can not check the range }
  689. { (can't use current_procdef, since it may be a nested procedure) }
  690. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  691. begin
  692. { Get high value }
  693. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  694. { it must be available }
  695. if not assigned(hightree) then
  696. internalerror(200212201);
  697. firstpass(hightree);
  698. secondpass(hightree);
  699. { generate compares }
  700. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  701. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  702. else
  703. begin
  704. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  705. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  706. end;
  707. current_asmdata.getjumplabel(neglabel);
  708. current_asmdata.getjumplabel(poslabel);
  709. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  710. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  711. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  712. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  713. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  714. { release hightree }
  715. hightree.free;
  716. end;
  717. end
  718. else
  719. if is_dynamic_array(left.resultdef) then
  720. begin
  721. pd:=search_system_proc('fpc_dynarray_rangecheck');
  722. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  723. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  724. if pd.is_pushleftright then
  725. begin
  726. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  727. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  728. end
  729. else
  730. begin
  731. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  732. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  733. end;
  734. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  735. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  736. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  737. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  738. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  739. end;
  740. { for regular arrays, we don't have to do anything because the index has been
  741. type converted to the index type, which already inserted a range check if
  742. necessary }
  743. paraloc1.done;
  744. paraloc2.done;
  745. end;
  746. procedure tcgvecnode.rangecheck_string;
  747. var
  748. paraloc1,
  749. paraloc2: tcgpara;
  750. helpername: TIDString;
  751. pd: tprocdef;
  752. begin
  753. paraloc1.init;
  754. paraloc2.init;
  755. case tstringdef(left.resultdef).stringtype of
  756. { it's the same for ansi- and wide strings }
  757. st_unicodestring,
  758. st_widestring,
  759. st_ansistring:
  760. begin
  761. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  762. pd:=search_system_proc(helpername);
  763. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  764. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  765. if pd.is_pushleftright then
  766. begin
  767. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  768. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  769. end
  770. else
  771. begin
  772. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  773. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  774. end;
  775. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  776. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  777. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  778. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  779. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  780. end;
  781. st_shortstring:
  782. begin
  783. {!!!!!!!!!!!!!!!!!}
  784. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  785. end;
  786. st_longstring:
  787. begin
  788. {!!!!!!!!!!!!!!!!!}
  789. end;
  790. end;
  791. paraloc1.done;
  792. paraloc2.done;
  793. end;
  794. procedure tcgvecnode.pass_generate_code;
  795. var
  796. offsetdec,
  797. extraoffset : aint;
  798. rightp : pnode;
  799. newsize : tcgsize;
  800. mulsize,
  801. bytemulsize,
  802. alignpow : aint;
  803. paraloc1,
  804. paraloc2 : tcgpara;
  805. subsetref : tsubsetreference;
  806. temp : longint;
  807. indexdef : tdef;
  808. begin
  809. paraloc1.init;
  810. paraloc2.init;
  811. mulsize:=get_mul_size;
  812. if not is_packed_array(left.resultdef) then
  813. bytemulsize:=mulsize
  814. else
  815. bytemulsize:=mulsize div 8;
  816. newsize:=def_cgsize(resultdef);
  817. secondpass(left);
  818. if left.location.loc=LOC_CREFERENCE then
  819. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  820. else
  821. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  822. { an ansistring needs to be dereferenced }
  823. if is_ansistring(left.resultdef) or
  824. is_wide_or_unicode_string(left.resultdef) then
  825. begin
  826. if nf_callunique in flags then
  827. internalerror(200304236);
  828. {DM!!!!!}
  829. case left.location.loc of
  830. LOC_REGISTER,
  831. LOC_CREGISTER :
  832. begin
  833. {$ifdef m68k}
  834. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  835. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  836. {$else m68k}
  837. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  838. {$endif m68k}
  839. end;
  840. LOC_CREFERENCE,
  841. LOC_REFERENCE :
  842. begin
  843. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  844. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  845. end;
  846. LOC_CONSTANT:
  847. begin
  848. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  849. end;
  850. else
  851. internalerror(2002032218);
  852. end;
  853. if is_ansistring(left.resultdef) then
  854. offsetdec:=1
  855. else
  856. offsetdec:=2;
  857. location.reference.alignment:=offsetdec;
  858. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  859. if not(cs_zerobasedstrings in current_settings.localswitches) then
  860. update_reference_offset(location.reference,-1,offsetdec);
  861. end
  862. else if is_dynamic_array(left.resultdef) then
  863. begin
  864. case left.location.loc of
  865. LOC_REGISTER,
  866. LOC_CREGISTER :
  867. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  868. LOC_REFERENCE,
  869. LOC_CREFERENCE :
  870. begin
  871. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  872. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  873. left.location.reference,location.reference.base);
  874. end;
  875. else
  876. internalerror(2002032219);
  877. end;
  878. { a dynarray points to the start of a memory block, which
  879. we assume to be always aligned to a multiple of the
  880. pointer size
  881. }
  882. location.reference.alignment:=voidpointertype.size;
  883. end
  884. else
  885. begin
  886. { may happen in case of function results }
  887. case left.location.loc of
  888. LOC_CREGISTER,
  889. LOC_CMMREGISTER,
  890. LOC_REGISTER,
  891. LOC_MMREGISTER:
  892. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  893. end;
  894. location_copy(location,left.location);
  895. end;
  896. { location must be memory }
  897. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  898. internalerror(200411013);
  899. { offset can only differ from 0 if arraydef }
  900. if (left.resultdef.typ=arraydef) and
  901. not(is_dynamic_array(left.resultdef)) and
  902. (not(is_packed_array(left.resultdef)) or
  903. ((mulsize mod 8 = 0) and
  904. ispowerof2(mulsize div 8,temp)) or
  905. { only orddefs are bitpacked }
  906. not is_ordinal(resultdef)
  907. {$ifndef cpu64bitalu}
  908. or is_64bitint(resultdef)
  909. {$endif not cpu64bitalu}
  910. ) then
  911. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  912. if right.nodetype=ordconstn then
  913. begin
  914. { offset can only differ from 0 if arraydef }
  915. if cs_check_range in current_settings.localswitches then
  916. begin
  917. secondpass(right);
  918. case left.resultdef.typ of
  919. arraydef :
  920. rangecheck_array;
  921. stringdef :
  922. rangecheck_string;
  923. end;
  924. end;
  925. if not(is_packed_array(left.resultdef)) or
  926. ((mulsize mod 8 = 0) and
  927. (ispowerof2(mulsize div 8,temp) or
  928. { only orddefs are bitpacked }
  929. not is_ordinal(resultdef))) then
  930. begin
  931. extraoffset:=tordconstnode(right).value.svalue;
  932. update_reference_offset(location.reference,extraoffset,bytemulsize);
  933. { adjust alignment after this change }
  934. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  935. { don't do this for floats etc.; needed to properly set the }
  936. { size for bitpacked arrays (e.g. a bitpacked array of }
  937. { enums who are size 2 but fit in one byte -> in the array }
  938. { they will be one byte and have to be stored like that) }
  939. if is_packed_array(left.resultdef) and
  940. (tcgsize2size[newsize] <> bytemulsize) then
  941. newsize:=int_cgsize(bytemulsize);
  942. end
  943. else
  944. begin
  945. subsetref.ref := location.reference;
  946. subsetref.ref.alignment := left.resultdef.alignment;
  947. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  948. internalerror(2006081212);
  949. alignpow:=temp;
  950. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  951. subsetref.bitindexreg := NR_NO;
  952. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  953. subsetref.bitlen := resultdef.packedbitsize;
  954. if (left.location.loc = LOC_REFERENCE) then
  955. location.loc := LOC_SUBSETREF
  956. else
  957. location.loc := LOC_CSUBSETREF;
  958. location.sref := subsetref;
  959. end;
  960. end
  961. else
  962. { not nodetype=ordconstn }
  963. begin
  964. if (cs_opt_level1 in current_settings.optimizerswitches) and
  965. { if we do range checking, we don't }
  966. { need that fancy code (it would be }
  967. { buggy) }
  968. not(cs_check_range in current_settings.localswitches) and
  969. (left.resultdef.typ=arraydef) and
  970. not is_packed_array(left.resultdef) then
  971. begin
  972. extraoffset:=0;
  973. rightp:=actualtargetnode(@right);
  974. if rightp^.nodetype=addn then
  975. begin
  976. if taddnode(rightp^).right.nodetype=ordconstn then
  977. begin
  978. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  979. replacenode(rightp^,taddnode(rightp^).left);
  980. end
  981. else if taddnode(rightp^).left.nodetype=ordconstn then
  982. begin
  983. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  984. replacenode(rightp^,taddnode(rightp^).right);
  985. end;
  986. end
  987. else if rightp^.nodetype=subn then
  988. begin
  989. if taddnode(rightp^).right.nodetype=ordconstn then
  990. begin
  991. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  992. replacenode(rightp^,taddnode(rightp^).left);
  993. end;
  994. end;
  995. update_reference_offset(location.reference,extraoffset,mulsize);
  996. end;
  997. { calculate from left to right }
  998. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  999. internalerror(200304237);
  1000. secondpass(right);
  1001. if (right.expectloc=LOC_JUMP)<>
  1002. (right.location.loc=LOC_JUMP) then
  1003. internalerror(2006010801);
  1004. { if mulsize = 1, we won't have to modify the index }
  1005. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  1006. not valid_index_size(right.location.size) then
  1007. begin
  1008. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  1009. indexdef:=ptruinttype
  1010. end
  1011. else
  1012. indexdef:=right.resultdef;
  1013. { produce possible range check code: }
  1014. if cs_check_range in current_settings.localswitches then
  1015. begin
  1016. if left.resultdef.typ=arraydef then
  1017. rangecheck_array
  1018. else if (left.resultdef.typ=stringdef) then
  1019. rangecheck_string;
  1020. end;
  1021. { insert the register and the multiplication factor in the
  1022. reference }
  1023. if not is_packed_array(left.resultdef) then
  1024. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  1025. else
  1026. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  1027. end;
  1028. location.size:=newsize;
  1029. paraloc1.done;
  1030. paraloc2.done;
  1031. end;
  1032. begin
  1033. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1034. cloadparentfpnode:=tcgloadparentfpnode;
  1035. caddrnode:=tcgaddrnode;
  1036. cderefnode:=tcgderefnode;
  1037. csubscriptnode:=tcgsubscriptnode;
  1038. cwithnode:=tcgwithnode;
  1039. cvecnode:=tcgvecnode;
  1040. end.