ncgset.pas 56 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic assembler for in set/case labels
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgset;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,globals,constexp,symtype,
  22. node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
  23. type
  24. tcgsetelementnode = class(tsetelementnode)
  25. procedure pass_generate_code;override;
  26. end;
  27. Tsetpart=record
  28. range : boolean; {Part is a range.}
  29. start,stop : byte; {Start/stop when range; Stop=element when an element.}
  30. end;
  31. Tsetparts=array[1..8] of Tsetpart;
  32. { tcginnode }
  33. tcginnode = class(tinnode)
  34. procedure in_smallset(opdef: tdef; setbase: aint); virtual;
  35. function pass_1: tnode;override;
  36. procedure pass_generate_code;override;
  37. protected
  38. function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
  39. function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
  40. end;
  41. tcgcasenode = class(tcasenode)
  42. {
  43. Emits the case node statement. Contrary to the intel
  44. 80x86 version, this version does not emit jump tables,
  45. because of portability problems.
  46. }
  47. procedure pass_generate_code;override;
  48. protected
  49. with_sign : boolean;
  50. opsize : tdef;
  51. jmp_gt,jmp_lt,jmp_le : topcmp;
  52. { register with case expression }
  53. hregister,hregister2 : tregister;
  54. endlabel,elselabel : tasmlabel;
  55. { true, if we can omit the range check of the jump table }
  56. jumptable_no_range : boolean;
  57. { has the implementation jumptable support }
  58. min_label : tconstexprint;
  59. function blocklabel(id:longint):tasmlabel;
  60. procedure optimizevalues(var max_linear_list:aint;var max_dist:aword);virtual;
  61. function has_jumptable : boolean;virtual;
  62. procedure genjumptable(hp : pcaselabel;min_,max_ : aint); virtual;
  63. procedure genlinearlist(hp : pcaselabel); virtual;
  64. procedure genlinearcmplist(hp : pcaselabel); virtual;
  65. end;
  66. implementation
  67. uses
  68. systems,
  69. verbose,
  70. symconst,symdef,defutil,
  71. paramgr,
  72. procinfo,pass_2,tgobj,
  73. nbas,ncon,nflw,
  74. ncgutil,hlcgobj;
  75. {*****************************************************************************
  76. TCGSETELEMENTNODE
  77. *****************************************************************************}
  78. procedure tcgsetelementnode.pass_generate_code;
  79. begin
  80. { load first value in 32bit register }
  81. secondpass(left);
  82. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  83. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,false);
  84. { also a second value ? }
  85. if assigned(right) then
  86. begin
  87. secondpass(right);
  88. if codegenerror then
  89. exit;
  90. if right.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  91. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,u32inttype,false);
  92. end;
  93. { we doesn't modify the left side, we check only the type }
  94. location_copy(location,left.location);
  95. end;
  96. {*****************************************************************************
  97. *****************************************************************************}
  98. function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
  99. var
  100. compares,maxcompares:word;
  101. i:byte;
  102. begin
  103. analizeset:=false;
  104. fillchar(setparts,sizeof(setparts),0);
  105. numparts:=0;
  106. compares:=0;
  107. { Lots of comparisions take a lot of time, so do not allow
  108. too much comparisions. 8 comparisions are, however, still
  109. smalller than emitting the set }
  110. if cs_opt_size in current_settings.optimizerswitches then
  111. maxcompares:=8
  112. else
  113. maxcompares:=5;
  114. { when smallset is possible allow only 3 compares the smallset
  115. code is for littlesize also smaller when more compares are used }
  116. if is_small then
  117. maxcompares:=3;
  118. for i:=0 to 255 do
  119. if i in Aset then
  120. begin
  121. if (numparts=0) or (i<>setparts[numparts].stop+1) then
  122. begin
  123. {Set element is a separate element.}
  124. inc(compares);
  125. if compares>maxcompares then
  126. exit;
  127. inc(numparts);
  128. setparts[numparts].range:=false;
  129. setparts[numparts].stop:=i;
  130. end
  131. else
  132. {Set element is part of a range.}
  133. if not setparts[numparts].range then
  134. begin
  135. {Transform an element into a range.}
  136. setparts[numparts].range:=true;
  137. setparts[numparts].start:=setparts[numparts].stop;
  138. setparts[numparts].stop:=i;
  139. { there's only one compare per range anymore. Only a }
  140. { sub is added, but that's much faster than a }
  141. { cmp/jcc combo so neglect its effect }
  142. { inc(compares);
  143. if compares>maxcompares then
  144. exit; }
  145. end
  146. else
  147. begin
  148. {Extend a range.}
  149. setparts[numparts].stop:=i;
  150. end;
  151. end;
  152. analizeset:=true;
  153. end;
  154. procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
  155. begin
  156. { location is always LOC_REGISTER }
  157. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  158. { allocate a register for the result }
  159. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
  160. {**************************** SMALL SET **********************}
  161. if left.location.loc=LOC_CONSTANT then
  162. begin
  163. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
  164. right.resultdef, resultdef,
  165. left.location.value-setbase, right.location,
  166. location.register);
  167. end
  168. else
  169. begin
  170. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
  171. left.resultdef, opdef, true);
  172. register_maybe_adjust_setbase(current_asmdata.CurrAsmList, left.location,
  173. setbase);
  174. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, left.resultdef,
  175. right.resultdef, resultdef, left.location.register, right.location,
  176. location.register);
  177. end;
  178. end;
  179. function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
  180. begin
  181. { check if we can use smallset operation using btl which is limited
  182. to 32 bits, the left side may also not contain higher values !! }
  183. use_small:=is_smallset(right.resultdef) and
  184. not is_signed(left.resultdef) and
  185. ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
  186. (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
  187. { Can we generate jumps? Possible for all types of sets }
  188. checkgenjumps:=(right.nodetype=setconstn) and
  189. analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
  190. end;
  191. function tcginnode.pass_1: tnode;
  192. var
  193. setparts: Tsetparts;
  194. numparts: byte;
  195. use_small: boolean;
  196. begin
  197. result := inherited pass_1;
  198. if not(assigned(result)) and
  199. checkgenjumps(setparts,numparts,use_small) then
  200. expectloc := LOC_JUMP;
  201. end;
  202. procedure tcginnode.pass_generate_code;
  203. var
  204. adjustment,
  205. setbase : aint;
  206. l, l2 : tasmlabel;
  207. hr,
  208. pleftreg : tregister;
  209. setparts : Tsetparts;
  210. opsize : tcgsize;
  211. opdef : tdef;
  212. uopsize : tcgsize;
  213. uopdef : tdef;
  214. orgopsize : tcgsize;
  215. genjumps,
  216. use_small : boolean;
  217. i,numparts : byte;
  218. needslabel : Boolean;
  219. begin
  220. l2:=nil;
  221. { We check first if we can generate jumps, this can be done
  222. because the resultdef is already set in firstpass }
  223. genjumps := checkgenjumps(setparts,numparts,use_small);
  224. orgopsize := def_cgsize(left.resultdef);
  225. uopsize := OS_32;
  226. uopdef := u32inttype;
  227. if is_signed(left.resultdef) then
  228. begin
  229. opsize := OS_S32;
  230. opdef := s32inttype;
  231. end
  232. else
  233. begin
  234. opsize := uopsize;
  235. opdef := uopdef;
  236. end;
  237. needslabel := false;
  238. if not genjumps then
  239. { calculate both operators }
  240. { the complex one first }
  241. { not in case of genjumps, because then we don't secondpass }
  242. { right at all (so we have to make sure that "right" really is }
  243. { "right" and not "swapped left" in that case) }
  244. firstcomplex(self);
  245. secondpass(left);
  246. if (left.expectloc=LOC_JUMP)<>
  247. (left.location.loc=LOC_JUMP) then
  248. internalerror(2007070101);
  249. { Only process the right if we are not generating jumps }
  250. if not genjumps then
  251. secondpass(right);
  252. if codegenerror then
  253. exit;
  254. { ofcourse not commutative }
  255. if nf_swapped in flags then
  256. swapleftright;
  257. setbase:=tsetdef(right.resultdef).setbase;
  258. if genjumps then
  259. begin
  260. { location is always LOC_JUMP }
  261. current_asmdata.getjumplabel(l);
  262. current_asmdata.getjumplabel(l2);
  263. location_reset_jump(location,l,l2);
  264. { If register is used, use only lower 8 bits }
  265. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
  266. pleftreg := left.location.register;
  267. { how much have we already substracted from the x in the }
  268. { "x in [y..z]" expression }
  269. adjustment := 0;
  270. hr:=NR_NO;
  271. for i:=1 to numparts do
  272. if setparts[i].range then
  273. { use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
  274. begin
  275. { is the range different from all legal values? }
  276. if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
  277. begin
  278. { yes, is the lower bound <> 0? }
  279. if (setparts[i].start <> 0) then
  280. { we're going to substract from the left register, }
  281. { so in case of a LOC_CREGISTER first move the value }
  282. { to edi (not done before because now we can do the }
  283. { move and substract in one instruction with LEA) }
  284. if (left.location.loc = LOC_CREGISTER) and
  285. (hr<>pleftreg) then
  286. begin
  287. { don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
  288. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
  289. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
  290. pleftreg:=hr;
  291. end
  292. else
  293. begin
  294. { otherwise, the value is already in a register }
  295. { that can be modified }
  296. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
  297. setparts[i].start-adjustment,pleftreg)
  298. end;
  299. { new total value substracted from x: }
  300. { adjustment + (setparts[i].start - adjustment) }
  301. adjustment := setparts[i].start;
  302. { check if result < b-a+1 (not "result <= b-a", since }
  303. { we need a carry in case the element is in the range }
  304. { (this will never overflow since we check at the }
  305. { beginning whether stop-start <> 255) }
  306. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
  307. setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
  308. end
  309. else
  310. { if setparts[i].start = 0 and setparts[i].stop = 255, }
  311. { it's always true since "in" is only allowed for bytes }
  312. begin
  313. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  314. end;
  315. end
  316. else
  317. begin
  318. { Emit code to check if left is an element }
  319. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
  320. setparts[i].stop-adjustment,pleftreg,location.truelabel);
  321. end;
  322. { To compensate for not doing a second pass }
  323. right.location.reference.symbol:=nil;
  324. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  325. end
  326. else
  327. {*****************************************************************}
  328. { NO JUMP TABLE GENERATION }
  329. {*****************************************************************}
  330. begin
  331. { We will now generated code to check the set itself, no jmps,
  332. handle smallsets separate, because it allows faster checks }
  333. if use_small then
  334. begin
  335. in_smallset(opdef, setbase);
  336. end
  337. else
  338. {************************** NOT SMALL SET ********************}
  339. begin
  340. { location is always LOC_REGISTER }
  341. location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
  342. { allocate a register for the result }
  343. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  344. if right.location.loc=LOC_CONSTANT then
  345. begin
  346. { can it actually occur currently? CEC }
  347. { yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
  348. { note: this code assumes that left in [0..255], which is a valid }
  349. { assumption (other cases will be caught by range checking) (JM) }
  350. { load left in register }
  351. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
  352. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
  353. { emit bit test operation -- warning: do not use
  354. location_force_reg() to force a set into a register, except
  355. to a register of the same size as the set. The reason is
  356. that on big endian systems, this would require moving the
  357. set to the most significant part of the new register,
  358. and location_force_register can't do that (it does not
  359. know the type).
  360. a_bit_test_reg_loc_reg() properly takes into account the
  361. size of the set to adjust the register index to test }
  362. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
  363. left.resultdef,right.resultdef,uopdef,
  364. left.location.register,right.location,location.register);
  365. { now zero the result if left > nr_of_bits_in_right_register }
  366. hr := hlcg.getintregister(current_asmdata.CurrAsmList,uopdef);
  367. { if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
  368. { (left.location.size = location.size at this point) }
  369. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef, tcgsize2size[opsize]*8, left.location.register, hr);
  370. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size[opsize]*8)-1, hr);
  371. { if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
  372. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr, location.register);
  373. end { of right.location.loc=LOC_CONSTANT }
  374. { do search in a normal set which could have >32 elements
  375. but also used if the left side contains higher values > 32 }
  376. else if (left.location.loc=LOC_CONSTANT) then
  377. begin
  378. if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
  379. {should be caught earlier }
  380. internalerror(2007020402);
  381. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
  382. right.location,location.register);
  383. end
  384. else
  385. begin
  386. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
  387. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
  388. pleftreg := left.location.register;
  389. if (opsize >= OS_S8) or { = if signed }
  390. ((left.resultdef.typ=orddef) and
  391. ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
  392. (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
  393. ((left.resultdef.typ=enumdef) and
  394. ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
  395. (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
  396. begin
  397. current_asmdata.getjumplabel(l);
  398. current_asmdata.getjumplabel(l2);
  399. needslabel := True;
  400. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, left.resultdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
  401. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  402. hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
  403. hlcg.a_label(current_asmdata.CurrAsmList, l);
  404. end;
  405. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
  406. pleftreg,right.location,location.register);
  407. if needslabel then
  408. hlcg.a_label(current_asmdata.CurrAsmList, l2);
  409. end;
  410. {$ifndef cpuhighleveltarget}
  411. location.size := def_cgsize(resultdef);
  412. location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
  413. {$else not cpuhighleveltarget}
  414. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  415. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
  416. location.register:=hr;
  417. location.size := def_cgsize(resultdef);
  418. {$endif not cpuhighleveltarget}
  419. end;
  420. end;
  421. location_freetemp(current_asmdata.CurrAsmList, right.location);
  422. end;
  423. {*****************************************************************************
  424. TCGCASENODE
  425. *****************************************************************************}
  426. function tcgcasenode.blocklabel(id:longint):tasmlabel;
  427. begin
  428. if not assigned(blocks[id]) then
  429. internalerror(200411301);
  430. result:=pcaseblock(blocks[id])^.blocklabel;
  431. end;
  432. procedure tcgcasenode.optimizevalues(var max_linear_list:aint;var max_dist:aword);
  433. begin
  434. { no changes by default }
  435. end;
  436. function tcgcasenode.has_jumptable : boolean;
  437. begin
  438. { No jumptable support in the default implementation }
  439. has_jumptable:=false;
  440. end;
  441. procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : aint);
  442. begin
  443. internalerror(200209161);
  444. end;
  445. procedure tcgcasenode.genlinearlist(hp : pcaselabel);
  446. var
  447. first : boolean;
  448. last : TConstExprInt;
  449. scratch_reg: tregister;
  450. newsize: tcgsize;
  451. newdef: tdef;
  452. procedure genitem(t : pcaselabel);
  453. procedure gensub(value:tcgint);
  454. begin
  455. { here, since the sub and cmp are separate we need
  456. to move the result before subtract to help
  457. the register allocator
  458. }
  459. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
  460. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
  461. end;
  462. begin
  463. if assigned(t^.less) then
  464. genitem(t^.less);
  465. { do we need to test the first value? }
  466. if first and (t^._low>get_min_value(left.resultdef)) then
  467. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
  468. if t^._low=t^._high then
  469. begin
  470. if t^._low-last=0 then
  471. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
  472. else
  473. begin
  474. gensub(tcgint(t^._low.svalue-last.svalue));
  475. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
  476. OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
  477. end;
  478. last:=t^._low;
  479. end
  480. else
  481. begin
  482. { it begins with the smallest label, if the value }
  483. { is even smaller then jump immediately to the }
  484. { ELSE-label }
  485. if first then
  486. begin
  487. { have we to ajust the first value ? }
  488. if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
  489. gensub(tcgint(t^._low.svalue));
  490. end
  491. else
  492. begin
  493. { if there is no unused label between the last and the }
  494. { present label then the lower limit can be checked }
  495. { immediately. else check the range in between: }
  496. gensub(tcgint(t^._low.svalue-last.svalue));
  497. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
  498. end;
  499. gensub(tcgint(t^._high.svalue-t^._low.svalue));
  500. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
  501. last:=t^._high;
  502. end;
  503. first:=false;
  504. if assigned(t^.greater) then
  505. genitem(t^.greater);
  506. end;
  507. begin
  508. { do we need to generate cmps? }
  509. if (with_sign and (min_label<0)) then
  510. genlinearcmplist(hp)
  511. else
  512. begin
  513. { sign/zero extend the value to a full register before starting to
  514. subtract values, so that on platforms that don't have
  515. subregisters of the same size as the value we don't generate
  516. sign/zero-extensions after every subtraction
  517. make newsize always signed, since we only do this if the size in
  518. bytes of the register is larger than the original opsize, so
  519. the value can always be represented by a larger signed type }
  520. newsize:=tcgsize2signed[reg_cgsize(hregister)];
  521. if tcgsize2size[newsize]>opsize.size then
  522. begin
  523. newdef:=cgsize_orddef(newsize);
  524. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
  525. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
  526. hregister:=scratch_reg;
  527. opsize:=newdef;
  528. end;
  529. last:=0;
  530. first:=true;
  531. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  532. genitem(hp);
  533. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  534. end;
  535. end;
  536. procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
  537. var
  538. last : TConstExprInt;
  539. lastwasrange: boolean;
  540. procedure genitem(t : pcaselabel);
  541. {$ifndef cpu64bitalu}
  542. var
  543. l1 : tasmlabel;
  544. {$endif not cpu64bitalu}
  545. begin
  546. if assigned(t^.less) then
  547. genitem(t^.less);
  548. if t^._low=t^._high then
  549. begin
  550. {$if defined(cpu32bitalu)}
  551. if def_cgsize(opsize) in [OS_S64,OS_64] then
  552. begin
  553. current_asmdata.getjumplabel(l1);
  554. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
  555. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  556. cg.a_label(current_asmdata.CurrAsmList,l1);
  557. end
  558. else
  559. {$elseif defined(cpu16bitalu)}
  560. if def_cgsize(opsize) in [OS_S64,OS_64] then
  561. begin
  562. current_asmdata.getjumplabel(l1);
  563. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),GetNextReg(hregister2),l1);
  564. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
  565. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),GetNextReg(hregister),l1);
  566. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  567. cg.a_label(current_asmdata.CurrAsmList,l1);
  568. end
  569. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  570. begin
  571. current_asmdata.getjumplabel(l1);
  572. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),GetNextReg(hregister),l1);
  573. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  574. cg.a_label(current_asmdata.CurrAsmList,l1);
  575. end
  576. else
  577. {$elseif defined(cpu8bitalu)}
  578. if def_cgsize(opsize) in [OS_S64,OS_64] then
  579. begin
  580. current_asmdata.getjumplabel(l1);
  581. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  582. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  583. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1);
  584. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  585. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  586. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  587. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1);
  588. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
  589. cg.a_label(current_asmdata.CurrAsmList,l1);
  590. end
  591. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  592. begin
  593. current_asmdata.getjumplabel(l1);
  594. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  595. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  596. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1);
  597. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  598. cg.a_label(current_asmdata.CurrAsmList,l1);
  599. end
  600. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  601. begin
  602. current_asmdata.getjumplabel(l1);
  603. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1);
  604. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  605. cg.a_label(current_asmdata.CurrAsmList,l1);
  606. end
  607. else
  608. {$endif}
  609. begin
  610. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, aint(t^._low.svalue),hregister, blocklabel(t^.blockid));
  611. end;
  612. { Reset last here, because we've only checked for one value and need to compare
  613. for the next range both the lower and upper bound }
  614. lastwasrange := false;
  615. end
  616. else
  617. begin
  618. { it begins with the smallest label, if the value }
  619. { is even smaller then jump immediately to the }
  620. { ELSE-label }
  621. if not lastwasrange or (t^._low-last>1) then
  622. begin
  623. {$if defined(cpu32bitalu)}
  624. if def_cgsize(opsize) in [OS_64,OS_S64] then
  625. begin
  626. current_asmdata.getjumplabel(l1);
  627. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
  628. hregister2, elselabel);
  629. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
  630. hregister2, l1);
  631. { the comparisation of the low dword must be always unsigned! }
  632. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
  633. cg.a_label(current_asmdata.CurrAsmList,l1);
  634. end
  635. else
  636. {$elseif defined(cpu16bitalu)}
  637. if def_cgsize(opsize) in [OS_64,OS_S64] then
  638. begin
  639. current_asmdata.getjumplabel(l1);
  640. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
  641. GetNextReg(hregister2), elselabel);
  642. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
  643. GetNextReg(hregister2), l1);
  644. { the comparison of the low words must be always unsigned! }
  645. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
  646. hregister2, elselabel);
  647. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
  648. hregister2, l1);
  649. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
  650. GetNextReg(hregister), elselabel);
  651. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
  652. GetNextReg(hregister), l1);
  653. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
  654. cg.a_label(current_asmdata.CurrAsmList,l1);
  655. end
  656. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  657. begin
  658. current_asmdata.getjumplabel(l1);
  659. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
  660. GetNextReg(hregister), elselabel);
  661. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
  662. GetNextReg(hregister), l1);
  663. { the comparisation of the low dword must be always unsigned! }
  664. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
  665. cg.a_label(current_asmdata.CurrAsmList,l1);
  666. end
  667. else
  668. {$elseif defined(cpu8bitalu)}
  669. if def_cgsize(opsize) in [OS_64,OS_S64] then
  670. begin
  671. current_asmdata.getjumplabel(l1);
  672. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),elselabel);
  673. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  674. { the comparison of the low words must be always unsigned! }
  675. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),elselabel);
  676. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  677. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),elselabel);
  678. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1);
  679. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
  680. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  681. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel);
  682. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  683. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),elselabel);
  684. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  685. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),elselabel);
  686. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1);
  687. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
  688. cg.a_label(current_asmdata.CurrAsmList,l1);
  689. end
  690. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  691. begin
  692. current_asmdata.getjumplabel(l1);
  693. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel);
  694. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  695. { the comparison of the low words must be always unsigned! }
  696. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),elselabel);
  697. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  698. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),elselabel);
  699. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1);
  700. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
  701. cg.a_label(current_asmdata.CurrAsmList,l1);
  702. end
  703. else if def_cgsize(opsize) in [OS_16,OS_S16] then
  704. begin
  705. current_asmdata.getjumplabel(l1);
  706. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),elselabel);
  707. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1);
  708. { the comparisation of the low dword must be always unsigned! }
  709. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
  710. cg.a_label(current_asmdata.CurrAsmList,l1);
  711. end
  712. else
  713. {$endif}
  714. begin
  715. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, aint(t^._low.svalue), hregister,
  716. elselabel);
  717. end;
  718. end;
  719. {$if defined(cpu32bitalu)}
  720. if def_cgsize(opsize) in [OS_S64,OS_64] then
  721. begin
  722. current_asmdata.getjumplabel(l1);
  723. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
  724. blocklabel(t^.blockid));
  725. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
  726. l1);
  727. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  728. cg.a_label(current_asmdata.CurrAsmList,l1);
  729. end
  730. else
  731. {$elseif defined(cpu16bitalu)}
  732. if def_cgsize(opsize) in [OS_S64,OS_64] then
  733. begin
  734. current_asmdata.getjumplabel(l1);
  735. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
  736. blocklabel(t^.blockid));
  737. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
  738. l1);
  739. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  740. blocklabel(t^.blockid));
  741. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  742. l1);
  743. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
  744. blocklabel(t^.blockid));
  745. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
  746. l1);
  747. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
  748. cg.a_label(current_asmdata.CurrAsmList,l1);
  749. end
  750. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  751. begin
  752. current_asmdata.getjumplabel(l1);
  753. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
  754. blocklabel(t^.blockid));
  755. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
  756. l1);
  757. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  758. cg.a_label(current_asmdata.CurrAsmList,l1);
  759. end
  760. else
  761. {$elseif defined(cpu8bitalu)}
  762. if def_cgsize(opsize) in [OS_S64,OS_64] then
  763. begin
  764. current_asmdata.getjumplabel(l1);
  765. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),blocklabel(t^.blockid));
  766. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  767. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),blocklabel(t^.blockid));
  768. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  769. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),blocklabel(t^.blockid));
  770. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),l1);
  771. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
  772. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
  773. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid));
  774. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  775. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid));
  776. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  777. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),blocklabel(t^.blockid));
  778. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),l1);
  779. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
  780. cg.a_label(current_asmdata.CurrAsmList,l1);
  781. end
  782. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  783. begin
  784. current_asmdata.getjumplabel(l1);
  785. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid));
  786. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  787. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid));
  788. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  789. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),blocklabel(t^.blockid));
  790. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),l1);
  791. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
  792. cg.a_label(current_asmdata.CurrAsmList,l1);
  793. end
  794. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  795. begin
  796. current_asmdata.getjumplabel(l1);
  797. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),blocklabel(t^.blockid));
  798. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),l1);
  799. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
  800. cg.a_label(current_asmdata.CurrAsmList,l1);
  801. end
  802. else
  803. {$endif}
  804. begin
  805. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, aint(t^._high.svalue), hregister, blocklabel(t^.blockid));
  806. end;
  807. last:=t^._high;
  808. lastwasrange := true;
  809. end;
  810. if assigned(t^.greater) then
  811. genitem(t^.greater);
  812. end;
  813. begin
  814. last:=0;
  815. lastwasrange:=false;
  816. genitem(hp);
  817. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  818. end;
  819. procedure tcgcasenode.pass_generate_code;
  820. var
  821. oldflowcontrol: tflowcontrol;
  822. i : longint;
  823. distv,
  824. lv,hv,
  825. max_label: tconstexprint;
  826. labelcnt : tcgint;
  827. max_linear_list : aint;
  828. max_dist,
  829. dist : aword;
  830. oldexecutionweight : longint;
  831. begin
  832. location_reset(location,LOC_VOID,OS_NO);
  833. oldflowcontrol := flowcontrol;
  834. include(flowcontrol,fc_inflowcontrol);
  835. { Allocate labels }
  836. current_asmdata.getjumplabel(endlabel);
  837. current_asmdata.getjumplabel(elselabel);
  838. for i:=0 to blocks.count-1 do
  839. current_asmdata.getjumplabel(pcaseblock(blocks[i])^.blocklabel);
  840. with_sign:=is_signed(left.resultdef);
  841. if with_sign then
  842. begin
  843. jmp_gt:=OC_GT;
  844. jmp_lt:=OC_LT;
  845. jmp_le:=OC_LTE;
  846. end
  847. else
  848. begin
  849. jmp_gt:=OC_A;
  850. jmp_lt:=OC_B;
  851. jmp_le:=OC_BE;
  852. end;
  853. secondpass(left);
  854. if (left.expectloc=LOC_JUMP)<>
  855. (left.location.loc=LOC_JUMP) then
  856. internalerror(2006050501);
  857. { determines the size of the operand }
  858. opsize:=left.resultdef;
  859. { copy the case expression to a register }
  860. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
  861. {$ifndef cpu64bitalu}
  862. if def_cgsize(opsize) in [OS_S64,OS_64] then
  863. begin
  864. hregister:=left.location.register64.reglo;
  865. hregister2:=left.location.register64.reghi;
  866. end
  867. else
  868. {$endif not cpu64bitalu}
  869. hregister:=left.location.register;
  870. { we need the min_label always to choose between }
  871. { cmps and subs/decs }
  872. min_label:=case_get_min(labels);
  873. { Generate the jumps }
  874. {$ifdef OLDREGVARS}
  875. load_all_regvars(current_asmdata.CurrAsmList);
  876. {$endif OLDREGVARS}
  877. {$ifndef cpu64bitalu}
  878. if def_cgsize(opsize) in [OS_64,OS_S64] then
  879. genlinearcmplist(labels)
  880. else
  881. {$endif not cpu64bitalu}
  882. begin
  883. if cs_opt_level1 in current_settings.optimizerswitches then
  884. begin
  885. { procedures are empirically passed on }
  886. { consumption can also be calculated }
  887. { but does it pay on the different }
  888. { processors? }
  889. { moreover can the size only be appro- }
  890. { ximated as it is not known if rel8, }
  891. { rel16 or rel32 jumps are used }
  892. max_label:=case_get_max(labels);
  893. labelcnt:=case_count_labels(labels);
  894. { can we omit the range check of the jump table ? }
  895. getrange(left.resultdef,lv,hv);
  896. jumptable_no_range:=(lv=min_label) and (hv=max_label);
  897. { hack a little bit, because the range can be greater }
  898. { than the positive range of a aint }
  899. if (min_label<0) and (max_label>0) then
  900. distv:=max_label+min_label
  901. else
  902. distv:=max_label-min_label;
  903. if (distv>=0) then
  904. dist:=distv.uvalue
  905. else
  906. dist:=-distv.svalue;
  907. { optimize for size ? }
  908. if cs_opt_size in current_settings.optimizerswitches then
  909. begin
  910. if has_jumptable and
  911. (min_label>=int64(low(aint))) and
  912. (max_label<=high(aint)) and
  913. not((labelcnt<=2) or
  914. ((max_label-min_label)<0) or
  915. ((max_label-min_label)>3*labelcnt)) then
  916. begin
  917. { if the labels less or more a continuum then }
  918. genjumptable(labels,min_label.svalue,max_label.svalue);
  919. end
  920. else
  921. begin
  922. { a linear list is always smaller than a jump tree }
  923. genlinearlist(labels);
  924. end;
  925. end
  926. else
  927. begin
  928. max_dist:=4*labelcnt;
  929. if jumptable_no_range then
  930. max_linear_list:=4
  931. else
  932. max_linear_list:=2;
  933. { allow processor specific values }
  934. optimizevalues(max_linear_list,max_dist);
  935. if (labelcnt<=max_linear_list) then
  936. genlinearlist(labels)
  937. else
  938. begin
  939. if (has_jumptable) and
  940. (dist<max_dist) and
  941. (min_label>=int64(low(aint))) and
  942. (max_label<=high(aint)) then
  943. genjumptable(labels,min_label.svalue,max_label.svalue)
  944. else
  945. genlinearlist(labels);
  946. end;
  947. end;
  948. end
  949. else
  950. { it's always not bad }
  951. genlinearlist(labels);
  952. end;
  953. { estimates the repeat of each instruction }
  954. oldexecutionweight:=cg.executionweight;
  955. cg.executionweight:=cg.executionweight div case_count_labels(labels);
  956. if cg.executionweight<1 then
  957. cg.executionweight:=1;
  958. { generate the instruction blocks }
  959. for i:=0 to blocks.count-1 do
  960. begin
  961. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  962. cg.a_label(current_asmdata.CurrAsmList,pcaseblock(blocks[i])^.blocklabel);
  963. secondpass(pcaseblock(blocks[i])^.statement);
  964. { don't come back to case line }
  965. current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
  966. {$ifdef OLDREGVARS}
  967. load_all_regvars(current_asmdata.CurrAsmList);
  968. {$endif OLDREGVARS}
  969. hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
  970. end;
  971. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  972. { ...and the else block }
  973. hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
  974. if assigned(elseblock) then
  975. begin
  976. secondpass(elseblock);
  977. {$ifdef OLDREGVARS}
  978. load_all_regvars(current_asmdata.CurrAsmList);
  979. {$endif OLDREGVARS}
  980. end;
  981. cg.executionweight:=oldexecutionweight;
  982. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  983. hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
  984. { Reset labels }
  985. for i:=0 to blocks.count-1 do
  986. pcaseblock(blocks[i])^.blocklabel:=nil;
  987. flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
  988. end;
  989. begin
  990. csetelementnode:=tcgsetelementnode;
  991. cinnode:=tcginnode;
  992. ccasenode:=tcgcasenode;
  993. end.